Kreska pojawia się w lewym górnym rogu ekranu?! Wszystkie napięcia są poprawne? Wszystko wydaje się ok. winowajcą jest U72 (Tigerpoint PCBGA360). Na Ali za grosze max 15zł z wysyłką. Miałem taki przypadek z hp mini na podobnych podzespołach. Tu masz schemat.
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NAV51 Schematics Document
Intel Pineview Processor with Tigerpoint + DDRII
2010-03-15
3
3
REV: 0.3
4
4
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
Cover Page
Size
B
Date:
Document Number
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
E
1
of
33
A
B
C
D
E
Clock Generator
CK505
page 8
Compal Confidential
Thermal Sensor
EMC1402
page 5
Model Name : NAV51
File Name : LA-6311P
CRT Conn
page 10
1
1
RGB
ZZZ
LCD Conn.
PCB
Pineview
FCBGA 559
LVDS
DDRII-SO-DIMM
page 7
1.8V DDRII 667
22x22mm
page 9
DA60000H800
Memory BUS(DDRII)
page 4,5,6
DMI
X2 mode
GEN1
USB
HDA
Tigerpoint
PCI-Express
2
USB Port X2
PCBGA360
BlueTooth
17x17mm
page 15
SATA
page 11,12,13,14
MINI Card x1
WLAN
CMOS CAM
Azalia Codec
10/100 Ethernet
page 9
ALC272
AR8132L
page 20
page 20
HDD
page 16
page 20
Card Reader
ENE UB6252
LPC BUS
Transfermer
page 20
AMP & INT
Speaker
3
INT MIC
HeadPhone &
MIC Jack
3
SD/MMC
CONN
RJ45
Power ON/OFF
DC/DC Interface
page 25
page 18
ENE KBC
KB926
page
3VALW/5VALW
DC IN
2
page 20
page 26
page 23
SPI
I/O Board
17
0.89VP/1.5VP
0.9VSP/2.5VSP
BATT IN
page 24
page 28
CHARGER
Int.KBD
page 19
1.8V/VCCP
page 25
page 17
Touch Pad
page19
page 27
4
SPI ROM
4
CPU_CORE
page 29
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
Block Diagrams
Size
B
Date:
Document Number
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
E
2
of
33
A
B
C
D
E
Voltage Rails
External PCI Devices
Power Plane
S1
S3
S5
Adapter power supply (19V)
ON
ON
ON
B+
AC or battery power rail for power circuit.
ON
ON
ON
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+0.9VS
0.9V switched power rail for DDR terminator
ON
OFF
OFF
+VCCP
VCCP switched power rail
ON
OFF
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
+1.8V
1.8V power rail for DDR
ON
ON
OFF
+0.89V
Graphic core power rail
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3VS
3.3V switched power rail
ON
OFF
OFF
Device
Address
Device
Address
+5VALW
5V always on power rail
ON
ON
ON*
Smart Battery
0001 011X b
EMC1402
100_1100
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
1
Description
VIN
RTC power
ON
ON
ON
DEVICE
SLP_S3# SLP_S4# SLP_S5#
+VALW
+V
+VS
EC SM Bus1 address
EC SM Bus2 address
Tiger Point SM Bus address
Device
Full ON
HIGH
HIGH
HIGH
ON
ON
ON
ON
S1(Power On Suspend)
HIGH
HIGH
HIGH
ON
ON
ON
LOW
HIGH
HIGH
ON
ON
OFF
LOW
LOW
HIGH
ON
OFF
OFF
OFF
1010 000Xb
LOW
LOW
LOW
ON
OFF
OFF
OFF
UHCI1
UHCI2
BOARD ID Table(Page 17)
UHCI3
Vcc
Ra/Rc/Re
UHCI4
Board ID
0(EVT)
1(DVT)
2(PVT)
3(MP)
4
5
6
7
3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
PCIE table
USB table
EHCI1
3
2
OFF
S4 (Suspend to Disk)
1101 001Xb
LOW
S3 (Suspend to RAM)
Address
Clock Generator
(SLG8SP556VTR)
Clock
2
S5 (Soft OFF)
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
EHCI2
UHCI5
UHCI6
Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11
MB USB Conn1.
MB USB Conn2.
PCIE port1
4
LAN
PCIE port2
CMOS
Card Reader
Wireless Card
PCIE port3
PCIE port4
BT
WLAN
PCIE port5
PCIE port6
3
SATA table
HDD
SATA port0
SATA port1
SATA port2
BOARD ID Table
Board ID
0
1
2
3
4
5
6
7
PIRQ
1
DDR DIMMA
STATE
REQ/GNT #
No PCI Device
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
SIGNAL
IDSEL #
SATA port3
PCB Revision
0.1
0.2
SATA port4
SATA port5
4
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
Notes List
Size
B
Date:
Document Number
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
E
3
of
33
5
4
3
2
1
(7) DDR_A_DQS#[0..7]
PINEVIEW_M
(7) DDR_A_D[0..63]
PINEVIEW_M
U71A
U71B
REV = 1.1
(7) DDR_A_DM[0..7]
REV = 1.1
DMI_RX0_C
DMI_RX#0_C
DMI_RX1_C
DMI_RX#1_C
F3
F2
H4
G3
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
N7
N6
EXP_CLKINN
EXP_CLKINP
G2
G1
H3
J2
R10
R9
N10
N9
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
L10
L9
L8
RSVD_TP
RSVD_TP
N11
P11
EXP_TCLKINN
EXP_TCLKINP
RSVD
RSVD
K2
J1
M4
L3
RSVD
RSVD
RSVD
RSVD
T38
T39
K3
L2
M2
N2
RSVD
RSVD
RSVD
RSVD
XDP_PREQ#
XDP_PRDY#
XDP_PREQ#
XDP_PRDY#
(5)
(5)
(12)
DMI_RX#0
C435
C436
DMI_RX0_C
2
0.1U_0402_10V7K
1
DMI_RX#0_C
2
0.1U_0402_10V7K
1
DMI_RX1_C
2
0.1U_0402_10V7K
C
(12)
(12)
DMI_RX1
DMI_RX#1
C437
C438
XDP_BPM#3
XDP_BPM#2
XDP_BPM#1
XDP_BPM#0
XDP_BPM#1
XDP_BPM#0
(5,13) H_PWRGD
(13)
SLPIOVR#
(8)
(8)
+VCCP
(5,13,16,17,21) PLTRST#
DMI_RX#1_C
2
0.1U_0402_10V7K
1
XDP_BPM#3
XDP_BPM#2
(5)
(5)
1
R354 1
R347 1
CPU_ITP
CPU_ITP#
PLTRST# 1 R348
(5)
(5)
(5)
(5)
Close to CPU
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
(5)
XDP_TCK
2 1K_0402_5%
2 1K_0402_5%
2 1K_0402_1%
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CONN@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
G1
G2
(7) DDR_CKE0
(7) DDR_CKE1
(7) M_ODT0
(7) M_ODT1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
2
51 +-1% 0402
R342 1
2
51 +-1% 0402
XDP_TDO
R343 1
2
51 +-1% 0402
XDP_PREQ#
R344 1
2
51 +-1% 0402
+1.8V
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
AG22
AG21
AD19
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_DQS_5
DDR_A_DQS#_5
DDR_A_DM_5
AE26
AG27
AJ27
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
1K_0402_1%
2
DDR_REF
DDR_RPD
DDR_RPU
1
XDP_TRST#
2
51 +-1% 0402
R346 1
2
51 +-1% 0402
1
R142
1K_0402_1%
2
R345 1
XDP_TCK
FAN1 Conn
DDR_A_DQS_6
DDR_A_DQS#_6
DDR_A_DM_6
AE30
AF29
AF30
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
AB27
AA27
AB26
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
AA24
AB25
W24
W22
AB24
AB23
AA23
W27
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
R370
10K_0402_5%
@ T40
AB11
AB13
T41
R50
B
RSVD_TP
RSVD_TP
DDR_VREF
DDR_RPD
DDR_RPU
AK29
C1179
0.1U_0402_16V4Z
AL28
AK28
AJ26
RSVD
2
DDR_A
+5VS
Modify D38 D39 D40 Pin define
10U_0805_10V4Z
+3VS
1000P_0402_50V7K
40mil
1
+VCC_FAN1
(21) FAN_SPEED1
JP12
1
2
3
1
2
3
4
5
GND
GND
1
C311
100P_0402_50V8J
ACES_85204-0300N
CONN@
Update symbol 0111.
4
PJDLC05C_SOT23-3
1
C1150
1
2
1
D40
R256
10K_0402_5%
2
2
1
XDP_TRST#
XDP_TDI
PJDLC05C_SOT23-3
D39
C313
1
2
2
2
3
3
C1151
0.1U_0402_16V4Z
R242
D38
2
APL5607KI-TRG_SO8
A
XDP_PREQ#
XDP_TDO
1
2
D19
DAN217_SC59
@
8
7
6
5
3
GND
GND
GND
GND
1
EN
VIN
VOUT
VSET
08/13
+1.8V
XDP_TMS
XDP_TCK
2
U12
1
2
3
4
+5VS
PJDLC05C_SOT23-3
2.2U_0603_10V6K
2
3
C312
1
5
AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6
R369
10K_0402_5%
1
R341 1
XDP_TMS
1
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3
DDR_A_DQS_7
DDR_A_DQS#_7
DDR_A_DM_7
AD17
AC17
AB15
AB17
+VCCP
XDP_TDI
+VCC_FAN1
1
2
0_0402_5%
R47
AK5
AK3
AJ3
DDR_A_DQS_4
DDR_A_DQS#_4
DDR_A_DM_4
DDR_A_CK_3
DDR_A_CK_3#
DDR_A_CK_4
DDR_A_CK_4#
+1.8V
XDP Reserve
EN_FAN1
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_CK_0
DDR_A_CK_0#
DDR_A_CK_1
DDR_A_CK_1#
AB4
AK8
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
AG15
AF15
AD13
AC13
AC15
AD15
AF13
AG13
(7)
(7)
(7)
(7)
ACES_87151-24051
(21)
AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10
DDR_A_DQS_3
DDR_A_DQS#_3
DDR_A_DM_3
DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
AK24
AH26
AH24
AK27
AD8
AD10
AE8
DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3
M_ODT0
M_ODT1
(7) DDR_CS#0
(7) DDR_CS#1
JP16
(5)
(5)
DMI_RX0
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
1 OF 6
PINEVIEW-M_FCBGA8559
(12)
AH10
AH9
AK10
AJ8
AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_CS#_0
DDR_A_CS#_1
DDR_A_CS#_2
DDR_A_CS#_3
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1
DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2
AH22
AK25
AJ21
AJ25
AB8
AD7
AA9
DDR_A_DQS_2
DDR_A_DQS#_2
DDR_A_DM_2
AJ20
AH20
AK11
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_CKE0
DDR_CKE1
(7) DDR_A_BS0
(7) DDR_A_BS1
(7) DDR_A_BS2
AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
AK22
AJ22
AK21
Must be placed within 500 mils from Pineview-M pins
(7) DDR_A_WE#
(7) DDR_A_CAS#
(7) DDR_A_RAS#
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0
DDR_A_DQS_1
DDR_A_DQS#_1
DDR_A_DM_1
DDR_CS#0
DDR_CS#1
R162
R203 49.9_0402_1%
750_0402_1%
AD3
AD2
AD4
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
D
(8) CLK_CPU_EXP#
(8) CLK_CPU_EXP
DDR_A_DQS_0
DDR_A_DQS#_0
DDR_A_DM_0
AH19
AJ18
AK18
AK16
AJ14
AH14
AK14
AJ12
AH13
AK12
AK20
AH12
AJ11
AJ24
AJ10
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
(7) DDR_A_MA[0..14]
DMI
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
(7) DDR_A_DQS[0..7]
DMI_TX0 (12)
DMI_TX#0 (12)
DMI_TX1 (12)
DMI_TX#1 (12)
2
DDR_RPU
80.6_0402_1%
C1180
0.01U_0402_16V7K
R243
DDR_RPD
80.6_0402_1%
D
C
B
A
2 OF 6
PINEVIEW-M_FCBGA8559
Add 2009-6-17
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Pineview(1/3)
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
4
of
33
5
4
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
N31
P30
P29
N30
CRT_DDC_DATA
CRT_DDC_CLK
2 10_0402_5%
2 10_0402_5%
L31
L30
DAC_IREF
R249 1
R247 1
P28
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
Y30
Y29
AA30
AA31
REFCLKINP
REFCLKINN
REFSSCLKINP
REFSSCLKINN
K29
J30
L5
AA3
2
PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTIN#
1
W8
W9
HPL_CLKINN
HPL_CLKINP
C
AA21
W21
T21
V21
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
LIBG
LVBG
LVREFH
LVREFL
LBKLT_EN
LBKLT_CTL
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
G6
G10
G8
E11
F15
H_DPRSTP#
H_DPSLP#
H_INIT#
XDP_PRDY#
XDP_PREQ#
THERMTRIP#
E13
H_THERMTRIP#
C18
W1
H_PROCHOT#
H_PWRGD
A13
H27
R151
2.37K_0402_1%
GMCH_ENBKL
(21) GMCH_ENBKL
(9) DPST_PWM
(9)
LVDS_SCL
(9)
LVDS_SDA
(9) GMCH_ENVDD
0_0402_5%
R200
PM_DPRSLPVR (13)
PM_EXTTS#0 (7)
CLK_CPU_HPLCLK# (8)
CLK_CPU_HPLCLK (8)
1
R306 1
GMCH_CRT_R
1
R305
2 @
0_0402_5%
BOM change.012510.
VGATE
2
0_0402_5%
(4)
(4)
(4)
(4)
(8,13,31)
G11
E15
G13
F13
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
T48
T49
T50
T51
PCH_OK (13)
R307
(4)
(4)
(4)
(4)
(4)
2
150_0402_1%
1 R308
2
150_0402_1%
1 R309
2
150_0402_1%
GMCH_CRT_G
GMCH_CRT_B
GMCH_ENBKL
RSVD
RSVD
T55
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRST#
H_THERMDA
H_THERMDC
R34
100K_0402_5%
T58
BSEL_0
BSEL_1
BSEL_2
THRMDA_1
THRMDC_1
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
L7
D20
H13
D18
K9
D19
K7
RSVD
TDI
TDO
TCK
TMS
TRST#
D30
E30
H30
H29
H28
G30
G29
F29
E29
RSVD_TP
RSVD_TP
EXTBGREF
G5
D14
D13
B14
C14
C16
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
BPM_2_0#/RSVD
BPM_2_1#/RSVD
BPM_2_2#/RSVD
BPM_2_3#/RSVD
K5
H5
K6
RSVD
RSVD
RSVD
RSVD
B18
B20
C20
B21
H10
J10
XDP_TDO
T61
XDP_TRST#
H_PWRGD
1
C1171
470P_0402_50V7K
2
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
C30
D31
+VCCP
+VCCP
H_EXTBGREF
H_PROCHOT#
PM_EXTTS#0
U2
1
VDD
SMCLK
8
EC_SMB_CK2
2
DP
SMDATA
7
EC_SMB_DA2
H_THERMDC
2200P_0402_50V7K
3
DN
ALERT#
6
2
GND
5
EC_SMB_CK2 (21)
Close to Processor
pin
Close to Processor
pin
EC_SMB_DA2 (21)
R58 1
10K_0402_5%
1
2
placed within 0.5 " of processor
pin and 5mils spacing.
2006/08/18
Deciphered Date
4
3
1
R156
3.3K_0402_1%
2
placed within 0.5 " of processor
pin and 5mils spacing.
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Address:100_1100
R155
2K_0402_1%
+3VS
Issued Date
EMC1402-1-ACZL-TR MSOP 8P SENSOR
C940
C80
C939
R202
68_0402_5%
1U_0603_10V6K
1
1
H_THERMDA
R244
976_0402_1%
R144
1K_0402_1%
H_GTLREF
2
0.1U_0402_16V4Z
B
4 OF 6
R143
10K_0402_5%
5
T26
T27
H_EXTBGREF
Add 470PF on H_SMI# for known issue 07/08
CPU THERMAL SENSOR
THERM#
(31)
(31)
(31)
(31)
(31)
(31)
(31)
PINEVIEW-M_FCBGA8559
+VCCP
4
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
THRMDA_2/RSVD
THRMDC_2/RSVD
+3VS
2
CPU_BSEL0 (8)
CPU_BSEL1 (8)
CPU_BSEL2 (8)
XDP_TMS
T62
H_SMI#
CLK_CPU_BCLK# (8)
CLK_CPU_BCLK (8)
XDP_TDI
T60
T63
3 OF 6
CLK_CPU_BCLK#
CLK_CPU_BCLK
XDP_TCK
T59
To be placed & lt; 500 mils to U71 ball
PINEVIEW-M_FCBGA8559
C79
H_PWRGD (4,13)
L6
E17
BCLKN
BCLKP
BPM_1_0#
BPM_1_1#
BPM_1_2#
BPM_1_3#
B
1
H_THERMTRIP# (11)
C
To be placed & lt; 250 mils to U71 ball
A
H_DPRSTP# (13)
H_DPSLP# (13)
H_INIT# (11)
XDP_PRDY# (4)
XDP_PREQ# (4)
PLTRST# (4,13,16,17,21)
H_PWROK
2
H_SMI# (11)
H_A20M# (11)
H_FERR# (11)
H_INTR (11)
H_NMI
(11)
H_IGNNE# (11)
H_STPCLK# (11)
Modify 08/04
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
+3VS
D
H_GTLREF
R151 be placed U71.R22
CPU_DREFCLK (8)
CPU_DREFCLK# (8)
CPU_SSCDREFCLK (8)
CPU_SSCDREFCLK# (8)
CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK
MISC
T22
T23
T24
T25
PM_EXTTS#1
PM_EXTTS#0
H_PWROK
PLTRST#
R22
J28
N22
N23
L27
L26
L23
K25
K23
K24
H26
H_SMI#
H_A20M#
H_FERR#
H_INTR
H_NMI
H_IGNNE#
H_STPCLK#
DPRSTP#
DPSLP#
INIT#
PRDY#
PREQ#
LA_CLKN
LA_CLKP
LA_DATAN_0
LA_DATAP_0
LA_DATAN_1
LA_DATAP_1
LA_DATAN_2
LA_DATAP_2
E7
H7
H6
F10
F11
E5
F8
GTLREF
VSS
U25
U26
R23
R24
N26
N27
R26
R27
LVDS_ACLK#
LVDS_ACLK
LVDS_A0#
LVDS_A0
LVDS_A1#
LVDS_A1
LVDS_A2#
LVDS_A2
SMI#
A20M#
FERR#
LINT0
LINT1
IGNNE#
STPCLK#
PROCHOT#
CPUPWRGOOD
GMCH_CRT_DATA (10)
GMCH_CRT_CLK (10)
R201
665_0402_1%
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
RSVD
R1378
1K_0402_5%
AA7
AA6
R5
R6
REV = 1.1
GMCH_CRT_R (10)
GMCH_CRT_G (10)
GMCH_CRT_B (10)
CPU_DREFCLK
CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
PINEVIEW_M
U71D
R201 be placed & lt; 500 mils to U71.P28
XDP_RSVD_09
T18
T19
T20
T21
GMCH_CRT_HSYNC (10)
GMCH_CRT_VSYNC (10)
ICH
M30
M29
LVDS
CRT_HSYNC
CRT_VSYNC
1U_0603_10V6K
T37
1
CPU
L11
REV = 1.1
VGA
D
XDP_RSVD_00
XDP_RSVD_01
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04
XDP_RSVD_05
XDP_RSVD_06
XDP_RSVD_07
XDP_RSVD_08
XDP_RSVD_09
XDP_RSVD_10
XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17
2
R249 be placed & lt; 750 mils to U71.M30
R247 be placed & lt; 750 mils to U71.M29
PINEVIEW_M
U71C
D12
T2
A7
T12
D6
T3
C5
T4
C7
T13
C6
T5
D8
T6
B7
T7
A9
T14
XDP_RSVD_09 D9
C8
T8
B8
T15
C10
T9
D10
T16
B11
T10
B10
T17
B12
T11
C11
T28
3
2
Title
Pineview(2/3)
Size
B
Date:
Document Number
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
5
of
33
A
4
3
2
1
U71F
+CPU_CORE
U71E
GFX supply current: 1.38A
Sustained GFX supply current: 1.05A
PINEVIEW_M
+0.89V
REV = 1.1
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
CPU
T13
T14
T16
T18
T19
V13
V19
W14
W16
W18
W19
GFX/MCH
D
DDR supply current 2.27A
+1.8V
2.2U_0603_10V6K2.2U_0603_10V6K
C188
2
2
2
C187 C186
C85
2
1
1
1
1
2.2U_0603_10V6K 2.2U_0603_10V6K
+1.8V
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCCK_DDR
VCCCK_DDR
1
C429
1
C430
1
C431
2
2
2
2
Please closed U71
+CPU_CORE
2 x 330uF(9mohm/2)
1
+
C275
330U 2.5V Y
2
1
C55
22UF 6.3V M X5R 0805
1
1
C236
C243
2
2
4.7U_0603_6.3V6K
C243 to closed U71.U10
2
AA10
AA11
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCSENSE
VSSSENSE
VCCA
VCCACK_DDR
VCCACK_DDR
C29
B29
Y2
1
+RING_EAST
2
0_0603_5%
1
2
C242
1U_0603_10V6K
R21
C1152
C1153
1
C1154
1
2
VCCSENSE
VSSSENSE
2
1
1
2
+RING_WEST
2
0_0603_5%
1
C64
1U_0603_10V6K
1
2
2
1
1
2
C237
1U_0603_10V6K
2
+VCC_DMI
2
0_0603_5%
C68
1U_0603_10V6K
B4
B3
1
2
+VCCA_VCCD
VCCSENSE (31)
VSSSENSE (31)
+1.5VS
1
Core
+CPU_CORE
analog supply current: 0.08A
VCCSENSE
1
VSSSENSE
C1161
0.1U_0402_10V6K
C241
1U_0603_10V6K
R28
1
C391
2 0.01U_0402_16V7K
D4
1
Please closed U71.Y2
R32
2
100_0402_1%
R31
2
100_0402_1%
VCCD_AB_DPL
B
Please closed U71.D4
+1.8VS
1
2
AC31
+1.8VS
VCCSFR_AB_DPL
VCCALVDS
VCCDLVDS
1
2
+VCC_CRT_DAC T30
VCCACRTDAC
+3VS
+RING_EAST
+RING_WEST
C50 1
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL
supply current: 0.33A
@
2
1U_0603_10V6K
+VCCP
J31
C3
B2
C2
A21
VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI
VCCA_DMI
VCCA_DMI
VCCA_DMI
DMI
GIO supply current: 0.006A T31
V30
W31
T1
T2
T3
+VCC_ALVD
+VCC_DLVD
R25
+VCC_CRT_DAC
1
2
MBK1608601YZF_2P 1
LVDS supply current: 0.06A
LVDS
1
0_0603_5%
VCCD_HMPLL
EXP\CRT\PLL
C192
1U_0603_10V6K
R321
C189
1U_0603_10V6K
V11
2
RSVD
VCCSFR_DMIHMPLL
VCCP
5 OF 6
PINEVIEW-M_FCBGA8559
P2
AA1
2
+VCC_DMI
DMI analog supply current: 0.48A
+DMI_HMPLL
1 R18
2
0_0603_5%
SFR & DMIHMPLL supply current: 0.104A
E2
+VCCP
1
2
1
C51
1
2
10U_0805_10V4Z
2
2
0.1U_0402_10V6K
C15
C77
C78
2
1
1U_0402_6.3V6K
2
1
1U_0402_6.3V6K
2
1
1U_0402_6.3V6K
2
1
1U_0402_6.3V6K
C75
2
1
1U_0402_6.3V6K
C76
2
1
1U_0402_6.3V6K
C70
C81
1
1
1U_0402_6.3V6K
C71
2.2U_0603_10V6K
C74
2
+DMI_HMPLL
2
C69
1U_0603_10V6K
C1162
0.1U_0402_10V6K
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4
VSS
T29
D
C
B
+VCC_DLVD
2
A
C235
1U_0603_10V6K
2
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Close Chipset pin
Modify to 2.2U 05/11
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
REV = 1.1
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
1
C276
330U_B2_2.5VM_R15M
PINEVIEW_M
6 OF 6
PINEVIEW-M_FCBGA8559
+VCC_ALVD
R26 1
2
1 100NH +-5% LL1608-FSLR10J 1
C56
C1155
22UF 6.3V M X5R 0805 H1.25
1U_0603_10V6K
2
2
R27
1
2
0_0603_5%
+
C239
1U_0603_10V6K
1
T56
+0.89V
A
R20
+CPU_CORE
+VCCPProcessor
VCCP
VCCP
AA19
330U 2.5V Y
R53
1
2
0_0805_5%
VCCP
Display PLL SFR and CRT DAC supply
current: 0.154A
+ C278
2
POWER
2
U10
U5
U6
U7
U8
U9
V2
V3
V4
W10
W11
+VCCP
1
DDR
+VCCA_VCCD
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR analog supply current: 1.32A
1U_0402_6.3V6K
C267
22UF 6.3V M X5R 0805
AK7
AL7
1
1
C428
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
C
1U_0402_6.3V6K
22UF 6.3V M X5R 0805
AK13
AK19
AK9
AL11
AL16
AL21
AL25
1U_0402_6.3V6K
A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21
22UF 6.3V M X5R 0805
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A11
A16
A19
A29
A3
A30
A4
AA13
AA14
AA16
AA18
AA2
AA22
AA25
AA26
AA29
AA8
AB19
AB21
AB28
AB29
AB30
AC10
AC11
AC19
AC2
AC21
AC28
AC30
AD26
AD5
AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10
AG3
AH18
AH23
AH28
AH4
AH6
AH8
AJ1
AJ16
AJ31
AK1
AK2
AK23
AK30
AK31
AL13
AL19
AL2
AL23
AL29
AL3
AL30
AL9
B13
B16
B19
B22
B30
B31
B5
B9
C1
C12
C21
C22
C25
C31
D22
E1
E10
E19
E21
E25
E8
F17
F19
GND
5
4
3
2
Title
Pineview(3/3)
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
6
of
33
5
4
3
2
(4) DDR_A_D[0..63]
1
1
(4) DDR_A_DM[0..7]
R61
Layout Note:
Place near JDIM1
(4) DDR_A_DQS[0..7]
C112
2.2U 6.3V M X5R 0402
2
+DIMM_VREF
R62
Share +DIMM_VREF for
1.DDRII VREF
2.GMCH SM_VREF_0
SM_VREF_1
1K_0402_1%
1
2
1
C130
2.2U_0603_6.3V4Z
1
2
C109
2.2U_0603_6.3V4Z
2
C110
2.2U_0603_6.3V4Z
C129
2.2U_0603_6.3V4Z
C128
2.2U_0603_6.3V4Z
2
+1.8V
2
1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D8
DDR_A_D9
1
D
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
1K_0402_1%
2
(4) DDR_A_MA[0..14]
1
C111
0.1U_0402_16V4Z
2
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
2
1
2
1
2
C107
0.1U_0402_16V4Z
1
C108
0.1U_0402_16V4Z
2
C105
0.1U_0402_16V4Z
+
C106
0.1U_0402_16V4Z
C94
220U_B2_2.5VM_R35
1
DDR_A_D16
DDR_A_D17
1
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D24
DDR_A_D25
1
DDR_A_DM3
2
DDR_A_D26
DDR_A_D27
(4)
C
DDR_CKE0
(4) DDR_A_BS2
DDR_CKE0
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
(4) DDR_A_BS0
(4) DDR_A_WE#
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
(4) DDR_A_CAS#
(4)
DDR_CS#1
DDR_A_CAS#
DDR_CS#1
(4)
M_ODT1
M_ODT1
DDR_A_D32
DDR_A_D33
+0.9VS
2
1
2
C446
0.1U_0402_16V4Z
2
1
C445
0.1U_0402_16V4Z
2
1
C444
0.1U_0402_16V4Z
2
1
C443
0.1U_0402_16V4Z
2
1
C442
0.1U_0402_16V4Z
2
1
C441
0.1U_0402_16V4Z
2
1
C440
0.1U_0402_16V4Z
2
1
C439
0.1U_0402_16V4Z
2
1
C89
0.1U_0402_16V4Z
2
1
C118
0.1U_0402_16V4Z
2
1
C120
0.1U_0402_16V4Z
2
1
C90
0.1U_0402_16V4Z
2
1
C91
0.1U_0402_16V4Z
2
1
C115
0.1U_0402_16V4Z
2
1
C122
0.1U_0402_16V4Z
2
1
C88
0.1U_0402_16V4Z
2
1
C87
0.1U_0402_16V4Z
2
1
C121
0.1U_0402_16V4Z
1
C86
0.1U_0402_16V4Z
2
C117
0.1U_0402_16V4Z
B
C119
0.1U_0402_16V4Z
DDR_A_DQS#4
DDR_A_DQS4
1
DDR_A_D34
DDR_A_D35
1
DDR_A_D40
DDR_A_D41
2
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
+0.9VS
DDR_A_D50
DDR_A_D51
RP5
8
7
6
5
47_0804_8P4R_5%
RP2
1
8
2
7
3
6
4
5
8
7
6
5
1
2
3
4
DDR_A_BS1
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_BS0
DDR_A_MA10
DDR_A_MA1
DDR_A_MA3
47_0804_8P4R_5%
RP4
DDR_A_MA6
8
1
DDR_A_MA7
7
2
DDR_A_MA11
6
3
DDR_A_MA14
5
4
47_0804_8P4R_5%
RP3
M_ODT1
1
8
DDR_CS#1
2
7
DDR_A_CAS# 3
6
DDR_A_WE# 4
5
DDR_A_D56
DDR_A_D57
Layout Note:
Place these resistor
closely DIMMA,all
trace length & lt; 1000 mil
47_0804_8P4R_5%
RP1
8
1 DDR_A_MA5
7
2 DDR_A_MA8
6
3 DDR_A_MA9
5
4 DDR_A_MA12
DDR_CKE1
DDR_A_BS2
DDR_CKE0
1 R163
2
47_0402_5%
1 R60
2
47_0402_5%
1 R59
2
47_0402_5%
5
DDR_A_D58
DDR_A_D59
(8,17) CLK_SMBDATA
(8,17) CLK_SMBCLK
+3VS
C116
1
2
A
47_0804_8P4R_5%
DDR_A_DM7
47_0804_8P4R_5%
Layout Note:
Place these resistor
closely DIMMA,all
trace length
Max=1000 mil
4
C141
1
2
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
G1
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
G2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
201
04/30
DDR_A_D4
DDR_A_D5
DDR_A_DM0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
D
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 (4)
M_CLK_DDR#0 (4)
DDR_A_D14
DDR_A_D15
202
FOX_AS0A426-N4RN-7F
R64
DDR_A_DM2
1
2
0_0402_5%
PM_EXTTS#0 (5)
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1
DDR_CKE1 (4)
C
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1
DDR_A_RAS#
DDR_CS#0
DDR_A_BS1 (4)
DDR_A_RAS# (4)
DDR_CS#0 (4)
M_ODT0
DDR_A_MA13
M_ODT0 (4)
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
B
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 (4)
M_CLK_DDR#1 (4)
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R66
R65
1
1
2 10K_0402_5%
2 10K_0402_5%
For EMI's request add it.021110.
A
Compal Electronics, Inc.
Compal Secret Data
2006/08/18
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_A_D20
DDR_A_D21
DIMMA
Security Classification
Issued Date
CLK_SMBDATA
CLK_SMBCLK
0.1U_0402_16V4Z
1
2
3
4
0.1U_0402_16V4Z
RP6
DDR_A_MA13
M_ODT0
DDR_CS#0
DDR_A_RAS#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
DDR_A_D18
DDR_A_D19
@
Change to SP07F001720
JDIM1
+DIMM_VREF
+1.8V
+1.8V
CONN@
20mils
(4) DDR_A_DQS#[0..7]
1
+1.8V
09/03
2
Title
DDRII-SODIMMA
Size
B
Date:
Document Number
Rev
1.0
NAV51 LA-6311P
Sheet
Monday, March 22, 2010
1
7
of
33
5
FSB
FSA
CLKSEL2
CLKSEL1
CLKSEL0
0
266
100
PCI
MHz
REF
MHz
33.3
14.318
DOT_96 USB
MHz
MHz
96.0
+3VS
48.0
0
0
1
133
100
33.3
14.318
96.0
48.0
0
1
0
200
100
33.3
14.318
96.0
48.0
2
1
166
100
33.3
14.318
96.0
48.0
0
333
100
33.3
14.318
96.0
48.0
1
0
1
100
100
33.3
14.318
96.0
48.0
400
100
33.3
14.318
96.0
C1102
1
L29 2
C1117
1
+3VS
1 FBMA-L11-201209-221LMA30T_0805
1
1
1
C174
C172
C1145
10U_0603_6.3V6M 0.1U_0402_16V4Z
2 47P_0402_50V8J 2
2
2
1
1
C138
2 0.1U_0402_16V4Z
2
C148
R72
0.1U_0402_16V4Z
1 FBMA-L11-201209-221LMA30T_0805
1
1
C175
C1146
10U_0603_6.3V6M
2
2
47P_0402_50V8J
2.2K_0402_5%
1
CLK_SMBDATA
4
6
(13) PCH_SMBDATA
+1.05VM_CK505
L30 2
C1110
1
R91
2.2K_0402_5%
2N7002DW-T/R7_SOT363-6
Q10A
CLK_SMBCLK
48.0
1
1
0
1
1
1
2
2
1
1
C139
0.1U_0402_16V4Z
2
2
1
C167
0.1U_0402_16V4Z
2
1
C137
0.1U_0402_16V4Z
2
1
C146
0.1U_0402_16V4Z
2
+3VS
C165
5
1
0
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
10U_0805_10V4Z
10U_0805_10V4Z
0
D
+VCCP
C1114
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0
SRC
MHz
10U_0805_10V4Z
10U_0805_10V4Z
0
CPU
MHz
3
+3VM_CK505
2
FSC
4
D
0.1U_0402_16V4Z
3
(13) PCH_SMBCLK
Q10B
2N7002DW-T/R7_SOT363-6
Reserved
SA00003H730 (Realtek :RTM890N-397-VC-GRT)
Change co-lay net name to +1.5VM_CK505 07/03
+3VM_CK505
1
R1348
2
0_0603_5%
+3VM_CK505
@
+3VS
+1.5VM_CK505
1
2
R1349
0_0603_5%
0.1U_0402_16V4Z
BOM change.012510.
1
1
1
1
1
C1119
C140
C160
C169
47P_0402_50V8J
C1147
10U_0603_6.3V6M 0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
R435
1
10K_0402_5%
CK_PWRGD
1
1
R68 @
VDD_PCI
CPU_0
VDD_CPU
CPU_0#
70
CLK_CPU_BCLK#
CPU_1
68
CLK_CPU_HPLCLK
CPU_1#
67
CLK_CPU_HPLCLK#
CLK_CPU_DREFCLK
VDD_48
VDD_PLL3
66
VDD_CPU_IO
SRC_0/DOT_96
24
31
VDD_PLL3_IO
SRC_0#/DOT_96#
25
CLK_CPU_DREFCLK#
62
VDD_SRC_IO
52
VDD_SRC_IO
23
38
VDD_SRC_IO
2 R74 @
22_0402_5%
1
2 R75
33_0402_5%
LCDCLK/27M
2
(12) CLK_PCH_48M
FSA
1
(13) CLK_PCH_14M
1
C390
CPU_SSCDREFCLK#
CPU_DREFCLK# (5)
CPU_SSCDREFCLK
2
1K_0402_5%
@
(5,13,31)
1
@
2
0_0402_5%
2 @
0_0402_5%
1
4
CLK_PCIE_WLAN#
SRC_6
57
CLK_PCIE_SATA
56
CLK_PCIE_SATA#
SRC_7
61
CLK_PCIE_PCH
60
CLK_PCIE_PCH#
SRC_8/CPU_ITP
64
CPU_ITP
63
CPU_ITP# (4)
NC
CPU_STOP#
PCI_STOP#
XTAL_IN
XTAL_OUT
2
C389
DOT96 / DOT96#
LCDCLK / LCDCLK#
SRC_0 / SRC_0#
27M/27M_SS
1
2
15P 50V J NPO 0402
1
2
470_0402_5%
:
:
:
:
15P 50V J NPO 0402
1
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25
Pin28/29
1 = Pin24/25
Pin28/29
1
R80
2
33_0402_5%
2
33_0402_5%
1
CLK_CPU_EXP
45
CLK_CPU_EXP#
PCI_3
SRC_10
50
CLK_PCIE_LAN
SRC_10#
51
CLK_PCIE_LAN#
PCI4_SEL
16
PCI_4/SEL_LCDCL
ITP_EN
17
VSS_PCI
3
CLKREQ_3#
2
10K_0402_5%
@
WLAN_CLKREQ#
VSS_IO
CLKREQ_4#
41
VSS_CPU
CLKREQ_6#
R107 2
1 10K_0402_5%
B
CLK_PCIE_LAN (16)
Add LAN_CLKRQE# 0108.
CLK_PCIE_LAN# (16)
REQ PORT LIST
WLAN_CLKREQ#
VSS_PLL3
CLKREQ_7#
CLKREQ_9#
43
VSS_SRC
SLKREQ_10#
49
VSS_SRC
CLKREQ_11#
46
USB_1/CLKREQ_A#
WLAN_CLKREQ# (17)
65
VSS_SRC
21
LAN_CLKREQ#
73
VSS
DEVICE
REQ_3#
REQ_4# PCIE_WLAN
REQ_6#
REQ_7#
REQ_9#
REQ_10# PCIE_LAN
REQ_11#
REQ_A#
58
LAN_CLKREQ# (16)
SLG8SP556VTR_QFN72_10X10
1
PCI4_SEL
1 10K_0402_5%
CLK_CPU_EXP# (4)
PCI2_TME
2
R89
R90
@
R77
10K_0402_5%
14.318MHZ_16PF_7A14300083
10K_0402_5%
10K_0402_5%
1
22P 50V J NPO 0402
1
A
CLK_XTAL_OUT
1
2
2
2
1
ITP_EN
R121 2
LAN_CLKREQ#
CLK_CPU_EXP (4)
10K_0402_5%
1
1
CLK_XTAL_IN
22P 50V J NPO 0402
Y1
10K_0402_5%
@
+3VS
(4)
37
42
R71
CLK_PCIE_PCH# (12)
PORT
VSS_48
59
R95
CLK_PCIE_PCH (12)
47
30
R85
CLK_PCIE_SATA# (11)
48
69
+3VS
2
+3VS
2
2
+3VS
CLK_PCIE_SATA (11)
VSS_REF
SRC_11
SRC_11#
34
0_0402_5%
CLK_PCIE_WLAN# (17)
PCIF_5/ITP_EN
26
R87
C164
44
SRC_9#
22
@
A
SRC_9
PCI_2
C388
2
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only)
1=Overclocking of CPU and SRC NOT allowed
C161
PCI_1
14
18
1
(11) CLK_PCI_PCH
R92 @
R86
CLK_PCIE_WLAN (17)
CKPWRGD/PD#
15
(21) CLK_PCI_LPC
1
2
R84
0_0402_5%
CLK_PCIE_WLAN
40
C
36
39
PCIE_WLAN
PCIE_SATA
PCIE_PCH
CPU_ITP
CLK_CPU_EXP
PCIE_LAN
35
13
PCI2_TME
+VCCP
R98
10K_0402_5%
2
1
54
CLK_XTAL_OUT
R110
@
0_0402_5%
B
53
5
1
1
2
R119
0_0402_5%
33
SRC_4#
REF_1
CLK_XTAL_IN
2
R52 1K_0402_1%
FSB
1
2
32
SRC_4
8
(5)
CPU_SSCDREFCLK
REF_0/FS_C/TEST_
(13) H_STP_PCI#
470_0402_5%
SRC_2
FS_B/TEST_MODE
7
(5)
CPU_SSCDREFCLK#
SRC_3#
2
CK_PWRGD 1
R376
1
VGATE
R371
R113
CPU_BSEL2
CLK_CPU_HPLCLK# (5)
CPU_DREFCLK (5)
SRC_3
FSC
1 R104
2
33_0402_5%
2
10P_0402_50V8J
(13) H_STP_CPU#
(5)
CPU_SSCDREFCLK
29
USB_0/FS_A
FSB
1
2
R69
0_0402_5%
SRC1
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11
CLK_CPU_HPLCLK (5)
SRC_7#
20
+VCCP
FSC
28
LCDCLK#/27M_SS
DEVICE
PORT
CLK_CPU_BCLK# (5)
SRC_2#
11
CPU_BSEL1
CLK_CPU_BCLK (5)
VDD_IO
1
(20) CLK_SD_48M
SRC PORT LIST
CLK_SMBCLK (7,17)
SRC_6#
470_0402_5%
R73
(5)
CLK_CPU_BCLK
71
CLK_SMBDATA (7,17)
SRC_8#/CPU_ITP#
R76
2.2K_0402_5%
FSA 2
1
CPU_BSEL0
CLK_SMBCLK
72
+1.05VM_CK505
R1350 0_0402_5%
1
2
+1.05VM_CK505
@
R1351
0_0402_5%
1
2
+1.5VM_CK505
1
C173
BOM change.012510.
@
0.1U_0402_16V4Z
2
C386 10P_0402_50V8J
1
2
+VCCP
CLK_SMBDATA
10
VDD_REF
27
S 2N7002_SOT23
9
SCL
12
D
C
(5)
6
SDA
VDD_SRC
19
3
2
G
Q7
(31) CLK_ENABLE#
U4
55
+1.5VS
Routing the trace at least 10mil
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/10/15
Deciphered Date
2008/10/15
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Clock Generator CK505
Size
Document Number
Rev
1.0
NAV51 LA-6311P
Date:
Monday, March 22, 2010
Sheet
1
8
of
33
5
4
3
2
1
LCD POWER CIRCUIT
+CAM_VCC
1 R19
2
0_0603_5%
+3VS
+CAM_VCC
+LCDVDD
+3VS
+3VALW
D
1
1
1
3 2
4.7U_0805_10V4Z
2
C1164
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
1
C1115
4.7U_0805_10V4Z
2
R392
100K_0402_5%
2
2
0_0402_5%
1
R1182
@
W=60mils
0.047U_0402_16V7K
2
2N7002DW-T/R7_SOT363-6
1
1
0_0402_5%
Place close to JLVDS1
Q16
AO3413_SOT23-3
Change to use SB934130020.091509
+LCDVDD
USB20_N3_1
2
USB20_P3_1
C1118
0.1U_0402_16V4Z
3
2
C
L3
1
3
4
0_0402_5%
USB20_N3
USB20_N3 (12)
4
USB20_P3
USB20_P3 (12)
WCM2012F2S-900T04_0805
2
1
C1168
10P_0402_50V8J
@
C1167
2
1
1
2
10P_0402_50V8J
@
3
2
2
1
6
4
2
G
G
2
4.7K_0402_5%
1
C1277
D
1
R581
S
5
Q4A
R175
1
C1116
2
2
Q4B
1
1
C1113
R580
100K_0402_5%
2N7002DW-T/R7_SOT363-6
(5) GMCH_ENVDD
D
W=60mils
R582
300_0603_5%
2
1
R1183
C
Add for RF 07/02
D6
USB20_P3_1
6
5
+CAM_VCC
CH3
Vp
4
CH4
CH2
3
Vn
2
CH1
1
USB20_N3_1
PJUSB208_SOT23-6 @
Reserve D6 for ESD.011310.
Swap D6 .011510.
+LEDVDD
+LCDVDD
W=40mils
CMOS & LCD/PANEL BD. Conn.
L1
2
1
FBMA-L11-201209-221LMA30T_0805
C1111
1
1
+LCDVDD_L 1
R100
B+
2
0_0805_5%
C1112
LVDS_PWM
R111 1
@
LVDS_A2 (5)
LVDS_A2# (5)
LVDS_A1
LVDS_A1#
LVDS_A1 (5)
LVDS_A1# (5)
LVDS_A0
LVDS_A0#
LVDS_A0 (5)
LVDS_A0# (5)
LVDS_SDA
LVDS_SCL
BKOFF#
LVDS_PWM
2
LVDS_ACLK (5)
LVDS_ACLK# (5)
8mil
LVDS_SCL
LVDS_SCL (5)
LVDS_SDA
LVDS_SDA (5)
DMIC_CLK (18)
DMIC_DATA (18)
1
+3VS
+LEDVDD
C1182
22P 50V J NPO 0402 22P 50V J NPO 0402
1
1
C1109
220P_0402_50V7K
2
1
C1156
220P_0402_50V7K
2
C1181
For ESD 12/22
BKOFF#
CONN@
3
D43
PJDLC05C_SOT23-3
LVDS_PWM
1
2
(21)
2
BKOFF#
ACES_88341-3000B001
A
INVT_PWM (21)
+3VS
LVDS_A2
LVDS_A2#
+LCDVDD_L
DPST_PWM (5)
B
+CAM_VCC
R1181
2.2K_0402_5%
LVDS_ACLK
LVDS_ACLK#
INVT_PWM
+3VS
1
DMIC_CLK
DMIC_DATA
DPST_PWM
2
0_0402_5%
camera
2
31
32
USB20_P3_1
USB20_N3_1
R1180
2.2K_0402_5%
1
2
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2
0_0402_5%
R112 1
680P_0402_50V7K 68P_0402_50V8J
2
2
JLVDS1
For EMI's request add it.021110.
A
PN:SCA00001100
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
LVDS /INVERTER
Size
B
Date:
Document Number
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
9
of
33
A
B
C
D
E
D18
2
3
2
3
Close to CRT CONN for ESD.
PJDLC05C_SOT23-3
D17
L15
1
(5) GMCH_CRT_R
L14
(5) GMCH_CRT_G
1
(5) GMCH_CRT_B
1
P
2
A
2
BK1608LL121-T_2P
2
GREEN
BK1608LL121-T_2P
2
BLUE
1
1
C303
2
RED
BK1608LL121-T_2P
2
1
C307
10P_0402_50V8J
2
2
1
C306
10P_0402_50V8J
2
C304
10P_0402_50V8J
2
JVGA_HS
2
10K_0402_5%
JVGA_VS
2
U11
4
Y
3
G
(5) GMCH_CRT_HSYNC
OE#
2
1
1
R537
5
2
0.1U_0402_16V4Z
1
C308
10P_0402_50V8J
+5VS
1
C301
1
10P_0402_50V8J
C310
10P_0402_50V8J
R250
150_0402_1%
2
1
R253
150_0402_1%
2
1
R255
150_0402_1%
2
1
L12
PJDLC05C_SOT23-3
0615
1
Modify C31- C308 C303 C307 C306 C304 BOM Structure
1
1
1
add it for EMI.021110.
SN74AHCT1G125DCKR_SC70-5
5
2
0.1U_0402_16V4Z
P
2
A
Y
4
3
G
(5) GMCH_CRT_VSYNC
U10
OE#
1
C298
1
+5VS
Place closed to chipset
Add R1283 R1284
Change R247 R249 to 10 ohm
Add @ on U10 U11 C301 C298
06/08
SN74AHCT1G125DCKR_SC70-5
CRT PORT
+3VS
+5VS
1
1
+CRTVDD
+3VS
D3
R245
2
2
1
2.2K_0402_5%
R246
W=40mils
1
+CRTVDD
0.1U_0402_16V4Z
RB491D_SC59-3
3
2
6
2
W=40mils
1
2
JCRT1
1.1A_6VDC_FUSE
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RED
VGA_DDC_DAT
GREEN
VGA_DDC_DAT
JVGA_HS
BLUE
Q24B
2N7002DW-T/R7_SOT363-6
1
3
C142
F1
1
2.2K_0402_5%
2
2
5
4
(5) GMCH_CRT_DATA
2
R251
2.2K_0402_5%
(5) GMCH_CRT_CLK
+RCRT_VCC
2.2K_0402_5%
R248
1
3
VGA_DDC_CLK
JVGA_VS
Q24A
2N7002DW-T/R7_SOT363-6
VGA_DDC_CLK
G
G
16
17
CONN@
SUYIN_070546FR015M21TZR
Update symbol 0107.
CRT_DET# (13)
2
CRT_DET#
R1103
100K_0402_5%
4
1
4
+CRTVDD
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
CRT PORT
Size
B
Date:
Document Number
Rev
0.2
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
E
10
of
33
5
4
3
2
1
+3VS
R45
SATA_LED#
CLK_PCI_PCH
1
10K_0402_5%
@
10K_0402_5%
R312
SERIRQ
2
D
R293
GATEA20
R336
33_0402_5%
1
R41
EC_KBRST#
10K_0402_5%
For EMI, close to TigerPoint
TGP
U72C
R233
(8) CLK_PCI_PCH
PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#
A18
E16
8.2K_0402_5%
GNT1#
GNT2#
REQ1
REQ2
G16
A20
REQ1#
REQ2#
GPIO22
GPIO1
G14
A2
C15
C9
GPIO48/STRAP1#
GPIO17/STRAP2#
GPIO22
GPIO1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
B2
D7
B3
H10
E8
D6
H8
F8
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
D11
K9
M13
STRAP0#
RSVD01
RSVD02
PCI_DEVSEL#
CLK_PCI_PCH
PCI_IRDY#
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
R235
R236
R229
R207
R231
R230
R237
PCI_SERR#
PCI_STOP#
PCI_PLOCK#
PCI_TRDY#
PCI_PERR#
PCI_FRAME#
C
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
10K_0402_5%
R363
10K_0402_5%
@
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
R362
10K_0402_5%
@
8.2K_0402_5%
8.2K_0402_5%
R232
R209
R291
R292
R238
R205
R206
R208
R210
R211
R212
R204
R364
R365
PCI
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1
C/BE0#
C/BE1#
C/BE2#
C/BE3#
H16
M15
C13
L16
R12
AE20
AD17
AC15
AD18
Y12
AA10
AA12
Y10
AD15
W10
V12
AE21
AE18
AD19
U12
AC17
AB13
AC13
AB15
Y14
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATARBIAS#
SATARBIAS
SATALED#
AD11
AC11
AD25
A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THRMTRIP#
U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21
AA16
AA21
V18
AA20
RSVD29
RSVD30
RSVD31
8.2K_0402_5% AD23
SATA_ITX_C_DRX_N0 (15)
SATA_ITX_C_DRX_P0 (15)
CLK_PCIE_SATA# (8)
CLK_PCIE_SATA (8)
SATARBIAS
R154 24.9_0402_1%
SATA_LED#
SATA_LED# (20)
Placed within 500 mils of Tiger point chipset pin.
RSVD27
RSVD28
AD16
AB11
AB10
SATA_DTX_C_IRX_N0 (15)
SATA_DTX_C_IRX_P0 (15)
0.01U_0402_16V7K
C32
0.01U_0402_16V7K
C31
C
GPIO36
R294 be placed & lt; 200 mils to U72.AD23
1
R366
10K_0402_5%
@
AD4
AC4
SATA_ITX_C_DRX_N0_R
SATA_ITX_C_DRX_P0_R
RSVD24
RSVD25
RSVD26
AA14
V14
R294
AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9
SATA_CLKN
SATA_CLKP
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
AB16
AE24
AE23
+3VS
TGP
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
SATA
U72A
A5
B15
J12
A23
B7
C22
B11
F14
A8
A10
D10
A16
HOST
+3VS
56 ohm±5% pull-up resistor has
to be within 1 " from the Tiger
Point chipset.
TIGERPOINT_ES1_BGA360
GATEA20
H_A20M#
H_IGNNE#
H_INIT#
H_INTR
H_FERR#
H_NMI
EC_KBRST#
SERIRQ
H_SMI#
H_STPCLK#
GATEA20 (21)
H_A20M# (5)
H_IGNNE# (5)
+VCCP
H_INIT# (5)
H_INTR (5)
H_FERR# (5)
H_NMI
(5)
EC_KBRST# (21)
SERIRQ (21)
H_SMI# (5)
H_STPCLK# (5)
1
2
R164
56_0402_5%
2
@
D
10K_0402_5%
C432
22P_0402_50V8J
H_THERMTRIP# (5)
B
B
3
TIGERPOINT_ES1_BGA360
+VCCP
ESD request
STRAP2#
GPIO17
0
STRAP1#
GPIO48
1
2 100P_0402_50V8J
2 100P_0402_50V8J
C455 @
1
2 100P_0402_50V8J
C456 @
1
2 100P_0402_50V8J
H_STPCLK# C457 @
1
2 100P_0402_50V8J
H_SMI#
LPC
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/18
Issued Date
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
C453 @
1
H_NMI
PCI
1
2 100P_0402_50V8J
H_INTR
SPI
1
A
C452 @
1
H_FERR# C454 @
1
0
2 100P_0402_50V8J
H_INIT#
Close to TigerPoint pin
1
2 100P_0402_50V8J
H_IGNNE# C451 @
1
H_FERR#
Boot BIOS
C450 @
1
H_A20M#
R198
56_0402_5%
4
3
2
Title
Tigerpoint(1/4)
Size
Document Number
Rev
1.0
NAV51 LA-6311P
Date:
Monday, March 22, 2010
Sheet
1
11
of
33
5
4
3
2
1
USB Port List
1
2
D
LAN
WLAN
3
4
(16) PCIE_DTX_C_IRX_N1
(16) PCIE_DTX_C_IRX_P1
LAN (16) PCIE_ITX_C_DRX_N1
(16) PCIE_ITX_C_DRX_P1
(17) PCIE_DTX_C_IRX_N2
(17) PCIE_DTX_C_IRX_P2
WLAN (17) PCIE_ITX_C_DRX_N2
(17) PCIE_ITX_C_DRX_P2
H7
H6
H3
H2
J2
J3
K6
K5
K1
K2
L2
L3
M6
M5
N1
N2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PCI-E
K21
K22
C565 0.1U_0402_10V7K PCIE_ITX_C_DRX_N1_RJ23
C566 0.1U_0402_10V7K PCIE_ITX_C_DRX_P1_RJ24
M18
M19
C53 0.1U_0402_10V7KPCIE_ITX_C_DRX_N2_R
K24
C49 0.1U_0402_10V7K PCIE_ITX_C_DRX_P2_R
K25
L23
L24
L22
M21
P17
P18
N25
N24
D4
C5
D3
D2
E5
E6
C2
C3
USB_OC#0_1
USB_OC#0_1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USBRBIAS
USBRBIAS#
G2
G3
(9)
(9)
(20)
(20)
USB20_N6
USB20_P6
USB20_N7
USB20_P7
(20)
(20)
(17)
(17)
USB port1
USB port2
+3VALW
CMOS
USB_OC#0_1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
Card Reader
BT
WLAN
R46
R49
R48
10K_0402_5%
10K_0402_5%
10K_0402_5%
C
modify 05/14
USB_OC#0_1 (15)
R152 Please closed U72
PIN within 500 mils
R152
USBRBIAS1
F4
CLK_PCH_48M
2
CLK_PCH_48M (8)
R338
33_0402_5%
@
R153 Please closed U72
PIN within 500 mils
2
1
B
R434
@ 22P_0402_50V8J
2
H24
J22
DMI_ZCOMP
DMI_IRCOMP
W23
W24
(8) CLK_PCIE_PCH#
(8) CLK_PCIE_PCH
(15)
(15)
(15)
(15)
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
+1.5VS
R153 24.9_0402_1%
1
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
22.6_0402_1%
CLK48
B
D
BT
WLAN
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USB
C
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI
R23
R24
P21
P20
T21
T20
T24
T25
T19
T18
U23
U24
V21
V20
V24
V23
DMI_TX#0
DMI_TX0
DMI_RX#0
DMI_RX0
DMI_TX#1
DMI_TX1
DMI_RX#1
DMI_RX1
CMOS
CardReader
TGP
U72B
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
USB Left1
USB Left2
0
1
2
3
4
5
6
7
Port List
1
PCIE
DMI_CLKN
DMI_CLKP
For EMI, Close to TigerPoint
2
TIGERPOINT_ES1_BGA360
A
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/18
Issued Date
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Tigerpoint(2/4)
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
12
of
33
5
4
3
2
1
+3VALW
+3VS
R145
8.2K_0402_5%
R240
10K_0402_5% 2
8.2K_0402_5%
R36
R314
GPIO12
8.2K_0402_5%
R315
GPIO14
R316
R301
2
GPIO15
SMBALERT#
8.2K_0402_5%
PCH_RSMRST#
10K_0402_5% 2
ICH_RI#
1
EC_LID_OUT#
R42
2
R295
8.2K_0402_5%
8.2K_0402_5%
PCH_SMBDATA
R38 1
1K_0402_5% 1
8.2K_0402_5%
8.2K_0402_5%
10K_0402_5% 2
PCH_SMBCLK
2
R302
R300
R368
MCH_SYNC#
SLPIOVR#
GPIO39
R37 1 PCH_OK
10K_0402_5%
1
R319
EC_THERM#
1
GPIO0
R241
1
PM_CLKRUN#
Add it.020510.
1
(5,8,31)
VGATE
B
2
(21) EC_PWROK
A
TGP
SMBALERT#
PCH_SMBCLK
PCH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1
E20
H18
E23
H21
F25
F24
B
SLP_S3#
SLP_S4#
SLP_S5#
BATLOW#
DPRSTP#
DPSLP#
RSVD31
2
1
SB_SPKR (18)
H20
E25
F21
2
2
CRT_DET
+RTCVCC
1M_0402_5%
R146
1
2 INTRUDER#
PM_SLP_S3# (21)
PM_SLP_S4# (21)
PM_SLP_S5# (21)
PM_BATT_LOW#
H_DPRSTP#
H_DPSLP#
(10)
CRT_DET#
CRT_DET#
D
S
Q11
2N7002W-T/R7_SOT323-3
2
G
1 R197
2 INTVRMEN
332K_0402_1%
B
H_DPRSTP# (5)
H_DPSLP# (5)
RSMRST circuit
2
4
5
BAV99DW-7_SOT363
@
+CHGRTC
@1
R375
0.1U_0402_16V4Z
D28A
@ BAV99DW-7_SOT363
Change C368/C371 from 12pf to 15pf.022510.
2006/08/18
Issued Date
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
A
2
BOM change.012510.
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2
+3VALW
@ 4.7K_0402_5%
D28B
C1148
Add +RTCVCC circuit 06/12
1
R373
6
For ESD
1
C1158
2.2K_0402_5%
2
PCH_RSMRST#
MMBT3906_SOT23-3
3
2
3
R288
10M_0402_5%
2
1
1
R225
1 @
B
B
1
(21) EC_RSMRST#
PLTRST#
2
0_0402_5%
Q30 3
C
1
R372
BAS40-04_SOT23-3
RTCX2
5
R149
10K_0402_5%
High: CRT Plugged
E
C371
15P 50V J NPO 0402
2
1
(21,27)
+3VS
220P_0402_50V7K
4
ACIN
PLTRST# (4,5,16,17,21)
ICH_PCIE_WAKE# (17)
+RTCVCC
RTCX1
OUT
SYS_RST#
PLTRST#
ICH_PCIE_WAKE#
INTRUDER#
PCH_OK
PCH_RSMRST#
INTVRMEN
SB_SPKR
R1370
1K_0402_5%
Routing the trace at least 10mil
NC
ACIN
R1377
10K_0402_5%
@
PBTN_OUT# (21)
ICH_RI# (21)
100K_0402_5%
3
GPIO38
EC_THERM# (21)
1
RB751V_SOD323
H_PWRGD (4,5)
+RTCBATT
D37
A
D25
2
TIGERPOINT_ES1_BGA360
to CMOS,close to DIMM 021110.
C230
1U_0603_10V4Z~D
1
2
Y3
32.768K_1TJS125BJ4A421P
2 NC
IN 1
ACIN_C
RTCRST#
CMOS
1
2
Change
@ 1U_0603_10V4Z
C368
15P 50V J NPO 0402
2
1
EC_THERM#
VGATE
MCH_SYNC#
PBTN_OUT#
ICH_RI#
B25
AB23
AA18
F20
C
R223
100K_0402_5%
2
1 R196
2
20K_0402_5%
+RTCVCC
SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB
SPI
R2
T1
M8
P9
R4
+3VALW
R1376
10K_0402_5%
1 1
(8) PCH_SMBCLK
(8) PCH_SMBDATA
W4
V5
T5
H_STP_PCI# (8)
+3VS
H_PWRGD
AB17
V16
AC18
E21
H23
G22
D22
G18
G23
C25
T8
U10
AC3
AD3
J16
PM_DPRSLPVR (5)
2
1 R1391
@ 0_0402_5%
H_STP_CPU# (8)
1
RTCX1
RTCX2
RTCRST#
THRM#
VRMPWRGD
MCH_SYNC#
PWRBTN#
RI#
SUS_STAT#/LPCPD#
SUSCLK
SYS_RESET#
PLTRST#
WAKE#
INTRUDER#
PWROK
RSMRST#
INTVRMEN
SPKR
AB22
R1390
10K_0402_5%
EC_LID_OUT# (21)
3
For EMI, Close to TigerPoint
CPUPWRGD/GPIO49
SLPIOVR# (4)
EC_SMI# (21)
EC_SCI# (21)
2
2
+3VS
2
2
C433
22P_0402_50V8J
@
EPROM
BOM change.012510.
GPIO0
T15
CRT_DET
W16
SLPIOVR#
W14
EC_SMI#
K18
EC_SCI#
H19
ACIN_C
M17
GPIO12
A24
EC_LID_OUT#
C23
GPIO14
P5
GPIO15
E24
AB20 2 R17
1
0_0402_5%
Y16
AB19
R3
C24
1 R367
2
1K_0402_5%
D19
D20
F22
PM_CLKRUN#
AC19
U14
AC1
GPIO38
AC23
GPIO39
AC24
1
SMBALERT#/GPIO11
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
1
(5)
2
RTCX1
RTCX2
RTCRST#
SMB
R337
33_0402_5%
@
PCH_OK
1
LAN_CLK
LANR_RSTSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
1
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
RTC
1
1
HDA_BIT_CLK
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDOUT
HDA_SYNC
CLK14
T4
P7
B23
AA2
AD1
AC2
W3
T7
U4
R159 2
R157 2
P6
U2
W2
V2
P8
AA1
Y1
AA3
U3
AE2
T6
V3
33_0402_5%
33_0402_5%
2
2
AUDIO
AUDIO
C
(18) HDA_SDOUT_AUDIO
(18) HDA_SYNC_AUDIO
(8) CLK_PCH_14M
R160
R158
1
1
LAN
33_0402_5%
33_0402_5%
(18) HDA_BITCLK_AUDIO
(18) HDA_RST_AUDIO#
(18) HDA_SDIN0
BMBUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
DPRSLPVR
STP_PCI#
STP_CPU#
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
CLKRUN#
GPIO33
GPIO34
GPIO38
GPIO39
4
@
1
(21) LPC_FRAME#
LDRQ1#/GPIO23
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LFRAME#/FWH4
MISC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC
LPC
(21)
(21)
(21)
(21)
U14
Y
TC7SH08FUF_SSOP5
U72D
D
C721
0.1U_0402_16V4Z
2 @
R1481 @
1
10K_0402_5% 2
AA5
V6
AA6
Y5
W8
Y8
Y4
2
0_0402_5%
+3VS
P
8.2K_0402_5%
2ICH_PCIE_WAKE#
1 SYS_RST#
2
R148
G
R39
R147
2
1K_0402_5% 1
10K_0402_5% 2
2.2K_0402_5% 1
2.2K_0402_5% 1
1
SMLINK0
1 SMLINK1
PM_BATT_LOW#
1
1
R239
Add EC_PWROK pull down 0108.
R54 1 EC_PWROK
10K_0402_5%
5
R44
R43
2
LINKALERT#
2
1
10K_0402_5% 2
8.2K_0402_5%
D
R40
3
+3VALW
10K_0402_5% 2
10K_0402_5% 2
2
Title
Tigerpoint(3/4)
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
13
of
33
5
4
3
2
1
TGP
U72E
D
D
VCC5REF
F12
+V5REF_RUN
6mA
F5
+V5REF_SUS
10mA
Y6
+SATAPLL
50mA
U72F
VCC5REF_SUS
+3VS
+VCCP
V_CPU_IO
W18
14mA
1
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
AA8
M9
M20
N22
1.3A
VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4
J10
K17
P15
V10
0.98A
H25
AD13
F10
G10
R10
T9
0.29A
F18
N4
K7
F1
0.13A
C42
1
2
1
2
5
1
2
1
2
2
C461
2
1
2
10U_0805_10V4Z
C459
1U_0603_10V6K
C62
2
1
2
+1.5VS
+VCCP
1
2
1U_0603_10V6K
1
1U_0603_10V6K
C61
C460
2
1
10U_0805_10V4Z
1
1U_0603_10V6K
2
0.1U_0402_16V4Z
C45
C63
1
1U_0603_10V6K
2
C38
C60
2
1
1U_0603_10V6K
2
C39
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
1
2
C463
2
1
1
+3VS
+3VALW
1U_0603_10V6K
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
C40
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C48
2
C43
1
1U_0603_10V6K
+V5REF_SUS
1
C37
2
1
10_0402_5%
1
0.1U_0402_16V4Z
R35
2
C44
D10
RB751V-40_SOD323-2
1
C46
1
C
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
POWER
+3VALW
2
+5VALW
1U_0603_10V6K
1U_0603_10V6K
C41
2
0.1U_0402_16V4Z
C59
0.1U_0402_16V4Z
1
C47
10mA
+V5REF_RUN
+RTCVCC
0.01U_0402_16V7K
F6
+DMIPLL
0.1U_0402_16V4Z
Y25
VCCUSBPLL
1
2
AE3
TIGERPOINT_ES1_BGA360
B
A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25
G24
AE13
F2
RSVD32
VCCRTC
VCCDMIPLL
D12
RB751V-40_SOD323-2
VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
W=20mils
2
1
R33
100_0402_5%
TGP
VSS57
VSS58
VSS59
VCCSATAPLL
C462
+5VS
AE16
C
B
Place closely pin Y25 within 100mlis.
+1.5VS
R30
0_0805_5%
C58
10U_0805_10V4Z
0.01U_0402_16V7K
1
1
1
C28
+DMIPLL
C464
2
2
2
4.7U_0603_6.3V6K
TIGERPOINT_ES1_BGA360
Place closely pin Y6 within 100mlis.
+1.5VS
R29
+SATAPLL
0_0805_5%
1
2
C57
10U_0805_10V4Z
1
2
C27
0.1U_0402_16V4Z
A
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2009/04/15
Issued Date
Deciphered Date
2010/04/15
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Tigerpoint(4/4)
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
14
of
33
A
B
C
D
E
F
G
H
SATA HDD Conn.
JHDD1
1
SATA_DTX_C_IRX_N0
1
SATA_DTX_C_IRX_P0
(11) SATA_DTX_C_IRX_N0
(11) SATA_DTX_C_IRX_P0
1
1
2
3
4
5
6
7
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
(11) SATA_ITX_C_DRX_P0
(11) SATA_ITX_C_DRX_N0
SATA_DTX_IRX_N0
2 C380
0.01U_0402_16V7K
SATA_DTX_IRX_P0
2
C383
0.01U_0402_16V7K
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
+5VS
+5VS
0.1U_0402_16V4Z
1
C423
2
1
1
1
C422
1U_0402_6.3V6K
2
2
C426
2
C419
10U_0603_6.3V6M
1000P_0402_50V7K
1
GND
A+
AGND
BB+
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SUYIN_127043FR022G263ZR_NR
CONN@
2
2
+5VALW
+USB_VCCC
U13
C244
0.1U_0402_16V4Z
2
1
1
2
3
4
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
8
7
6
5
USB_OC#0_1 (12)
APL3510BKI-TRG SOP 8P PWR SWITCH
Change JUSB1 JUSB2 to NEW P/N SP010906181
1
(21)
USB_ON#
USB_ON#
C245
@ 1000P_0402_50V7K
06/23
USB CONN.1
+USB_VCCC
USB CONN.2
+USB_VCCC
2
3
3
W=40mils
+USB_VCCC
1
C315
1
1
C316
+
C317
2
150U 6.3V M B LESR45M T520 H1.9
2
W=40mils
+USB_VCCC
1
C318
+
470P_0402_50V7K
2
150U 6.3V M B LESR45M T520 H1.9
2
470P_0402_50V7K
JUSB1
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
2
3
GND1
GND2
GND3
GND4
1
2
3
4
(12) USB20_N1
(12) USB20_P1
2
5
6
7
8
JUSB2
VCC
DD+
GND
3
1
2
3
4
(12) USB20_N0
(12) USB20_P0
D21
D23
SUYIN_020133GB004M25MZL
SUYIN_020133GB004M25MZL
PJDLC05C_SOT23-3
1
PJDLC05C_SOT23-3
CONN@
1
CONN@
Update symbol 0107.
Update symbol 0107.
add it for EMI.021110.
add it for EMI.021110.
4
4
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/18
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
F
Title
Size
B
SATA,CONN. / USB CONN.
Document Number
Rev
0.2
NAV51 LA-6311P
Monday, March 22, 2010
Date:
G
Sheet
15
H
of
33
5
4
3
2
J2
L17 close to pin1
+1.8_VDD/LX
2
C1280
4.7UH_1008HC-472EJFS-A_5%_1008
1
L17
+2.5V_VDDH/VDD17
C1194
10U_0603_6.3V6M
2
2
40mil
+1.8_VDD/LX
1
1 1U_0402_6.3V4Z
+3V_LAN
C1278 1
D
+2.5V_VDDH/VDD17
2 0.1U_0402_16V4Z
C1194、C1195 close to L17
、
(21) LAN_WAKE#
VDD18O
VDD33
pin7 float -- & gt; 25MHz
GND-- & gt; 48MHz
VBG1P18V
REFCLKP
40
44
RX_N
PCIE_C_RXP1
38
TX_P
PCIE_C_RXN1
37
TX_N
9
10
XTLO
XTLI
31
33
SMCLK
SMDATA
12
34
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
C1281、C1282 close to pin38、pin37
、
、
C
1
LAN_X1
LAN_X2
C1187
15P 50V J NPO 0402
R1466 keep away other singal (25mil)
2
1
R1466
2.37K_0402_1%
Change C1186/C1187 from 27pf to 15pf.022510.
49
the GND directly connect to GND layer
2
2
2
2
R1479 1
1
1
2
C1188
0.1U_0402_16V4Z
2
2
C1189
10U_0603_6.3V6M
D
5.1K +-5% 0402
LAN_CLKREQ# (8)
AVDDVCO1
28
32
45
46
+1.2_DVDDL
AVDDL0
AVDDL1
AVDDL2
AVDDL3
AVDDL4
8
16
22
36
39
15
19
25
+2.5V_VDDH
20
21
23
24
26
35
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
GND
1
1
2
2
C1203
0.1U_0402_16V4Z
2
+1.2_AVDDL
1
AVDDVCO2
2
1
R1393
0_0603_5%
2
C1193
0.1U_0402_16V4Z
C
close to pin42
If overclocking, R638, L30 stuffed and R637 removed.
If not overclocking, R637, L30 suffed and R638 removed.
AR8132:L30=0ohm,C856=0.1uF. remove C857
1
C1213
1U_0402_6.3V4Z
2
1
C1214
0.1U_0402_16V4Z
2
close to pin16、pin22、pin36、pin39
、
、
、
C1215
0.1U_0402_16V4Z
+1.2_AVDDL
1
C1202
0.1U_0402_16V4Z
2
1
C1197
1U_0402_6.3V4Z
2
1
C1198
0.1U_0402_16V4Z
2
1
C1199
0.1U_0402_16V4Z
2
1
C1200
0.1U_0402_16V4Z
2
C1201
0.1U_0402_16V4Z
close to pin8
close to pin15
B
2
close to pin11
close to pin19、pin25
、
1
20mil
1
+1.2_AVDDL
AVDDH0
AVDDH1
AVDDH2
10/100 LAN
DVDDL0
DVDDL1
DVDDL2
DVDDL3
C1192
0.1U_0402_16V4Z
AR8132L-AL1E QFN 48P_6X6
Place Close to Chip
R1396 1
R1397 1
R1398 1
R1399 1
AVDDVCO1
AVDDVCO2
T64
T65
NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
A
AR8114A
t
h
e
r
o
s
+2.5V_VDDH
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
11
42
RBIAS
TESTMODE
2
C1281
2
C1282
2
C1186
+3V_LAN
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
RX_P
(12) PCIE_DTX_C_IRX_N1
1 15P 50V J NPO 0402
C1188、C1189 close to pin2
、
REFCLKN
43
LAN_X2
25MHZ_20P
13
14
17
18
VBG1P18V
(12) PCIE_DTX_C_IRX_P1
2
TRXP0
TRXN0
TRXP1
TRXN1
AVDDL_REG
AVDDL/AVDDL_REG
7
41
(12) PCIE_ITX_C_DRX_N1
2
27
PERSTn
WAKEn
(12) PCIE_ITX_C_DRX_P1
Y4
47
48
LED_DUPLEXn
CTR12
(8) CLK_PCIE_LAN#
1
+3V_LAN
Add pull down R for
no-overclocking mode 011710.
29
30
LED_ACTn
LED_10_100n
(8) CLK_PCIE_LAN
LAN_X1
1
TWSI_CLK
TWSI_DATA
VDDHO
3
4
1 0.1U_0402_16V4Z
(4,5,13,17,21) PLTRST#
6
5
+2.5V_VDDH
C1280 2
1
U77
60mil
2
C1279 2
C1195
0.1U_0402_16V4Z
2
@ JUMP_43X39
C1292 close to pin2
30mil
1
2
+3VALW
close to pin5
C1278 close to pin6
1
1
B
the GND directly connect to GND layer
JRJ1
8
+2.5V_VDDH/VDD17
2
1
R1468
0_0603_5%
1
2
T66
LAN_MDI1+
LAN_MDI1-
+AVDD_CEN
1
C1210
0.1U_0402_16V4Z
2
C1211
0.1U_0402_16V4Z
LAN_MDI0+
LAN_MDI0-
1
2
3
4
5
6
7
8
RD+
RDCT
NC
NC
CT
TD+
TD-
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
RJ45_MIDI1+
RJ45_MIDI1RJ45_CT0
PR4+
6
PR2-
5
RJ45_MIDI1-
PR3-
4
R1401
1
1
R1402
RJ45_CT1
RJ45_MIDI0+
RJ45_MIDI0-
C1212
2
1
1U_0402_6.3V4Z
350uH_NS0013LF
2
C1207
2
1
C1208
2
1
2
0.1U_0402_16V4Z
PR1+
0.1U_0402_16V4Z
SHLD1
9
10
2
A
0.1U_0402_16V4Z
close to pin45、pin46
、
SHLD2
1000P_1206_2KV7K
C1206
1
PR1-
RJ45_MIDI0+
C1205
PR2+
RJ45_MIDI01
3
1
PR3+
RJ45_MIDI1+
75_0402_5%
2
2
75_0402_5%
close to pin28、pin32
、
+1.2_DVDDL
PR4-
7
A
SANTA_130452-C
the GND directly connect to GND layer
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/18
Issued Date
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Atheros 8131
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
16
of
33
5
4
3
2
1
D
D
Mini-Express Card for WLAN
+3VS
J3
JUMP_43X79
@
2 2
1 1
+3VS_WLAN
+1.5VS
1
2
1
C1216
4.7U_0603_6.3V6K
2
1
C1217
0.1U_0402_16V4Z
2
1
C1218
47P_0402_50V8J
2
1
C1219
4.7U_0603_6.3V6K
2
1
C1220
0.1U_0402_16V4Z
2
C1221
47P_0402_50V8J
C
C
+3VS_WLAN
JMINI1
(8) WLAN_CLKREQ#
(8) CLK_PCIE_WLAN#
(8) CLK_PCIE_WLAN
(12) PCIE_DTX_C_IRX_N2
(12) PCIE_DTX_C_IRX_P2
(12) PCIE_ITX_C_DRX_N2
(12) PCIE_ITX_C_DRX_P2
+3VS_WLAN
B
1
C1222
10U_0603_6.3V6M
2
EC_TX_P80_DATA_R
EC_TX_P80_CLK_R
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
54
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
G1
G2
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G3
G4
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
55
56
BELLW_80052-1021
CONN@
(21) EC_TX_P80_DATA
EC_TX_P80_DATA
1
R406
R1478 2
+1.5VS
WL_OFF# (21)
PLTRST# (4,5,13,16,21)
R513
R512
0_0402_5%
2 @
2 @
0_0402_5%
1
1
CLK_SMBCLK (7,8)
CLK_SMBDATA (7,8)
USB20_N7 (12)
USB20_P7 (12)
R514 1
2 @
0_0402_5%
WIMAX_LED# (20)
B
R515
0_0402_5%
(9~16mA)
@
WLAN_LED# (20)
R1392 1
2
10K_0402_5%
+3VS
2 EC_TX_P80_DATA_R
0_0402_5%
1 10K_0402_5%
EC_RX_P80_CLK
+3VS_WLAN
1
(13) ICH_PCIE_WAKE#
2
4
6
8
10
12
14
16
2
1
3
5
7
9
11
13
15
EC_TX_P80_CLK_R
2
0_0402_5%
Add 10K pull down 0114.
(21) EC_RX_P80_CLK
1
R404
A
A
Compal Electronics, Inc.
Title
& lt; Title & gt;
Size
Document Number
CustomNAV51 LA-6311P
Date:
5
4
3
2
WLAN
Rev
0.1
NAV51 LA-6311P
Sheet
Monday, March 22, 2010
1
17
of
33
5
4
3
2
1
J4
2
2
1
1
JUMP_43X39
D
(21)
BOM change.012510.
R1470 1
2
47K_0402_5%
SB_SPKR
C1227 1
MONO_IN
2
40mil
L18 1
2
FBMA-L11-201209-221LMA30T_0805
1
+5VS
C1224
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
(output = 300 mA)
C1225
0.1U_0402_16V4Z
IN
2
1
2
D
U78
1
GND
3
SHDN
OUT
5
BYP
4
40mil
1
G9191-475T1U_SOT23-5
@
4.75V
+VDDA
C1226
2
@
2.2U_0603_6.3V6K
1
(13)
R1469 1
2
47K_0402_5%
BEEP#
1
R1467
10K_0402_5%
C1286
0.1U_0402_16V4Z
2
BOM change.012510.
C1223
100P_0402_50V8J
2
2
1
simplify the pcbeep circuit 011410.
HD Audio Codec
+3VS_DVDD
+AVDD_HDA
L21
MBK1608121YZF_0603
2
40mil
1
20mil
LINE2_L
LOUT1_L
LINE2_R
LOUT_R
MIC2_L
LOUT2_L
MIC2_R
LOUT2_R
41
23
LINE1_L
SPDIFO2
45
24
LINE1_R
DMIC_CLK1/2
46
C1245
B
7/04 Add C23
DMIC_CLK3/4
21
22
12
R1419 2
R1420 2
1 20K_0402_1%
1 5.11K_0402_1%
(21)
EAPD
R1421 1
2 0_0402_5%
SDATA_IN
8
HDA_SDIN0_AUDIO
MONO_OUT
37
MONO_OUT
Impedance
CBP
PCBEEP_IN
29
CBP
39.2K
20K
PORT-B (PIN 21, 22)
31
28
32
30
CBN
CODEC_VREF
SDATA_OUT
2
3
13
34
GPIO0/DMIC_DATA1/2
GPIO1/DMIC_DATA3/4
SENSE A
SENSE B
EAPD
SPDIFO1
PORT-G (PIN 43, 44)
5.1K
VREF
27
JDREF
HPOUT_L
33
AVSS1
AVSS2
26
42
+MIC1_VREFO
HP_RIGHT (19)
HP_LEFT (19)
PORT-H (PIN 45, 46)
20mil
20mil
40
DGND
PORT-F (PIN 16, 17)
10K
B
C1246
2.2U_0402_6.3VM
change netname from MIC1_VREFO to +MIC1_VREFO 20100113
HP_RIGHT
CBN
2
HP_LEFT
AGND
1
@
C1252
10U 6.3V M X5R 0603
2
1
2
C1251
0.1U_0402_16V4Z
R1426
R1425
20K_0402_1%
R1427
PORT-E (PIN 14, 15)
20K
CBN
10mil
HPOUT_R
1
HDA_SDIN0 (13)
Change to SA00002CI20
ALC272-VA2-GR
R1428
A
R1494
SENSE B
2
1
0_0603_5%
2
1
0_0603_5%
2
1
0_0603_5%
2
1
0_0603_5%
PORT-D (PIN 35, 36)
39.2K
(13)
PORT-C (PIN 23, 24)
5.1K
2
33_0402_5%
C1249 1
2
2.2U_0402_6.3VM
CPVEE
DVSS1
DVSS2
1
R1413
MONO_OUT (19)
ALC272-VA2-GR_LQFP48_7X7
PORT-A (PIN 39, 41)
10K
SENSE A
HDA_BITCLK_AUDIO
MIC1_VREFO
47
Codec Signals
@ 22P_0402_50V8J
CBP
MIC1_R
SYNC
4
7
Sense Pin
C1243
2
BOM change.012510.
6
48
(19) MIC_PLUG#
(19) HP_PLUG#
SENSE_A
SENSE_B
1
DMIC_CLK (9)
MIC1_L
RESET#
5
2 FBMA-11-100505-301T 0402
2 FBMA-11-100505-301T 0402
BITCLK
10
R1409 1
2
44
MIC2_VREFO
11
(13) HDA_RST_AUDIO#
C1247
@
10P_0402_50V8J (13) HDA_SYNC_AUDIO
2
1
(13) HDA_SDOUT_AUDIO
BOM change to 300 ohm bead.021110.
(9)
DMIC_DATA
NC
LINE2_VREFO
1
@ 22_0402_5%
R1408 1
1
MIC1_R
2
4.7U_0603_6.3V6K
2
4.7U_0603_6.3V6K
MONO_IN
1
R1412
HDA_BITCLK_AUDIO
2
(19)
1
LINE1_VREFO
19
C1244
AMP_RIGHT (19)
43
20
MIC1_R
AMP_LEFT (19)
BOM change to 300 ohm bead.021110.
18
MIC1_L
2 0_0402_5%
39
17
MIC1_L
C
C1230
36
16
R1472
1
35
15
(19)
1
C1229
reserve the mono out 20100113
14
20mil
20mil
L19
MBK1608121YZF_0603
2
+3VS
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U 6.3V M X5R 0603 H0.8
9
1
DVDD
U30
38
C1237
25
C1232
2
2
2
0.1U_0402_16V4Z
10U 6.3V M X5R 0603 H0.8
0.1U_0402_16V4Z
1
2
1
AVDD2
C1231
1
AVDD1
1
1
C1228
20mil
DVDD_IO
1
+VDDA
C
+3VS_DVDD
5
GND
2006/08/18
Issued Date
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
GNDA
For EMI's request add it.021110.
Compal Electronics, Inc.
Compal Secret Data
Security Classification
A
2
Title
HD Audio Codec ALC272
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
18
of
33
5
4
3
2
1
+5VAMP_J
BOM change.012510.
1
J5
2
+5VS
2
1
1
C1253
10U 6.3V M X5R 0603 H0.8
+5VAMP_J
Int. Speaker Conn.
1
2
2
C1254
0.1U_0402_16V4Z
20mil
JUMP_43X39
SPKR/L+
SPKR/L-
+5VAMP_J
R1431 1
R1432 1
JSPK1
SPK_RL+
SPK_RL-
2 0_0603_5%
2 0_0603_5%
1
2
1
C1283
0.1U_0603_25V7K
2
17
RIN-
MONO_OUT
(18)
AMP_LEFT
(18)
AMP_RIGHT
1
R1473 @
2
C1256
0.1U_0603_25V7K
1
2
C1258
0.1U_0603_25V7K
2
1
R1438
SPKR/L+
8
SPKR/L-
2
2
2
0_0402_5%
EC_MUTE#
R1474
1
@
40.2K_0402_1%
2
+5VAMP_J
U81
NC
(21)
D44
PJDLC05C_SOT23-3
R1437
100K_0402_5%
1
LIN-
2
4
LOUT-
5
AMP_IN0_0402_5%
1
R1435
14
R1436
100K_0402_5%
LIN+
2
0_0402_5%
1
ROUT-
9
18
SPK_RL-
GAIN1
LOUT+
reserve the mono out 20100113
3
SPK_RL+
GAIN0
ROUT+
(18)
2
GAIN1
C1257
0.1U_0603_25V7K
AMP_IN+
1
2
GAIN0
3
RIN+
D
G1
G2
ACES_88266-02001
CONN@
2
7
2
C1255
0.1U_0603_25V7K
2
1
1
3
4
@ R1430
100K_0402_5%
1
@ R1429
100K_0402_5%
VDD
PVDD1
PVDD2
U80
1
16
15
6
change C1255、C1256、C1257、C1258、C1283 from 0.47uF to 0.1uF
20100113
1
D
1
2
EC_MUTE#
19
12
BYPASS
10
EC_MUTE#
AMP_BYPASS
SHUTDOWN
Keep 10 mil width
AMP_BYPASS
2
GND5
GND1
GND2
GND3
GND4
C
1
AMP_IN+
R1475
AMP_IN-
C1259
0.47U_0603_10V7K
R1476
15K_0402_5%
@
15K_0402_5%
@
1
2
3
4
9
8
7
6
5
SPKR/LSPKR/L+
C
APA0715QBI-TRG_TDFN8_3X3@
21
20
13
11
1
R1477
1
TPA6017A2_TSSOP20
GND2
OUTN
GND1
VDD
OUTP
SD#
BYPASS
INP
INN
@
40.2K_0402_1%
2
co-lay TPA6205A1 0112.
(Use NAL00 PCB Footprint)
Headphone Out
JHP1
20mil
(18) HP_LEFT
HP_LEFT
(18) HP_RIGHT
HP_RIGHT
1
R1440
1
R1441
HPOUT_L_1 1
2
56.2_0402_1%
L23
HPOUT_R_1 1
2
56.2_0402_1%
L24
1
2
HPOUT_L_2
2
FBM-11-160808-700T_0603
HPOUT_R_2
2
FBM-11-160808-700T_0603
3
20mil
4
1
B
C1260
330P_0402_50V7K
1
2
2
(18)
HP_PLUG#
HP_PLUG#
5
B
C1261
330P_0402_50V7K
6
SINGA_2SJ-0960-C01
CONN@
+MIC1_VREFO
+MIC1_VREFO
2
2
Follow ACER's request to cheange HP CONN P/N.011410.
1
D27
RB751V-40TE17_SOD323-2
1
MIC JACK
1
1
D26
RB751V-40TE17_SOD323-2
2
R402
4.7K_0402_5%
2
R403
4.7K_0402_5%
20mil
(18)
(18)
1
R405
1
R407
MIC1_L
MIC1_R
2
1K_0603_1%
2
1K_0603_1%
20mil
MIC2_L_1
1
MIC2_R_1
1
L28
FBM-11-160808-700T_0603
2
JMIC1
MIC2_L_2
MIC2_R_2
2
L27
FBM-11-160808-700T_0603
1
A
C488
220P_0402_50V8J
1
2
2
1
2
3
4
(18) MIC_PLUG#
MIC_PLUG#
5
A
C489
220P_0402_50V8J
6
SINGA_2SJ-0960-C01
CONN@
Compal Electronics, Inc.
Follow ACER's request to cheange MIC CONN P/N.011410.
Title
& lt; Title & gt;
Amplifier & Audio Jack
Size
Document Number
CustomNAV51 LA-6311P
Date:
5
4
3
2
Rev
0.1
NAV51 LA-6311P
Sheet
Monday, March 22, 2010
1
19
of
33
5
4
3
LED PCB CONN.
2
BT Module CONN.
1
+3VS
JP18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+3VALW
D
(21) PWR_LED#
(21) PWR_SUSP_LED#
(21) BATT_BLUE_LED#
(21) BATT_AMB_LED#
MEDIA_LED#
NUM_LED#
CAPS_LED#
BT_LED#
(21) NUM_LED#
(21) CAPS_LED#
(21) BT_LED#
+3VS
(17) WIMAX_LED#
(17) WLAN_LED#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
D
C411 BT@
0.1U_0402_16V4Z
R501
GND
GND
17
18
(21)
2
BT_ON#
BT MODULE CONN
1
10K_0402_5%
BT@
+3VS
ACES_85201-1605N
BT@
+3VS_BT
Q35
AO3413_SOT23-3
BT@
C502
2
1
D
S
3
CONN@
1
0.1U_0402_16V4Z
2
G
G
+3VS_BT
+3VS
C
SATA_LED#
SATA_LED#
1
P
(12)
(12)
Y
A
3
(11)
U29
2 B
4
USB20_P6
USB20_N6
USB20_P6
USB20_N6
1
2
3 GND
4 GND
5
6
MEDIA_LED#
C
ACES 88266-04001
CONN@
G
CARD_LED#
5
JBT1
1
2
3
4
NC7SZ08P5X_NL_SC70-5
Add U29 5/14
Card Reader CONN.
B
B
ESD
JCRB1
12
11
10
9
8
7
6
5
4
3
2
1
+3VALW
+3VS
+3VS
2
1
2
C1292
0.1U_0402_16V4Z
2
1
C1291
0.1U_0402_16V4Z
2
1
C1290
0.1U_0402_16V4Z
2
1
C1289
0.1U_0402_16V4Z
1
C1288
0.1U_0402_16V4Z
C1287
0.1U_0402_16V4Z
(8)
CLK_SD_48M
(12) USB20_N4
(12) USB20_P4
1
CLK_SD_48M
CARD_LED#
USB20_N4
USB20_P4
GND
GND
10
9
8
7
6
5
4
3
2
1
ACES_85201-1005N
2
Swap JCRB1.0107
Add ESD soultion 032210.
A
A
2009/01/22
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2009/11/20
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Card reader
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
20
of
33
+3VALW
L16
+EC_AVCC
2
2
67
2
U6
AVCC
2
9
22
33
96
111
125
2
1
VCC
VCC
VCC
VCC
VCC
VCC
2
1
C519
1000P_0402_50V7K
C518
@
1000P_0402_50V7K
1
C521
1000P_0402_50V7K
2
1
C517
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C520
0.1U_0402_16V4Z
1 ECAGND
2
1
R1288
0_0402_5%
1
C516
0.1U_0402_16V4Z
1
1
C515
0.1U_0402_16V4Z
2
+EC_AVCC
C514
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
MBK1608121YZF_0603
+3VALW
+3VALW
KSO[0..15]
+3VALW
EC_SMB_CK1
2
2.2K_0402_5%
EC_SMB_DA1
2
2.2K_0402_5%
KSO1
2
47K_0402_5%
KSO2
2
47K_0402_5%
1
R1297
1
R1298
1
R1299
1
R1300
+3VALW
0.1U_0402_16V4Z
1
+3VS
2
+5VS
TP_CLK
1
R1301
TP_DATA
1
R1303
2
4.7K_0402_5%
2
4.7K_0402_5%
BATT_OVP R1493 1
BATT_TEMP
C530 1
ACIN
C531 1
2 1K_0402_5%
Change from C to 1K ohm.020510.
2
100P_0402_50V8J
2
100P_0402_50V8J
KSO1
WLAN_OFF#
v
WXMIT_OFF#
KSI1
KSI5
v
WXMIT_OFF#
Swap to WLAN
v
v
GPIO15
(26)
(26)
(5)
(5)
High
v
v
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
WL_BTN#
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
INVT_PWM
FAN_SPEED1
EC_TX_P80_DATA
EC_RX_P80_CLK
(17) EC_TX_P80_DATA
(17) EC_RX_P80_CLK
(23)
ON/OFF#
(20) PWR_SUSP_LED#
(20) NUM_LED#
KSI5
BATT_TEMP
BATT_OVP
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
EN_FAN1
IREF
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
Interface
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
USB_ON#
@ 1
C1177
TP_CLK
TP_DATA
97
98
99
109
LID_SW#
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
AD
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
PS2
PWR_SUSP_LED#
NUM_LED#
XCLKI
GPIO
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
122
123
SM Bus
GPI
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
X1
32.768K_1TJS125BJ4A421P
Change C527 to 27pf,C525 to 22pf.022510.
R1292
8.2K_0402_5%
Rb
EC_MUTE# (19)
USB_ON# (15)
2
470P_0402_50V7K
BOM change for DVT EC_ID.020510.
BT_LED# (20)
TP_CLK (22)
TP_DATA (22)
1
R1293
LID_SW#
(22)
+3VALW
FRD#SPI_SO (22)
FWR#SPI_SI (22)
SPI_CLK (22)
FSEL#SPICS# (22)
11
24
35
94
113
FSTCHG (27)
BATT_BLUE_LED# (20)
CAPS_LED# (20)
BATT_AMB_LED# (20)
PWR_LED# (20)
SYSON (24,29)
VR_ON
(31)
ACIN
(13,27)
BATT_BLUE_LED#
CAPS_LED#
BATT_AMB_LED#
PWR_LED#
SYSON
124
2 R1309
EC_RSMRST# (13)
EC_LID_OUT# (13)
EC_ON
(23)
1
R78 1
R1295
BKOFF# (9)
WL_OFF# (17)
1
C524
2
@
2
2 @
2 0_0402_5%
0_0402_5%
ICH_RI# (13)
EC_PWROK (13)
BT_ON# (20)
PM_SLP_S4# (13)
GMCH_ENBKL (5)
EAPD
(18)
EC_THERM# (13)
SUSP#
(24,29,30)
PBTN_OUT# (13)
LAN_WAKE# (16)
EC_THERM#
SUSP#
PBTN_OUT#
20mil 1
ECAGND
C525
4
NC
1
IN
OUT
NC
2
C527
3
ACES_85205-0400
CONN@
1
22P 50V J NPO 0402
22P 50V J NPO 0402
1
2
3
4
27P_0402_50V8J
1
2
3
4
2
JP25
EC_TX_P80_DATA
EC_RX_P80_CLK
+0.89V_PG (30)
EN_FAN1 (4)
IREF
(27)
CALIBRATE# (27)
2
47K_0402_5%
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
100 0_0402_5%1
EC_LID_OUT#
101
EC_ON
102
103
104 ICH_POK_EC
105
106
107
108
V18R
EC DEBUG PORT
+3VALW
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
XCLK1
XCLK0
KB926QFD3_LQFP128_14X14
BRD_ID
(27)
2
R1389
Del Wwan_Wakeup# 012010.
GND
GND
GND
GND
GND
XCLKO
1
0_0402_5%
Ra
R1291
100K_0402_5%
@
(27)
BATT_TEMP (26)
ADP_I
BRD_ID
SPI Device Interface
SPI Flash ROM
ACOFF
2
63
64
65
66
75
76
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
PWR_PWM_LED# (23)
BEEP#
(18)
ACOFF
PWM Output
DA Output
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
(13) PM_SLP_S3#
(13) PM_SLP_S5#
(13) EC_SMI#
(9)
INVT_PWM
(4) FAN_SPEED1
KSI1
EC_RST#
EC_SCI#
12
13
37
20
38
PWR_PWM_LED#
BEEP#
High
Low
KSO1
@
10_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
EC_SMB_CK2
2.2K_0402_5%
EC_SMB_DA2
2
2.2K_0402_5%
1
R1307
1
R1308
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
21
23
26
27
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
1
KSI[0..7]
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
1 R320
2
100K_0402_5%
+3VALW
C1178
470P_0402_50V7K
KSI[0..7]
1
2
3
4
5
7
8
10
4.7U_0603_6.3V6K
(22)
(11)
GATEA20
(11) EC_KBRST#
(11)
SERIRQ
(13) LPC_FRAME#
(13)
LPC_AD3
(13)
LPC_AD2
(13)
LPC_AD1
(13)
LPC_AD0
C522 2
1 @ R1289 2
1
22P_0402_50V8J
(8) CLK_PCI_LPC
(4,5,13,16,17) PLTRST#
1
2
R1290
47K_0402_5%
(13)
EC_SCI#
2
C523
AGND
KSO[0..15]
69
(22)
SA00001J5A0 (ENE :KB926QFE0)
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/04
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
KB926/BIOS
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
21
of
33
5
4
KSI[0..7]
D
KSI[0..7]
KSO[0..15]
3
KSI1
KSI2
D
JKB1
2
100P_0402_50V8J
KSO4
C104 1
2
C135 1
2
100P_0402_50V8J
KSO5
C103 1
2
100P_0402_50V8J
C134 1
2
100P_0402_50V8J
KSO6
C102 1
2
100P_0402_50V8J
C133 1
2
100P_0402_50V8J
KSO7
C101 1
2
100P_0402_50V8J
KSI4
C132 1
2
100P_0402_50V8J
KSO8
C100 1
2
100P_0402_50V8J
KSI5
C131 1
2
100P_0402_50V8J
KSO9
C99
1
2
100P_0402_50V8J
KSI6
C127 1
2
100P_0402_50V8J
KSO10
C98
1
2
100P_0402_50V8J
KSI7
C126 1
2
100P_0402_50V8J
KSO11
C97
1
2
100P_0402_50V8J
KSO0
C125 1
2
100P_0402_50V8J
KSO12
C96
1
2
100P_0402_50V8J
KSO1
C124 1
2
100P_0402_50V8J
KSO13
C95
1
2
100P_0402_50V8J
KSO2
C114 1
2
100P_0402_50V8J
KSO14
C93
1
2
100P_0402_50V8J
KSO3
C113 1
2
100P_0402_50V8J
KSO15
C92
1
2
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KSI0
KSI1
KSI2
KSO0
KSO1
KSO2
KSI3
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSI4
KSO9
KSI5
KSI6
KSO10
KSO11
KSI7
KSO12
KSO13
KSO14
KSO15
100P_0402_50V8J
KSI3
C
C136 1
1
8M SPI ROM
INT_KBD Conn.
(21)
KSO[0..15] (21)
KSI0
2
100P_0402_50V8J
+3VALW
G2
G1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
U75
SPI_CS#
1
3
7
4
+3VALW
CS#
WP#
HOLD#
GND
8
6
5
2
VCC
SCLK
SI
SO
SPI_CLK_R
SPI_SI
SPI_SO
MX25L512AMC-12G_SO8
@
+3VALW
1
C526
20mils
U76
8
(21) FSEL#SPICS#
(21)
SPI_CLK
(21) FWR#SPI_SI
2
FSEL#SPICS# 2
R1302
SPI_CLK
2
R1304
FWR#SPI_SI 2
R1305
SPI_CS#
22_0402_5%
SPI_CLK_R
1
22_0402_5%
SPI_SI
1
22_0402_5%
1
VCC
3
W
7
0.1U_0402_16V4Z
HOLD
1
S
6
C
5
VSS
Q
D
4
2
SPI_SO 2
R1306
1
FRD#SPI_SO
22_0402_5%
FRD#SPI_SO (21)
C
SST25LF080A_SO8-200mil
ACES_85202-24051
CONN@
C528
2
1
SPI_CLK_R
10P_0402_50V8J
To TP/B Conn.
LID Switch
B
B
JP11
+3VALW
GND
GND
8
7
ACES_85201-0605N
C155
0.1U_0402_16V4Z
CONN@
1
OUTPUT
1
1
2
PJDLC05C_SOT23-3
3
LID_SW# (21)
1
GND
D22
C150
U5
2
APX9132ATI-TRL SOT-23 3P
10P_0402_50V8J
1
2
3
4
5
6
2
3
TP_CLK
TP_DATA
2
TP_CLK
TP_DATA
VDD
1
2
3
4
5
6
+5VS
(21)
(21)
A
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/18
Issued Date
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
KB CONN/TP/LID SW
Size
B
Date:
Document Number
Rev
0.2
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
22
of
33
Add For NAV50 07/06
09/03 Change +5VS to +3VS
Power Button Logic
ON/OFF Button
+3VS
3
SW1
4
(BLUE)
TOP Side
ON/OFFBTN#
+3VALW
@
R186 2
1
0_0805_5%
1
1
51 +-5% 0402
R1388
2
2
2
EVQPLMA15 SPST PANASONIC H1.5
LED1
HT-191NB5-DT BLUE 0603
R1347
100K_0402_5%
D14
Bottom Side
FOR EMI
1
2
@
R194 2
1
0_0805_5%
ON/OFF#
2
ON/OFFBTN#
1
1
ON/OFF#
(21)
51ON#
51ON#
3
(25)
1
DAN202U_SC70
PWR_PWM_LED#
PWR_PWM_LED# (21)
C4
10mil
C1284 1
ON/OFFBTN#
C1285 1
2
D1
1000P_0402_50V7K
1
2 @ 100P_0402_50V8J
RLZ20A_LL34
2 @ 100P_0402_50V8J
2
PWR_PWM_LED#
1
ON/OFFBTN#
EC_ON
EC_ON
R3
2
3
D42
D
S
Q1
2N7002W-T/R7_SOT323-3
2
G
2
(21)
3
PWR_PWM_LED#
10K_0402_5%
1
1
PJSOT24C_3P_C/A_SOT-23
H8
H
H_3P2X3P7N
1
@
FM4
@
FM3
@
FM1
@
@
FIDUCIAL_C40M80
1
FM2
@
1
@
1
@
H17
H
1
@
H7
H
1
H2
H
1
@
1
1
@
H1
H
1
H9
H
1
H16
H
H_2P6
H11
H
H_3P3N
1
@
H22
H
H_3P0
@
1
H20
H
H_3P4X3P2N
1
@
H18
H
1
H19
H
@
1
@
@
1
H3
H
H_3P3
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/18
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
ON/OFF / LID SW
Size
B
Date:
Document Number
Rev
0.2
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
23
of
33
A
B
C
D
+5VALW TO +5VS
E
+3VALW TO +3VS
1
1
470_0402_5%
2
1U_0603_10V4Z
1
C191
R190
10U_0603_6.3V6M
2
1
C201
1
2
3
10U_0603_6.3V6M 10U_0603_6.3V6M
2
2
1
C170
C176
10U_0603_6.3V6M
2
1
470_0402_5%
R114
1U_0603_10V4Z
2
3
Q17B
2N7002DW-T/R7_SOT363-6
C208
Q12B
2N7002DW-T/R7_SOT363-6
R139
1
2
33K +-5% 0402
+VSB
1
6
4
1
SUSP
5
0.1U 25V K X5R 0402
2
2N7002DW-T/R7_SOT363-6
5
SUSP
4
5VS_GATE
2
1
3 1
C219
Q15
4
1
C223
2
10U_0603_6.3V6M
1
R187
22K +-5% 0402
+3VS
SI4800BDY-T1-E3_SO8
8
7
6
5
2
1
2
3
1
10U_0603_6.3V6M
2
+VSB
1
+3VALW
Q19
4
C218
SI4800BDY-T1-E3_SO8
8
7
6
5
6
C221
1
+5VS
2
+5VALW
C179
Q17A
2
Q12A
SUSP
0.1U 25V K X5R 0402
2
2N7002DW-T/R7_SOT363-6
2
1
1
SUSP
2
+5VALW
R141
100K_0402_5%
2
2
1
+1.8V to +1.8VS
+1.8V
+1.8VS
SYSON#
ADD +5VS +VCCP +0.89V Cap for EMI
R317
Q14A
(21,29)
SUSP
Q28A
2
C396
1
2
0.1U 25V K X5R 0402
1
2N7002DW-T/R7_SOT363-6
@
1
C1173
@
1
C1174
@
1
C1175
C1172
@
2
2
2
0.01U_0402_25V7K
@
2N7002DW-T/R7_SOT363-6
+1.8V
0.01U_0402_25V7K
1
2
+1.8V
0.01U_0402_25V7K
5
4
R318
200K +-1% 0402
2
+0.89V
SYSON
SYSON
1
+VCCP
0.01U_0402_25V7K
Q28B
2N7002DW-T/R7_SOT363-6
1.8VS_GATE
SUSP
6
2
470_0402_5%
1
C1176
2
+0.9VS
0.01U_0402_25V7K
2
1
C395
10U_0603_6.3V6M
2
1
3
C394
1
1U_0603_10V4Z
1
2
3
+5VS
6
+VSB
2
10U_0603_6.3V6M
10U_0603_6.3V6M
2
1
C393
Q27
4
1
10U_0603_6.3V6M
10U_0603_6.3V6M
C392
SI4800BDY-T1-E3_SO8
8
7
6
5
3
3
Change from VL to +5VALW.020510.
Del RTCVREF 012010.
2
+5VALW
+1.5VS
+VCCP
+0.9VS
+1.8V
SUSP
SUSP
3
2
2
2
2
(30)
1
R173
100K_0402_5%
470_0402_5%
R70
R63
Q14B
5
(21,29,30) SUSP#
2N7002DW-T/R7_SOT363-6
Q8A
SUSP
5 SUSP
@
4
2
2N7002DW-T/R7_SOT363-6
2
@
2N7002DW-T/R7_SOT363-6
1
Q8B
SUSP
@
6
3
Q6A
5
4
@
1
Q6B
2N7002DW-T/R7_SOT363-6
6
3
4
1
1
470_0402_5%
R57
1
470_0402_5%
R51
1
470_0402_5%
SYSON#
2N7002DW-T/R7_SOT363-6
4
4
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
DC INTERFACE
Size
B
Date:
Document Number
Rev
0.2
NAV51 LA-6311P
Sheet
Monday, March 22, 2010
E
24
of
33
A
B
C
D
1
1
VIN
PL1
HCB2012KF-121T50_0805
1
2
DC_IN_S1
1
1
PC4
100P_0402_50V8J
PC5
100P_0402_50V8J
2
PC3
1000P_0402_50V7K
2
4
3
2
1
2
GND 4
GND 3
2
1
2
1
PJP1
6
5
1
SP02000GC00
PC6
1000P_0402_50V7K
ACES 88266-04001
CONN@
2
2
-
+
PBJ1
2
1
+RTCBATT
+RTCBATT
ML1220T13RE
45@
PJ2
2
JUMP_43X118
1
1
PC13
0.22U_0603_25V7K
PC14
0.1U_0402_25V6
2
2
1
1
JUMP_43X118
+VCCP
2
TP0610K-T1-E3_SOT23-3
+VCCPP
+1.8V
1
JUMP_43X118
VS
2
2
(23) 51ON#
1
PR14
22K_0402_1%
1
2
2
PR13
100K_0402_1%
+5VALW
1
1
1
2
2
3
2
2
N1
1
2
1
2
1
PJ4
+1.8VP
PC195
.1U_0402_16V7K
BATT+
1
3
PR11
68_1206_5%
PJ3
PQ1
2
JUMP_43X118
2
PR10
68_1206_5%
PD3
RLS4148_LL34-2
2
PC196
.1U_0402_16V7K
3
+5VALWP
1
1
1
PD2
RLS4148_LL34-2
+3VALW
1
1
2
1
1
2
2
2
PC194
.1U_0402_16V7K
+3VALWP
PC193
.1U_0402_16V7K
PJ1
VIN
PJ5
1
+CHGRTC
PR16
560_0603_5%
1
2
PR17
560_0603_5%
1
2
1
+0.89V
1
2
JUMP_43X79
2
2
PC197
.1U_0402_16V7K
+0.89VP
+3VLP
4
4
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/09/20
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Title
DCIN & DETECTOR
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
D
Sheet
25
of
33
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 92 degree C
Recovery at 72 degree C
VMB
PC23
0.1U_0603_25V7K
@ PR23
@PR23
100K_0402_1%
PU3
1
VCC TMSNS1
8
GND RHYST1
7
2
3
OT1 TMSNS2
6
PR31
15K_0402_1%
OT2 RHYST2
5
1
1
4
G718TM1U_SOT23-8
PR25
6.49K_0402_1%
2
1
1
@ PR169
47K_0402_1%
+3VALWP
1
PR220
1K_0402_5%
2
1
1
2
2
(28) MAINPWON
PR22
100_0402_1%
1
1
PR29
22.1K_0402_1%
2
SUYIN_200275MR008G15QZR
PR21
100_0402_1%
1
2
PR28
10K_0402_1%
VL
2
PC22
0.01U_0402_25V7K
2
PC21
1000P_0402_50V7K
1
1
TS
EC_SMCA
EC_SMDA
1
BATT+
1
BATT_S1
B/I
2
1
2
PH2 @
PH1
100K_0402_1%_NCP15WF104F03RC
100K_0402_1%_NCP15WF104F03RC
2
2
PR27
1K_0402_1%
2
1
2
3
4
5
6
7
8
9
10
1
1
2
3
4
5
6
7
8
GND
GND
VL
PL2
HCB2012KF-121T50_0805
1
2
2
PJP2
2
1
2
2
BATT_TEMP (21)
EC_SMB_CK1 (21)
EC_SMB_DA1 (21)
@ PR236
@PR236
0_0805_5%
1
2
PQ3
3
+VSB
1
PR30
100K_0402_1%
PR32
22K_0402_1%
2
3
3
1
S
1
D
3
1
PR34
100K_0402_1%
(28) SPOK
PC200
0.1U_0402_25V6
2
VL
2
2
TP0610K-T1-E3_SOT23-3
2
1
1
B+
PQ4
2N7002W-T/R7_SOT323-3
2
G
4
4
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/09/20
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Title
BATTERY CONN / OTP
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
D
Sheet
26
of
33
A
B
C
D
B+
UGATE
17
9
CHLIM
BOOT
16
10
ACLIM
VDDP
15
VADJ
LGATE
14
12
GND
PGND
2
PR81
20K_0402_1%
1
PC58
0.1U_0603_25V7K
2
1
3
4
PC54
2200P_0402_25V7K
2
1
PC53
4.7U_0805_25V6-K
2
1
1 1
2
2
PR223
14.3K_0402_1%
3
13
5
PC65
0.1U_0603_25V7K
BST_CHGA 2
1
DL_CHG
4
PD14
RB751V-40TE17_SOD323-2
6251VDDP
PQ21
AON7408L_DFN8-5
1
.1U_0402_16V7K
PR79
38.3K_0402_1%
6251aclim
2
6251VREF 1
DH_CHG
PR78
0_0603_5%
BST_CHG 1
2
26251VDD
1
1
PR82
4.7_0603_5%
PC70
4.7U_0603_6.3V6K
BATT+
PR74 0.05_1206_1%
4
2
3
PC68
10U_1206_25V6M
2
1
VREF
11
6251VREF
2 PACIN
G
PQ18
2N7002W-T/R7_SOT323-3
PC67
10U_1206_25V6M
2
1
8
PL5
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
CHG
1
2
1
18
PR76
4.7_1206_5%
PHASE
S
2
ICM
D
2
1
19
PD13
1SS355TE-17_SOD323-2
1
2
PQ19
AON7408L_DFN8-5
4
5
CSIP
1
PC209
1000P_0402_25V8J
2
1
PR222
10_1206_5%
2
1 1
VCOMP
2
PC66
680P_0402_50V7K
3
CSIN
PR64
200K_0402_1%
1
2 VIN
CSOP
2
PR80
100K_0402_1%
2
ICOMP
20
3
2
1
ACOFF
21
2
ACOFF
CSOP
7
PR73
100_0402_1%
1
2
PC64
1
2
2
(21)
CELLS
CSON
2
IREF
22
1
VIN
PD10
1SS355TE-17_SOD323-2
ACOFF
1
2
1
PC57
ACPRN 0.22U_0603_25V7K
PR68
20_0402_5%
1
2
PC59
0.047U_0402_16V7K
1
2
PR69
20_0402_5%
2
1
PR70
PC62
20_0402_5%
0.1U_0603_25V7K
1
2
PR72
2_0402_5%
LX_CHG
1
(21)
ADP_I
CSON
6
6.81K_0402_1%
2
1
2
PC63
@ 100P_0402_50V8J
PR77
62K_0402_1%
2
1
1
1
PQ22
DTC115EUA_SC70-3
(21)
PR71
1
EN
5
2
3
0.01U_0402_25V7K
PR75
22K_0402_5%
PACIN 1
2
PACIN
PC61
1
2
2N7002W-T/R7_SOT323-3
PC69
0.01U_0402_25V7K
2
1
PQ20 D
2
G
S
23
3
6800P_0402_25V7K
2
ACSET ACPRN
2
3
2
1
2
2
3
1
PC60
1
2
6251_EN
DCIN
24
4
2
PR221
191K_0402_1%
1
1
DCIN
1
PR66
150K_0402_1%
VDD
PQ16
DTC115EUA_SC70-3
2
@ PC56
@PC56
.1U_0402_16V7K
1
5
PR58
47K_0402_1%
1
2
PR62
10K_0402_1%
ACSETIN
1
PQ17
2N7002W-T/R7_SOT323-3
PU5
2
100K_0402_1%
1
3
1
2
G
S
PD1
RB751V-40_SOD323-2
PC55
2.2U_0603_6.3V6K
PR65
10K_0402_5%
2
1
(21) FSTCHG
D
2
1
ACSETIN
@ PD12
@PD12
1SS355TE-17_SOD323-2
1
2
PQ15
DTC115EUA_SC70-3
2
6251VDD
1
2
3
CSIN
VIN
1
2
1
2
1
1
CSIP
2
1
2
PR60
200K_0402_1%
2
JUMP_43X118
3
PR67
PR59
47K_0402_1%
2
1
PQ12
DTA144EUA_SC70-3
PC51
0.1U_0603_25V7K
2
1
3
1
2
SI7121DN-T1-GE3_POWERPAK8-5
PQ11
PJ8
2
PC50
4.7U_0805_25V6-K
2
1
5
CHG_B+
PR57 0.05_1206_1%
4
PC165
0.1U_0603_25V7K
2
1
1
4
B340A_SMA2
B+
P3
SI7121DN-T1-GE3_POWERPAK8-5
PQ10
1
2
3
1
1
PC52
5600P_0402_25V7K
1
2
2
1
P2
PD9
VIN
ISL6251AHAZ-T_QSOP24
Iada=0~1.58A(30W)
CP = 85%*Iada ; CP = 1.343A
CP mode
Vaclim=2.39*(20K/(20K+38.3K))=0.8199V
3
(21) CALIBRATE#
PR83
15.4K_0402_1%
1
2
Vth,rise(typical) = ((191K/14.3K)+1)*1.26
2
3
Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05)
where Vaclm=0.8199V, Iinput=1.343A
= 18.89V
PR85
31.6K_0402_1%
Vth,fall(typical) = ((191K/14.3K)+1)*1.26 -3.4uA*191K
1
= 17.43V
CC=0.3~1.76A
IREF=1.62*Icharge
IREF=0.486V~2.85V
3.24V== & gt; 2A
PR224
10K_0402_1%
1
2
1
1
6251VDD
ACPRN
CV mode
(13,21)
D
S PQ32
1
Charging Voltage
(0x15)
1 2
BATT Type
ACIN
PR226
10K_0402_1%
PACIN
3
2
PR225
100K_0402_1%
2
G
PR227
20K_0402_1%
2
SSM3K7002FU_SC70-3
4
Normal 3S LI-ON Cells
12600mV
4
12.60V
VADJ-- & gt; VREF-- & gt; 4.41V
Issued Date
Vcell=(0.175*VADJ+3.99)
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
VADJ--- & gt; Ground--- & gt; 3.99V
2007/09/20
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
C
Title
CHARGER
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
D
Sheet
27
of
33
5
4
3
2
1
PC202
0.22U_0603_10V7K
2VREF_51125
1
D
2
D
3
2
VL
20
LX_5V
12
DRVL2
DRVL1
19
LG_5V
B++
PC44
150U_B2_6.3VM_R45M
1
2
PC205
4.7U_0805_10V6K
1
VL
PR231
@ 0_0402_5%
2
1
PC204
1U_0603_10V6K
2
1
2
3
2
1
PQ8
AON7702L_DFN8-5
1
1
2
4
TPS51125RGER_QFN24_4X4
PR38
4.7_1206_5%
5
VCLK
18
VIN
VREG5
17
16
GND
15
SKIPSEL
EN0
13
PL4
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
1
2
B+
2
5
UG_5V
LL1
3
2
1
21
LL2
PR230
499K_0402_1%
1
2
PR232
100K_0402_1%
PC164
0.1U_0603_25V7K
2
1
PC34
2200P_0402_50V7K
2
1
PC33
4.7U_0805_25V6-K
2
1
PC32
4.7U_0805_25V6-K
2
1
DRVH1
11
VFB=2.0V
+5VALWP
1
+
2
B
1
+5VALWP
Ipeak=7.0A Imax=4.9A
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 147K)/9-24mV=151mV
Ilimit=151mV/17.9m ~151mV/14.5m x 1.2
=8.467A ~ 8.710A
Iocp=Ilimit+Delta I/2
=9.384A ~ 9.627A
Delta I=1.834A (Freq=245KHz)
A
5
3
@ PC207
0.01U_0402_16V7K
1
PR234
100K_0402_1%
2
1
PR235
40.2K_0402_1%
2
2
VS
1
DRVH2
+3.3VALWP Ipeak=5.731A Imax=4.012A
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 130K)/9-24mV=134.9mV
Ilimit=134.9mV/17.9m ~134.9mV/14.5m x 1.2
=7.536A ~ 7.752A
Iocp=Ilimit+Delta I/2
=8.081A ~ 8.297A
Delta I=1.090A (Freq=305KHz)
1
2
2
10
2N7002W-T/R7_SOT323-3
(26) MAINPWON
1
ENTRIP1
PR40
PC41
0_0603_5% .1U_0402_16V7K
BST_5V 1
2 1
2
PQ34
PR233
100K_0402_1%
A
3
22
PQ6
AON7408L_DFN8-5
4
S
2
G
S
VFB1
23
VBST1
2
1
PC206
0.1U_0603_25V7K
1
3
1
2
G
2N7002W-T/R7_SOT323-3
VREF
4
TONSEL
5
PGOOD
VBST2
14
1
2
3
5
VREG3
9
4
PQ7
AON7702L_DFN8-5
C
(26)
8
2VREF_51125
D
SPOK
BST_3V
ENTRIP2
PQ33 D
24
LG_3V
B
ENTRIP1
VO1
UG_3V
PR39
2 1
2
0_0603_5%
PC40
.1U_0402_16V7K
1
2
3
PR37
4.7_1206_5%
2
1
PC42
680P_0402_50V7K
2
1
2
PC39
150U_B2_6.3VM_R45M
+
VO2
LX_3V
1
PL3
8.2UH 20% FMJ-0630T-8R2A HF 4.5A
1
2
1
6
7
PR229
158K_0402_1%
2
B++
PC43
680P_0402_50V7K
4
+3VALWP
P PAD
1
VFB2
1
PU4
25
ENTRIP2
PQ5
AON7408L_DFN8-5
PR228
143K_0402_1%
1
2
2
PC203
4.7U_0805_10V6K
5
PC31
2200P_0402_50V7K
2
1
C
PC30
4.7U_0805_25V6-K
2
1
PC29
4.7U_0805_25V6-K
2
1
+3VLP
PC163
0.1U_0603_25V7K
2
1
B+
PR44
19.6K_0402_1%
1
2
ENTRIP1
PR43
20K_0402_1%
1
2
B++
PL11
HCB2012KF-121T50_0805
1
2
PR42
30K_0402_1%
1
2
ENTRIP2
PR41
13K_0402_1%
1
2
PQ35
DTC115EUA_SC70-3
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/11/12
Issued Date
Deciphered Date
2008/11/12
+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
Title
2
Size Document Number
Custom
Rev
0.1
NAV50
Date:
Monday, March 22, 2010
Sheet
1
28
of
33
A
B
C
D
PL12
HCB2012KF-121T50_0805
1
2
PC166
0.1U_0603_25V7K
2
1
4
1
PR91
0_0603_5%
BST_1.8V 1
2
PQ23
AON7408L_DFN8-5
3
2
1
SYSON
B+
2
+
2
PC78
220U_B2_2.5VM_R35
1
1
PR96
28.7K_0402_1%
1
2
Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
Ipeak=4.97A, Imax=3.479A, Iocp=5.964A
Delta I=((19-1.8)*(1.8/19))/(2.2u*328K)=2.259A
= & gt; 1/2DeltaI=1.129A
Vtrip=Rtrip*10uA=8.66K*10uA=0.0866V
Iocpmin=Vtrip/(Rdsonmax)+1.129
=0.0866/(0.0179)+1.129=5.967A
Iocpmax=(0.0866/(0.0145*1.2))+1.129A=6.106A
Iocp=5.967A~6.106A
PR97
20.5K_0402_1%
2
PL13
HCB2012KF-121T50_0805
1
2
PR98
300K_0402_5%
1
2
PC167
0.1U_0603_25V7K
2
1
PC85 @
4.7U_0805_25V6-K
2
1
B+
4
PR100
0_0603_5%
BST_1.05V1
2
3
2
1
PR99
2K_0402_1%
1
2
PC84
4.7U_0805_25V6-K
2
1
5
PC83
2200P_0402_50V7K
2
1
+VCCP_B+
PQ25
AON7408L_DFN8-5
DL_1.05V
1
PGND
RT8209BGQW_WQFN14_3P5X3P5
2
8
GND
7
4
PC92
4.7U_0805_10V6K
1
+
2
PC88
220U_B2_2.5VM_R15M
9
+5VALW
PR102
4.7_1206_5%
LGATE
1
2
PC89
4.7U_0603_6.3V6K
LX_1.05V
PC90
680P_0603_50V7K
10
1
VDDP
2
PR104
14K_0402_1%
1
+VCCPP
2
11
1
PGOOD
12
CS
2
6
PHASE
PQ26
AON7702L_DFN8-5
FB
13
5
VDD
5
14
15
VOUT
4
DH_1.05V
UGATE
3
PL7
1UH_FMJ-0630T-1R0 HF_11A_20%
1
2
3
2
1
3
PR103
100_0603_1%
1
2
TON
PC87
0.1U_0603_25V7K
BST_1.05V-1 1
2
BOOT
2
+5VALW
NC
1
PU7
EN/DEM
PC86
1U_0402_6.3V6K
2
2
PR101
30K_0402_5%
1
1
(21,24,30) SUSP#
PC82
4.7U_0805_10V6K
2
2
PQ24
AON7702L_DFN8-5
4
RT8209BGQW_WQFN14_3P5X3P5
8
7
& lt; Vo=1.8V & gt; VFB=0.75V
Vo=VFB*(1+PR96/PR97)=0.75*(1+28.7K/20.5K)=1.8V
Fsw=328KHz
1
DL_1.8V
2
LGATE
9
1
PGND
PGOOD
2
PC79
4.7U_0603_6.3V6K
GND
6
+5VALW
+1.8VP
PR93
4.7_1206_5%
2
PR95
8.66K_0402_1%
1
10
LX_1.8V
1
2
11
VDDP
FB
12
CS
1
5
PHASE
0.1U_0603_25V7K
5
VDD
13
PC80
680P_0603_50V7K
14
VOUT
4
DH_1.8V
UGATE
3
2
1
3
PR94
100_0603_1%
1
2
TON
PL6
2.2UH_FMJ-0630T-2R2 HF_8A_20%
1
2
PC76
1
2
BST_1.8V-1
BOOT
2
+5VALW
NC
1
PU6
EN/DEM
PC77
1U_0402_6.3V6K
2
2
PR92
30K_0402_5%
15
1
1
(21,24)
PR90
1K_0402_1%
1
2
PC75 @
4.7U_0805_25V6-K
2
1
PC73
2200P_0402_50V7K
2
1
5
PR89
300K_0402_5%
1
2
1
PC74
4.7U_0805_25V6-K
2
1
1.8V_B+
3
1
PR105
8.2K_0402_1%
1
2
4
2
PR106
20.5K_0402_1%
& lt; Vo=1.05V & gt; VFB=0.75V
Vo=VFB*(1+PR105/PR106)=0.75*(1+8.2K/20.5K)=1.05V
Fsw=280KHz
Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
Ipeak=3.124A, Imax=2.187A, Iocp=3.749A
Delta I=((19-1.05)*(1.05/19))/(1.5u*280K)=3.549A
= & gt; 1/2DeltaI=1.774A
Vtrip=Rtrip*10uA=14K*10uA=0.14V
Iocpmin=Vtrip/(Rdsonmax)+1.774
=0.14/(0.0179)+1.774=9.596A
Iocpmax=(0.14/(0.0145*1.2))+1.774A=9.820A
Iocp=9.596A~9.820A
4
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/09/20
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
Title
1.8VP / +VCCPP
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
D
29
of
33
5
4
(21)
+3VALW
2
3
2
1
+0.89V_PG
1
@ PR215
@PR215
100K_0402_1%
1
2
PR125
@ 47K_0402_5%
@
PR115
61.9K_0402_1%
1
2
1
Ipeak=2.64A, Imax=1.848A
PC208
22U_0805_6.3VAM
1
SY8033BDBC_DFN10_3X3
2
1
2
1
2
@
PC98
22U_0805_6.3VAM
NC
FB_SY8033B
PC100
22P_0402_50V8J
2
1
6
PR114
30.1K_0402_1%
+0.89VP
1
TP
7
11
EN_SY8033B
2
NC
FB
PC96
0.1U_0402_10V7K
1
PR108 0_0402_5%
3
& lt; Vo=0.89V & gt; VFB=0.6V
Vo=VFB*(1+PR114/PR115)=0.6*(1+30.1K/61.9)=0.89V
2
1
2
(21,24,29) SUSP#
LX_SY8033B
SVIN
EN
2
LX
1
8
PC99
22U_0805_6.3VAM
LX
1
PVIN
2
4
PVIN
9
2
1
JUMP_43X79
PR107
4.7_1206_5%
1
PL8
1UH_FMJ-0630T-1R0 HF_11A_20%
1
2
PC81
680P_0603_50V7K
2
10
5
+3VALW
2
D
PU8
PJ6
PG
D
C
C
Ipeak=1.48A, Imax=1.036A
+1.8V
PC105
1U_0402_6.3V6K
1
+1.5VS
+1.8V
B
1
PC198
.1U_0402_16V7K
2
0.01U_0402_25V7K
2
1
1
PC107
PC108
22U_0805_6.3V6M
1.54K_0402_1%
1
APL5930KAI-TRG_SO8
2
FB
2
1
3
4
PR118
GND
@
PC109
.1U_0402_16V7K
EN
POK
VOUT
VOUT
1
2
1
2
2
PR119
@ 47K_0402_5%
B
VCNTL
VIN
VIN
8
7
PR117
10K_0402_5%
1
2
(21,24,29) SUSP#
PU10
6
5
9
2
PC106
4.7U_0805_6.3V6K
1
2
1
+5VALW
PR120
1.74K_0402_1%
2
PU11
6
5
3
VREF
NC
7
4
VOUT
NC
8
TP
9
+3VALW
1
NC
1
VCNTL
GND
PC111
1U_0603_6.3V6M
2
PR121
1K_0402_1%
2
1
PC110
4.7U_0805_6.3V6K
VIN
2
2
1
1
PC199
.1U_0402_16V7K
+0.9VS
2
1
2
PC114
10U_0805_6.3V6M
2
3
2
PC113
.1U_0402_16V7K
PQ29 D
PR123
2
1K_0402_1%
G
S
2N7002W-T/R7_SOT323-3
PC112
.1U_0402_16V7K
2
1
1
PR122
0_0402_5%
1
2
1
(24) SUSP
1
APL5336KAI-TRL SOP
Ipeak=1A, Imax=0.7A
A
A
2007/09/20
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
+0.89VP/+1.5VS/+0.9VSP
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
30
of
33
A
B
C
D
E
F
G
H
(5)
(5)
(5)
CPU_VID2
(21)
CPU_VID3
(5)
CPU_VID4
(5)
CPU_VID5
(5)
CPU_VID6
(5)
VR_ON
CPU_VID1
1
CPU_VID0
1
1
2
PC148
0.1U_0402_25V6
1
2
1
2
PC147
2200P_0402_50V7K
5
PL10
2.2UH_FMJ-0630T-2R2 HF_8A_20%
1
2
2
+CPU_COREP
+CPU_CORE
1
3
2
1
2
B+
5
19
18
AGND
17
1
4
AGND
33
PQ31
AON7702L_DFN8-5
LL=5.9m ohm
OCP=7.85A
VID:0.75V~1.1V
Io(max)=6.04A
2
1
2
PC186
2.2U_0603_10V6K
PC115
680P_0603_50V7K
3
2
1
CSCOMP
CSFB
CSREF
2
16
15
PH4
100K_0402_1%_NCP15WF104F03RC
1
2
3
Place RTH1 close to inductor
on the same layer
1
1
PC190
220P_0402_50V7K
PR217
75K_0402_1%
2
1
2
PC189
1000P_0402_50V7K
2
LLINE
PC116
4.7U_0805_25V6-K
1
2
2
1
VID6
25
26
VID5
VID4
VID3
27
14
PC121
4.7U_0805_25V6-K
2
1
VID6
1
1
VID5
PR204
1
VID4
PR203
1
PR202
1
VID3
28
29
30
VID1
VID2
RAMP
RT
12
13
11
3211_RAMP
1
1
PR124
4.7_1206_5%
PR213
35.7K_0402_1%
2
1
PR214
499K_0402_1%
2
1
PR219
1K_0402_1%
2
1 3211_RAMP-1
2
1
PR218
309K_0402_1%
1
2
PC191
1000P_0402_50V7K
2
Connect to input caps
1
(6)
(6)
VCCSENSE
PR201
1
VID2
PR199
1
VID1
3211_RT
PR211
200K_0402_1%
1
2 3211_RPM
3211_CSCOMP 1
2
2
1
VSSSENSE
+CPU_B+
+5VS
3211_DRVL
3211_CSCOMP
PR158
0_0402_5%
3211_CSFB
PR150
0_0402_5%
3211_CSCOMP
Avoid high dV/dt
RPM
IREF
ILIM
& lt; BOM Structure & gt;
3
20
GPU
PR210
80.6K_0402_1%
3211_IREF
1
2
PR209
2.37K_0402_1%
PVCC
COMP
3211_ILIM 8
PR207
28K_0402_1%
PL9
HCB2012KF-121T50_0805
PQ30
AON7408L_DFN8-5
3211_SW
DRVL
7
9
PC188
470P_0402_50V8J
21
4
PGND
3211_COMP 6
2
ADP3211AMNR2G_QFN32_5X5
PR206
PC183
0_0603_5%
0.22U_0603_25V7K
2CPU_BOOST-1 2
1
3211_DRVH
FB
1
23211_COMP-1
1
5
22
SW
FBRTN
2
PR208
1K_0402_1%
PC187
47P_0402_50V8J
1
31
32
EN
DRVH
10
2
23 CPU_BOOST 1
CLKEN#
2
2
1
VID0
1
2
1
3211_FB
24
IMON
3
2
PC182
1U_0805_25V6K
BST
PWRGD
2
(8) CLK_ENABLE#
PC185
390P_0402_50V7K
PR200
10_0603_1%
VCC
1
4
1
+CPU_B+
PU12
PR205
10K_0402_1%
PC184
1000P_0402_50V7K
+5VS
3211_VCC
+3VS
VID0
3211_EN 1
2
PR212
274K_0402_1%
1
2
(5,8,13) VGATE
PR196
PR195
0_0402_5%
2
13211_PWRGD
PR198
2
PR194
4.7K_0402_1%
PR197
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
1
+3VS
PC192
1000P_0402_50V7K
Shortest the
net trace
4
4
2007/09/20
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
Deciphered Date
2008/09/20
Title
+CPU_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
F
Size
C
Date:
G
Document Number
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
31
Sheet
H
of
33
5
4
3
2
Version change list (P.I.R. List)
Item
Fixed Issue
1
Page 1 of 1 for PWR
Reason for change
Rev.
PG#
Modify List
Date
Phase
1
2010.1.8
EVT
2
2010.1.11 EVT
D
D
3
4
5
6
7
8
C
C
9
10
11
12
13
14
15
B
B
16
17
18
19
20
21
22
A
23
A
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2006/08/04
Issued Date
Deciphered Date
2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
PIR_HW
Size Document Number
Custom
Date:
Rev
1.0
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
32
of
33
5
4
3
2
Version change list (P.I.R. List)
Item
D
1
Page 1 of 1 for PWR
Fixed Issue
Reason for change
Rev.
PG#
Modify List
Date
Phase
1
PU8 Vin change to +3VALW
modify for HW layout request
0.1
30
2010.1.8
2
PU4 Pin25 change to no connect
modify for 3/5V load balance(TI FAE request)
0.1
28
D
2010.1.11 EVT
EVT
3
4
5
6
7
C
8
C
9
10
11
12
13
14
B
15
B
16
17
18
19
20
21
22
A
A
23
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/09/20
Deciphered Date
2008/09/20
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
PIR (PWR)
Size Document Number
Custom
Date:
Rev
0.1
NAV51 LA-6311P
Monday, March 22, 2010
Sheet
1
33
of
33
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