SM jest płatny (full) np. Link Popatrz w ten okrojony z zał. LA-C581p - np. str.26 Plus rozwiazania Compal (po 2015) oparte o ten sam kbc Podaj jaki masz kbc, matryca podłaczona pod to zalane złącze.
A
B
C
D
E
1
1
Compal Confidential
2
2
STORM M/B Schematic
LA-C581P
Rev: 1.0_D
2015.08.13
3
3
4
4
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
B
C
D
COVER PAGE
Size Document Number
Custom
Rev
0.5
LA-C581P
Date:
A
Compal Electronics, Inc.
Thursday, August 13, 2015
E
Sheet
1
of
102
5
4
3
2
1
STORM Block-Diagram
eDP Conn.
mDP Conn.
P.27
SODIMM DDR4 2133MHz
P.22
DDI1
4 Lane
D
One Channel
eDP
2 Lane
P.26
D
HDA
2-Ch. SPK Conn. P.54
DMIC
USB 2.0 USB 3.0 Conn
USB3.0
AOU5
Audio Codec
P.56
P.50
Combo Jack Conn.P.51
USB 3.0
DDI2
4 Lane
Mux
USB 2.0
C
Pro Link
HDMI Conn.
P.30
P.29
M.2 Conn.
WLAN & BT
WiGig
P.46
Intel GLAN
P.34
M.2 Conn.
Micro SIM
WWAN
P.46
PCIEx1
(WiGig)
PCIEx1(WLAN)
USB 2.0(BT)
SPI
SPI
LPC
Smart Card
Int.KBD
P.61
P.48
Think
Engine
P-sensor
Accelerometer(2)
P.26
P.56
Click Pad
P.62
Accelerometer(1)
B
P.56
P.26
P.58 - 60
P.67 - 68
P.26
DMIC Camera & DMIC
EC
Antenna
eCompass
Touch Panel
P.26
TPMP.65
Card Reader PCIEx1
P.47
I2C
FPR P.49
P.3 - 18
BIOS ROM
16M P.21 I2C
P.46
Micro SD
Card Reader
Slot Conn.
Accelerometer & Gyro
USB2.0
PCIEx1
USB 2.0
C
ALS
USB3.0/SSIC
B
Sub board
I2C
PCI-E
4 Lane
P.57
MDI
P.32
USB2.0
P.28
Mux
4 Lane
USB 3.0 Conn.
Intel Skylake
U-Processor
LID
P.56
P.49
PCIEx3
M.2 Conn.
SSD [M.2 2280]
SATA/PCIEx1
SMBUS
Track Point
P.61
NFC
P.31
P.62
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
4
3
2
BLOCK DIAGRAM
Size Document Number
Custom
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
2
of
102
5
4
3
2
1
D
D
2
VCCCPUIO
1
R5
24.9_0201_1%
SKL-U
U58A CPU@
DDIP2_0N
DDIP2_0P
DDIP2_1N
DDIP2_1P
DDIP2_2N
DDIP2_2P
DDIP2_3N
DDIP2_3P
DDIP2_0N
DDIP2_0P
DDIP2_1N
DDIP2_1P
DDIP2_2N
DDIP2_2P
DDIP2_3N
DDIP2_3P
E55
F55
E58
F58
F53
G53
F56
G56
C50
D50
C52
D52
A50
B50
D51
C51
DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
DDI1_TXN[3]
DDI1_TXP[3]
DDI2_TXN[0]
DDI2_TXP[0]
DDI2_TXN[1]
DDI2_TXP[1]
DDI2_TXN[2]
DDI2_TXP[2]
DDI2_TXN[3]
DDI2_TXP[3]
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
DDI
EDP
DISPLAY SIDEBANDS
N11
N12
Port B is detected.
LOW
N7
N8
Port B is not detected.
EDP_COMP
E52
GPP_E18/DDPB_CTRLCLK
GPP_E19/DDPB_CTRLDATA
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
GPP_E20/DDPC_CTRLCLK
GPP_E21/DDPC_CTRLDATA
GPP_E22/DDPD_CTRLCLK
GPP_E23/DDPD_CTRLDATA
EDP_RCOMP
1 OF 20
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
EDP_AUXN
EDP_AUXP
[26]
[26]
[26]
[26]
C
EDP_AUXN [26]
EDP_AUXP [26]
B52
G50
F50
E48
F48
G46
F46
DDIP1_AUXN
DDIP1_AUXP
DDIP2_AUXN
DDIP2_AUXP
L9
L7
L6
N9
L10
DDIP1_HPD
DDIP2_HPD
DDIP1_AUXN [27]
DDIP1_AUXP [27]
DDIP2_AUXN [28]
DDIP2_AUXP [28]
DDIP1_HPD [27]
DDIP2_HPD [28]
EDP_HPD [26]
R12
R11
U13
VGA_BLON [58]
PANEL_BKLT_CTRL [26]
PANEL_POWER_ON [68]
SKL-U_BGA1356
2
HIGH
L13
L12
DDIP2_CTRLCLK
DDIP2_CTRLDATA
[28] DDIP2_CTRLCLK
[28] DDIP2_CTRLDATA
E45
F45
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
1
R433
100K_0201_5%
2
DDPB_CTRLDATA
DDIP1_CTRLCLK
DDIP1_CTRLDATA
[27] DDIP1_CTRLCLK
[27] DDIP1_CTRLDATA
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
R138
100K_0201_5%
R8
100K_0201_5%
1
TABLE : Funct i ona Str ap
l
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
C47
C46
D46
C45
A45
B45
A47
B47
2
[28]
[28]
[28]
[28]
[28]
[28]
[28]
[28]
C
DDIP1_0N
DDIP1_0P
DDIP1_1N
DDIP1_1P
DDIP1_2N
DDIP1_2P
DDIP1_3N
DDIP1_3P
DDIP1_0N
DDIP1_0P
DDIP1_1N
DDIP1_1P
DDIP1_2N
DDIP1_2P
DDIP1_3N
DDIP1_3P
1
[27]
[27]
[27]
[27]
[27]
[27]
[27]
[27]
DDPC_CTRLDATA
HIGH
Port C is detected.
LOW
B
Port C is not detected.
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
4
3
2
CPU(1/16) : DDI/EDP
Size Document Number
Custom
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
3
of
102
5
4
3
2
1
[22] M_A_DQ[63:0]
D
D
TABLE
Interleave
AL71
AL68
AN68
AN69
AL70
AL69
AN70
AN71
AR70
AR68
AU71
AU68
AR71
AR69
AU70
AU69
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
Non-Interleave
SKL-U
U58B CPU@
C
Block 2
Block 4
B
BB65
AW65
AW63
AY63
BA65
AY65
BA63
BB63
BA61
AW61
BB59
AW59
BB61
AY61
BA59
AY59
DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]
DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]
AY39
AW39
AY37
AW37
BB39
BA39
BA37
BB37
AY35
AW35
AY33
AW33
BB35
BA35
BA33
BB33
DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[34]
DDR0_DQ[35]
DDR0_DQ[36]
DDR0_DQ[37]
DDR0_DQ[38]
DDR0_DQ[39]
DDR0_DQ[40]
DDR0_DQ[41]
DDR0_DQ[42]
DDR0_DQ[43]
DDR0_DQ[44]
DDR0_DQ[45]
DDR0_DQ[46]
DDR0_DQ[47]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AL71
AL68
AN68
AN69
AL70
AL69
AN70
AN71
AR70
AR68
AU71
AU68
AR71
AR69
AU70
AU69
BB65
AW65
AW63
AY63
BA65
AY65
BA63
BB63
BA61
AW61
BB59
AW59
BB61
AY61
BA59
AY59
AY39
AW39
AY37
AW37
BB39
BA39
BA37
BB37
AY35
AW35
AY33
AW33
BB35
BA35
BA33
BB33
AY31
AW31
AY29
AW29
BB31
BA31
BA29
BB29
AY27
AW27
AY25
AW25
BB27
BA27
BA25
BB25
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR0_DQ[16]/DDR0_DQ[32]
DDR0_DQ[17]/DDR0_DQ[33]
DDR0_DQ[18]/DDR0_DQ[34]
DDR0_DQ[19]/DDR0_DQ[35]
DDR0_DQ[20]/DDR0_DQ[36]
DDR0_DQ[21]/DDR0_DQ[37]
DDR0_DQ[22]/DDR0_DQ[38]
DDR0_DQ[23]/DDR0_DQ[39]
DDR0_DQ[24]/DDR0_DQ[40]
DDR0_DQ[25]/DDR0_DQ[41]
DDR0_DQ[26]/DDR0_DQ[42]
DDR0_DQ[27]/DDR0_DQ[43]
DDR0_DQ[28]/DDR0_DQ[44]
DDR0_DQ[29]/DDR0_DQ[45]
DDR0_DQ[30]/DDR0_DQ[46]
DDR0_DQ[31]/DDR0_DQ[47]
DDR0_DQ[32]/DDR1_DQ[0]
DDR0_DQ[33]/DDR1_DQ[1]
DDR0_DQ[34]/DDR1_DQ[2]
DDR0_DQ[35]/DDR1_DQ[3]
DDR0_DQ[36]/DDR1_DQ[4]
DDR0_DQ[37]/DDR1_DQ[5]
DDR0_DQ[38]/DDR1_DQ[6]
DDR0_DQ[39]/DDR1_DQ[7]
DDR0_DQ[40]/DDR1_DQ[8]
DDR0_DQ[41]/DDR1_DQ[9]
DDR0_DQ[42]/DDR1_DQ[10]
DDR0_DQ[43]/DDR1_DQ[11]
DDR0_DQ[44]/DDR1_DQ[12]
DDR0_DQ[45]/DDR1_DQ[13]
DDR0_DQ[46]/DDR1_DQ[14]
DDR0_DQ[47]/DDR1_DQ[15]
DDR0_DQ[48]/DDR1_DQ[32]
DDR0_DQ[49]/DDR1_DQ[33]
DDR0_DQ[50]/DDR1_DQ[34]
DDR0_DQ[51]/DDR1_DQ[35]
DDR0_DQ[52]/DDR1_DQ[36]
DDR0_DQ[53]/DDR1_DQ[37]
DDR0_DQ[54]/DDR1_DQ[38]
DDR0_DQ[55]/DDR1_DQ[39]
DDR0_DQ[56]/DDR1_DQ[40]
DDR0_DQ[57]/DDR1_DQ[41]
DDR0_DQ[58]/DDR1_DQ[42]
DDR0_DQ[59]/DDR1_DQ[43]
DDR0_DQ[60]/DDR1_DQ[44]
DDR0_DQ[61]/DDR1_DQ[45]
DDR0_DQ[62]/DDR1_DQ[46]
DDR0_DQ[63]/DDR1_DQ[47]
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR CH - A
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
-M_A_DDRCLK0_933M
M_A_DDRCLK0_933M
-M_A_DDRCLK1_933M
M_A_DDRCLK1_933M
BA56
BB56
AW56
AY56
M_A_CKE0
M_A_CKE1
AU45
AU43
AT45
AT43
-M_A_DDRCLK0_933M [22]
M_A_DDRCLK0_933M [22]
-M_A_DDRCLK1_933M [22]
M_A_DDRCLK1_933M [22]
-M_A_CS0
-M_A_CS1
M_A_ODT0
M_A_ODT1
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
-M_A_CS0 [22]
-M_A_CS1 [22]
M_A_ODT0 [22]
M_A_ODT1 [22]
M_A_A5
M_A_A9
M_A_A6
M_A_A8
M_A_A7
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
M_A_CKE0 [22]
M_A_CKE1 [22]
M_A_A13
M_A_A15
M_A_A14
M_A_A16
TABLE
DDR0_MA[5]
DDR0_MA[9]
DDR0_MA[6]
DDR0_MA[8]
DDR0_MA[7]
DDR0_BG[0]
DDR0_MA[12]
DDR0_MA[11]
DDR0_ACT#
DDR0_BG[1]
DDR0_MA[13]
DDR0_CAS#
DDR0_WE#
DDR0_RAS#
DDR0_BA[0]
DDR0_MA[2]
DDR0_BA[1]
DDR0_MA[10]
DDR0_MA[1]
DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]
DDR0_CAB[0]
DDR0_CAB[1]
DDR0_CAB[2]
DDR0_CAB[3]
DDR0_CAB[4]
DDR0_CAB[5]
DDR0_CAB[6]
DDR0_CAB[7]
DDR0_CAB[8]
DDR0_CAB[9]
Not Used
Not Used
DDR0_MA[13]
DDR0_MA[15]
DDR0_MA[14]
DDR0_MA[16]
DDR0_BA[0]
DDR0_MA[2]
DDR0_BA[1]
DDR0_MA[10]
DDR0_MA[1]
DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]
LPDDR3
M_A_BS0
M_A_BS0 [22]
M_A_A2
M_A_BS1
M_A_BS1 [22]
M_A_A10
M_A_A1
M_A_A0
M_A_A3
M_A_A4
DDR4
C
M_A_A[16:0] [22]
-M_A_DQS0
M_A_DQS0
-M_A_DQS1
M_A_DQS1
-M_A_DQS2
M_A_DQS2
-M_A_DQS3
M_A_DQS3
-M_A_DQS4
M_A_DQS4
-M_A_DQS5
M_A_DQS5
-M_A_DQS6
M_A_DQS6
-M_A_DQS7
M_A_DQS7
-M_A_DQS[7:0] [22]
M_A_DQS[7:0] [22]
AW50
AT52
-M_A_ALERT [22]
M_A_PARITY [22]
AY67
AY68
BA67
M_A_VREF_CA_CPU [22]
DDR_PG_CTRL
VCC3M
2 OF 20
LOGIC
B
R1838
100K_0201_5%
TABLE
Pin
Interleave
Non-Interleave
AM70
AM69
AT69
AT70
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
Block 2
BA64
AY64
AY60
BA60
DDR0_DQSN[2]
DDR0_DQSP[2]
DDR0_DQSN[3]
DDR0_DQSP[3]
DDR0_DQSN[4]
DDR0_DQSP[4]
DDR0_DQSN[5]
DDR0_DQSP[5]
Block 4
BA38
AY38
AY34
BA34
DDR0_DQSN[4]
DDR0_DQSP[4]
DDR0_DQSN[5]
DDR0_DQSP[5]
DDR1_DQSN[0]
DDR1_DQSP[0]
DDR1_DQSN[1]
DDR1_DQSP[1]
Block 6
BA30
AY30
AY26
BA26
DDR0_DQSN[6]
DDR0_DQSP[6]
DDR0_DQSN[7]
DDR0_DQSP[7]
DDR1_DQSN[4]
DDR1_DQSP[4]
DDR1_DQSN[5]
DDR1_DQSP[5]
1
DDR_VTT_PG_CTRL [83,84]
Q170
DTC015TMT2L_VMT3
3
2
2
DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]
DDR_VTT_PG_CTRL
@
R1858
10K_0201_5%
1
Block 6
DDR0_CAA[0]
DDR0_CAA[1]
DDR0_CAA[2]
DDR0_CAA[3]
DDR0_CAA[4]
DDR0_CAA[5]
DDR0_CAA[6]
DDR0_CAA[7]
DDR0_CAA[8]
DDR0_CAA[9]
SKL-U_BGA1356
Block 0
DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]
DDR0_MA[5]
DDR0_MA[9]
DDR0_MA[6]
DDR0_MA[8]
DDR0_MA[7]
DDR0_BA[2]
DDR0_MA[12]
DDR0_MA[11]
DDR0_MA[15]
DDR0_MA[14]
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
-M_A_ACT [22]
M_A_BG1 [22]
VCC1R2A
AY31
AW31
AY29
AW29
BB31
BA31
BA29
BB29
AY27
AW27
AY25
AW25
BB27
BA27
BA25
BB25
DDR3L
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
M_A_BG0 [22]
M_A_A12
M_A_A11
-M_A_ACT
M_A_BG1
AM70
AM69
AT69
AT70
BA64
AY64
AY60
BA60
BA38
AY38
AY34
BA34
BA30
AY30
AY26
BA26
AW67
Pin
M_A_BG0
2
Block 0
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
1
Pin
A
A
LOGIC
LOGIC
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
CPU(2/16) : DDR CHANNEL-A
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
4
of
102
5
4
3
2
1
D
D
TABLE
Pin
Interleave
AF65
AF64
AK65
AK64
AF66
AF67
AK67
AK66
AF70
AF68
AH71
AH68
AF71
AF69
AH70
AH69
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR1_DQ[15]
Non-Interleave
SKL-U
C
Block 3
Block 5
B
AT66
AU66
AP65
AN65
AN66
AP66
AT65
AU65
AT61
AU61
AP60
AN60
AN61
AP61
AT60
AU60
AU40
AT40
AT37
AU37
AR40
AP40
AP37
AR37
AT33
AU33
AU30
AT30
AR33
AP33
AR30
AP30
DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]
DDR1_DQ[32]
DDR1_DQ[33]
DDR1_DQ[34]
DDR1_DQ[35]
DDR1_DQ[36]
DDR1_DQ[37]
DDR1_DQ[38]
DDR1_DQ[39]
DDR1_DQ[40]
DDR1_DQ[41]
DDR1_DQ[42]
DDR1_DQ[43]
DDR1_DQ[44]
DDR1_DQ[45]
DDR1_DQ[46]
DDR1_DQ[47]
DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[50]
DDR0_DQ[51]
DDR0_DQ[52]
DDR0_DQ[53]
DDR0_DQ[54]
DDR0_DQ[55]
DDR0_DQ[56]
DDR0_DQ[57]
DDR0_DQ[58]
DDR0_DQ[59]
DDR0_DQ[60]
DDR0_DQ[61]
DDR0_DQ[62]
DDR0_DQ[63]
DDR1_DQ[16]
DDR1_DQ[17]
DDR1_DQ[18]
DDR1_DQ[19]
DDR1_DQ[20]
DDR1_DQ[21]
DDR1_DQ[22]
DDR1_DQ[23]
DDR1_DQ[24]
DDR1_DQ[25]
DDR1_DQ[26]
DDR1_DQ[27]
DDR1_DQ[28]
DDR1_DQ[29]
DDR1_DQ[30]
DDR1_DQ[31]
DDR1_DQ[0]/DDR0_DQ[16]
DDR1_DQ[1]/DDR0_DQ[17]
DDR1_DQ[2]/DDR0_DQ[18]
DDR1_DQ[3]/DDR0_DQ[19]
DDR1_DQ[4]/DDR0_DQ[20]
DDR1_DQ[5]/DDR0_DQ[21]
DDR1_DQ[6]/DDR0_DQ[22]
DDR1_DQ[7]/DDR0_DQ[23]
DDR1_DQ[8]/DDR0_DQ[24]
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_DQ[13]/DDR0_DQ[29]
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_DQ[15]/DDR0_DQ[31]
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_DQ[18]/DDR0_DQ[50]
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63]
DDR1_DQ[32]/DDR1_DQ[16]
DDR1_DQ[33]/DDR1_DQ[17]
DDR1_DQ[34]/DDR1_DQ[18]
DDR1_DQ[35]/DDR1_DQ[19]
DDR1_DQ[36]/DDR1_DQ[20]
DDR1_DQ[37]/DDR1_DQ[21]
DDR1_DQ[38]/DDR1_DQ[22]
DDR1_DQ[39]/DDR1_DQ[23]
DDR1_DQ[40]/DDR1_DQ[24]
DDR1_DQ[41]/DDR1_DQ[25]
DDR1_DQ[42]/DDR1_DQ[26]
DDR1_DQ[43]/DDR1_DQ[27]
DDR1_DQ[44]/DDR1_DQ[28]
DDR1_DQ[45]/DDR1_DQ[29]
DDR1_DQ[46]/DDR1_DQ[30]
DDR1_DQ[47]/DDR1_DQ[31]
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR CH - B
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
Block 7
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
TABLE
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
Pin
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
VCC1R2A
DDR1_MA[5]
DDR1_MA[9]
DDR1_MA[6]
DDR1_MA[8]
DDR1_MA[7]
DDR1_BA[2]
DDR1_MA[12]
DDR1_MA[11]
DDR1_MA[15]
DDR1_MA[14]
DDR1_CAA[0]
DDR1_CAA[1]
DDR1_CAA[2]
DDR1_CAA[3]
DDR1_CAA[4]
DDR1_CAA[5]
DDR1_CAA[6]
DDR1_CAA[7]
DDR1_CAA[8]
DDR1_CAA[9]
DDR1_MA[5]
DDR1_MA[9]
DDR1_MA[6]
DDR1_MA[8]
DDR1_MA[7]
DDR1_BG[0]
DDR1_MA[12]
DDR1_MA[11]
DDR1_ACT#
DDR1_BG[1]
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
DDR3L
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
DDR4
DDR1_MA[13]
DDR1_CAS#
DDR1_WE#
DDR1_RAS#
DDR1_BA[0]
DDR1_MA[2]
DDR1_BA[1]
DDR1_MA[10]
DDR1_MA[1]
DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]
DDR1_CAB[0]
DDR1_CAB[1]
DDR1_CAB[2]
DDR1_CAB[3]
DDR1_CAB[4]
DDR1_CAB[5]
DDR1_CAB[6]
DDR1_CAB[7]
DDR1_CAB[8]
DDR1_CAB[9]
Not Used
Not Used
DDR1_MA[13]
DDR1_MA[15]
DDR1_MA[14]
DDR1_MA[16]
DDR1_BA[0]
DDR1_MA[2]
DDR1_BA[1]
DDR1_MA[10]
DDR1_MA[1]
DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]
LPDDR3
C
R1726
470_0201_5%
R7
R84
R576
1
1
1
-DRAMRST
-DRAMRST [22]
2 121_0201_1%
2 80.6_0201_1%
2 100_0201_1%
LOGIC
3 OF 20
SKL-U_BGA1356
B
TABLE
Pin
Non-Interleave
AH66
AH65
AG69
AG70
DDR1_DQSN[0]
DDR1_DQSP[0]
DDR1_DQSN[1]
DDR1_DQSP[1]
DDR0_DQSN[2]
DDR0_DQSP[2]
DDR0_DQSN[3]
DDR0_DQSP[3]
Block 3
AR66
AR65
AR61
AR60
DDR1_DQSN[2]
DDR1_DQSP[2]
DDR1_DQSN[3]
DDR1_DQSP[3]
DDR0_DQSN[6]
DDR0_DQSP[6]
DDR0_DQSN[7]
DDR0_DQSP[7]
Block 5
AT38
AR38
AT32
AR32
DDR1_DQSN[4]
DDR1_DQSP[4]
DDR1_DQSN[5]
DDR1_DQSP[5]
DDR1_DQSN[2]
DDR1_DQSP[2]
DDR1_DQSN[3]
DDR1_DQSP[3]
Block 7
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]
Interleave
Block 1
AU27
AT27
AT25
AU25
AP27
AN27
AN25
AP25
AT22
AU22
AU21
AT21
AN22
AP22
AP21
AN21
AN45
AN46
AP45
AP46
2
Block 1
AF65
AF64
AK65
AK64
AF66
AF67
AK67
AK66
AF70
AF68
AH71
AH68
AF71
AF69
AH70
AH69
AT66
AU66
AP65
AN65
AN66
AP66
AT65
AU65
AT61
AU61
AP60
AN60
AN61
AP61
AT60
AU60
AU40
AT40
AT37
AU37
AR40
AP40
AP37
AR37
AT33
AU33
AU30
AT30
AR33
AP33
AR30
AP30
AU27
AT27
AT25
AU25
AP27
AN27
AN25
AP25
AT22
AU22
AU21
AT21
AN22
AP22
AP21
AN21
CPU@
1
U58C
DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[18]
DDR0_DQ[19]
DDR0_DQ[20]
DDR0_DQ[21]
DDR0_DQ[22]
DDR0_DQ[23]
DDR0_DQ[24]
DDR0_DQ[25]
DDR0_DQ[26]
DDR0_DQ[27]
DDR0_DQ[28]
DDR0_DQ[29]
DDR0_DQ[30]
DDR0_DQ[31]
AR25
AR27
AR22
AR21
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
A
A
LOGIC
LOGIC
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
CPU(3/16) : DDR CHANNEL-B
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
5
of
102
5
4
3
2
1
D
D
VCCSTG
VCCST
VCC1R0_SUS
2
C
2 510_0402_5%
C55
D55
B54
C56
A6
A7
BA5
AY5
R2126
R2127
R2128
R2129
1
1
1
1
2
2
2
2
49.9_0201_1%
49.9_0201_1%
49.9_0201_1%
49.9_0201_1%
AT16
AU16
H66
H65
51_0201_5%
1
2
R515
51_0201_5%
1
2
R530
1
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
SVT_C_EC002
JTAG
@
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
CPU MISC
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
@
XDP_TCK0
XDP_TDI
XDP_TDO
XDP_TMS
-XDP_TRST
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
XDP_TCK0 [19]
XDP_TDI [19]
XDP_TDO [19]
XDP_TMS [19]
-XDP_TRST [19]
PCH_TCK [19]
PCH_TDI [19]
PCH_TDO [19]
PCH_TMS [19]
-PCH_TRST [19]
JTAGX [19]
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
4 OF 20
2
R85
SKL-U
U58D CPU@
D63
A54
C65
C63
A65
R2
51_0201_5%
1
SKL-U_BGA1356
R471
51_0201_5%
1
PECI
-PROCHOT
2
[59] PECI
[59,71,75] -PROCHOT
1
R9055
1K_0201_5%
1
R64
1K_0201_5%
B
51_0201_5%
1
2
R541
2
C
@
SVT_C_EC002
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU(4/16) : MISC/JTAG
Thursday, August 13, 2015
1
Sheet
6
of
102
5
4
3
2
1
D
D
TABLE : Funct i ona Str ap
l
SPI0_MOSI (Boot Halt)
HIGH
TABLE : Funct i ona Str ap
l
Disabled (Default)
LOW
Enabled
GPP_C5/SML0ALERT # (LPC or eSPI)
HIGH
eSPI is selected
LOW
LPC is selected (Default)
LOGIC
TABLE : Funct i ona Str ap
l
SPI0_MISO (JTAG ODT Diable)
Disabled
GPP_C2/SMBALERT# (TLS Conf i dent ia i ty
l )
HIGH
VCC3_SUS
VCC3B
Enable ME Crypto TLS with Conf i dent ia i t
l y
LOW
Disable ME Crypto TLS (Default)
LOGIC
VCC3_SUS
2
1K_0201_5%
U58E
CPU@
AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1
SPI_CLK
SPI_MISO_IO1
SPI_MOSI_IO0
SPI_IO2
SPI_IO3
-SPI_CS0
[65] -SPI_CS2
[62] -NFC_DTCT
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
CL_CLK_WLAN
CL_DATA_WLAN
-CL_RST_WLAN
G3
G2
G1
AW13
[58] -KBRC
B
AY11
[58,66] IRQSER
2
2
1
1
SML0_CLK
SML0_DATA
W3
V3
AM7
EC_SCL2
EC_SDA2
SMB_CLK [66]
SMB_DATA [66]
SML0_CLK [34]
SML0_DATA [34]
EC_SCL2 [59]
EC_SDA2 [59]
LPC_AD[3:0] [58,66]
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A14/SUS_STAT#/ESPI_RESET#
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
5 OF 20
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
-LPC_FRAME [58,66]
-SUS_STAT [58,66]
LPCCLK_0
LPCCLK_1
R193
@ R220
1
1
2
2
22_0402_5%
0_0402_5%
LPCCLK_EC_24M [58]
LPCCLK_DEBUG_24M [66]
B
-CLKRUN [58,66]
SVT_EC004
2
2
2
@
R9305
1K_0201_5%
1
@RF@
C8520
33P_0201_25V8J
1
@
R9308
1K_0201_5%
1
1
@RF@
C264
33P_0201_25V8J
2
2
SMB_CLK
SMB_DATA
R9
W2
W1
SKL-U_BGA1356
2
R397
4.7K_0201_5%
R7
R8
R10
LPC
C LINK
[46] CL_CLK_WLAN
[46] CL_DATA_WLAN
[46] -CL_RST_WLAN
R394
4.7K_0201_5%
SMBUS, SMLINK
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
SPI - TOUCH
M2
M3
J4
V1
V2
M1
R107
499_0201_1%
SKL-U
SPI - FLASH
[21,65]
[21,65]
[21,65]
[21]
[21]
[21]
R106
499_0201_1%
1
1
1
R226
1K_0201_5%
1
2
@
R272
10K_0201_5%
2
2
2
8.2K_0201_5%
@
1
R860
1
R9311
@
VCC3B
C
1
R9310
2
1K_0201_5%
VCC3_SUS
C
8.2K_0201_5%
LOW
TABLE : Funct i ona Str ap
l
Enabled (Default)
1
R28
HIGH
TABLE : Funct i ona Str ap
l
SPI0_IO2 (Consent Strap)
HIGH
Enabled (Default)
LOW
Disabled
TABLE : Funct i ona Str ap
l
SPI0_IO3 (A0 Personality Strap)
HIGH
Disabled (Default)
LOW
A
Enabled
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU(5/16) : LPC/SPI/SMBUS/C-LINK
Thursday, August 13, 2015
1
Sheet
7
of
102
5
4
3
2
1
TABLE : Funct i ona Str ap
l
VCC3_SUS
GPP_B22/GSPI1_MOSI (Boot BIOS Dest i nat i o
n
)
D
LOGIC
GPP_B18/GSPI0_MOSI (No Reboot)
VCC3B
U8
U9
AH9
AH10
[46] -WWAN_RESET
-MIC_HW_EN
[26] -INT_MIC_DTCT
AH11
AH12
[46] WWAN_CFG0
[46] WWAN_CFG1
AF11
AF12
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
N1
N2
1K_0201_5%
2
1
R9263
1K_0201_5%
2
ISH_I2C0_SDA [26,56]
ISH_I2C0_SCL [26,56]
ISH_I2C1_SDA
ISH_I2C1_SCL
R9264
R9265
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL
1
1
2
2
0_0201_5%
0_0201_5%
I2C_DATA_GSENSE_SH [60]
I2C_CLK_GSENSE_SH [60]
AD11
AD12
C
WWAN_CFG2 [46]
WWAN_CFG3 [46]
VCC3B
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
M4
N3
VCC3B
VCC3B
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
ISH_GP0
ISH_GP1
ISH_GP2
ISH_GP3
ISH_GP4
ISH_GP5
ISH_GP6
R9258
1
2
4.7K_0201_5%
U7
U6
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
R9256
1
2
4.7K_0201_5%
AD1
AD2
AD3
AD4
[58] -EC_SCI
[58] -EC_WAKE
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
P2
P3
P4
P1
R9260
1
2
4.7K_0201_5%
AB1
AB2
W4
AB3
C
GPP_D9
GPP_D10
GPP_D11
GPP_D12
R9259
1
2
4.7K_0201_5%
AM5
AN7
AP5
AN5
ISH
GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
R156
1
2
4.7K_0201_5%
AN8
AP7
AP8
AR7
1
R9262
SKL-U
LPSS
R155
1
2
4.7K_0201_5%
CPU@
1K_0201_5%
2
1K_0201_5%
2
Disable " No Reboot " Mode (Default)
1
R9257
U58F
[62] NFC_ON
[62] NFC_INT
VCC3B
Enable " No Reboot " Mode
1
R9261
HIGH
LOW
R154
1
2
4.7K_0201_5%
@
1K_0201_5%
2
Boot BIOS from SPI (Default)
D
Boot BIOS from LPC
TABLE : Funct i ona Str ap
l
1
R65
1
R2340
1
R884
10K_0201_5%
2
10K_0201_5%
2
HIGH
LOW
ISH_GP0 [26]
ISH_GP1 [26]
ISH_GP2 [26,56]
2
D801
-LID_CLOSE
1
RB521CM-30T2R_SOD923-2
-LID_CLOSE [26,56,59]
2
D802
-TABLET_MODE
1
RB521CM-30T2R_SOD923-2
-TABLET_MODE [56,60]
6 OF 20
2
SKL-U_BGA1356
1
R961
0_0201_5%
VCC3B
B
B
JISH1 ME@
ISH_I2C0_SCL
ISH_I2C0_SDA
ISH_I2C1_SCL
ISH_I2C1_SDA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ISH_GP0
ISH_GP1
ISH_GP2
ISH_GP3
ISH_GP4
ISH_GP5
ISH_GP6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
GND
GND
ACES_50506-01841-P01
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU(6/16) : LPSS/ISH
Thursday, August 13, 2015
1
Sheet
8
of
102
5
4
3
2
1
D
D
VCC3_SUS
PLACE ON TOP SIDE
1K_0201_5%
1
2
0_0603_5%
1
2
R566
@
R846
VCC3_SUS
TABLE : Funct i ona Str ap
l
HDA_SDO/I2S0_TXD
Flash Descriptor Security Override
VCC3_SUS
TP901
@
2
C
TEST PAD
BOTTOM SIDE
DO NOT MOVE AFTER FIX
Disable Flash Descriptor Security (Override)
Enable Flash Descriptor Security (Default)
U58G
CPU@
C
SKL-U
1
R1009
1K_0201_5%
HIGH
LOW
TP900
@
AUDIO
R423
R9323
R74
[50] -HDA_RST
1
1
1
2
RF@ 2
2
33_0201_5%
0_0201_5%
33_0201_5%
R456
[50] HDA_SYNC
[50] HDA_BCLK
[50] HDA_SDO
[50] HDA_SDIN0
1
2
33_0201_5%
R60
2
1
1
2
33_0201_5%
BA22
AY22
BB22
BA21
AY21
AW22
J5
AY20
AW20
AK7
AK6
AK9
AK10
C38
47P_0201_25V8J
H5
D7
[29] DDI_PRIORITY1
[28] DDI_PRIORITY2
[55] PCH_SPKR
DDI_PRIORITY1
DDI_PRIORITY2
D8
C8
PCH_SPKR
AW5
HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
GPP_D23/I2S_MCLK
I2S1_SFRM
I2S1_TXD
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_F1/I2S2_SFRM
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
GPP_D19/DMIC_CLK0
GPP_D20/DMIC_DATA0
SD_RCOMP
GPP_D17/DMIC_CLK1
GPP_D18/DMIC_DATA1
GPP_F23
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
200_0201_1%
1
2
AB7
R2131
AF13
-SC_DTCT [49]
GPP_B14/SPKR
7 OF 20
SKL-U_BGA1356
B
B
TABLE : Funct i ona Str ap
l
GPP_B14/SPKR (Top Swap Override)
HIGH
Enable " Top Swap " Mode
LOW
Disable " Top Swap " Mode (Default)
LOGIC
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU : AUDIO/SDXC
Thursday, August 13, 2015
1
Sheet
9
of
102
5
4
3
Flexible I/O Conf i gur at i o
n
Net Name
0
1
2
3
4 (x4)
5_L0
D
Media Card Controller
(USB3 6)
M.2 WLAN Slot Port 0 for WLAN
GbE PHY
PCIe SSD
M.2 WLAN Slot Port 1 for WiGig
VCC3_SUS
1
R648
2
(PCIE 7)
SATA SSD
(PCIE 11)
(PCIE 12)
R2341
10K_0201_5%
SKL-U
SSIC / USB3
PCIE/USB3/SATA
[47]
[47]
[47]
[47]
C
H13
G13
B17
A17
PCIE0_RXN
PCIE0_RXP
PCIE0_TXN
PCIE0_TXP
G11
F11
D16
C16
[46]
[46]
[46]
[46]
H16
G16
D17
C17
[34]
[34]
[34]
[34]
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
G15
F15
B19
A19
[31]
[31]
[31]
[31]
PCIE4_L3_RXN
PCIE4_L3_RXP
PCIE4_L3_TXN
PCIE4_L3_TXP
F16
E16
C19
D19
[31]
[31]
[31]
[31]
PCIE4_L2_RXN
PCIE4_L2_RXP
PCIE4_L2_TXN
PCIE4_L2_TXP
G18
F18
D20
C20
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
PCIE2_RXN
PCIE2_RXP
PCIE2_TXN
PCIE2_TXP
PCIE4_L1_RXN
PCIE4_L1_RXP
PCIE4_L1_TXN
PCIE4_L1_TXP
F20
E20
B21
A21
[46]
[46]
[46]
[46]
B
G21
F21
D21
C21
PCIE4_L0_SATA1_RXN
PCIE4_L0_SATA1_RXP
PCIE4_L0_SATA1_TXN
PCIE4_L0_SATA1_TXP
E22
E23
B23
A23
PCIE5_L0_RXN
PCIE5_L0_RXP
PCIE5_L0_TXN
PCIE5_L0_TXP
100_0201_1%
1
R8964
[19] -XDP_PRDY
[19] -XDP_PREQ
[65] -TPM_IRQ
-XDP_PRDY
-XDP_PREQ
-TPM_IRQ
2
F25
E25
D23
C23
F5
E5
D56
D61
BB11
E28
E27
D24
C24
E30
F30
A25
B25
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
PCIE1_TXN/USB3_5_TXN
PCIE1_TXP/USB3_5_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
PCIE2_RXN/USB3_6_RXN
PCIE2_RXP/USB3_6_RXP
PCIE2_TXN/USB3_6_TXN
PCIE2_TXP/USB3_6_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
PCIE4_RXN
PCIE4_RXP
PCIE4_TXN
PCIE4_TXP
USB2N_1
USB2P_1
PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP
USB2N_2
USB2P_2
USB2N_3
USB2P_3
PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP
USB2N_4
USB2P_4
PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
PCIE7_TXN/SATA0_TXN
PCIE7_TXP/SATA0_TXP
USB2
USB2N_5
USB2P_5
USB2N_6
USB2P_6
PCIE8_RXN/SATA1A_RXN
PCIE8_RXP/SATA1A_RXP
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP
USB2N_7
USB2P_7
USB2N_8
USB2P_8
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP
USB2N_9
USB2P_9
PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
PCIE_RCOMPN
PCIE_RCOMPP
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
H8
G8
C13
D13
USB3P0_RXN
USB3P0_RXP
USB3P0_TXN
USB3P0_TXP
J6
H6
B13
A13
SSIC_RXN
SSIC_RXP
SSIC_TXN
SSIC_TXP
J10
H10
B15
A15
USB3P2_RXN
USB3P2_RXP
USB3P2_TXN
USB3P2_TXP
[32]
[32]
[32]
[32]
E10
F10
C15
D15
USB3P3_RXN
USB3P3_RXP
USB3P3_TXN
USB3P3_TXP
[57]
[57]
[57]
[57]
AB9
AB10
[32]
[32]
[32]
[32]
C
[46]
[46]
[46]
[46]
USB Port Assignment
0
1
2
3
4
5
6
7
8
9
USBP0- [32]
USBP0+ [32]
AD6
AD7
USBP1- [46]
USBP1+ [46]
AH3
AJ3
USBP2- [32]
USBP2+ [32]
AD9
AD10
USBP3- [57]
USBP3+ [57]
AJ1
AJ2
USB 3.0 Port Assignment
USBP4- [49]
USBP4+ [49]
0
1
2
3
4
5
AF6
AF7
AH1
AH2
USBP6- [46]
USBP6+ [46]
AF8
AF9
USB 3.0 System Port (AOU)
M.2 WWAN Slot (SSIC)
USB 3.0 System Port
ProLink Dock
(PCIE 1)
(RESERVED)
USBP7- [26]
USBP7+ [26]
B
AG1
AG2
USBP8- [49]
USBP8+ [49]
AH7
AH8
AB6
AG3
AG4
USB 3.0 System Port (AOU)
M.2 WWAN Slot
USB 3.0 System Port
ProLink Dock
SMART CARD
(RESERVED)
M.2 WLAN Slot for BT
USB Camera
Fingerprint Reader
Touch Panel
113_0201_1%
1
2
R564
USBCOMP
VCC3_SUS
USBP9- [26]
USBP9+ [26]
2
CPU@
@
A9
C9
D9
B9
R44
10K_0201_5%
-USB_PORT0_OC0 [32]
-USB_PORT1_OC1 [32]
1
1
U58H
1
R248
@
0
1A
1B
2
2
10K_0201_5%
SATA Port Assignment
VCC3_SUS
2
10K_0201_5%
USB3P0
SSIC
USB3P2
USB3P3
PCIE0
USB3P5
PCIE2
PCIE3
PCIE4_L3
PCIE4_L2
PCIE4_L1
PCIE4_L0_SATA1
PCIE5_L0
NA
NA
NA
1
R2308
USB3 1
SSIC
USB3 3
USB3 4
PCIE 1
USB3 6
PCIE 3
PCIE 4
PCIE 5 (x4)
PCIE 6 (x4)
PCIE 7 (x4)
GPIO STRAP
PCIE 9 (x4)
PCIE 10 (x4)
PCIE 11 (x4)
PCIE 12 (x4)
2
10K_0201_5%
Conf i gur a t i o
n
USB3 1
USB3 2/SSIC
USB3 3
USB3 4
USB3 5/PCIE 1
USB3 6/PCIE 2
PCIE 3 (GbE)
PCIE 4 (GbE)
PCIE 5 (GbE)
PCIE 6
PCIE 7/SATA 0
PCIE 8/SATA 1A
PCIE 9 (GbE)
PCIE 10 (GbE)
PCIE 11/SATA 1B
PCIE 12/SATA 2
1
R2307
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
PCIe Port Assignment
High Speed Signals
I/O
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
Port
2
10K_0201_5%
D
2
J1
J2
J3
SATA1_DEVSLP [31]
H2
H3
G4
-PE_DTCT
-PE_DTCT [31]
H1
8 OF 20
2
2
SKL-U_BGA1356
@
R77
0_0201_5%
SVT_C_EC003
1
1
R72
1K_0201_5%
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU : PCIE/USB/SATA
Thursday, August 13, 2015
1
Sheet
10
of
102
5
4
3
2
1
D
D
U58I
CPU@
SKL_ULT
CSI-2
A36
B36
C38
D38
C36
D36
A38
B38
C
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_COMP
GPP_D4/FLASHTRIG
C37
D37
C32
D32
C29
D29
B26
A26
C
E13
B7
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
9 OF 20
EMMC_RCOMP
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
PLANARID1
PLANARID2
PLANARID3
AM2
AM3
AP4
PLANARID0
AT1
SKL-U_BGA1356
TABLE
B
LEVEL
B
PLANAR ID
3
2
1
0
R43
R113 R48
NA
NA
NA
NA
0
PLANARID0
PLANARID1
PLANARID2
PLANARID3
R47
1
ASM
ASM
ASM
ASM
TABLE
2
@
R47
0_0201_5%
2
2
R43
0_0201_5%
R113
0_0201_5%
@
R48
0_0201_5%
PLANARID[3..0]
PDV
2
LEVEL
0001B
1
1
0011B
0100B
SVT
1
0010B
SIT-R
1
FVT
SIT
SVT_EC002
0101B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
CPU : CSI-2/EMMC
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
11
of
102
5
4
3
2
1
D
D
C
C
U58J
CPU@
SKL_ULT
CLOCK SIGNALS
[34] -PCIE3_CLK_100M
[34] PCIE3_CLK_100M
[34] -CLKREQ_PCIE3
D40
C40
AT10
[31] -PCIE4_CLK_100M
[31] PCIE4_CLK_100M
[31] -CLKREQ_PCIE4
B40
A40
AU8
[46] -PCIE5_CLK_100M
[46] PCIE5_CLK_100M
[46] -CLKREQ_PCIE5
E40
E38
AU7
2
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
GPP_B6/SRCCLKREQ1#
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
GPP_B7/SRCCLKREQ2#
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
GPP_B8/SRCCLKREQ3#
XCLK_BIASREF
RTCX1
RTCX2
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
GPP_B9/SRCCLKREQ4#
SRTCRST#
RTCRST#
F43
E43
R308
1M_0201_5%
BA17
SUSCLK_32K [46,58]
E37
E35
E42
SVT_C_EC003
-SRTCRST [20]
-RTCRST [17,20]
R351
10M_0402_5%
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#
C205
9P_0402_50V8D
Y6
32.768KHZ_9PF_9H03280012
8P_0201_50V8D
1
2
C326
10 OF 20
SKL-U_BGA1356
1
1
NC
OSC
OSC
NC
3
2
2
24MHZ_8PF_1ZZCAA24000CC0B
1
C206
9P_0402_50V8D
10P_0201_25V8D
1
2
C348
RTCX1
RTCX2
AN18
AM16
2
0_0201_5%
1
2
@ R133
2.74K_0201_1%
1
2
R609
AM18
AM20
Y5
4
1
D41
C41
AT8
2
[46] -PCIE2_CLK_100M
[46] PCIE2_CLK_100M
[46] -CLKREQ_PCIE2
VCC1R0_SUS
1
B42
A42
AT7
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#
2
D42
C42
AR10
1
[47] -PCIE0_CLK_100M
[47] PCIE0_CLK_100M
[47] -CLKREQ_PCIE0
KDS
TXC
Epson
1ZZCAA24000CC0B
8Y24080002
Q22FA1280027100
SVT_EC003
TXC
KDS
EPSON
B
9H03280012
1TJF090DJ1A000B
FC-135R (X1A0001410002)
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
CPU : CLOCK SIGNALS
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
12
of
102
5
4
3
2
1
VCC3M
33_0201_5%
1
2
R991
[47] -PLTRST_NEAR
U73
5
D
[31,34,46,58,65,66,67] -PLTRST_FAR
VCC
NC
IN_A
33_0201_5%
1
2
R993
4
OUT_Y
GND
1
2
-PLTRST
D
3
TC7SG17FE_SON5
2
1
CPUCORE_PWRGD
1
C46
100P_0201_25V8J
2
@ESD@
1
C8523
100P_0201_50V8J
VCC3M
1
RTCVCC
@ESD@
1
C8525
100P_0201_50V8J
VCC3M
R646
1M_0201_5%
U58K
@
SKL-U
CPU@
SYSTEM POWER MANAGEMENT
AN10
B5
AY17
[17,19] -XDP_DBR
[19,59] -RSMRST
A68
B65
VCCST_PWRGD
R21 1
R617 1
R203 1
MPWRG
2 0_0201_5%
2 0_0201_5%
2 0_0201_5%
B6
BA20
BB20
R1884 1
[27,59,66,68] BPWRG
[19,75] CPUCORE_PWRGD
[59,68] MPWRG
C
2
1K_0201_5%
2
2
C8524
100P_0201_50V8J
1
R612
2
@ESD@
VCC3M
BPWRG
4.7K_0201_5%
1
2
R19
MPWRG
C
10K_0201_5%
1
2
R614
C8522
100P_0201_50V8J
1
1
C460
100P_0201_25V8J
-RSMRST
2
@ESD@
2
2 0_0201_5%
AR13
AP11
-SUSWARN
BB15
AM15
AW17
AT15
[46,67] -PCIE_WAKE
[34] -LANWAKE
[34] LANPHYPC
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPP_B13/PLTRST#
SYS_RESET#
RSMRST#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
PROCPWRGD
VCCST_PWRGD
SYS_PWROK
PCH_PWROK
DSW_PWROK
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A13/SUSWARN#/SUSPWRDNACK
GPP_A15/SUSACK#
GPP_A11/PME#
INTRUDER#
WAKE#
GPD2/LAN_WAKE#
GPD11/LANPHYPC
GPD7/RSVD
11 OF 20
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
-PCH_SLP_S0
-PCH_SLP_S3
-PCH_SLP_S4
-PCH_SLP_S5
-PCH_SLP_SUS
-PCH_SLP_SUS [59]
-PCH_SLP_LAN [60]
-PCH_SLP_WLAN [59]
-PCH_SLP_M [17,67]
-PCH_SLP_WLAN
BA15
AY15
AU13
AU11
AP16
-PWRSW_EC [59]
AC_PRESENT [59]
-BATLOW [60]
-INTRUDER
AM10
AM11
-EXT_PWR_GATE [16]
@
C7
1000P_0201_25V7K
SKL-U_BGA1356
[17,80,82,87]
[17,59,67,80]
[17,59,67,84]
[17,67]
2
1
B
B
S3
1
3
2
4
D5
R10
2
0_0201_5%
1
2
-INTRUDER_EC
-INTRUDER_EC [60]
RB520CM-30T2R VMN2
SPVR310100_4P
2
VCC1R0_SUS
2
VCC3_SUS
1
1
R2325
10K_0201_5%
1
R2324
10K_0201_5%
2
2
Q194
LSK3541G1ET2L_VMT3
Q195
LSK3541G1ET2L_VMT3
3
CPUCORE_ON
3
[67,75] CPUCORE_ON
1
1
VCCST_PWRGD
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
CPU : SYSTEM PM
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
13
of
102
5
4
3
2
1
D
D
VCCCPUCORE
VCCCPUCORE
VCCST
U58L CPU@
SKL-U
CPU POWER 1 OF 4
K32
AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62
VIDALERT#
VIDSCK
VIDSOUT
VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62
VCCSTG_G20
@
R782
100_0201_5%
2
2
2
R374
56_0201_5%
R9319
100_0201_5%
VCCSTG
1
R9
100_0201_5%
1
1
VCC_SENSE
VSS_SENSE
RSVD_AK32
VCCCPUCORE
2
RSVD_K32
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
C
1
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
E32
E33
220_0201_5%
1
2
R781
B63
A63
D64
G20
-SVID_ALERT
SVID_CLK
SVID_DATA
VCC_SENSE [75]
VSS_SENSE [75]
-SVID_ALERT [75]
SVID_CLK [75]
SVID_DATA [75]
2
C
VCC_A30
VCC_A34
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30
VCC_OPC_1P8_H63
R70
100_0201_5%
VCC_OPC_1P8_G61
1
A30
A34
A39
A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
12 OF 20
SKL-U_BGA1356
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
CPU : CPU POWER (1/2)
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
14
of
102
2
1
2
1
2
1
2
1
2
1
D
1U_0201_6.3V6K
1
VCC1R2A
10U_0402_6.3V6M
2
22U_0603_6.3V6M
1
@ C844
2
22U_0603_6.3V6M
1
@ C842
2
22U_0603_6.3V6M
1
@ C840
2
10U_0402_6.3V6M
1
@ C838
2
10U_0402_6.3V6M
1
@ C1832
2
10U_0402_6.3V6M
1
@ C1831
2
10U_0402_6.3V6M
1
C1830
2
10U_0402_6.3V6M
1
C1829
2
10U_0402_6.3V6M
1
VCCPLL_OC
VCC1R2A
VCC1R2A
C1184
2
10U_0402_6.3V6M
1
C835
0.1U_0201_6.3V6K
2
C2424
C2422
1
C2423
2
VCC1R2A
0.1U_0201_6.3V6K
1U_0402_6.3V6K
VCCQC
VCCST
1U_0402_6.3V6K
VCCGFXCORE_I
VCCSTG
C2425
VCCST
0.1U_0201_6.3V6K
VCCPLL
D
2
1
C8536
3
C2427
4
C2426
5
VCCGFXCORE_I
U58M CPU@
SKL-U
CPU POWER 2 OF 4
2
VCCGFXCORE_I
1
R2152
100_0201_5%
[75] VCCGT_SENSE
[75] VSSGT_SENSE
VCCGT_SENSE
VSSGT_SENSE
J70
J69
VCCGT_SENSE
VSSGT_SENSE
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
VCC1R2A
VCCCPUIO
VCCGTX_SENSE
VSSGTX_SENSE
SKL-U
U58N CPU@
CPU POWER 3 OF 4
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AL23
K20
K21
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
VCCSA
2
VDDQC
VCCCPUIO
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
R2290
100_0201_5%
R2154
100_0201_5%
1
A18
VCCSA
2
AM40
AK28
AK30
AL30
AL42
AM28
AM30
AM42
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
1
VCCST
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
AM23
AM22
VCCIO_SENSE
VSSIO_SENSE
VCCCPUIO_SENSE [80]
VSSCPUIO_SENSE [80]
VSSSA_SENSE
VCCSA_SENSE
H21
H20
VSSSA_SENSE
14 OF 20 VCCSA_SENSE
SKL-U_BGA1356
VSSSA_SENSE [75]
VCCSA_SENSE [75]
2
VCCSTG
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
A22
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
C
R2291
100_0201_5%
B
R2155
100_0201_5%
1
B
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
2
C
1
A48
A53
A58
A62
A66
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
AK62
AL61
13 OF 20
2
SKL-U_BGA1356
1
R2153
100_0201_5%
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU : CPU POWER (2/2)
Thursday, August 13, 2015
1
Sheet
15
of
102
5
4
3
2
1
VCC3_SUS
SVT_C_EC005
SVT_C_EC004
VCC3M_PCH
@
R797
0_0201_5%
SVT_C_EC003
1
VCC3M
2
Short Pattern: R2485, R2486, R2487
VCC3_SUS
VCC3_SUS
D
VCCMPHY_GATE
2
Short Pattern
@
VCC1R0_SUS
@
VCC1R0_SUS_PRIM
1
[13] -EXT_PWR_GATE
VCC1R0_SUS
VCCPCHCORE
D
R9325
U146 @
1
2
3
7
VDD
D
D
ON
S
S
GND
4
5
1
2
2
2MM
@
6
2
C2428
47U_0805_6.3V6M
1
@
C2429
47U_0805_6.3V6M
1
2
2
C2430
47U_0805_6.3V6M
1
C2431
47U_0805_6.3V6M
1
SLG59M1470VTR_FC-TDFN9_1P5X2
R796
0_0201_5%
R2486
1
2
VCC1R8_SUS
VCC1R0_SUS
VCC1R0_SUS
@
R2293
20K_0201_5%
1
2
R2485
1
2
Short Pattern
@
VCCMPHY_GATE
VCCMPHY_GATE_OUT
R2487
1
2
Short Pattern
@
VCCPCHCORE
VCC1R0_SUS
VCC1R0_SUS_PRIM
VCC3_SUS
U58O
SKL-U
CPU@
CPU POWER 4 OF 4
AB19
AB20
P18
C
AF18
AF19
V20
V21
VCCMPHY_GATE
AL1
R2302
1
VCCMPHY_GATE_PLL
2
2MM
@
2@
C2447
22U_0603_6.3V6M
1
2
2@
C2446
22U_0603_6.3V6M
1
2@
C2437
1U_0402_6.3V6K
1
VCC1R0_SUS
K17
L1
N15
N16
N17
P15
P16
1
NEAR K15
K15
L15
RF@
L1
1
VCCMPHY_GATE_OUT
C620
1U_0402_6.3V6K
VCC1R0_SUS_PLL
2
V15
VCC3M_PCH
BLM15EG221SN1D_2P
2 RF@
C2449
0.1U_0201_6.3V6K
2@
C2448
22U_0603_6.3V6M
1
AB17
Y18
1
VCC3_SUS
AD17
AD18
AJ17
AJ19
AJ16
AF20
AF21
T19
T20
AJ21
AK20
N18
B
2
1
VCC1R0_SUS_PRIM
VCC1R0_SUS
2@
C2432
1U_0402_6.3V6K
2
1
1
NEAR AB19
C2433
1U_0402_6.3V6K
NEAR K17
VCCPCHCORE
VCC3_SUS
2
1
1
1
NEAR AF18
DCPDSW_1P0
NEAR AJ19
C2435
1U_0402_6.3V6K
NEAR N15
VCCPRIM_3P3_V19
VCCMPHYAON_1P0
VCCMPHYAON_1P0
VCCPRIM_1P0_T1
VCCATS_1P8
VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0
DCPRTC
VCCCLK1
VCCAPLL_1P0
VCCCLK2
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18
VCCCLK3
VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17
VCCCLK4
VCCHDA
VCCCLK6
VCCCLK5
AK15
AG15
Y16
Y15
T16
AF16
AD15
VCC3_SUS
VCC1R0_SUS
R2304
VCC1R0_SUS_PRIM
2
2
C763
0.1U_0201_6.3V6K
1
2
C832
0.1U_0201_6.3V6K
C380
1U_0402_6.3V6K
1
1
1
T1
VCC1R0_SUS
AA1
2
2@
C2450
22U_0603_6.3V6M
2MM
2@
C2451
22U_0603_6.3V6M
1
V19
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
C
@
1
RTCVCC
VCC1R0_SUS
AK17
R2305
AK19
BB14
1
2
BB10
1
2
C795
0.1U_0201_6.3V6K
C731
1U_0402_6.3V6K
2
2@
C2452
22U_0603_6.3V6M
K19
2MM
2@
C2453
22U_0603_6.3V6M
1
A14
1
@
1
VCC1R0_SUS
L21
N20
R2306
L19
1
A10
AN11
AN13
2@
C2454
22U_0603_6.3V6M
VCCPCHCORE_VID0 [87]
VCCPCHCORE_VID1 [87]
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
2MM
2@
C2455
22U_0603_6.3V6M
1
VCCSPI
2
@
1
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
B
15 OF 20
SKL-U_BGA1356
VCCMPHY_GATE_OUT
2@
C821
1U_0402_6.3V6K
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
C8530
0.1U_0201_6.3V6K
2@
C2434
1U_0402_6.3V6K
VCC1R8_SUS
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCMPHY_GATE_OUT
VCC3_SUS
2@
C2436
47U_0805_6.3V6M
2@
C2438
1U_0402_6.3V6K
2
1
1
1
NEAR N15
NEAR AF20
C2439
1U_0402_6.3V6K
NEAR N18
VCC1R8_SUS
2@
C2440
1U_0402_6.3V6K
2@
C2441
1U_0402_6.3V6K
2@
C2442
1U_0402_6.3V6K
2@
C2443
1U_0402_6.3V6K
2
1
1
1
1
1
NEAR AG15
NEAR Y16
NEAR T16
NEAR V19
C2444
1U_0402_6.3V6K
NEAR AA1
VCC1R0_SUS
2@
C2445
1U_0402_6.3V6K
1
NEAR A10
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU : PCH POWER
Thursday, August 13, 2015
1
Sheet
16
of
102
5
4
3
2
1
D
D
APS/PETS Interface
VCC3_SUS
U58P
SKL-U
CPU@
U58Q
SKL-U
CPU@
SKL-U
U58R
GND 1 OF 3
VCC3M
CPU@
GND 2 OF 3
JAPS1
GND 3 OF 3
A5
A67
A70
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15
AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67
AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64
C
B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV1
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA10
BA14
BA18
BA2
BA23
BA28
BA32
BA36
F68
BA45
16 OF 20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
F8
G10
G22
G43
G45
G48
G5
G52
G55
G58
G6
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
J8
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
[13,80,82,87] -PCH_SLP_S0
[13,19] -XDP_DBR
[57,62,66,67] -PWRSWITCH
[12,20] -RTCRST
[13,67] -PCH_SLP_M
[13,59,67,84] -PCH_SLP_S4
[13,67] -PCH_SLP_S5
[13,59,67,80] -PCH_SLP_S3
GND
GND
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C
ACES_50506-01841-P01
ME@
18 OF 20
SKL-U_BGA1356
B
17 OF 20
SKL-U_BGA1356
SKL-U_BGA1356
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU : GND
Thursday, August 13, 2015
1
Sheet
17
of
102
5
4
3
2
1
D
D
TABLE
CFG0 : Stall Reset Sequence
af t er PC U PLL L ock until d
e-as ser t d
e
1 : No Stall
0 : Stall
CFG3 : MSR Privacy Bit Feature
1 : MSR (C80h) bit[0] set t i n
g
0 : MSR (C80h) bit[0] overridden
CFG4 : eDP Enable
1 : Disabled
0 : Enabled
CFG9 : SVID Bus Communicat i on
1 : Enabled
0 : Disabled
SKL-U
U58S CPU@
U58T CPU@
RESERVED SIGNALS-1
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
C
1K_0201_5%
2
E63
F63
@ 1
R1891
1K_0201_5%
2
1
R8965
@ 1
R1892
1K_0201_5%
2
[19] CFG3
E66
F66
49.9_0201_1%
1
2
E60
R8898
E8
[19] ITP_PMODE
AY2
AY1
D1
D3
K46
K45
AL25
AL27
C71
B70
B
F60
A52
BA70
BA68
J71
J68
F65
G65
F61
E61
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
SKL-U
SPARE
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
BB68
BB69
AK13
AK12
SVT_EC003
BB2
BA3
AW69
AW68
AU56
AW48
C7
U12
U11
H11
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
F6
E3
C11
B11
A11
D12
C12
F52
C
20 OF 20
TP5
TP6
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
CFG[16]
CFG[17]
RSVD_B3
RSVD_A3
CFG[18]
CFG[19]
RSVD_AW1
CFG_RCOMP
RSVD_E1
RSVD_E2
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_BA4
RSVD_BB4
RSVD_D1
RSVD_D3
RSVD_A4
RSVD_C4
RSVD_K46
RSVD_K45
TP4
RSVD_A69
RSVD_B69
RSVD_AL25
RSVD_AL27
RSVD_AY3
RSVD_C71
RSVD_B70
RSVD_D71
RSVD_C70
RSVD_F60
RSVD_C54
RSVD_D54
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
TP1
TP2
RSVD_J71
RSVD_J68
VSS_AY71
ZVM#
VSS_F65
VSS_G65
RSVD_TP_AW71
RSVD_TP_AW70
RSVD_F61
RSVD_E61
MSM#
PROC_SELECT#
AU5
AT5
SKL-U_BGA1356
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
1
0_0201_5%
2
R2287
D71
C70
B
C54
D54
VCCST
AY4
BB3
AY71
AR56
1
0_0201_5%
2
R2288
AW71
AW70
AP56
C64
1
R2289
2
100K_0201_5%
19 OF 20
SKL-U_BGA1356
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
CPU : CFG/RESERVED
Thursday, August 13, 2015
1
Sheet
18
of
102
5
4
JTAGX
0_0201_5%
0_0201_5%
0_0201_5%
XDP_TMS
R2496
1
@
2
0_0201_5%
XDP_TDI
1
@
2
0_0201_5%
-XDP_TRST
1
@
2
0_0201_5%
XDP_TDO
R2498
D
VCC1R0_SUS
[6] XDP_TCK0
[6] XDP_TMS
[6] XDP_TDI
[6] -XDP_TRST
[6] XDP_TDO
[13,17] -XDP_DBR
[18] ITP_PMODE
XDP_TCK1
XDP_TMS
XDP_TDI
-XDP_TRST
XDP_TDO
-XDP_DBR
ITP_PMODE
SVT_C_EC002
@
[13,59] -RSMRST
1
R594
1K_0201_5%
-RSMRST
2
[18] CFG3
[10] -XDP_PRDY
[10] -XDP_PREQ
-XDP_PRDY
-XDP_PREQ
VCC1R0_SUS
@
JXDP1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
GND
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2
1
C2577
0.1U_0201_6.3V6K
2
51_0201_5%
SVT_C_EC002
@
1
1
SVT_C_EC002
R509
2
C8320
0.1U_0201_6.3V6K
2
R475
51_0201_5%
XDP_TCK0
C
VCC1R0_SUS
VCC1R0_SUS
@
1
2
1K_0201_5%
VCCSTG
R491
1
2
1
@
VCC3B
R588
1.5K_0201_5%
VCC1R0_SUS
1
XDP_TCK1
2
2
XDP_TCK0
2
@
PCH_TDO
[6] PCH_TDO
2
@
1
-PCH_TRST R2497
[6] -PCH_TRST
@
1
R2495
PCH_TDI
[6] PCH_TDI
1
R2494
PCH_TMS
[6] PCH_TMS
R2493
PCH_TCK
[6] JTAGX
[6] PCH_TCK
D
3
SVT_C_EC002
@
JPCH1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PCH_TCK
PCH_TMS
PCH_TDI
R2499 1
0_0201_5%
@
2
PCH_TDO
[13,75] CPUCORE_PWRGD
-XDP_DBR
CPUCORE_PWRGD
1
R511
1K_0201_5%
2
@
SVT_C_EC002
1
R514
1K_0201_5%
-RSMRST
2
@
ACES_51522-02601-001
ME@
GND
GND
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C
ACES_51522-02601-001
ME@
TABLE
Individual
Port
ASM
Merged
Port
ASM
DCI 2.0
w/o Connector
ASM
R471
ASM
NO_ASM
NO_ASM
R541
ASM
NO_ASM
NO_ASM
R515
ASM
NO_ASM
NO_ASM
R530
ASM
NO_ASM
NO_ASM
R475
ASM
ASM
ASM
J8
ASM
ASM
NO_ASM
C8320
ASM
ASM
NO_ASM
R491
ASM
ASM
ASM
R588
ASM
ASM
NO_ASM
R594
ASM
ASM
NO_ASM
R2499
NO_ASM
NO_ASM
NO_ASM
R509
ASM
NO_ASM
NO_ASM
J9
ASM
ASM
NO_ASM
C2577
ASM
ASM
NO_ASM
R511
ASM
ASM
NO_ASM
R514
ASM
ASM
NO_ASM
R2493
NO_ASM
ASM
ASM
R2494
NO_ASM
ASM
NO_ASM
R2495
NO_ASM
ASM
ASM
R2496
NO_ASM
ASM
ASM
R2497
NO_ASM
ASM
ASM
R2498
NO_ASM
ASM
ASM
R2
B
A
B
A
LOGIC
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
XDP CONNECTOR
Thursday, August 13, 2015
1
Sheet
19
of
102
5
4
3
2
1
D
D
VCC3SW
@
PR237
1.5K_0201_5%
PD7
RB520CM-30T2R_VMN2M2
1
2
2
1
RTCVCC
PD6
RB520CM-30T2R_VMN2M2
1
1
1
C
@
PR238
47K_0201_5%
C
2
2
2
VCC3SW
PC287
1U_0402_6.3V6K
PD3
2
1
2
RB520CM-30T2R_VMN2M2
PR4
1K_0201_5%
1
20K_0201_5%
1
2
PR620
PJRTC
1
2
G1
G2
-RTCRST
-RTCRST [12,17]
2
1
2
3
4
1
CVILU_CI4402M1HRT-NH
@
PC459
1U_0402_6.3V6K
20K_0201_5%
1
2
-SRTCRST
-SRTCRST [12]
2
PR250
1
B
PC285
1U_0402_6.3V6K
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
RTC BATTERY
Thursday, August 13, 2015
1
Sheet
20
of
102
5
4
3
2
1
D
D
2
VCC3_SUS
1
D12
RB520CM-30T2R_VMN2M2
[7] -SPI_CS0
[7,65] SPI_MISO_IO1
-SPI_CS0
SPI_MISO_IO1
R322
R694
1
1
2 33_0201_5%
2 33_0201_5%
16MB SOIC8
WINBOND W25Q128FVSIQ
MACRONIX MX25L12873FM2I-10G
2
C
1
C429
1
3.3K_0201_5%
1
2
C629
R703
3.3K_0201_5%
1
2
2
R706
0.1U_0201_6.3V6K
2
1
@
R2342
10K_0201_5%
C
0.1U_0201_6.3V6K
Change R703 to ASM
VCC3_SUS_SPI
U49
-SPI_CS0_R
SPI_MISO_IO1_0_R
1
2
3
4
/CS
DO(IO1)
/WP(IO2)
GND
VCC
/HOLD(IO3)
CLK
DI(IO0)
8
7
6
5
SPI_IO3_0_R
SPI_CLK_0_R
SPI_MOSI_IO0_0_R
1
2
2
2 33_0402_5%
1 33_0201_5%
1 33_0201_5%
SPI_IO2_0_R
W25Q128FVSIQ_SO8
R8981
R681
R674
R8980
1
2 33_0402_5%
SPI_IO3
SPI_CLK
SPI_MOSI_IO0
SPI_IO2
SPI_IO3 [7]
SPI_CLK [7,65]
SPI_MOSI_IO0 [7,65]
SPI_IO2 [7]
TABLE
SF100 PIN HEADER INTERFACE (TOP VIEW)
B
B
1 VCC
D12.1
GND
3 CS#
R322.2
R681.2 CLK
GND
2
4
5 MISO R694.2
R674.2 MOSI 6
7 (KEY) N/A
N/A
(RESET) 8
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
SPI FLASH
Thursday, August 13, 2015
1
Sheet
21
of
102
B
C
D
VCC1R2A
VCC1R2A
M_A_DQ13
1
M_A_DQ9
M_A_DQ15
M_A_DQ10
M_A_DQ21
M_A_DQ17
-M_A_DQS2
M_A_DQS2
M_A_DQ23
M_A_DQ19
M_A_DQ29
M_A_DQ25
M_A_DQ30
M_A_DQ26
2
[4] M_A_CKE0
[4] M_A_BG1
[4] M_A_BG0
M_A_CKE0
M_A_BG1
M_A_BG0
M_A_A12
M_A_A9
M_A_A8
M_A_A6
M_A_A3
M_A_A1
[4] M_A_DDRCLK0_933M
[4] -M_A_DDRCLK0_933M
[4] M_A_PARITY
[4] M_A_BS1
[4] -M_A_CS0
[4] M_A_ODT0
[4] -M_A_CS1
[4] M_A_ODT1
M_A_DDRCLK0_933M
-M_A_DDRCLK0_933M
M_A_PARITY
M_A_BS1
-M_A_CS0
M_A_A14
M_A_ODT0
-M_A_CS1
M_A_ODT1
M_A_DQ37
M_A_DQ33
-M_A_DQS4
M_A_DQS4
3
M_A_DQ38
M_A_DQ34
M_A_DQ44
M_A_DQ40
M_A_DQ46
M_A_DQ42
M_A_DQ52
M_A_DQ49
-M_A_DQS6
M_A_DQS6
VCC3B
M_A_DQ55
M_A_DQ51
M_A_DQ61
M_A_DQ56
VCC2R5A
M_A_DQ62
M_A_DQ58
[62,66] SMB_CLK_3B
SMB_CLK_3B
VCC3B
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
233
235
237
239
241
243
245
247
249
251
253
255
257
259
4
261
2
1
BA1
VDD13
CS0#
A14/WE#
VDD15
ODT0
CS1#
VDD17
ODT1
VDD19
C1/CS3#/NC
VSS53
DQ37
VSS55
DQ33
VSS57
DQS4_C
DQS4_T
VSS60
DQ38
VSS62
DQ34
VSS64
DQ44
VSS66
DQ40
VSS68
DM5#/DBI5#/NC
VSS69
DQ46
VSS71
DQ42
VSS73
DQ52
VSS75
DQ49
VSS77
DQS6_C
DQS6_T
VSS80
DQ55
VSS82
DQ51
VSS84
DQ61
VSS86
DQ56
VSS88
DM7#/DBI7#/NC
VSS89
DQ62
VSS91
DQ58
VSS93
SCL
VDDSPD
VPP1
VPP2
A10/AP
VDD14
BA0
A16/RAS#
VDD16
A15/CAS#
A13
VDD18
C0/CS2#/NC
VREFCA
SA2
VSS54
DQ36
VSS56
DQ32
VSS58
DM4#/DBI4#/NC
VSS59
DQ39
VSS61
DQ35
VSS63
DQ45
VSS65
DQ41
VSS67
DQS5_C
DQS5_T
VSS70
DQ47
VSS72
DQ43
VSS74
DQ53
VSS76
DQ48
VSS78
DM6#/DBI6#/NC
VSS79
DQ54
VSS81
DQ50
VSS83
DQ60
VSS85
DQ57
VSS87
DQS7_C
DQS7_T
VSS90
DQ63
VSS92
DQ59
VSS94
SDA
SA0
VTT
SA1
GND
GND
M_A_DQ6
VCC1R2A
M_A_DQ2
M_A_DQ12
M_A_DQ8
2
M_A_DQ3
M_A_DQ0
-M_A_DQS1
M_A_DQS1
M_A_DQ14
1
M_A_DQ20
R2073
[4] M_A_VREF_CA_CPU
M_A_DQ16
2_0201_1%
1
2
M_A_DQ22
2
M_A_DQ18
M_A_DQ28
1
R2070
1K_0201_1%
C2119
0.022U_0201_10V6K
M_A_DQ24
-M_A_DQS3
M_A_DQS3
R2074
24.9_0201_1%
M_A_DQ31
M_A_DQ27
-DRAMRST
M_A_CKE1
2
-DRAMRST [5]
M_A_CKE1 [4]
-M_A_ACT
-M_A_ALERT
-M_A_ACT [4]
-M_A_ALERT [4]
M_A_A11
M_A_A7
M_A_A5
M_A_A4
M_A_A2
M_A_DDRCLK1_933M
-M_A_DDRCLK1_933M
M_A_DDRCLK1_933M [4]
-M_A_DDRCLK1_933M [4]
M_A_A0
M_A_A10
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
244
246
248
250
252
254
256
258
260
M_A_VREF_CA
M_A_BS0
M_A_BS0 [4]
M_A_A16
M_A_A15
M_A_A13
M_A_DQ36
M_A_DQ32
M_A_VREF_CA
M_A_DQ39
3
M_A_DQ35
M_A_DQ45
2
M_A_DQ41
1
-M_A_DQS5
M_A_DQS5
C2120
2.2U_0402_6.3V6M
1
C2121
0.1U_0201_6.3V6K
M_A_DQ43
M_A_DQ53
M_A_DQ48
M_A_DQ54
VCC0R6B
M_A_DQ50
VCC2R5A
M_A_DQ60
M_A_DQ57
SVT_C_EC004
-M_A_DQS7
M_A_DQS7
2
M_A_DQ63
1
M_A_DQ59
SMB_DATA_3B
2
C2122
10U_0402_6.3V6M
1
C2123
1U_0402_6.3V6K
SMB_DATA_3B [62,66]
SPD ADDRESS: 50H
262
4
@
R108
0_0201_5%
FOX_ASAA85Y-SKSB0-4H
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
B
C
D
Compal Electronics, Inc.
DDR4 SO DIMM CHANNEL-A (1/2)
Size Document Number
Custom
Rev
0.5
LA-C581P
Date:
A
2
M_A_DQ47
SVT_C_EC003
C2118
0.1U_0201_6.3V6K
M_A_VREF_CA
M_A_DQ11
2
C2117
2.2U_0402_6.3V6M
1
R2069
1K_0201_1%
1
M_A_DQ7
[4] M_A_A[16:0]
M_A_DQ4
2
[4] M_A_DQS[7:0]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
1
-M_A_DQS0
M_A_DQS0
VSS2
DQ4
VSS4
DQ0
VSS6
DM0#/DBI0#/NC
VSS7
DQ6
VSS9
DQ2
VSS11
DQ12
VSS13
DQ8
VSS15
DQS1_C
DQS1_T
VSS18
DQ14
VSS20
DQ11
VSS22
DQ20
VSS24
DQ16
VSS26
DM2#/DBI2#/NC
VSS27
DQ22
VSS29
DQ18
VSS31
DQ28
VSS33
DQ24
VSS35
DQS3_C
DQS3_T
VSS38
DQ31
VSS40
DQ27
VSS42
CB4/NC
VSS44
CB0/NC
VSS46
DM8#/DBI8#/NC
VSS47
CB6/NC
VSS49
CB7/NC
VSS51
RESET#
CKE1
VDD2
ACT#
ALERT#
VDD4
A11
A7
VDD6
A5
A4
VDD8
A2
EVENT#
VDD10
CK1_T
CK1_C
VDD12
A0
2
[4] -M_A_DQS[7:0]
ME@
VSS1
DQ5
VSS3
DQ1
VSS5
DQS0_C
DQS0_T
VSS8
DQ7
VSS10
DQ3
VSS12
DQ13
VSS14
DQ9
VSS16
DM1#/DBI1#/NC
VSS17
DQ15
VSS19
DQ10
VSS21
DQ21
VSS23
DQ17
VSS25
DQS2_C
DQS2_T
VSS28
DQ23
VSS30
DQ19
VSS32
DQ29
VSS34
DQ25
VSS36
DM3#/DBI3#/NC
VSS37
DQ30
VSS39
DQ26
VSS41
CB5/NC
VSS43
CB1/NC
VSS45
DQS8_C
DQS8_T
VSS48
CB2/NC
VSS50
CB3/NC
VSS52
CKE0
VDD1
BG1
BG0
VDD3
A12
A9
VDD5
A8
A6
VDD7
A3
A1
VDD9
CK0_T
CK0_C
VDD11
PARITY
1
M_A_DQ1
[4] M_A_DQ[63:0]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
2
JDIMM1
M_A_DQ5
E
1
A
Thursday, August 13, 2015
E
Sheet
22
of
102
5
4
3
2
1
VCC1R2A
2
C2130
1U_0402_6.3V6K
C2131
1U_0402_6.3V6K
1
2
C2129
1U_0402_6.3V6K
1
2
C2128
1U_0402_6.3V6K
1
2
C2127
1U_0402_6.3V6K
1
2
C2126
1U_0402_6.3V6K
1
2
C2125
1U_0402_6.3V6K
1
1
C2124
1U_0402_6.3V6K
1
2
D
2
D
VCC1R2A
2
1
2
C2132
10U_0402_6.3V6M
1
2
C2133
10U_0402_6.3V6M
1
2
C2134
10U_0402_6.3V6M
1
2
C2135
10U_0402_6.3V6M
1
2
C2136
10U_0402_6.3V6M
1
2
C2137
10U_0402_6.3V6M
1
2
C2138
10U_0402_6.3V6M
1
C2139
10U_0402_6.3V6M
C
C
VCC0R6B
2
1
2
C2140
0.1U_0201_6.3V6K
1
2
C2141
0.1U_0201_6.3V6K
1
2
C2142
0.1U_0201_6.3V6K
1
C2143
0.1U_0201_6.3V6K
B
B
VCC0R6B
2
1
2
C2144
10U_0402_6.3V6M
1
C2145
10U_0402_6.3V6M
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
LA-C581P
Date:
5
4
3
2
Compal Electronics, Inc.
DDR4 SO DIMM CHANNEL-A (2/2)
Thursday, August 13, 2015
1
Sheet
23
of
102
Rev
0.5
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
24
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
25
of
102
5
4
VCC3M
3
2
1
VCC3P
Q22
1
8
2
7
3
6
4
D
5
D
VBL20
VINT20
2
1.2A
TPCF8002_2-3U1A
F7
2
R361
47_0201_5%
1
1
R76
100_0201_5%
2
1
1
2
0438003.WR 3A 32V
1
D63
RB521CM-30T2R_SOD923-2
C724
0.01U_0402_25V7K
2
VCC3P_DRV
2
[68] VCC3P_DRV
1
C603
0.1U_0402_25V7K
R714
47K_0201_5%
1
2
SVT_C_EC029
2
1
MIC_VCC_CN
F33
1
0467.500NRHF 0.5A 32V
0.1U_0201_6.3V6K
C320
2
1
F34
0467.500NRHF 0.5A 32V
0.1U_0201_6.3V6K
C321
2
VCC3B_SENS_CN
2
1
1
2
C322
2
47K_0201_5%
VCC3M_WBTN_CN
-LED_LOGO
R102 1
USBP7USBP7+
R786 1
R785 1
2 0_0201_5%
2 0_0201_5%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2 680_0402_5%
USBP7-_CONN
USBP7+_CONN
-INT_MIC_DTCT
MIC_DATA
MIC_CLK
SENSE_SCL
SENSE_SDA
G1
G2
G3
G4
G5
ISH_I2C0_SDA
ISH_I2C0_SCL
41
42
43
44
45
ARGOS_LVDFH-04008-TM00+
ME@
@
C929
1000P_0201_25V7K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
B
G1
G2
G3
G4
G5
31
32
33
34
35
ARGOS_LVDFH-03001-TM00+
ME@
2
@
1
MIC_GND
C33
[8,56] ISH_I2C0_SDA
[8,56] ISH_I2C0_SCL
1000P_0201_25V7K
C8532
1000P_0201_25V7K
D
C8531
1000P_0201_25V7K
[8] -INT_MIC_DTCT
[50] MIC_DATA
[50] MIC_CLK
R
A
EDP_TXP0_CONN
4
O
3
R
4
D
3
1
1
B
2
1
A
1
2
R
2
EDP_TXN0_C
2
O
EDP_TXP0_C
ESD@
O
EDP_TXP1_CONN
EDP_TXN1_CONN
1
2
R
0_0402_5%
0_0402_5%
B
2
2
D
1 RF@
1 RF@
S
RJ193
RJ194
@RF@
1
O
EDP_TXP1_C
EDP_TXN1_C
A
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
E
1
1
N
C8296
C8295
S
EDP_TXP0_CONN
EDP_TXN0_CONN
R
0_0402_5%
0_0402_5%
FLJ21
C313
1U_0603_25V7K
L
2
2
S
1 RF@
1 RF@
2
2
[8] ISH_GP0
[8] ISH_GP1
[8,56] ISH_GP2
E
RJ191
RJ192
N
EDP_TXP0_C
EDP_TXN0_C
E
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
-S
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
1
1
ESD@
2
[56,59] SENSE_SCL
[56,59] SENSE_SDA
P
1
1
EDP_AUXN_CONN
EDP_AUXP_CONN
C8299
C8298
[3] EDP_TXP1
[3] EDP_TXN1
C310
0.1U_0402_25V7K
[10] USBP7[10] USBP7+
E
L
E
N
A
P
H
C
U
O
T
C8289
C8290
[3] EDP_TXP0
[3] EDP_TXN0
1
C
JCMOS1
M
-TOUCH_STOP
2
RB521CM-30T2R_SOD923-2
USBP9-_CONN
2 0_0201_5%
USBP9+_CONN
2 0_0201_5%
HSYNC
[3] EDP_AUXN
[3] EDP_AUXP
2
1
[58] -LED_LOGO
A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
C
[10] USBP9[10] USBP9+
R2078 1
R2079 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
O
N
O
T
T
U
B
2 RB521CM-30T2R_SOD923-2
D4
USBP9USBP9+
C307
0.01U_0402_25V7K
G
1
-TOUCH_DISABLE
VBL20
C308
0.01U_0201_6.3V7K
L
S
W
O
D
IN
W
-WIN_BTN
D6
1
MIC_VCC
JEDP1
B
[67] -TOUCH_DISABLE
2
C311
0.1U_0201_6.3V6K
LCD CONNECTOR
[3] EDP_HPD
[60] -WIN_BTN
[8,56,59] -LID_CLOSE
1
1
2
C315
1U_0402_6.3V6K
1
R668
2
1
0467.500NRHF 0.5A 32V
1
F29
C314
2
0.1U_0201_6.3V6K
2
1
O
HSYNC
PANEL_BKLT_CTRL
BACKLIGHT_ON
[3] PANEL_BKLT_CTRL
[58] BACKLIGHT_ON
F24
1
VCC3B_TOUCH_CN
C319
1
2
0467.500NRHF 0.5A 32V
0.1U_0201_6.3V6K
2
0.9A
2
0438003.WR 3A 32V
VCC3M
VCC3M_SENS_CN
VCC3P
F28
1
VCC3LCD
VCC3M
0.1U_0201_6.3V6K
F3
C
VCC3B
VCC3P
0467.500NRHF 0.5A 32V
VCC3B
SVT_C_EC029
EDP_TXN0_CONN
-LED_LOGO
MCF12102G900-T_4P
A
EDP_TXN1_C
FLJ22
2
1
@RF@
2
3
1
4
3
4
VCC3B
EDP_TXP1_CONN
EDP_TXN1_CONN
MIC_VCC
@
RJ190
1
RJ189
1
D28
PESD5V0U2BT_SOT23-3
ESD@
2
1
EDP_TXP1_C
2
NEAR JCMOS1
3
A
@
MCF12102G900-T_4P
2
Compal Secret Data
Security Classification
Issued Date
MIC_GND
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
LCD/LID/MIC/CAMERA
Thursday, August 13, 2015
1
Sheet
26
of
102
5
4
3
2
2
2
DP_DP1N_CONN
DP_DP1P_CONN
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DP_DP0N_CONN
DP_DP0P_CONN
D
1
1
N
N
O
C
P
D
R
E
A
1
R1028
2.2K_0201_5%
N
R1027
2.2K_0201_5%
P
@
DP_DP2N_CONN
DP_DP2P_CONN
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
C218 1
C226 1
[3] DDIP1_0N
[3] DDIP1_0P
C496
0.1U_0201_6.3V6K
D
D
2
DP_DP3N_CONN
DP_DP3P_CONN
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
C277 1
C276 1
[3] DDIP1_1N
[3] DDIP1_1P
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
C312 1
C317 1
[3] DDIP1_2N
[3] DDIP1_2P
VCC5B
E
VCC3B
M
T
S
Y
S
R
O
F
C339 1
C323 1
[3] DDIP1_3N
[3] DDIP1_3P
1
U6
16
2 0.1U_0201_6.3V6K
DDIP1_AUXP_C
DDIP1_AUXN
C659
1
2 0.1U_0201_6.3V6K
DDIP1_AUXN_C
2
3
5
6
11
10
14
13
DDIP1_CTRLCLK
DDIP1_CTRLDATA
[3] DDIP1_HPD
Vcc
4
7
9
12
1A
2A
3A
4A
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
15
1
OE
S
DVI_DONGLE_DTCT
8
17
GND
T-PAD
VCC3B
2
CBT3257ABQ_DHVQFN16_2P5X3P5
2
R1037
100K_0201_5%
1
2
DP_AUXP_CONN
3
V I/O
Ground V BUS
V I/O
V I/O
2
10
12
DP_DP2P_CONN
DP_DP2N_CONN
1
V I/O
15
17
DP_HPD_CONN
6
N
1
N
DP_AUXN_CONN
D224
DP_DP1P_CONN
DP_DP1N_CONN
AUX_CH_P
AUX_CH_N
LANE3_P
LANE3_N
LANE2_P
LANE2_N
9
11
DP_DP0P_CONN
DP_DP0N_CONN
5
3
5
VCC3VIDEO_DP
DP_PWR
GND
GND
CONFIG2
CONFIG1
GND
GND
GND
GND
LANE1_P
LANE1_N
4
PUSB2X4D_SO6-6
ESD@
ME@
HOT PLUG
16
18
DP_DP3P_CONN
DP_DP3N_CONN
R98
100K_0201_5%
C
O
2
DP_AUXP_CONN
DP_AUXN_CONN
VCC3VIDEO_DP
C
P
D
DVI_DONGLE_DTCT
JDP1
DP_HPD_CONN
20
19
14
6
4
13
8
7
1
1
GND1
GND2
GND3
GND4
LANE0_P
LANE0_N
1
@
C67
0.01U_0201_6.3V7K
D86
DP_DP0P_CONN
1
10
2
9
4
7
DP_DP1P_CONN
DP_DP1N_CONN
5
6
1
DP_DP0N_CONN
DP_DP1P_CONN
2
DP_DP0P_CONN
DP_DP0N_CONN
C1112
0.1U_0201_6.3V6K
21
22
23
24
SINGA_2LB3001-000111F
2
C
2
1M_0201_5%
2
R97 1
1
R94
100K_0201_5%
0.1U_0201_6.3V6K
[3] DDIP1_CTRLCLK
[3] DDIP1_CTRLDATA
1
C139
[3] DDIP1_AUXN
C468
5.1M_0201_5%
2
R93 1
[3] DDIP1_AUXP
DDIP1_AUXP
DP_DP1N_CONN
3
8
N
N
O
C
P
D
R
A
E
N
PUSB3F96_XSON10_2.5X1~D
ESD@
A
m
x
0
M
0
.
5
p
y
T
N
N
O
C
P
D
R
A
E
N
A
1
.5
a
B
B
VCC3M
VCC3VIDEO_DP
U100
5
2
D88
DP_DP2N_CONN
1
10
DP_DP2N_CONN
DP_DP2P_CONN
2
9
4
7
5
6
4
@
C990
0.1U_0201_6.3V6K
EN
1
2
3
2
TPS2530DBVR
2
C991
4.7U_0402_6.3V6M
C992
10U_0402_6.3V6M
DP_DP3N_CONN
DP_DP3P_CONN
2
OUT
GND
OC
DP_DP2P_CONN
DP_DP3N_CONN
@
C21
10U_0402_6.3V6M
IN
DP_DP3P_CONN
1
1
1
1
3
8
SVT_C_EC004
PUSB3F96_XSON10_2.5X1~D
ESD@
[13,59,66,68] BPWRG
R105 1
2 0_0201_5%
N
N
O
C
P
D
R
A
E
N
@
SVT_C_EC003
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
DISPLAY PORT CONNECTOR
Thursday, August 13, 2015
1
Sheet
27
of
102
4
3
4.7K_0201_5%
1
2
C2544
R2514 2
1
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DDIP2_1P_C
DDIP2_1N_C
9
10
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DDIP2_2P_C
DDIP2_2N_C
12
13
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DDIP2_3P_C
DDIP2_3N_C
15
16
4
3
2
1
60
[3] DDIP2_HPD
@ TP152
[3] DDIP2_CTRLCLK
[3] DDIP2_CTRLDATA
[3] DDIP2_AUXP
[3] DDIP2_AUXN
C
C2530 1
C2531 1
PS8338_PI1
PS8338_PI0
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DDIP2_AUXP_C
DDIP2_AUXN_C
22
23
24
25
59
58
56
55
54
53
PS8338_PC10
PS8338_PC11
PS8338_PC20
PS8338_PC21
11
19
52
61
TABLE : Automatic Switching Mode (CFG0 = H)
SW (DDI_PRIORITY2)
2
C2543
1
1
C2545
D
2
VDD33
VDD33
VDD33
VDD33
VDD33
OUT1_D0p
OUT1_D0n
OUT1_D1p
OUT1_D1n
IN_D0p
IN_D0n
OUT1_D2p
OUT1_D2n
IN_D1p
IN_D1n
OUT1_D3p
OUT1_D3n
IN_D2p
IN_D2n
OUT2_D0p
OUT2_D0n
IN_D3p
IN_D3n
OUT2_D1p
OUT2_D1n
OUT2_D2p
OUT2_D2n
IN_CA_DET
IN_HPD
I2C_CTL_EN
Pl1/SCL_CTL
Pl0/SDA_CTL
OUT2_D3p
OUT2_D3n
OUT1_AUXp_SCL
OUT1_AUXn_SDA
IN_DDC_SCL
IN_DDC_SDA
IN_AUXp
IN_AUXn
OUT2_AUXp_SCL
OUT2_AUXn_SDA
CFG0
CFG1
PC10
PC11
PC20
PC21
OUT1_CA_DET
OUT1_HPD
OUT2_CA_DET
OUT2_HPD
SW
PEQ
PD
CEXT
REXT
GND
GND
GND
PAD(GND)
50
49
DOCK_DDIP2_0P [57]
DOCK_DDIP2_0N [57]
47
46
DOCK_DDIP2_1P [57]
DOCK_DDIP2_1N [57]
45
44
DOCK_DDIP2_2P [57]
DOCK_DDIP2_2N [57]
42
41
DOCK_DDIP2_3P [57]
DOCK_DDIP2_3N [57]
40
39
DMUX_DDIP2_0P [29]
DMUX_DDIP2_0N [29]
37
36
DMUX_DDIP2_1P [29]
DMUX_DDIP2_1N [29]
35
34
DMUX_DDIP2_2P [29]
DMUX_DDIP2_2N [29]
32
31
DMUX_DDIP2_3P [29]
DMUX_DDIP2_3N [29]
26
27
DOCK_DDIP2_AUXP [57]
DOCK_DDIP2_AUXN [57]
28
29
DMUX_DDIP2_AUXP [29]
DMUX_DDIP2_AUXN [29]
43
48
PEQ
(INT PD)
C
R2500
4.7K_0201_5%
DMUX_DDIP2_CADET [29]
DMUX_DDIP2_HPD [29]
18
8
14
17
20
DDI_PRIORITY2
PS8338_PEQ
[9]
1
C2587
2.2U_0402_6.3V6M
R2517
1M_0201_5%
1
R2515
4.99K_0201_1%
1
R2516
1M_0201_5%
2
2
2
2
PS8338BQFN60GTR-A0_QFN60_5X9
Port 1 has higher priority when both ports are plugged
Port 2 has higher priority when both ports are plugged
R2521
VCC3B
DOCK_DDIP2_HPD [57]
33
38
1
L
H
C2576
1
2
6
7
C2528 1
C2529 1
[3] DDIP2_3P
[3] DDIP2_3N
DDIP2_0P_C
DDIP2_0N_C
C2526 1
C2527 1
[3] DDIP2_2P
[3] DDIP2_2N
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
C2524 1
C2525 1
[3] DDIP2_1P
[3] DDIP2_1N
2
U147
5
21
30
51
57
C2522 1
C2523 1
[3] DDIP2_0P
[3] DDIP2_0N
1
1
2.2K_0201_5%
1
R2379 2
C2546
2
0.01U_0201_6.3V7K
2.2K_0201_5%
1
R2378 2
1
2
VCC3B
0.1U_0201_6.3V6K
VCC3B
D
0.1U_0201_6.3V6K
0.01U_0201_6.3V7K
VCC3B
0.1U_0201_6.3V6K
5
R2522
VCC3B
HEQ 14.5dB
ASM
NO_ASM
LLEQ 8.5dB
ASM
LEQ 11.5dB
NO_ASM
ASM
R2521 1
R2523
R2524
R2527
R2528
AUX interception DIS
Output 800mV & 0dB
ASM
NO_ASM
ASM
ASM
ASM
ASM
NO_ASM
NO_ASM
NO_ASM
NO_ASM
2 4.7K_0201_5%
@
2 4.7K_0201_5%
PS8338_PC11
R2526 1
@
2 4.7K_0201_5%
@
2 4.7K_0201_5%
PS8338_PC20
R2528 1
@
2 4.7K_0201_5%
@
2 4.7K_0201_5%
PS8338_PC21
R2530 1
@
2 4.7K_0201_5%
@
2 4.7K_0201_5%
PS8338_PI1
R2533 1
@
2 4.7K_0201_5%
@
2 4.7K_0201_5%
PS8338_PI0
ASM
AUX interception EN
2 4.7K_0201_5%
@
PI1
(INT PD)
R2532
R2533
B
Auto test EN
& Offset cancellation EN
ASM
NO_ASM
Auto test DIS
& Offset cancellation DIS
ASM
ASM
Auto test DIS
& Offset cancellation EN
NO_ASM
NO_ASM
LOGIC
NO_ASM
AUX interception DIS
Output 400mV & 0dB
@
R2524 1
R2532 1
PC20
(INT PD)
R2522 1
PS8338_PC10
R2531 1
PC10
(INT PD)
PS8338_PEQ
2 4.7K_0201_5%
R2529 1
B
2 4.7K_0201_5%
@
R2527 1
LOGIC
@
R2523 1
R2525 1
NO_ASM
PI0
(INT PD)
R2531
ASM
Auto EQ EN
PC11
(INT PD)
Auto EQ DIS
LOGIC
NO_ASM
LOGIC
PC21
(INT PD)
Priority 1
R2525
R2526
R2529
R2530
H
L
Priority 2
A
Swing +20%
ASM
NO_ASM
ASM
NO_ASM
Swing -16.7%
ASM
ASM
ASM
ASM
NO_ASM
NO_ASM
NO_ASM
A
HDMI
WiGig
L
Swing default NO_ASM
H
Prolink
Prolink
Compal Secret Data
Security Classification
LOGIC
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
DDI DEMULTIPLEXER
Thursday, August 13, 2015
1
Sheet
28
of
102
5
4
3
2
1
VCC3B
VCC3B_PS8337B
SVT_C_EC005
R1876 1
@
2 4.7K_0201_5%
PS8337_TMDS_DDCBUF
R1898 1
@
2 4.7K_0201_5%
R1875 1
D
@
2 4.7K_0201_5%
PS8337_PEQ
R1897 1
@
2 4.7K_0201_5%
R1877 1
2 4.7K_0201_5%
PS8337_TMDS_PRE
R1899 1
2 4.7K_0201_5%
R146 1
2 4.7K_0201_5%
PS8337_MODE
R147 1
2 4.7K_0201_5%
R2509 1
2 4.7K_0201_5%
PS8337_TMDS_RT
D
2
C1422
1
2
C1423
1
2
C1424
1
0.1U_0201_6.3V6K
C993
1
0.1U_0201_6.3V6K
1
2
0.1U_0201_6.3V6K
VCC3B_PS8337B
R2463
0.1U_0201_6.3V6K
VCC3B
4.7U_0402_6.3V6M
Short Pattern: R2463
2
C1425
1
R2510 1
@
2 4.7K_0201_5%
PS8337_DP_CFG0
3
7
3
S
8
P
o
f
in
p
3
3
D
D
V
c
h
a
e
a
r
e
s
n
p
c
a
F
u
.1
0
c
e
la
P
R1876
DDC Ative Buffer
ASM
DDC Pass Through
w/ PU
Short Pattern
@
TMDS DDCBUF
(INT PD)
ASM
DDC Pass Through
w/o PU
2
NO_ASM
R1898
NO_ASM
ASM
TABLE : Automatic Switching Mode (MODE = H, M)
SW (DDI_PRIORITY1)
L
H
NO_ASM
LOGIC
DP Port has higher priority when both ports are plugged
TMDS Port has higher priority when both ports are plugged
PEQ
(INT PD)
R1875
R1897
VCC3B
VCC3B_PS8337B
1
14
28
41
56
PS8337_DP_CFG0
[9] DDI_PRIORITY1
DDI_PRIORITY1
44
45
38
C1405
C1406
[28] DMUX_DDIP2_1P
[28] DMUX_DDIP2_1N
1
1
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DMUX_DDIP2_0P_C
DMUX_DDIP2_0N_C
3
4
C1407
C1408
[28] DMUX_DDIP2_0P
[28] DMUX_DDIP2_0N
1
1
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DMUX_DDIP2_1P_C
DMUX_DDIP2_1N_C
6
7
9
10
12
13
C1409
C1415
[28] DMUX_DDIP2_3P
[28] DMUX_DDIP2_3N
1
1
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
C1418
C1419
[28] DMUX_DDIP2_2P
[28] DMUX_DDIP2_2N
DMUX_DDIP2_2P_C
DMUX_DDIP2_2N_C
1
1
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
DMUX_DDIP2_3P_C
DMUX_DDIP2_3N_C
52
51
[28] DMUX_DDIP2_AUXP
[28] DMUX_DDIP2_AUXN
50
49
11
[28] DMUX_DDIP2_CADET
5
[28] DMUX_DDIP2_HPD
VDD33
VDD33
VDD33
VDD33
DP_D0p
DP_D0n
DP_D1p
DP_D1n
DP_CFG0/SCL_CTL
SW/SDA_CTL
I2C_CTL_EN
DP_D2p
DP_D2n
IN_D0p
IN_D0n
DP_D3p
DP_D3n
IN_D1p
IN_D1n
DP_AUXp_SCL
DP_AUXn_SDA
DP_HPD
IN_D2p
IN_D2n
DP_CA_DET
IN_D3p
IN_D3n
DP_CFG1
IN_AUXp
IN_AUXn
TMDS_CH0p
TMDS_CH0n
IN_DDC_SCL
IN_DDC_SDA
TMDS_CH1p
TMDS_CH1n
IN_CA_DET
TMDS_CH2p
TMDS_CH2n
IN_HPD
TMDS_CLKp
TMDS_CLKn
1
PS8337_TMDS_DDCBUF
2
B
1
C213
2.2U_0402_6.3V6M
PS8337_PEQ
R246 1
2 4.7K_0201_1%
2
8
27
46
PS8337_MODE
SVT_C_EC026
53
CEXT
TMDS_SCL
TMDS_SDA
TMDS_DDCBUF
TMDS_HPD
PEQ
REXT
PD
MODE
TMDS_RT
TMDS_PRE
GND
GND
GND
Thermal/GND
40
39
WIGIG_DP0P [46]
WIGIG_DP0N [46]
37
36
WIGIG_DP3P [46]
WIGIG_DP3N [46]
WIGIG_AUXP
WIGIG_AUXN
WIGIG_HPD
R2511 1
TMDS PRE
(INT PD)
WIGIG_AUXP [46]
WIGIG_AUXN [46]
WIGIG_HPD [46]
ASM
C
NO_ASM
LOGIC
R1877
1.5dB
ASM
3.0dB
R1899
ASM
NO_ASM
2 1M_0201_5%
29
PS8337_DP_CFG1
19
18
HDMI_DATA0P
HDMI_DATA0N
22
21
HDMI_DATA1P
HDMI_DATA1N
25
24
HDMI_DATA2P
HDMI_DATA2N
16
15
HDMI_CLKP
HDMI_CLKN
48
47
HDMI_DDC_CLK
HDMI_DDC_DATA
TP918@
0dB
HDMI_DATA0P [30]
HDMI_DATA0N [30]
ASM
NO_ASM
LOGIC
NO_ASM
HDMI_DATA1P [30]
HDMI_DATA1N [30]
HDMI_DATA2P [30]
HDMI_DATA2N [30]
HDMI_CLKP [30]
HDMI_CLKN [30]
HDMI_DDC_CLK [30]
HDMI_DDC_DATA [30]
HDMI_HPD_CONN
17
23
20
NO_ASM
WIGIG_DP2P [46]
WIGIG_DP2N [46]
31
30
42
NO_ASM
WIGIG_DP1P [46]
WIGIG_DP1N [46]
34
33
55
54
32
ASM
LEQ 12dB
U108
MODE
(INT PD)
26
35
43
57
1
Auto
HDMI ID disable
R147
ASM
ASM
Control
HDMI ID disable
R2512
27K_0201_1%
PS8337BQFN56GTR2-A1_QFN56_7X7
R146
Auto
HDMI ID enable
HDMI_HPD_CONN [30]
PS8337_TMDS_RT
PS8337_TMDS_PRE
2
R2501
4.7K_0201_5%
ASM
LLEQ 5dB
2
HEQ 15dB
C
NO_ASM
TMDS RT
(INT PD)
NO_ASM
B
ASM
LOGIC
NO_ASM
R2509
OD w/ termination
OD
ASM
NO_ASM
LOGIC
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
LA-C581P
Date:
5
4
3
2
Compal Electronics, Inc.
DDI DEMUX/HDMI LEVEL SHIFT
Thursday, August 13, 2015
1
Sheet
29
of
102
Rev
0.5
5
4
3
2
1
D
D
VCC5B_HDMI
[29] HDMI_CLKP
[29] HDMI_CLKN
HDMI_DATA1N
1
HDMI_DATA0P
EMI@ FLJ12 2
MCF12102G900-T_4P
HDMI_DATA0N
1
HDMI_CLKP
EMI@ FLJ13 2
MCF12102G900-T_4P
HDMI_CLKN
1
1
4
2
3
1
4
2
3
1
4
2
3
1
4
3
HDMI_DATA1P_CONN
4
HDMI_DATA1N_CONN
3
HDMI_DATA0P_CONN
4
HDMI_DATA0N_CONN
3
HDMI_CLKP_CONN
4
JHDMI1
HDMI_DATA2N_CONN
3
R1030
HDMI_DATA2P_CONN
4
R1029
1.5K_0201_5%
1
2
N
[29] HDMI_DATA0N
C
EMI@ FLJ11 2
MCF12102G900-T_4P
3
N
[29] HDMI_DATA0P
HDMI_DATA1P
2
O
[29] HDMI_DATA1N
1
C
[29] HDMI_DATA1P
EMI@ FLJ10 2
MCF12102G900-T_4P
HDMI_DATA2N
I
[29] HDMI_DATA2N
HDMI_DATA2P
M
D
H
[29] HDMI_DATA2P
1.5K_0201_5%
1
2
No need diode here because TPS2553 has
reverse voltage protection function.
HDMI_CLKN_CONN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VCC5B_HDMI
ME@
D2+
D2_shield
D2D1+
D1_shield
D1D0+
D0_shield GND0
D0GND1
CK+
GND2
CK_shield GND3
CKCEC
Reserved
SCL
SDA
DDC/CEC_GND
+5V
HP_DET
20
21
22
23
C
LCN_AUF05-1967S10-0011
[29] HDMI_DDC_CLK
[29] HDMI_DDC_DATA
[29] HDMI_HPD_CONN
HDMI_DDC_CLK
HDMI_DDC_DATA
HDMI_HPD_CONN
D283
HDMI_DATA1N_CONN
1
V I/O
2
B
HDMI_DDC_DATA
V I/O
Ground V BUS
3
V I/O
V I/O
6
10
HDMI_DATA1N_CONN
2
9
HDMI_DATA1P_CONN
4
7
HDMI_DATA2N_CONN
HDMI_DATA2P_CONN
D227
HDMI_DDC_CLK
1
HDMI_DATA1P_CONN
HDMI_DATA2N_CONN
VCC5B_HDMI
5
6
HDMI_DATA2P_CONN
HDMI_HPD_CONN
3
5
8
B
4
PUSB3F96_XSON10_2.5X1~D
ESD@
PUSB2X4D_SO6-6
ESD@
Current Limit Target : 400mA
Requirement
: 300mA
HDMI Spec
: 50mA - 500mA
N
O
N
C
I
M
D
H
R
A
N
E
VCC5B
VCC5B_HDMI
U110
HDMI_CLKP_CONN
9
HDMI_CLKN_CONN
4
7
HDMI_DATA0P_CONN
5
6
OUT
GND
ILIM
6
5
C1426
3
1
EN
FAULT#
4
R1119
61.9K_0201_1%
4.7U_0402_6.3V6M
HDMI_DATA0N_CONN
10
IN
2
C994
1
HDMI_DATA0N_CONN
2
TPS2553DBVR_SOT23-6
1
HDMI_CLKN_CONN
HDMI_DATA0P_CONN
1
2
2
D284
HDMI_CLKP_CONN
0.1U_0201_6.3V6K
1
2
3
8
PUSB3F96_XSON10_2.5X1~D
ESD@
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
HDMI CONNECTOR
Thursday, August 13, 2015
1
Sheet
30
of
102
5
4
3
2
1
VCC3B
PEDET (PE_DTCT)
SATA Device
PCIe Device
D
GND
Open
2
D
-PE_DTCT
-PE_DTCT [10]
1
1
R2037
10K_0201_5%
PE_DTCT
2
3
Q178
LSK3541G1ET2L_VMT3
VCC3B
C
C
SVT_C_EC023
[10] PCIE4_L3_TXN
[10] PCIE4_L3_TXP
[10]
[10]
[60]
[10]
[10]
PCIE4_L2_RXN
PCIE4_L2_RXP
-SSD_DTCT
PCIE4_L2_TXN
PCIE4_L2_TXP
[10] PCIE4_L1_RXN
[10] PCIE4_L1_RXP
[10] PCIE4_L1_TXN
[10] PCIE4_L1_TXP
[10] PCIE4_L0_SATA1_RXP
[10] PCIE4_L0_SATA1_RXN
[10] PCIE4_L0_SATA1_TXN
[10] PCIE4_L0_SATA1_TXP
[12] -PCIE4_CLK_100M
[12] PCIE4_CLK_100M
PCIE4_L3_RXN
PCIE4_L3_RXP
PCIE4_L3_TXN
PCIE4_L3_TXP
PCIE4_L2_RXN
PCIE4_L2_RXP
-SSD_DTCT
PCIE4_L2_TXN
PCIE4_L2_TXP
C2166
C2167
1
1
2 0.22U_0201_6.3V6M PCIE4_L3_TXN_CONN
2 0.22U_0201_6.3V6M PCIE4_L3_TXP_CONN
C2168
C2169
1
1
2 0.22U_0201_6.3V6M PCIE4_L2_TXN_CONN
2 0.22U_0201_6.3V6M PCIE4_L2_TXP_CONN
C2042
C2041
1
1
2 0.22U_0201_6.3V6M PCIE4_L1_TXN_CONN
2 0.22U_0201_6.3V6M PCIE4_L1_TXP_CONN
C805
C827
1
1
2 0.22U_0201_6.3V6M PCIE4_L0_SATA1_TXN_CONN
2 0.22U_0201_6.3V6M PCIE4_L0_SATA1_TXP_CONN
PCIE4_L1_RXN
PCIE4_L1_RXP
PCIE4_L1_TXN
PCIE4_L1_TXP
PCIE4_L0_SATA1_RXP
PCIE4_L0_SATA1_RXN
PCIE4_L0_SATA1_TXN
PCIE4_L0_SATA1_TXP
-PCIE4_CLK_100M
PCIE4_CLK_100M
B
PE_DTCT
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
1_GND
3_GND
5_PETN3
7_PETP3
9_GND
11_PERN3
13_PERP3
15_GND
17_PETN2
19_PETP2
21_GND
23_PERN2
25_PERP2
27_GND
29_PETN1
31_PETP1
33_GND
35_PERN1
37_PERP1
39_GND
41_PETN0/SATA_B+
43_PETP0/SATA_B45_GND
47_PERN0/SATA_A49_PERP0/SATA_A+
51_GND
53_REFCLKN
55_REFCLKP
57_GND
3.3V_2
3.3V_4
N/C_6
N/C_8
DAS/DSS#_10
3.3V_12
3.3V_14
3.3V_16
3.3V_18
N/C_20
N/C_22
N/C_24
N/C_26
N/C_28
N/C_30
N/C_32
N/C_34
N/C_36
DEVSLP_38
N/C_40
N/C_42
N/C_44
N/C_46
N/C_48
PERST#_50
CLKREQ#_52
PEWAKE#_54
RESERVED_56
RESERVED_58
67_N/C_1
69_PEDET
71_GND
73_GND
75_GND
SUSCLK_68
3.3V_70
3.3V_72
3.3V_74
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
VCC3B
2
[10] PCIE4_L3_RXN
[10] PCIE4_L3_RXP
ME@
R2038
10K_0201_5%
1
JSSD1
SATA1_DEVSLP [10]
-PLTRST_FAR
-PLTRST_FAR [13,34,46,58,65,66,67]
-CLKREQ_PCIE4 [12]
B
60
62
64
66
68
2
LCN_DAN05_67216-S103
1
2
C92
10U_0402_6.3V6M
1
@
C53
0.01U_0201_6.3V7K
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
M.2 SSD SLOT
Thursday, August 13, 2015
1
Sheet
31
of
102
5
4
3
2
1
USB_PWR_S1
1
0_0201_5%
USB3P0_RXP_CONN
RJ90
2
@
1
0_0201_5%
USB3P0_RXN_CONN
[10] USB3P0_RXN
10
11
12
13
2
C771
1
2
C773
1
150U_B2_6.3VM_R35M
@
USBP0-_CONN
[10] USB3P0_RXP
ME@
SSTX+
VBUS
SSTXD+
GND_DRAIN
DGND
SSRX+
GND
GND
GND
SSRXGND
0.1U_0201_6.3V6K
2
USBP0+_CONN
9
1
8
3
7
2
6
4
5
0.1U_0201_6.3V6K
USB3P0_TXN_CONN
RJ91
JUSB1
USB3P0_TXP_CONN
0_0201_5%
)
0_0201_5%
1
A
1
@
m
@
2
0 N
2
RJ92
0
RJ93
USB3P0_TXN_C
5 N
USB3P0_TXP_C
1 0.1U_0201_6.3V6K
IN CO
1 0.1U_0201_6.3V6K
C263 2
M( B
S
C293 2
[10] USB3P0_TXN
N
R U
[10] USB3P0_TXP
E R
T
T EA
A N
P
E CE
L
ID A
W P
D
D
1
+
C1248
2
SINGA_2UB4008-900101F
USB_PWR_S1
FLJ18
USBP0+_AOU
2
USBP0-_AOU
1
EMI@
2
3
D231
USBP0+_CONN
4
3
D229
USBP0-_CONN
1
6
4
2
3
10
USB3P0_TXP_CONN
2
9
USB3P0_TXN_CONN
USB3P0_RXP_CONN
5
1
USB3P0_TXN_CONN
4
7
USB3P0_RXP_CONN
USB3P0_RXN_CONN
1
USB3P0_TXP_CONN
5
6
USB3P0_RXN_CONN
4
MCF12102G900-T_4P
3
PUSB2X4D_SO6-6
ESD@
8
PUSB3F96_XSON10_2.5X1~D
ESD@
C
C
0_0201_5%
USB3P2_RXP_CONN
1
0_0201_5%
USB3P2_RXN_CONN
10
11
12
13
C772
1
2
C774
1
150U_B2_6.3VM_R35M
1
@
2
0.1U_0201_6.3V6K
@
2
0.1U_0201_6.3V6K
2
RJ94
R
RJ95
[10] USB3P2_RXN
ME@
SSTX+
VBUS
SSTXD+
GND_DRAIN
DGND
SSRX+
GND
GND
GND
SSRXGND
O )
USBP2-_CONN
[10] USB3P2_RXP
C m
9
1
8
3
7
2
6
4
5
T A
USB3P2_TXN_CONN
E
N 00
JUSB2
USB3P2_TXP_CONN
0_0201_5%
N 5
0_0201_5%
1
R
1
@
O
C IN
@
2
T
2
RJ96
B M
S (
U N
RJ97
USB3P2_TXN_C
R E
USB3P2_TXP_C
1 0.1U_0201_6.3V6K
A
E T
1 0.1U_0201_6.3V6K
C298 2
N PA
USBP2+_CONN
E
C E
[10] USB3P2_TXN
A D
L I
C325 2
[10] USB3P2_TXP
P W
USB_PWR_S2
1
+
C1269
2
SINGA_2UB4008-900101F
D230
USB_PWR_S2
USB3P2_TXP_CONN
USBP2+
[10] USBP2-
B
2
USBP2-
[10] USBP2+
1
EMI@
2
1
3
4
USBP2-_CONN
10
2
9
USB3P2_TXN_CONN
USBP2+_CONN
4
3
6
1
USB3P2_TXN_CONN
D80
1
FLJ19
USB3P2_TXP_CONN
USB3P2_RXP_CONN
2
4
7
USB3P2_RXN_CONN
5
USB3P2_RXP_CONN
5
6
USB3P2_RXN_CONN
B
3
MCF12102G900-T_4P
3
4
8
PUSB2X4D_SO6-6
ESD@
PUSB3F96_XSON10_2.5X1~D
ESD@
VCC5M
A
C3
2
@
-2
N
G
le
g
D
S
in
9
C
6
3
.0
2
S
P
T
0
B
S
U
o
U
5
1
F
1
8
A
4
5
G
T
M
G
USB_PWR_S2
f
I
USB_PWR_S1
T
0.1U_0201_6.3V6K
1
2
C179
E
1
L
A
B
C257
T
0.1U_0201_6.3V6K
e
t:
4.7U_0402_6.3V6M
1
2
rg )
a
T 5
4
it 2.
im -
L
t .1
n 2
e (
1
u .
@
C1291
rr 3A
2
C 2
4.7U_0402_6.3V6M
VCC5M
U53
1
2
3
4
U88
[59] -AOU_IFLG
[10] -USB_PORT0_OC0
[59] USB_ON2
[59] AOU_SEL1
A
[59] AOU_SEL2
1
9
13
4
5
6
7
8
IN
STATUS#
FAULT#
ILIM_SEL
EN
CTL1
CTL2
CTL3
OUT
DP_IN
DM_IN
DM_OUT
DP_OUT
ILIM_LO
ILIM_HI
GND
T-PAD
12
10
11
2
3
15
16
14
17
USBP0+_AOU
USBP0-_AOU
R1114
R1104
1
1
[59] USB_ON1
2 2.7M_0201_5%
2 22.1K_0201_1%
USB_ON1
USBP0- [10]
USBP0+ [10]
GND
IN#2
IN#3
EN
GND
OUT#8
OUT#7
OUT#6
OC#
9
8
7
6
5
-USB_PORT1_OC1
-USB_PORT1_OC1 [10]
TPS2069CDGNR-2_MSOP8
A
TPS2546RTER_QFN16_3X3
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
USB POWER/CONN
Thursday, August 13, 2015
1
Sheet
32
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
33
of
102
5
4
3
2
1
D
D
SVT_C_EC005
VCC3GBE
s
e
o
N
R2028
1
1
2
-V
le
v
il
n
so
ck
Ja
M
-L
i
e
ll
v
n
so
ck
Ja
3
1
U
Short Pattern
@
-CLKREQ_PCIE3
38
39
C2466 1
C2467 1
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
PCIE3_TXP_C
PCIE3_TXN_C
41
42
PERp
PERn
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
LANWAKE_N
LAN_DISABLE_N
VCC3GBE
SVR_EN_N
RSVD1_VCC3P3
VDD3P3_IN
2
2
R172
1K_0201_5%
11
40
22
16
8
B
FL40
1
2
4.7UH_NRS2012T4R7MGJ_20%
7
49
WGI219LM-SLKJ3-A0_QFN48_6X6
R176
3.01K_0201_1%
SVT_C_EC028
1
1
C48
12P_0201_50V8J
1
25MHZ_10PF_8Y25000010
VSS_EPAD
2
43
E
3
2
47
46
37
ID
GND
CTRL0P9
C286
1
2 1U_0402_6.3V6K
W
OUT
IN
C212 1
TEST_EN
RBIAS
2
15
19
29
D
GND
VDD0P9_40
VDD0P9_22
VDD0P9_16
VDD0P9_8
C267
1
4
N
1
1
VDD0P9_11
2
5
A
4
2
VCC3GBE
2 4.7K_0201_5%
T
12
XTAL_OUT
XTAL_IN
VDD0P9_43
R178 1
T
0
0
4
2
1
Y2
VDD0P9_47
VDD0P9_46
VDD0P9_37
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
1
R
6
0
30
Crystal
C107
12P_0201_50V8J
VCC3LAN
2 0_0201_5%
O N
9
10
C278
1
SVT_C_EC003
MDI_3+ [57]
MDI_3- [57]
1
@ R1857
S E
2 470_0201_5%
32
34
33
35
VDD3P3_15
VDD3P3_19
VDD3P3_29
6
H R
LAN_JTAG_TDI
LAN_JTAG_TDO
2 10K_0201_5%
2 10K_0201_5%
1
2
n
m 10 00
p
8
p 0 2
0 00 1
3
A
F 50 F
p 2 22
0
1 8Y Q
z
H
M C so
5 X p
2 T E
B
MDI_3+
MDI_3-
MDI_2+ [57]
MDI_2- [57]
P
E T
R325 1
@
@
23
24
MDI_1+ [57]
MDI_1- [57]
K P
R171 1
R167 1
MDI_2+
MDI_2-
E A
@
@
LED0
LED1
LED2
LED
26
27
25
JTAG
RJ45_LINKUP
RJ45_ACTIVITY
TP902
TP903
MDI_1+
MDI_1-
20
21
2
C231
1
2
C255
1
0.1U_0201_6.3V6K
2
3
SMB_CLK
SMB_DATA
VDD3P3_4
[57,59] RJ45_LINKUP
[57] RJ45_ACTIVITY
17
18
0.1U_0201_6.3V6K
28
31
2
MDI_0+ [57]
MDI_0- [57]
8
2 100_0201_5%
2 100_0201_5%
-LANWAKE
LANPHYPC
[13] -LANWAKE
[13] LANPHYPC
MDI_PLUS1
MDI_MINUS1
PETp
PETn
MDI_0+
MDI_0-
C
0
X
E
S
S
E
S
R
D
A
D
E
IC
V
D
E
1
1
S
R73
R75
U
SML0_CLK
SML0_DATA
B
M
S
[7] SML0_CLK
[7] SML0_DATA
PE_CLKP
PE_CLKN
13
14
0.1U_0201_6.3V6K
PCIE3_RXP_C
PCIE3_RXN_C
PCIE3_TXP
PCIE3_TXN
[10] PCIE3_TXP
[10] PCIE3_TXN
2 0.1U_0201_6.3V6K
2 0.1U_0201_6.3V6K
MDI
44
45
C49 1
C209 1
C262
1
C
MDI_PLUS0
MDI_MINUS0
PCIE
PCIE3_CLK_100M
-PCIE3_CLK_100M
PCIE3_RXP
PCIE3_RXN
[10] PCIE3_RXP
[10] PCIE3_RXN
2
VPRO@
CLK_REQ_N
PE_RST_N
SMBUS
[12] PCIE3_CLK_100M
[12] -PCIE3_CLK_100M
IC
48
36
-PLTRST_FAR
[13,31,46,58,65,66,67] -PLTRST_FAR
G
O
L
U13
C
22U_0603_6.3V6M
[12] -CLKREQ_PCIE3
0.1U_0201_6.3V6K
1
VCC3GBE
Y
E Y
b H
G P
VCC3LAN
0.1U_0201_6.3V6K
2
2
ty
i
il
a
b
p
a
C
ro
P
v
@
R166
10K_0201_5%
E
B
R29
10K_0201_5%
L
A
T
Short Pattern: R2028
22U_0603_6.3V6M
VCC3B
2
@
C1064
1
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
GBE JACKSONVILLE
Thursday, August 13, 2015
1
Sheet
34
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
35
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
36
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
37
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
38
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
39
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
40
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
41
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
42
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
43
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
44
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
45
of
102
5
4
3
2
1
TYPE-B M.2 CARD FOR WWAN
3042S3 CONNECTOR
VCC3WAN
2
VCC3WAN
3
GND
VPP
I/O
NC
DLSW
DTSW
GND
GND
GND
UIM_RESET
1
2
UIM_PWR
3
V I/O
V I/O
Ground V BUS
V I/O
V I/O
UIM_CLK
6
5
1
2
1
2
1
@RF@
2
D21
2
1
@RF@
VCC3WAN
2
1
GND
GND
GND
GND
C5
C6
C7
C8
UIM_DATA
1
2
6
7
8
9
JAE_SF51S006V4DR1400Q
UIM_DATA
4
PUSB2X4D_SO6-6
ESD@
2
[8] WWAN_CFG2
C
1
ME@
VCC
RST
CLK
NC
3
4
5
RF@
C8535
68P_0201_25V8
33P_0201_25V8J
2 0_0201_5%
2
C269
1
JSIM1
C1
C2
C3
C4
UIM_RESET
2 200_0201_1% UIM_CLK
UIM_DATA
UIM_PWR
1
R1066
33P_0201_25V8J
R795
[8] -WWAN_RESET
[8] WWAN_CFG1
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
-WWAN_DISABLE [58,60]
C268
[10] SSIC_TXN
[10] SSIC_TXP
-WWAN_DISABLE
@RF@
SSIC_TXN
SSIC_TXP
GPIO_5_20
GPIO_6_22
GPIO_7_24
W_DISABLE2#_26
UIM-RFU_28
UIM-RESET_30
UIM-CLK_32
UIM-DATA_34
UIM-PWR_36
DEVSLP_38
GPIO_0_40
GPIO_1_42
GPIO_2_44
GPIO_3_46
GPIO_4_48
(PERST#)_50
(CLKREQ#)_52
(PEWAKE#)_54
RESERVED1_56
RESERVED2_58
COEX3_60
COEX2_62
COEX1_64
SIM DETECT_66
SUSCLK_68
3.3VAUX3_70
3.3VAUX4_72
3.3VAUX5_74
D
33P_0201_25V8J
[10] SSIC_RXN
[10] SSIC_RXP
21_CONFIG_0
23_WAKE_ON_WWAN#
25_DPR
27_GND
29_USB3.0-TX-(PETN1)
31_USB3.0-TX+(PETP1)
33_GND
35_USB3.0-RX-(PERN1)
37_USB3.0-RX+(PERP1)
39_GND
41_SATA-B+(PETN0)
43_SATA-B-(PETP0)
45_GND
47_SATA-A-(PERN0)
49_SATA-A+(PERP0)
51_GND
53_(REFCLKN)
55_(REFCLKP)
57_GND
59_ANTCTRL0
61_ANTCTRL1
63_ANTCTRL2
65_ANTCTRL3
67_RESET#
69_CONFIG_1
71_GND
73_GND
75_CONFIG_2
ESD@
C47
100P_0201_25V8J
C266
SSIC_RXN
SSIC_RXP
1
@RF@
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
[8] WWAN_CFG0
2
R1005
47K_0201_5%
2
4
6
8
10
33P_0201_25V8J
USBP1+_CONN
USBP1-_CONN
2 0_0201_5%
2 0_0201_5%
3.3VAUX1_2
3.3VAUX2_4
FULL_CARD_POWER_OFF#_6
W_DISABLE1#_8
LED#_10
C265
1
1
R794
R793
ME@
1_COFIG_3
3_GND
5_GND
7_USB_D+
9_USB_D11_GND
C623
USBP1+
USBP1-
[10] USBP1+
[10] USBP1-
1
3
5
7
9
11
4.7U_0402_6.3V6M
[8] WWAN_CFG3
1
JWWAN1
D
C
VCC3WAN
@
D52
RCLAMP0502B.TCT_SC75-3
GND
GND
68
69
1
DEREN_40-42258-06711RHF
PLACE NEAR JWWAN1
1
+
@RF@
C8521
220U_B2_6.3VM_R35
2
1
2
C1118
0.1U_0201_10V6K
1
2
C1119
1U_0402_6.3V6K
1
@
C1156
10U_0402_6.3V6M
2
TYPE-A M.2 CARD FOR WLAN / Bluetooth / WiGig
2630S3 CONNECTOR
VCC3WLAN
VCC3B
USBP6+
USBP6-
R790
R792
2 0_0201_5%
2 0_0201_5%
1
1
1_GND
3_USB_D+
5_USB_D7_GND
2
4
6
2
10K_0201_5%
2
ME@
3.3VAUX1_2
3.3VAUX2_4
LED1#_6
VCC3WLAN
1
R9181
[10] USBP6+
[10] USBP6-
1
3
5
7
1
1
JWLAN1
USBP6+_CONN
USBP6-_CONN
R2380
R591
10K_0201_5%
100K_0201_5%
2
VCC3B
B
B
C2532
C2533
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
WIGIG_DP3N_C
WIGIG_DP3P_C
1
1
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
WIGIG_DP2N_C
WIGIG_DP2P_C
C2468
C2469
1
1
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
PCIE2_TXP_C
PCIE2_TXN_C
[29] WIGIG_HPD
[10] PCIE2_RXP
[10] PCIE2_RXN
[12] PCIE2_CLK_100M
[12] -PCIE2_CLK_100M
[12] -CLKREQ_PCIE2
[13,67] -PCIE_WAKE
[10] PCIE5_L0_TXP
[10] PCIE5_L0_TXN
PCIE2_TXP
PCIE2_TXN
PCIE2_RXP
PCIE2_RXN
PCIE2_CLK_100M
-PCIE2_CLK_100M
-CLKREQ_PCIE2
-PCIE_WAKE
C8448
C8449
1
1
PCIE5_L0_TXP_C
PCIE5_L0_TXN_C
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
[10] PCIE5_L0_RXP
[10] PCIE5_L0_RXN
LED2#_16
GND_18
DP_AUXN_20
DP_AUXP_22
GND_24
DP_ML1N_26
DP_ML1P_28
GND_30
DP_ML0N_32
DP_ML0P_34
GND_36
CLINK RESET#_38
CLINK DATA_40
CLINK CLK_42
COEX3_44
COEX2_46
COEX1_48
SUSCLK_50
PERST0#_52
W_DISABLE2#_54
W_DISABLE1#_56
I2C DATA_58
I2C CLK_60
I2C ALERT#_62
RESERVED_64
PERST1#_66
CLKREQ1#_68
PEWAKE1#_70
3.3VAUX3_72
3.3VAUX4_74
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
2
WIGIG_AUXN [29]
WIGIG_AUXP [29]
WIGIG_DP1N_C
WIGIG_DP1P_C
WIGIG_DP0N_C
WIGIG_DP0P_C
1
C2538 1
C2539
1
C2540 1
C2541
2
2 0.1U_0201_10V6K
0.1U_0201_10V6K
2
2 0.1U_0201_10V6K
0.1U_0201_10V6K
1
2
C1116
0.1U_0201_10V6K
1
2
C1117
1U_0402_6.3V6K
1
@
C1155
10U_0402_6.3V6M
WIGIG_DP1N [29]
WIGIG_DP1P [29]
WIGIG_DP0N [29]
WIGIG_DP0P [29]
-CL_RST_WLAN
CL_DATA_WLAN
CL_CLK_WLAN
SUSCLK_32K
-PLTRST_FAR
-WLAN_RF_KILL
-PCIE_WAKE
-CL_RST_WLAN [7]
CL_DATA_WLAN [7]
CL_CLK_WLAN [7]
SUSCLK_32K [12,58]
-PLTRST_FAR [13,31,34,58,65,66,67]
BDC_ON [58,60]
-WLAN_RF_KILL [58,60]
-CLKREQ_PCIE5 [12]
2
3
[12] PCIE5_CLK_100M
[12] -PCIE5_CLK_100M
17_DP_MLDIR
19_DP_ML3N
21_DP_ML3P
23_GND
25_DP_ML2N
27_DP_ML2P
29_GND
31_DP_HPD
33_GND
35_PERP0
37_PERN0
39_GND
41_PETP0
43_PETN0
45_GND
47_REFCLKP0
49_REFCLKN0
51_GND
53_CLKREQ0#
55_PEWAKE0#
57_GND
59_PERP1
61_PERN1
63_GND
65_PETP1
67_PETN1
69_GND
71_REFCLKP1
73_REFCLKN1
75_GND
@
D109
RCLAMP0502B.TCT_SC75-3
69
GND
GND
2
[10] PCIE2_TXP
[10] PCIE2_TXN
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
68
R2381
100K_0201_5%
1
LCN_DAN05-67216-S100
1
[29] WIGIG_DP2N
[29] WIGIG_DP2P
1
1
C2534
C2535
[29] WIGIG_DP3N
[29] WIGIG_DP3P
A
A
PLACE NEAR JWLAN1
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
PCIE M.2 CARD SLOT
Thursday, August 13, 2015
1
Sheet
46
of
102
5
4
3
2
1
D
D
TABLE
VCC3B_RTS5232S
VCC3B_RTS5232S
Pin name
SVT_C_EC005
Short Pattern: R2465
SD/MMC
MEMORSTICK
SP1
1
2
C1819
0.1U_0201_10V6K
1
2
C1820
4.7U_0402_6.3V6M
1
1
C1822
10U_0402_6.3V6M
R2465
1
2
Short Pattern
@
MS_D1
SD_CLK
MS_D0
SP4
2
C1821
0.1U_0201_10V6K
SD_D0
SP3
SD_CMD
MS_D2
SD_D3
MS_D3
SP6
VCC3B_RTS5232S
SP2
SP5
2
VCC3B
SD_D1
SD_D2
MS_CLK
SP7
C
C
VCC3_MC
2
VCC3B
2
VCC3B
[12] -CLKREQ_PCIE0
[10] PCIE0_RXP
[10] PCIE0_RXN
[10] PCIE0_TXP
[10] PCIE0_TXN
[13] -PLTRST_NEAR
PCIE0_CLK_100M
-PCIE0_CLK_100M
5
6
-CLKREQ_PCIE0
2
PCIE0_RXP
PCIE0_RXN
C441
C258
PCIE0_TXP
PCIE0_TXN
C260
C261
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
1
1
PCIE0_RXP_C
PCIE0_RXN_C
7
8
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
1
1
PCIE0_TXP_C
PCIE0_TXN_C
3
4
-PLTRST_NEAR
1
-PCIE_WAKE_MC
32
REFCLKP
REFCLKN
3V3AUX
3V3_IN
U107
[12] PCIE0_CLK_100M
[12] -PCIE0_CLK_100M
27
11
1
R1865
10K_0201_5%
1
R958
10K_0201_5%
CARD_3V3
DV33_18
CLK_REQ#
HSOP
HSON
SP3
SP4
RTS5232S
HSIP
HSIN
PERST#
SP2
SP1
SP6
SP5
SD_CD#
MS_INS#
WAKE#
SP7
SVT_C_EC003
10
14
AV12
DV12S
2
13
@ R2437
0_0201_5%
B
DV33_18
17
19
SD_MMC_CLK_R
SD_MMC_CMD_R
R675
@ R2438
1
1
2 33_0201_5%
2 0_0201_5%
16
15
21
20
SD_MMC_D0_R
SD_MMC_D1_R
SD_MMC_D2_R
SD_MMC_D3_R
@ R2439
@ R2440
@ R2441
@ R2442
1
1
1
1
2
2
2
2
C1826
1
2 1U_0402_6.3V6K
RREF
GPIO
0_0201_5%
0_0201_5%
0_0201_5%
0_0201_5%
30
31
22
23
24
25
26
SD_MMC_CLK [48]
SD_MMC_CMD [48]
SD_MMC_D0 [48]
SD_MMC_D1 [48]
SD_MMC_D2 [48]
SD_MMC_D3 [48]
-SD_MMC_CD [48]
SVT_C_EC003
29
C219
1
2
6P_0402_50V8D
SDREG2
R1855
NC
28
1
VCC3B
B
2
10K_0201_5%
RTS5232S-GR_QFN32_4X4
2
33
9
NC
NC
NC
NC
NC
AV12
DV12S
E-PAD
1
12
18
1
2
C1823
0.1U_0201_10V6K
1
2
C1824
0.1U_0201_10V6K
1
R1856
6.19K_0201_1%
C1825
4.7U_0402_6.3V6M
1
1
2
2
@
C2563
1U_0402_6.3V6K
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
MEDIA CARD CONTROLLER
Thursday, August 13, 2015
1
Sheet
47
of
102
5
4
3
2
1
D
D
VCC3_MC
C
2
2
C845
0.1U_0201_10V6K
1
JSD1
C863
10U_0402_6.3V6M
1
2
1
C
@
C869
22U_0603_6.3V6M
ME@
VSS
DAT0
DAT1
DAT2
DAT3
CMD
CLK
6
7
8
1
2
SD_MMC_D0
SD_MMC_D1
SD_MMC_D2
SD_MMC_D3
3
5
1
@ R670
2
0_0201_5%
[47]
[47]
[47]
[47]
SD_MMC_CMD [47]
SD_MMC_CLK [47]
SVT_C_EC003
10
11
12
13
GND
GND
GND
GND
VDD
Detect
T-SOL_158-1000902603
4
9
-SD_MMC_CD [47]
2
1
@
C1065
8P_0201_50V8D
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
MEDIA CARD INTERFACE
Thursday, August 13, 2015
1
Sheet
48
of
102
5
4
3
2
1
D
D
VCC5B
VCC5B
C41
0.1U_0201_10V6K
2
SVT_C_EC030
2
F35
0467001.NRHF 1A 32V
1
1
[9] -SC_DTCT
[10] USBP4+
[10] USBP4-
JSCR1
-SC_DTCT
USBP4+
USBP4-
1
2
3
4
5
6
VCC5B_SCR_CN
1
2
3
4
5
6
GND
GND
7
8
CVILU_CF61062D0R0-05-NH
ME@
C
C
2
VCC3B
F8
0467.500NRHF 0.5A 32V
1
SVT_C_EC029
B
B
JFPR1
R
F
P
USBP8+
USBP8-
[10] USBP8+
[10] USBP8-
R800
R799
1
1
1
2
3
4
5
6
7
8
USBP8+_CONN
USBP8-_CONN
FUSEVCC3FP
2 0_0201_5%
2 0_0201_5%
2
1
C208
2.2U_0402_6.3V6M
1
2
3
4
5
6
7
8
GND
GND
9
10
CVILU_CF5508FD0R1-05-NH
ME@
USBP8+_CONN
3
2
USBP8-_CONN
1
D27
PESD5V0U2BT_SOT23-3
ESD@
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
SMART CARD/FPR
Thursday, August 13, 2015
1
Sheet
49
of
102
4
3
2
VCC3_SUS
VCC3BA
LDO3V3
2
0.1U_0201_10V6K
1
1
C8504
1
2
C163
1
AGND
2
C164
1
AGND
VCC5BA
D
1
D
C161
0.1U_0201_10V6K
1U_0402_6.3V6K
VREF1V65
2
4.7U_0402_6.3V6M
5
1
C154
0.1U_0201_10V6K
1
1
VCC5B
AGND
R2031
Short Pattern
@
USE SHAPE
1
2
1
2
C8505
0.1U_0201_10V6K
37
36
12
14
15
1
17
33P_0201_25V8J
VCC3BA
2
LPWR5.0
RPWR5.0
AVDD_5V
FILT_1.65V
AVDD_3.3V
VDDO33
VDD_IO
DVDD33
AVDD_HP
1
33
32
PORT_B_R_LINE
PORT_B_L_LINE
26
25
31
30
HGNDB
HGNDA
PORTD_B_MIC
PORTD_A_MIC
PC_BEEP
DMIC_DAT/GPIO1
DMIC_CLK/MUSIC_REQ/GPIO0
GPIO1/PORTC_R_MIC
MUSIC_REQ/GPIO0/PORTC_L_MIC
2
41
@
R908
10K_0201_5%
HP_R_JACK
HP_L_JACK
HP_R_JACK [51]
HP_L_JACK [51]
2
C43
2
@
2
C244
2
C133
1
CX11852-11Z_QFN40_5X5
2 68_0201_5%
2 68_0201_5%
SVT_C_EC027
C211
RIGHTRIGHT+
R678 1
R677 1
21
20
19
AVEE
FLY_N
FLY_P
LEFT-
HGNDB [51]
HGNDA [51]
PORTD_B_MIC [53]
PORTD_A_MIC [53]
23
22
PORTA_R
PORTA_L
LEFT+
2
1
HP_JD_SYS [52]
SPKR_MUTE#
2
C817
HP_JD_SYS
35
34
1
1
C815
C324
C4
1
VCC3B
2
1
@
1
R124
R2014
Place TOP Layer
- & gt; 0.01 0306_1/3W
Place BOTTOM Layer - & gt; 0.001 0603 1/10W
B
2
@
CX11852-11Z
C
1
1
C259
1
33P_0201_25V8J
2
@
C153
1
38
MICBIASC
MICBIASB
33P_0201_25V8J
2 33_0201_5%
1
40
33P_0201_25V8J
47P_0201_25V8J
10
2
47P_0201_25V8J
R119 1
47K_0201_5%
[26] MIC_DATA
[26] MIC_CLK
2 0.1U_0201_10V6K
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
4.7U_0402_6.3V6M
C2503 1
MIC_DATA
MIC_CLK
2
11
13
16
28
27
29
24
2
7
18
3
RESET#
0.1U_0201_10V6K
39
BEEP_MIX_ATT
C329
1
R9294
5.11K_0402_1%
EP_GND
2 33_0201_5%
-SPK_MUTE
[55] BEEP_MIX_ATT
2
0.1U_0201_10V6K
JSENSE
[58,60] -SPK_MUTE
C34
1
C8503
1U_0402_6.3V6K
5
8
6
4
R169 1
2
CLASS_D_REF
9
HDA_BCLK
HDA_SYNC
HDA_SDIN0
HDA_SDO
[9] HDA_BCLK
[9] HDA_SYNC
[9] HDA_SDIN0
[9] HDA_SDO
C54
1
VCC3B
U8
-HDA_RST
[9] -HDA_RST
1
FILT_1.8V
C
2
C8506
4.7U_0402_6.3V6M
2
C28
2
0.1U_0201_10V6K
4.7U_0402_6.3V6M
1
C8502
2
10U_0402_6.3V6M
VCC5B_CODEC
10U_0402_6.3V6M
VCC3_SUS_CODEC
LDO1V8
1
SVT_C_EC005
Short Pattern: R2031
VCC3B_CODEC
2
C157
10U_0402_6.3V6M
1
AGND
C105
2
0.1U_0201_10V6K
2
R2030
Short Pattern
@
1
2
0.1U_0201_10V6K
2
0.1U_0201_10V6K
C116
1
VCC3B
0.1U_0201_10V6K
Short Pattern: R2029, R2030
2
1
C82
2
SVT_C_EC005
2
10U_0402_6.3V6M
R2029
Short Pattern
@
B
R2014
2
AGND
10U_0402_6.3V6M
Short Pattern
@
0.1U_0201_10V6K
0.1U_0201_10V6K
10U_0402_6.3V6M
1
C1410
1
2
@
1
2
C1413
1
2
2
C1412
SP_OUTR+
FL37 1
C1414
1
BLM18SG260TN1D
2
BLM18SG260TN1D
2
SP_OUTR-
FL38 1
C1411
@
1
FL36 1
BLM18SG260TN1D
2
SP_OUTL+
FL39 1
2
BLM18SG260TN1D
2
SP_OUTL-
0.01U_0201_6.3V7K
AGND
C318
@
1
@
1
C36
2
1
C30
SP_OUTL+ [54]
SP_OUTL- [54]
2
1
C117
2
1
C243
2
1
1000P_0201_25V7K
10U_0402_6.3V6M
2
0.1U_0201_10V6K
1
0.1U_0201_10V6K
10U_0402_6.3V6M
2 C333
2
Short Pattern
@
C127
1000P_0201_25V7K
1
1
A
2
VCC5BA
R2015
1000P_0201_25V7K
Short Pattern: R2014, R2015
C122
VCC5B
SP_OUTR- [54]
SVT_C_EC005
1000P_0201_25V7K
R2015
Place TOP Layer
- & gt; 0.01 0306_1/3W
Place BOTTOM Layer - & gt; 0.001 0603 1/10W
SP_OUTR+ [54]
2
A
C535
1
2
PLACE UNDER CX11852
@
C143 1
2 0.01U_0201_6.3V7K
@
RJ41
1
2
0.01U_0201_6.3V7K
C44
1
2 0.1U_0201_10V6K
@EMI@
C45
1
2 0.1U_0201_10V6K
@EMI@
AGND
AGND
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AGND
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
AUDIO CX11852
Thursday, August 13, 2015
1
Sheet
50
of
102
5
4
3
2
1
NEAR AUDIO CONN
D
D
FL3
HP_L_JACK
[50] HP_L_JACK
1
2
MMZ1005Y152CT_2P
FL5
HP_R_JACK
[50] HP_R_JACK
1
2
2
2
MMZ1005Y152CT_2P
@
R743
220_0201_5%
2
1
1
@
R742
220_0201_5%
C13
1000P_0201_25V7K
1
2
C197
1000P_0201_25V7K
1
AGND
WIDE AND SHORT PATTERN
C
C
2
VCC3B
1
R1867
10K_0201_5%
JHP1
ME@
3
1
HGNDA [50]
5
HP_JACK_IN
6
7 G
HP_JACK_IN [52,58,60]
2
4
HGNDB [50]
SINGA_2SJ3080-039111F
MIC_RING2 [53]
B
2
C125
@EMI@
1
1
1000P_0201_25V7K
2
C124
@EMI@
@EMI@
1
PESD5V0U2BT_SOT23-3
1
1000P_0201_25V7K
2
C123
1000P_0201_25V7K
PESD5V0U2BT_SOT23-3
MIC_SLEEVE [53]
2
2.2U_0402_6.3V6M
3
ESD@
D94
1
ESD@
D24
2
3
2
1
WIDE PATTERN
2
2.2U_0402_6.3V6M
1
C8508
2
1
C8507
R139
100K_0201_5%
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
AUDIO CONNECTOR
Thursday, August 13, 2015
1
Sheet
51
of
102
5
4
3
2
1
D
D
1
@
2
R537
0_0201_5%
AGND
C
C
HP_JD_SYS
2
39.2K_0201_1%
HP_JD_SYS [50]
1
1
R9295
HP_JACK_IN
1
R257
2
22K_0201_5%
Q50
LSK3541G1ET2L_VMT3
2
3
[51,58,60] HP_JACK_IN
2
1
@
C9
2.2U_0402_6.3V6M
AGND
AGND
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
AUDIO JACK SENSE
Thursday, August 13, 2015
1
Sheet
52
of
102
5
4
3
2
1
D
D
[51] MIC_SLEEVE
MIC_SLEEVE
1
R125
PORTD_A_MIC
2
100_0402_5%
PORTD_A_MIC [50]
2@
C1417
1000P_0201_25V7K
1
C
C
[51] MIC_RING2
MIC_RING2
1
R126
PORTD_B_MIC
2
100_0402_5%
PORTD_B_MIC [50]
2@
C142
1000P_0201_25V7K
1
NEAR EXT MIC CONN
1
2
@
R6
0_0201_5%
B
B
AGND
1
C91
2
0.01U_0201_6.3V7K
AGND
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
AUDIO EXT MIC I/F
Thursday, August 13, 2015
1
Sheet
53
of
102
5
4
3
2
1
D
D
JSPK1
SP_OUTL+
SP_OUTLSP_OUTR+
SP_OUTR-
[50] SP_OUTL+
[50] SP_OUTL[50] SP_OUTR+
[50] SP_OUTR-
C
1
2
3
4
5
6
1
2
3
4
C
GND
GND
CVILU_CI4204M2HR0-NH
ME@
2
1
2
C166
220P_0201_25V7K
1
2
C168
220P_0201_25V7K
1
2
C169
220P_0201_25V7K
1
C175
220P_0201_25V7K
PLACE, NEAR SPEAKER CONNECTOR
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
AUDIO SPEAKER
Thursday, August 13, 2015
1
Sheet
54
of
102
5
4
3
2
1
D
D
PCH_SPKR
D51
RB521CM-30T2R_SOD923-2
2
1
2
1
D68
RB521CM-30T2R_SOD923-2
R66
33_0201_5%
2
[9] PCH_SPKR
EC_SPKR
1
[58] EC_SPKR
C
1
C
R67
10K_0201_5%
BEEP_MIX_ATT [50]
1
2
BEEP_MIX_ATT
-BEEP_ENABLE
Q38
LSK3541G1ET2L_VMT3
2
3
[58,60] -BEEP_ENABLE
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
AUDIO BEEP/DAUGHTER CARD
Thursday, August 13, 2015
1
Sheet
55
of
102
5
4
3
2
1
2
VCC3SW
SVT_C_EC003
R420
0_0402_5%
@
D
1
D
U153
4
[8,26,59] -LID_CLOSE
TABLE
OUT1
OUT2
3
VDD
GND
2
CS
Mode Selection
H
[8,60] -TABLET_MODE
2
1
HGDEDM013A_MAP4_1P3X0P9
I2C Mode
L
1
C299
0.1U_0201_10V6K
SPI Mode
VCC3M
VCC3M
VCC3M
30h (W) & 31h (R)
16
15
13
R2082
10K_0201_5%
NC
NC
C2171
10U_0402_6.3V6M
1
14
1
Vdd
Vdd_IO
INT1
INT2
ADC1
ADC2
ADC3
RES
5
2
2
3
CS
SCL/SPC
SDA/SDI/SDO
SDO/SA0
2
C2170
0.1U_0201_10V6K
11
9
ACC2_INT2_1
@
GSENSE_INT [60]
T134
C
10
GND
L
C
32h (W) & 33h (R)
1
H
U121
8
4
6
7
SENSE_SCL
SENSE_SDA
ACC2_SA0
[26,59] SENSE_SCL
[26,59] SENSE_SDA
GND
Address Selection
1
ACC2_SA0
12
TABLE
1
1
2
2
2
R2081
10K_0201_5%
@
R2080
10K_0201_5%
LIS3DHTR_LGA16_3X3
LIS3DHTR Address: 0x30h
VCC3B
VCC3B
B
SVT_C_EC003
2
@
R9313
0_0201_5%
2
R9317
0_0201_5%
2
B
@
R9314
0_0201_5%
1
1
1
@
U152
[8,26] ISH_I2C0_SDA
[8,26] ISH_I2C0_SCL
R9315
R9316
1
1
2 0_0201_5%
2 0_0201_5%
ISH_I2C0_SDA_ACC2
ISH_I2C0_SCL_ACC2
10
9
ACC2_ADDR
D302
[8,26] ISH_GP2
2
1
ACC2_INT
7
6
SDA
SCL
ADDR
INT
RSVD
IO VDD
VDD
DNC
DNC
GND
ACC2_IOVDD
ACC2_VDD
1
5
2
3
4
2
2
RB521CM-30T2R_SOD923-2
8
R9318
0_0201_5%
C8528
1U_0402_6.3V6K
2
1
1
C8529
1U_0402_6.3V6K
1
KXCJ9-1008_LGA10
KXCJ9 Address: 0x1Ch
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
SENSOR INTERFACE
Thursday, August 13, 2015
1
Sheet
56
of
102
4
[67] PROLINK_ID2
[34] RJ45_ACTIVITY
2
-PWRSWITCH
1
0.1U_0201_10V6K
PROLINK_ID2
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
0.1U_0201_10V6K
MDI_3-_CONN
MDI_3+_CONN
RJ45_ACTIVITY
R2360 1
@ C8513
MDI_1-_CONN
MDI_1+_CONN
RJ45_LINKUP
2 680_0402_5%
1
2
0.1U_0201_10V6K
R2361 1
@ C8518
2 680_0402_5%
1
2
0.1U_0201_10V6K
MDI_0-_CONN
MDI_0+_CONN
[70,71] -DOCK_PWRDCT
-PWRON_DOCK
GND_3
POWER_20V_2
GND13
GND14
GND
GND
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
D280 1
1
2 RB521CM-30T2R_SOD923-2
-DOCK_ATTACHED_3SW
RJ173 1
RJ145 1
@
@
2 0_0402_5%
2 0_0402_5%
USBP3USBP3+
USB3P3_TXN_CONN
USB3P3_TXP_CONN
RJ169 1
RJ170 1
@
@
2 0_0402_5% USB3P3_TXN_C
2 0_0402_5% USB3P3_TXP_C
C2154
C2155
1
1
2 0.1U_0201_10V6K USB3P3_TXN
2 0.1U_0201_10V6K USB3P3_TXP
USB3P3_RXN_CONN
USB3P3_RXP_CONN
RJ171 1
RJ172 1
@
@
2 0_0402_5% USB3P3_RXN_C C2547
2 0_0402_5% USB3P3_RXP_C C2548
1
1
2 0.1U_0201_10V6K USB3P3_RXN
2 0.1U_0201_10V6K USB3P3_RXP
DOCK_DP3N
DOCK_DP3P
C841
C843
1
1
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
DOCK_DDIP2_3N
DOCK_DDIP2_3P
DOCK_DP2N
DOCK_DP2P
C883
C887
1
1
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
DOCK_DDIP2_2N
DOCK_DDIP2_2P
DOCK_DP1N
DOCK_DP1P
C901
C900
1
1
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
DOCK_DDIP2_1N
DOCK_DDIP2_1P
DOCK_DP0N
DOCK_DP0P
C903
C902
1
1
2 0.1U_0201_10V6K
2 0.1U_0201_10V6K
DOCK_DDIP2_0N
DOCK_DDIP2_0P
D279 1
1
2
@ C8515
1
2
ACDC_ID_DOCK
-DOCK_ATTACHED_3SW [69]
USBP3- [10]
USBP3+ [10]
USB3P3_TXN [10]
USB3P3_TXP [10]
USB3P3_RXN [10]
USB3P3_RXP [10]
DOCK_DDIP2_3N [28]
DOCK_DDIP2_3P [28]
DOCK_DDIP2_2N [28]
DOCK_DDIP2_2P [28]
DOCK_DDIP2_1N [28]
DOCK_DDIP2_1P [28]
DOCK_DDIP2_0N [28]
DOCK_DDIP2_0P [28]
DOCK_PWR20_IN
54
56
58
NEAR EDGE CONN
0.1U_0201_10V6K
@ C8514
-DOCK_ATTACHED_3M [59,60]
USBP3-_CONN
USBP3+_CONN
2
-DOCK_PWRDCT
2 RB521CM-30T2R_SOD923-2
ACDC_ID_DOCK
0.1U_0201_10V6K
@ C8517
0.1U_0201_10V6K
2
2
[60] ACDC_ID_DOCK
57
ADAPTER_ID_2
DOCKED#_2
GND_5
USB2_DN
USB2_DP
GND_6
USB3_TXN
USB3_TXP
GND_7
USB3_RXN
USB3_RXP
GND_8
DP_LANE3N
DP_LANE3P
GND_9
DP_LANE2N
DP_LANE2P
GND_10
DP_LANE1N
DP_LANE1P
GND_11
DP_LANE0N
DP_LANE0P
GND_12
RESERVED_2
2
ESD@
D285
1
1
R36
100K_0201_5%
DRAPH_DK11276-D22A4-1H
2
ESD@
D297
PESD5V0U2BT_SOT23-3
C
1
D261
@
C8516
0.1U_0201_10V6K
DOCK_DP0P
10 DOCK_DP0P
2
9
DOCK_DP0N
DOCK_DP1P
4
7
DOCK_DP1P
DOCK_DP1N
PESD5V0U2BT_SOT23-3
1
DOCK_DP0N
1
[67] -PWRON_DOCK
DOCK_DDIP2_HPD
GND_4
RESERVED_1
DOCK_DETECT_ID_1
POWER_CONSUMP
POWER_BUTTON#
DOCK_DETECT_ID_2
LAN_MDI3N
LAN_MDI3P
RJ45_ACTIVITY
LAN_MDI2N
LAN_MDI2P
GND_1
LAN_MDI1N
LAN_MDI1P
RJ45_LINKUP
LAN_MDI0N
LAN_MDI0P
GND_2
DP_AUXN
DP_AUXP
DP_HPD
DOCK_PWRON#
DOCK_PWRGOOD
POWER_5V
DOCKED#_1
ADAPTER_ID_1
2
0.01U_0201_6.3V7K
C
55
POWER_20V_1
5
6
DOCK_DP1N
3
1
C8457
[28] DOCK_DDIP2_HPD
53
DOCK_DDIP2_AUXN
DOCK_DDIP2_AUXP
3
[28] DOCK_DDIP2_AUXN
[28] DOCK_DDIP2_AUXP
2
2
2
1
20K_0201_1%
1
2
1
D
1
1
@ C8512
2
2
@ C8511
R9215
470K_0201_5%
ME@
2
1
R9216
470K_0201_5%
JPRO1
0.1U_0201_10V6K
MDI_2-_CONN
MDI_2+_CONN
[34,59] RJ45_LINKUP
1
VCC3SW
3
[17,62,66,67] -PWRSWITCH
C8509
@ C8510
DOCK_CONSUMP
VCC3M
2
[71] DOCK_CONSUMP
100P_0201_25V8J
1
DOCK_PWR20_IN
VCC5B_DOCK_FUSE
[60] PROLINK_ID1
PROLINK_ID1
F27
SVT_C_EC024
D
VCC3M
2
R2377
1
PTC
20K_0201_1%
2
1.1A_6V_PICOSMDC110S-2
1
R35
100K_0201_1%
VCC3SW
1
VCC5M
2
VCC3B
3
R2376
5
8
@
PUSB3F96_XSON10_2.5X1~D
ESD@
NEAR EDGE CONN
D287 / D244
NEAR EDGE CONN
D262
DOCK_DP2P
10 DOCK_DP2P
2
9
DOCK_DP2N
DOCK_DP3P
4
7
DOCK_DP3P
DOCK_DP3N
B
1
DOCK_DP2N
5
6
DOCK_DP3N
B
3
8
MDI_0-_CONN
D244
1
2
MDI_0+_CONN
3
V I/O
V I/O
Ground V BUS
V I/O
V I/O
MDI_2-_CONN
6
MDI_1-_CONN
5
2
MDI_2+_CONN
4
MDI_1+_CONN
PUSB2X4D_SO6-6
ESD@
[34] MDI_0+
[34] MDI_0-
D287
1
3
V I/O
V I/O
Ground V BUS
V I/O
V I/O
6
MDI_3-_CONN
PUSB3F96_XSON10_2.5X1~D
ESD@
5
4
MDI_3+_CONN
PUSB2X4D_SO6-6
ESD@
FLJ14
MDI_0+
1
MDI_0-
2
NEAR EDGE CONN
EMI@
1
4
2
3
4
MDI_0+_CONN
3
MDI_0-_CONN
D258
USB3P3_TXN_CONN
[34] MDI_1+
[34] MDI_1-
MDI_1+
FLJ15
1
MDI_1-
2
MDI_2+
1
MDI_2-
2
MDI_3+
1
MDI_3-
2
1
4
2
3
10 USB3P3_TXN_CONN
2
9
USB3P3_TXP_CONN
USB3P3_RXN_CONN
4
7
USB3P3_RXN_CONN
USB3P3_RXP_CONN
EMI@
1
USB3P3_TXP_CONN
MCF12102G900-T_4P
5
6
USB3P3_RXP_CONN
MDI_1+_CONN
4
3
MDI_1-_CONN
4
MDI_2+_CONN
3
MDI_2-_CONN
4
MDI_3+_CONN
3
MDI_3-_CONN
3
8
MCF12102G900-T_4P
[34] MDI_2+
A
[34] MDI_2-
FLJ16
1
2
EMI@
4
3
PUSB3F96_XSON10_2.5X1~D
ESD@
A
MCF12102G900-T_4P
[34] MDI_3+
[34] MDI_3-
FLJ17
1
2
EMI@
4
3
Compal Secret Data
Security Classification
MCF12102G900-T_4P
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
PRO LINK
Thursday, August 13, 2015
1
Sheet
57
of
102
VCC3B
2
1
VCC3M
2
10K_0201_5%
2
4.7K_0201_5%
2
4.7K_0201_5%
2
10K_0201_5%
2
10K_0201_5%
VCC3M
2
10K_0201_5%
3
2
10K_0201_5%
4
2
10K_0201_5%
5
D
D
1
R9180
CLKRUN#
SER_IRQ
LRESET#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
LFRAME#
PCI_CLK
LAD0
LAD1
LAD2
LAD3
[7,66] LPC_AD[3:0]
VCI_IN2#/GPIO161
BAT_FET_HOT
K1
R62
R63
1
1
2 100_0201_5%
2 100_0201_5%
E8
B8
L4
G7
-LED_LOGO
-LED_PWR
[26] -LED_LOGO
[62] -LED_PWR
F5
-LED_MICMUTE
[61] -LED_MICMUTE
C3
D12
-LED_FNLOCK
[69] LED_AC_CHG
C5
LED_AC_CHG
[69] LED_AC_CON
H2
LED_AC_CON
[61] -LED_CAPSLOCK
F6
-LED_CAPSLOCK
[61] -LED_FNLOCK
H1
GPIO133
SMB02_DATA
SMB02_CLK
GPIO134
GPIO224
GPIO143/SMB04_DATA
GPIO144/SMB04_CLK
GPIO024
GPIO035
GPIO145/JTAG_TDI
GPIO146/JTAG_TDO
GPIO034
GPIO147/JTAG_CLK
2
100K_0201_5%
2
100K_0201_5%
2
100K_0201_5%
2
20K_0201_5%
2
100K_0201_5%
1
R1014
1
R8939
1
R1802
1
R2473
C
KBD_BL_PWM [61]
-KBD_BL_DTCT [61]
F11
R412 1
2 33_0201_5%
IPDCLK
IPDCLK [62]
K13
R153 1
2 33_0201_5%
IPDDATA
IPDDATA [62]
J7
-PAD_RESET
A13
TP4_RESET
C12
BYPASS_PAD
C9
VGA_BLON
A8
BACKLIGHT_ON
C11
BDC_ON
A11
-WWAN_DISABLE
C10
-WLAN_RF_KILL
-PAD_RESET [62]
TP4_RESET [61,62]
BYPASS_PAD [62]
VGA_BLON [3]
BACKLIGHT_ON [26]
BDC_ON [46,60]
-WWAN_DISABLE [46,60]
-WLAN_RF_KILL [46,60]
GPIO221
GPIO225
PWM2/GPIO055
GPIO166
GPIO226
GPIO171/MSDATA
EC_SPKR
J8
D10
R2434
1
2
0_0201_5%
E10
R2435
1
2
0_0201_5%
-BEEP_ENABLE [55,60]
-SPK_MUTE
HP_JACK_IN
2
10K_0201_5%
2
2
1
1
1
1
R2383
@
-SPK_MUTE [50,60]
B
HP_JACK_IN [51,52,60]
2
2
@
R2476
10K_0201_5%
EC_SPKR [55]
-BEEP_ENABLE
K5
2
1 OF 3
1
-HOTKEY [61]
LED1/GPIO157
MEC1653-TN-TR_WFBGA169
2
2
100K_0201_5%
1
R1107
-KBD_BL_DTCT
LED0/GPIO156
GPIO170/MSCLK
@
R2475
10K_0201_5%
KBD_BL_PWM
A6
ADC4/GPIO204
LED
-LED_MUTE
[61] -LED_MUTE
B
A4
GPIO052
ADC1/GPIO201
-HOTKEY
M9
1
C4549
I2C_DATA_CHARGE
I2C_CLK_CHARGE
[71] I2C_DATA_CHARGE
[71] I2C_CLK_CHARGE
PS2_CLK0A/GPIO114
PS2_DAT0A/GPIO115
GPIO223
C2
D20
[70] BAT_FET_HOT
-DOCK_ATTACHED_OP [69,71]
2
100K_0201_5%
H7
GPIO036
SMB00_DATA
SMB00_CLK
1
RB521CM-30T2R_SOD923-2
SENSE0
SENSE1
SENSE2
SENSE3
SENSE4
SENSE5
SENSE6
SENSE7
1
R2474
E7
A7
ADC0/GPIO200
Battery
I2C_DATA_BT
I2C_CLK_BT
[70] I2C_DATA_BT
[70] I2C_CLK_BT
PWM0/GPIO053
N13
J6
N8
J11
J12
J13
M12
M13
2
100K_0201_5%
K3
D803
2
1
R8826
2 1K_0201_5%
LCD
[70] M_TEMP
R439 1
Wireless
M_TEMP
Audio
C
VCC3B
SENSE[7:0] [61]
4700P_0201_6.3V7K
M6
M7
L7
K7
LPCPD#
1
N6
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SMI#
DF2S6P8UFS_1-1L1A2
LPCCLK_EC_24M
[7] LPCCLK_EC_24M
EC_SCI#
220P_0201_25V7K
L6
KBRST
DRV0
DRV1
DRV2
DRV3
DRV4
DRV5
DRV6
DRV7
DRV8
DRV9
DRV10
DRV11
DRV12
DRV13
DRV14
DRV15
220P_0201_25V7K
[7,66] -LPC_FRAME
M5
-LPC_FRAME
[13,31,34,46,65,66,67] -PLTRST_FAR
32KHZ_IN/GPIO165
L11
B7
E6
B6
H12
G10
G9
H13
C6
C7
B5
H10
H11
A5
L13
N12
M11
D5
C196
-PLTRST_FAR
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16/GPIO152
KSO17/GPIO175
C188
N5
RESETI#
HOST I/F
L5
IRQSER
[7,66] IRQSER
H6
-CLKRUN
[7,66] -CLKRUN
N7
-SUS_STAT
[7,66] -SUS_STAT
K6
-EC_WAKE
[8] -EC_WAKE
J5
-EC_SCI
[8] -EC_SCI
B3
-KBRC
[7] -KBRC
VCC3SW
1
R9324
DRV[15:0] [61]
F1
SUSCLK_32K
[12,46] SUSCLK_32K
VCC3M
U23A
-EC_RESET
[67] -EC_RESET
Keyboard/TrackPoint
1
R1212
1
R906
1
R831
1
R8820
1
R8818
1
R274
1
R276
VCC3M
-PLTRST_FAR
A
A
2
@ESD@
1
C8526
100P_0201_50V8J
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
MEC1653(1/3)
Thursday, August 13, 2015
1
Sheet
58
of
102
5
4
3
2
1
2
VCC3SW
R9320
10K_0201_5%
1
1
1
-RSMRST
R2156
VCC3M
1
2 75_0201_5%
-PROCHOT [6,71,75]
D
2
Q199
LSK3541G1ET2L_VMT3
3
VCC3M
2
1
MPWRG
[13,68] MPWRG
Q200
LSK3541G1ET2L_VMT3
VCC3M
place near Q133
VCC3M
PROCHOT_EC
3
R258: 750_1% for New AC Adapter
D
2
Q133
LSK3541G1ET2L_VMT3
E3
-RSMRST
SUS_ON1
C4
-PCH_SLP_S3
G12
F3
BPWRG
[13,27,66,68] BPWRG
SVT_C_EC003
-LID_CLOSE
[8,26,56] -LID_CLOSE
-PCH_SLP_WLAN
[13] -PCH_SLP_WLAN
@ R9312
1
2
A1
A12
M8
RJ45_LINKUP
G3
-DOCK_ATTACHED_3M
[57,60] -DOCK_ATTACHED_3M
2
2.2K_0201_5%
3
1
R2419
SENSE_SCL [26,56]
ADC3/GPIO203
GPIO022
GPIO140/SMB06_CLK
BGPO3/GPIO172
BGPO1/GPIO101
BGPO2/GPIO102
PWM1/GPIO054
FAN_TACH0/GPIO050
FAN_ID
M1
FAN_ID [63]
-SHUTDOWN
N9
FAN_ON
D6
FAN_FRQ
C
FAN_FRQ [63]
VCCST
VREF_VTT
PECI_DAT
VCC3B
Q141
B11
BPWRG
B12
R925 1
D9
R68
F8
R69
B10
2 43_0201_5%
PECI
1
2 100_0201_5%
EC_SDA2
1
2 100_0201_5%
EC_SCL2
DTC015EMT2L_VMT3
PECI [6]
GPIO111
VCC_PWRGD
VCI_IN3#/GPIO000
SMB03_DATA/GPIO007
SMB03_CLK/GPIO010
R8783
4.7K_0201_5%
EC_SDA2 [7]
EC_SCL2 [7]
GPIO043
D3
1
SYS_SHDN#
E12 @ R8782
1
2
C6307
0.1U_0201_10V6K
-THRM
0_0201_5%
GPIO222
SVT_C_EC003
GPIO033
GPIO150/JTAG_TMS
DP1_DN4
G13
DN1_DP4
F13
2
ADC5/GPIO205
GPIO227
DP2_DN5
LED2/GPIO153
DN2_DP5
E13
1
2
C6321
2200P_0201_50V7K
1
C8456
22P_0201_25V8
B
2
C
Remote
DIODE4
D13
2
E
3
J4
PROCHOT_EC
2
R8784
1K_0402_5%
Q198
1
1
N1
-BOOST_MODE
[71] -BOOST_MODE
2
GPIO110
LMBT3904WT1G
ISYS
[71] ISYS
-SHUTDOWN [68]
FAN_ON [63]
0_0201_5%
VCC5_TP_ON
[68] VCC5_TP_ON
[34,57] RJ45_LINKUP
SENSE_SDA [26,56]
1
[13,17,67,84] -PCH_SLP_S4
G11
-PCH_SLP_S4
[13,17,67,80] -PCH_SLP_S3
SENSE_SCL
Remote
DIODE1
1
[81,87] SUS_ON2
B2
SUS_ON2
[68,86] SUS_ON1
SENSE_SDA
22_0201_5%
C6322
22P_0201_25V8
C
2
Q142
LMBT3904WT1G
B
E
3
[13,19] -RSMRST
22_0201_5%
2
1
K12
Sensor
ADC2/GPIO202
Power Management
-PCH_SLP_SUS
2
1
GPIO001/PWM4
C
[13] -PCH_SLP_SUS
1
R2470
3
E2
R2469
C8
2
L2
AC_PRESENT
[13] AC_PRESENT
2
2.2K_0201_5%
2
L9
2 10K_0201_5%
SMB01_CLK/GPIO006
D8
2
1
SMB01_DATA/GPIO005
1
R2090
GPIO106
FAN
ACDC_ID
[69] ACDC_ID
RB521CM-30T2R_SOD923-2
1
2
D7
GPIO127/A20M
Thermal
G2
-EXTPWR
[67,69,71] -EXTPWR
1
R2418
1
R2389
1
R827
D7
-PWRSW_EC
[13] -PWRSW_EC
C246
47P_0201_25V8J
1
2
100K_0201_5%
1
R281
2
10K_0201_5%
2
100K_0201_5%
2
100K_0201_5%
1
RB520CM-30T2R VMN2
1
R935
U23B
@
-PWRSW
[67] -PWRSW
1
@
2
D263
2
10K_0201_5%
1
R278
2
10K_0201_5%
1
R1152
1
R2388
2
1
R258
750_0201_1%
2
100K_0201_5%
2
R990
100K_0201_5%
B
B
C
Q143
1
1
Q145
LMBT3904WT1G
B
E
1
R59
2
2 OF 3
MEC1653-TN-TR_WFBGA169
1
2
C6325
2200P_0201_50V7K
1
1
E
C6327
22P_0201_25V8
Remote
DIODE6
B
2
C
Q144
2
Remote
DIODE3
1
LMBT3904WT1G
E11
C6329
22P_0201_25V8
2
C
Q146
LMBT3904WT1G
B
E
@
ESD5Z3.3T1G_SOD523-2
TABLE
Sensor
DIODE0
DIODE1
DIODE2
DIODE3
DIODE4
DIODE5
DIODE6
A
Issued Date
Device
EC internal
CPU DC/DC
SSD
DIMM
FAN/HEATPIPE
WLAN/WWAN
CHARGER
Place on
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
BOTTOM
BOTTOM
A
Compal Secret Data
Security Classification
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
4
3
2
Compal Electronics, Inc.
MEC1653(2/3)
Size Document Number
Custom
Rev
0.5
LA-C581P
Date:
5
C
2
D11
BGPO5/GPIO174
VSET
C6328
22P_0201_25V8
3
3
B
2
Remote
DIODE5
GPIO220/VIN
2
E
C6326
22P_0201_25V8
1
1
3
2
100K_0201_5%
2
C6324
2200P_0201_50V7K
1
2
100K_0201_5%
BGPO4/GPIO173
1
2
10K_0201_5%
2
100K_0201_5%
1
R2387
2
Remote
DIODE2
D77
2
1
R2384
100K_0201_5%
1
R2386
2
1
2
100K_0201_5%
E4
1
R2385
B4
USB_ON2
[32] USB_ON2
B13
GPIO025/UART_CLK
USB/AOU
USB_ON1
[32] USB_ON1
DN3_DP6
GPIO016
1
R8880
H9
4.53K_0201_1%
L8
-AOU_IFLG
[32] -AOU_IFLG
2
AOU_SEL2
[32] AOU_SEL2
C13
LMBT3904WT1G
GPIO015/PWM7
1
R8792
M10
3
DP3_DN6
AOU_SEL1
[32] AOU_SEL1
Thursday, August 13, 2015
1
Sheet
59
of
102
5
4
3
2
1
SVT_C_EC005
VCC3M
VCC3M_EC
2 10_0402_5%
B9
GPIO012/SMB07_DATA
GPIO131/SMB10_CLK
GPIO013/SMB07_CLK
2
A9
R8796
10K_0201_5%
GPIO142/SMB05_CLK
-WIN_BTN
[26] -WIN_BTN
E5
GPIO135
F2
GPIO056/PWM3
ADC7/GPIO207
GPIO051/FAN_TACH1
ADC8/GPIO210
2
100K_0201_5%
K9
ECSPI_MISO
K8
-ECSPI_SS
-SSD_DTCT
D2
-INTRUDER_EC
G1
-TABLET_MODE
B1
2
750_0201_1%
1
R9306
-PCH_SLP_LAN
F10
-PCH_SLP_LAN [13]
C
ADC11/GPIO213
ADC13/GPIO215
SPI_CLK
ADC14/GPIO216
SPI_MOSI
ADC15/GPIO217
M3
R9307
1
2
10K_0201_5%
N3
ACDC_ID_DOCK [57]
J2
PROLINK_ID1
K2
GSENSE_INT
L1
-AUDIO_VOL_UP
L3
-AUDIO_VOL_DN
PROLINK_ID1 [57]
GSENSE_INT [56]
-AUDIO_VOL_UP [62]
-AUDIO_VOL_DN [62]
M2
N2
VCC3M
M4
-EC_SLP_LAN
N4
-EC_SLP_LAN [67]
SPI_MISO
SPI_CS#
1
R263
L10
E1
2
J9
ECSPI_MOSI
[67] ECSPI_MOSI
[67] ECSPI_MISO
@
R1209
100K_0201_5%
VCC3M
1
C1
-BATLOW
EC_PWRREQ [67]
2
100K_0201_5%
2
100K_0201_5%
B
1
R1208
2
10K_0201_5%
1
R2404
2
10K_0201_5%
2
10K_0201_5%
2
10K_0201_5%
2
10K_0201_5%
1
R2416
1
R2415
1
R2414
1
R2417
2
10K_0201_5%
-BATLOW [13]
@
1
R2413
2
1
R2398
@
1
R2412
D301
@
ESD5Z3.3T1G_SOD523-2
1
2
10K_0201_5%
2
10K_0201_5%
3 OF 3
1
R2410
MEC1653-TN-TR_WFBGA169
1
R2397
VCI_IN6#/GPIO167
1
R2411
D4
2
10K_0201_5%
BGPO0
VCI_IN5#/GPIO235
2
10K_0201_5%
2
10K_0201_5%
EC_PWRREQ
VCI_IN4#/GPIO234
VSS0
VSS1
VSS2
VSS_RO
2
10K_0201_5%
D1
1
R2394
2
10K_0201_5%
2
10K_0201_5%
2
10K_0201_5%
@
1
R2393
1
R2409
1
R2408
1
R2449
@
1
R2448
2
10K_0201_5%
A2
VCI_OUT
VCI_IN1#/GPIO162
BGND
[8,56] -TABLET_MODE
B
VCI_IN0#/GPIO163
A3
[13] -INTRUDER_EC
VSS_ADC
[31] -SSD_DTCT
VBAT
K4
1
R8797
ADC10/GPIO212
JTAG_RST#
H5
G5
F7
G4
2
10K_0201_5%
ECSPI_CLK
[67] ECSPI_CLK
[67] -ECSPI_SS
C931
GPIO062
ADC12/GPIO214
2
1
A10
SPI
0.1U_0201_10V6K
-JTAG_RST
B_ON [66,67,80,82]
N11
GPIO105/UART_RX
ADC9/GPIO211
VIDEO_ID
B_ON
K11
GPIO104/UART_TX
ADC6/GPIO206
N10
1
@
L12
GPIO141/SMB05_DATA
GPIO023
F9
C295
2
GPIO130/SMB10_DATA
VCC3M
C
1
1
H4
VR_CAP
J1
J3
H3
F12
VTR_REG
VTR_FLASH
F4
VBAT
AVTR_ADC
VREF_ADC
2
10K_0201_5%
1
R2392
2
2
10K_0201_5%
1
R2391
E9
I2C_CLK_GSENSE_SH
[8] I2C_CLK_GSENSE_SH
VCC3M
@
D300
RB520CM-30T2R VMN2
GPIO014/PWM6
I2C_DATA_GSENSE_SH
[8] I2C_DATA_GSENSE_SH
D
1
2
10K_0201_5%
1
R2390
G6
G8
H8
2
100K_0201_5%
1
R1105
U23C
J10
1
VCC3M
SVT_C_EC003
K10
2
Short Pattern
@
@
R8780
0_0402_5%
@
VTR
VTR_18
VTR_LPC
2
1M_0201_5%
1
R1804
2
2
100K_0201_5%
1
R1106
R8779
0_0402_5%
2
R2032
1
VCC3M_EC
1
1
2
10K_0201_5%
1
R2359
VCC3M_EC
VCC3M_EC
0.01U_0201_6.3V7K
2
VCC3SW
0.1U_0201_6.3V6K
1
C291
4.7U_0402_6.3V6M
2
2
C294
Trace FIFO Debug Port
Enable
Disable
R2434
22_5%
0_5%
R2435
22_5%
0_5%
R420
No_ASM
ASM
D
C290
10U_0402_6.3V6M
1
VCC3SW
0.1U_0201_6.3V6K
VCC3M
2
VCC3M
C292
1
R288
Short Pattern: R2032
VCC3M
A
2
10K_0201_5%
2
10K_0201_5%
@
@
@
TP916
@
TP915
@
TP910
@
TP912
@
TP911
@
1
R2431
@
TP914
1
R2430
@
TP909
2
10K_0201_5%
@
TP908
1
R2429
@
TP907
1
R8830
@
TP906
2
49.9_0201_1%
Change R2413 to NO ASM
@
TP913
JTAG Debug Port
Enable
BDC_ON
-WWAN_DISABLE
-WWAN_DISABLE [46,58]
-WLAN_RF_KILL
-WLAN_RF_KILL [46,58]
-DOCK_ATTACHED_3M
-DOCK_ATTACHED_3M [57,59]
-BEEP_ENABLE
-BEEP_ENABLE [55,58]
-SPK_MUTE
Logic
ASM
NO_ASM
ASM
NO_ASM
ASM
NO_ASM
NO_ASM
ASM
ASM
R2429
R2430
R2431
BDC_ON [46,58]
Disable
R8796
R8797
R8830
ASM
ASM
ASM
NO_ASM
NO_ASM
NO_ASM
NO_ASM
NO_ASM
NO_ASM
A
-SPK_MUTE [50,58]
HP_JACK_IN
HP_JACK_IN [51,52,58]
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
MEC1653(3/3)
Thursday, August 13, 2015
1
Sheet
60
of
102
5
4
3
2
1
D
D
2
VCC3M
F25
0467.500NRHF 0.5A 32V
SVT_C_EC030
1
SVT_C_EC029
VCC3M
2
15K_0201_5%
1
R8992
-LED_CAPSLOCK
[58] -HOTKEY
[58] -LED_MICMUTE
[58] -LED_MUTE
[58] -LED_FNLOCK
1
2 100_0201_5%
-HOTKEY
-LED_MICMUTE
-LED_MUTE
-LED_FNLOCK
[58] -LED_CAPSLOCK
C
R2450
R994
R41
R103
1
1
1
2 680_0201_5%
2 680_0201_5%
2 100_0201_5%
DRV11
DRV8
DRV10
DRV12
DRV9
DRV13
DRV15
DRV5
DRV7
DRV6
DRV3
DRV1
[58] DRV[15:0]
[58] SENSE[7:0]
SENSE5
DRV2
DRV4
SENSE0
SENSE2
DRV0
SENSE1
SENSE4
DRV14
SENSE6
SENSE7
SENSE3
VCC5B
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
2
0467001.NRHF 1A 32V
F23
2
2
0.01U_0201_6.3V7K
1
C296
GND
GND
F13
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
JKB1
34
33
0467001.NRHF 1A 32V
2
10K_0201_5%
2
15K_0201_5%
1
R8991
VCC5_TP
1
R324
2
15K_0201_5%
1
R8990
2
4.7K_0201_5%
2
15K_0201_5%
1
R8989
1
R294
2
15K_0201_5%
1
R8988
C8482
0.1U_0201_6.3V6K
2
4.7K_0201_5%
2
15K_0201_5%
1
R8987
1
1
R293
2
15K_0201_5%
1
R8986
VCC5_TP
2
VCC3M_KEY_CONN
2
15K_0201_5%
1
R8985
VCC5_TP
JTP1
14
13
[58] -KBD_BL_DTCT
[58] KBD_BL_PWM
[62] TP4CLK
[58,62] TP4_RESET
[62] TP4DATA
12
11
10
9
8
7
6
5
4
3
2
1
-KBD_BL_DTCT
KBD_BL_PWM
TP4CLK
TP4_RESET
TP4DATA
GND
GND
C
12
11
10
9
8
7
6
5
4
3
2
1
JAE_FL10F012HA1R3000-W
ME@
1
2
2
C8308
220P_0201_25V7K
1
2
C8285
22U_0603_6.3V6M
1
C8286
22U_0603_6.3V6M
JAE_FL10F032HA2R3000
ME@
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
KEYBOARD/TRACK POINT
Thursday, August 13, 2015
1
Sheet
61
of
102
5
4
3
2
1
TO SUB BOARD
VCC3M
VCC3M_PEN
F31
1
2
PTC 0.35A_6V_PICOSMDC035S-2
D
D
VCC3M_BUTTON
VCC5B
2
2 330_0603_5%
VCC3M_BUTTON
d
a
p
k
l
ic
C
13
14
2
2
1
R9194
100K_0201_5%
1
2
3
4
5
6
7
8
9
10
11
12
R9195
100K_0201_5%
1
1
FUSEVCC5B
-PAD_RESET
IPDCLK
IPDDATA
TP4_RESET
BYPASS_PAD
-PAD_RESET
IPDCLK
IPDDATA
TP4_RESET
BYPASS_PAD
1
2
3
4
5
6
7
8
9
10
11
12
1
2
TP4DATA
TP4CLK
SMB_DATA_3B
[61] TP4DATA
[61] TP4CLK
[22,66] SMB_DATA_3B
[58]
[58]
[58]
[58,61]
[58]
JCP1
SMB_CLK_3B
[22,66] SMB_CLK_3B
1
VCC3M
F15
0467.500NRHF 0.5A 32V
R25
4.7K_0201_5%
1
R24
4.7K_0201_5%
R9309
SVT_C_EC029
2
VCC3B
JBTN1
1
2
3
4
5
6
-LED_PWR
-PWRSWITCH
-AUDIO_VOL_UP
-AUDIO_VOL_DN
[58] -LED_PWR
[17,57,66,67] -PWRSWITCH
[60] -AUDIO_VOL_UP
[60] -AUDIO_VOL_DN
GND
GND
1
2
3
4
5 G1
6 G2
7
8
CVILU_CI2006M2HRA-NH
ME@
CVILU_CF5512FD0R0-05-NH
ME@
C
3
1
D26
PESD5V0U2BT_SOT23-3
@ESD@
1
D25
PESD5V0U2BT_SOT23-3
@ESD@
2
TP4CLK
3
TP4DATA
IPDCLK
2
IPDDATA
C
VCC3B
2
SVT_C_EC029
B
B
F17
0467.500NRHF 0.5A 32V
1
VCC3M_PEN
JNFC1
13
12
FUSEVCC3B
SMB_DATA_3B
SMB_CLK_3B
2
C
F
N
NFC_INT
-NFC_DTCT
NFC_ON
[8] NFC_INT
[7] -NFC_DTCT
[8] NFC_ON
GND
GND
11
10
9
8
7
6
5
4
3
2
1
JPEN1
1
2
1
2
G1
G2
3
4
CVILU_CI4202M2HRP-NH
ME@
CVILU_CF5511FD0R1-05-NH
ME@
1
R1215
100K_0201_5%
11
10
9
8
7
6
5
4
3
2
1
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
LA-C581P
Date:
5
4
3
2
Compal Electronics, Inc.
TOUCH PAD/NFC/BUTTON/PEN J
Thursday, August 13, 2015
1
Sheet
62
of
102
Rev
0.5
5
4
3
2
1
D
D
VCC5B
FAN CURRENT
IS 0.5A MAX
C
C
2
FUSE 2.0A
2
1
F4
2A_32V_0438002.WR
1
C8534
100P_0201_25V8J
@RF@
JFAN1
VCC5B_F4
[59] FAN_ON
[59] FAN_FRQ
[59] FAN_ID
1
2
3
4
5
FAN_ON
FAN_FRQ
FAN_ID
1
2
3
4
5
G1
G2
6
7
CVILU_CI4305M2HR0-NH
ME@
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
FAN CONNECTOR
Thursday, August 13, 2015
1
Sheet
63
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
64
of
102
5
4
3
2
1
VCC3_SUS
D
2
D
R2444
Short Pattern
@
SVT_C_EC005
1
Short Pattern: R2444
2
VCC3_SUS_TPM
2
@
R2347
10K_0201_5%
1
C379
0.1U_0201_10V6K
[13,31,34,46,58,66,67] -PLTRST_FAR
[10] -TPM_IRQ
[7,21] SPI_CLK
[7] -SPI_CS2
[7,21] SPI_MOSI_IO0
[7,21] SPI_MISO_IO1
2
1
1
C2497
10U_0402_6.3V6M
U39
-PLTRST_FAR
17
-TPM_IRQ
18
SPI_CLK
R2344
1
2
33_0201_5%
SPI_CLK_2_R
19
-SPI_CS2
R2343
1
2
33_0201_5%
-SPI_CS2_R
20
SPI_MOSI_IO0
R2345
1
2
33_0201_5%
SPI_MOSI_IO0_2_R
21
SPI_MISO_IO1
R2346
1
2
33_0201_5%
SPI_MISO_IO1_2_R
24
6
7
2
9
23
32
33
C
RST#
PIRQ#
SCLK
CS#
MOSI
MISO
GPIO
PP
GND
GND
GND
GND
PAD
VDD
VDD
VDD
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
8
22
3
4
5
10
11
12
13
14
15
16
25
26
27
28
29
30
31
R2482
1
2
10K_0201_5%
C
TABLE
S IC SLB9670VQ1.2 FW6.40 VQFN 32P TPM
Pin No
TCG
PTP Spec (v38)
Infineon
SLB9670VQ1.2 FW 6.40
Nuvoton
NPCT650LB0YX
1
2
3
4
5
6
7
8
B
VDD
GND
NC
NC
NC
GPIO
PP
VDD
9
10
11
12
13
14
15
16
-Change FW version of Infineon TPM to 6.40
-Change Nuvoton parts number to NPCT650LB0YX
VDD
GND
GPIO
GPIO
NC
VNC/GPIO
GPIO/VDD
VDD
GND
VNC
NC
NC
VNC/GPIO
VDD
NC
GND
GND
NC
NC
NC
NC
NC
NC
NC
GND
NC
NC
Reserved
GPIO4
VDD
DNC
GND
RST#
PIRQ#
SCLK
CS#
MOSI
VDD
GND
MISO
SPI_RST#
SPI_PIRQ#
SCLK
SCS#
MOSI
VDD
GND
MISO
NC
NC
NC
NC
NC
NC
NC
GND
NC
NC
(SERIRQ)
DNC
GPIO0
GPIO1
NC
GND
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SPI_RST#
SPI_PIRQ#
SPI_CLK
SPI_CS#
MOSI
VDD
GND
MISO
NC
NC
NC
NC
VNC/ GPIO
VNC/ GPIO
VNC
GND
VSB
NC
GPX/GPIO2
PP
TEST
GPIO3
NC
VDD
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
DISCRETE TPM 1.2
Thursday, August 13, 2015
1
Sheet
65
of
102
5
4
3
2
1
TABLE
REF DES
ENABLE
JLPC1
ASM
NO_ASM
R220
SVT_C_EC001
DISABLE
ASM
NO_ASM
D
D
LOGIC
SVT_EC004
JLPC1
LPCCLK_DEBUG_24M
[7] LPCCLK_DEBUG_24M
[7,58]
[7,58]
[7,58]
[13,31,34,46,58,65,67]
[60,67,80,82]
1
3
5
7
9
11
13
-LPC_FRAME
-CLKRUN
IRQSER
-PLTRST_FAR
B_ON
-LPC_FRAME
-CLKRUN
IRQSER
-PLTRST_FAR
B_ON
15
1
3
5
7
9
11
13
2
4
6
8
10
12
14
2
4
6
8
10
12
14
-PWRSWITCH
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
-PWRSWITCH [17,57,62,67]
-SUS_STAT
LPC_AD[3:0] [7,58]
-SUS_STAT [7,58]
16
G1 G2
HRS_DF12-14DP-0P5V
@ME@
C
C
VCC3B
2
2
R177
10K_0201_5%
R45
10K_0201_5%
1
SMB_CLK_3B
1
R30
10K_0201_5%
1
1
R150
10K_0201_5%
[22,62] SMB_CLK_3B
VCC3_SUS
2
2
VCC5M
U21
5
Vcc
A
B
4
OE
GND
1
SMB_CLK
2
SMB_CLK [7]
3
B
B
NS5B1G385DFT2G
[22,62] SMB_DATA_3B
SMB_DATA_3B
U31
5
Vcc
A
B
4
BPWRG
OE
GND
SMB_DATA
2
SMB_DATA [7]
3
1
[13,27,59,68] BPWRG
1
C25
0.01U_0201_6.3V7K
2
NS5B1G385DFT2G
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
LA-C581P
Date:
5
4
3
2
Compal Electronics, Inc.
SMBUS SWITCH/LPC DEBUG POR
Thursday, August 13, 2015
1
Sheet
66
of
102
Rev
0.5
5
4
3
2
1
VCC3SW
VCC3B
1
-EXTPWR_ASIC
2 47K_0201_5%
2
R53
R302
10K_0201_5%
1
VL5
VCC3SW
D
D
2
10K_0201_5%
D2
CPUCORE_ON_ASIC
1
1
R301
1
CPUCORE_ON
2
CPUCORE_ON [13,75]
2
2
1
2
1
1
100K_0201_5%
1
R821
2
1
R701
2
1
100K_0201_5%
100K_0201_5%
R2406
-EXTPWR
2
C283
2
C273
1
RB521CM-30T2R_SOD923-2
0.01U_0201_6.3V7K
D3
-PCH_SLP_S3
C254
Q65
LSK3541G1ET2L_VMT3
0.01U_0201_6.3V7K
VCC3SW
2
3
[59,69,71] -EXTPWR
0.01U_0201_6.3V7K
RB521CM-30T2R_SOD923-2
1
2
C529
1000P_0201_25V7K
U101A
-PWRSW_ASIC
F8
-PCIE_WAKE
[13,46] -PCIE_WAKE
A7
F7
C6
EC_PWRREQ
[68,69] DISCHARGE
C9
DISCHARGE
[57] PROLINK_ID2
C8
PROLINK_ID2
[26] -TOUCH_DISABLE
C7
-TOUCH_DISABLE
[60] EC_PWRREQ
E4
A8
PWRON_DOCK#
PME#
EC_RST#
-EC_RESET
-EC_RESET [58]
PGPIO0
PGPIO1
MTRCL
PGPIO2
STRCL
PGPIO3
BATCRG
H3
G3
BAT_CRG
B7
BAT_CRG [72]
PGPIO4
PGPIO5
NC1
NC2
NC3
NC4
SPIMOSI
SPISS#
G5
TEST
1
B6
-PWRON_DOCK [57]
H9
R921
1
2
33_0201_5%
ECSPI_CLK
H8
R928
1
2
33_0201_5%
ECSPI_MOSI
G8
R931
1
2
33_0201_5%
-ECSPI_SS
G7
R463
1
2
0_0201_5%
ECSPI_MISO
ECSPI_CLK [60]
ECSPI_MOSI [60]
-ECSPI_SS [60]
ECSPI_MISO [60]
B
VCC3SW
2
2
VCC3M
-PWRON_DOCK
B_ON [60,66,80,82]
PWRSW#
2
2
1
R1882
100K_0201_5%
B8
A_ON [82,83,85]
C
PLTRST#
TC62D517XBG_BGA080W080A80
R711
100K_0201_5%
E6
CPUCORE_ON_ASIC
SUS_PWR_ACK
SPIMISO
B
B_ON
SLP_M#
SPICLK
A1
A9
J1
J9
E9
2
-PLTRST_FAR
[13,31,34,46,58,65,66] -PLTRST_FAR
VCCLAN_ON [68]
1
H6
C
CPUON
M_ON [74]
R907
F6
BON
SLP_LAN#
A_ON
2
-PCH_SLP_M
[13,17] -PCH_SLP_M
AON
SLP_S5#
F9
1
G6
VCCLAN_ON
E8
100K_0201_5%
J8
-EC_SLP_LAN
[60] -EC_SLP_LAN
MEON
SLP_S4#
M_ON
D9
100K_0201_5%
-PCH_SLP_S5
[13,17] -PCH_SLP_S5
SLP_S3#
E7
R890
J7
MON
LANON
2
-PCH_SLP_S4
[13,17,59,84] -PCH_SLP_S4
EXTPWR#
1
H7
100K_0201_5%
-PCH_SLP_S3
[13,17,59,80] -PCH_SLP_S3
F5
R875
-EXTPWR_ASIC
1
R870
4.7K_0201_1%
1
R865
10K_0201_5%
D1
1
2
-PWRSW
-PWRSW [59]
RB521CM-30T2R_SOD923-2
D76
[17,57,62,66] -PWRSWITCH
-PWRSWITCH
1
-PWRSW_ASIC
2
1SS400CMT2R_VMN2M2
2
A
1
C316
0.22U_0201_6.3V6M
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
THINK ENGINE(1/2)
Thursday, August 13, 2015
1
Sheet
67
of
102
5
4
3
2
1
VCC5B
VCC3M
VCC5M
VDD10
VDD10
2
1
0.1U_0201_10V6K
VCC3SW
1
2
1
C210
1
1
VCC5M
2
C64
R751
100_0201_5%
R487
10_0603_5%
C60
0.1U_0201_10V6K
2
2
VREGIN20
0.1U_0201_10V6K
VINT20
R413, R422 : Need Anti-surge Chip Resistors
2
2
1
2
20_0603_5%
D56
2
1
R417
0_0402_5%
1
2
B4
[59] VCC5_TP_ON
G4
[67] VCCLAN_ON
H4
[59,86] SUS_ON1
@ R9192
1
2 0_0201_5%
J5
@ R2407
1
2 0_0201_5%
H5
A2
CP10OUT
RD0_ON/5MUBAY
RD0_DRV/UBAY_DRV
RD1_ON
RD1_DRV
RD2_ON
RD2_DRV
RD3_ON
RD3_DRV
RD4_ON
RD4_DRV
RD6_DRV
RD7_DRV
3P_ON
3P_DRV
3B_DRV
5B_DRV
VINT20
2
C606
D57
2
E1
CP25OUT
1U_0603_25V7K
D64
1
RB521CM-30T2R_SOD923-2
2
1
B1
VCPIN25
M1_DRV
M2_DRV
CP25OUT
VCPIN25
S1_DRV
S2_DRV
RB521CM-30T2R_SOD923-2
2
1
1
1
J6
[67,69] DISCHARGE
2
C679
0.01U_0402_25V7K
D7
C336
0.22U_0603_50V7K
CP15OUT2
DISCHARGE
BAT_DRV
DCIN_DRV
SHUTDWNIN#
M_PGS
B_PGS
TH_DTCT
PWRSHUTDWN#
B3
VCC5_TP_DRV [92]
C3
VCC3LAN_DRV [93]
D4
SUS_DRV [92]
D2
D1
VCC3WLAN_DRV [96]
E3
VCC3WAN_DRV [96]
F3
VCC3SW
B5
VCC3B_DRV [95]
VCC5B_DRV [95]
E2
C1
M2_DRV [70]
VCC3B
VCC3M
VCC3P_DRV [26]
A6
C4
F1
C2
F2
B2
BAT_DRV [70]
DCIN_DRV [69]
D6
D5
@ R71
1
2
R859
10K_0201_5%
0_0201_5%
MPWRG [13,59]
BPWRG [13,27,59,66]
D8
-PWRSHUTDOWN [69,71]
SVT_C_EC003
[74] 5M_3M_PWRG
G9
A3
B9
J2
VCC3SW
5M_3M_PWRG
@ R900 1
TC62D517XBG_BGA080W080A80
2 0_0201_5%
2
2
B
2
RT11
540_0402NEW_30%_PRF15BB541NB6RC
1
2
RT9
540_0402NEW_30%_PRF15BB541NB6RC
1
2
TABLE
ID
RT1
RT2
RT3
RT4
RT5
RT6
RT7
RT8
RT9
RT10
RT11
1
RT10
540_0402NEW_30%_PRF15BB541NB6RC
2
RT7
540_0402NEW_30%_PRF15BB541NB6RC
1
2
1
RT8
540_0402NEW_30%_PRF15BB541NB6RC
2
RT5
540_0402NEW_30%_PRF15BB541NB6RC
1
2
1
2
RT3
540_0402NEW_30%_PRF15BB541NB6RC
RT6
540_0402NEW_30%_PRF15BB541NB6RC
A
1
1
1
2
C954
0.1U_0201_10V6K
2
ESD@
1
1
2
2
2
2 0_0201_5%
1
@
RT2
540_0402NEW_30%_PRF15BB541NB6RC
R839 1
C8533
1000P_0201_25V7K
-PWRSHUTDOWN
RT4
540_0402NEW_30%_PRF15BB541NB6RC
1
[59] -SHUTDOWN
RT1
540_0402NEW_30%_PRF15BB541NB6RC
1
R1102
33K_0201_5%
Issued Date
@
C1208
470P_0201_25V7K
B
Target
VCC5M Switching FET
VCC3M Switching FET
CHARGER SWITCHING FET
M_BAT_PWR to BAT PWR12 FET
CHAGEROUT12 to BAT PWR12 FET
VCCSA MOSFET Drver NCP81382
VCCCPUCORE MOSFET Driver NCP81382
VCCCGFXCORE-I MOSFET Driver NCP81382
CPU Die
DOCK PWR20 IN to DOCK_PWR20 FET
DCIN_PWR20_F to CV20_FET
Compal Secret Data
Security Classification
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
4
3
2
A
Compal Electronics, Inc.
THINK ENGINE(2/2)
Size Document Number
Custom
Rev
0.5
LA-C581P
Date:
5
C
D3
DGND1
PGND1
PGND2
AGND1
J3
A4
SW_OFF#
RD5_DRV
F4
C238
1U_0603_25V7K
VDD10
J4
VCC3SW
BAT_VOLT
SVT_C_EC003
[3] PANEL_POWER_ON
2
2
H2
1
C115
1U_0603_25V7K
1
G2
C
A5
C5
2
U101B
H1
G1
1
VCC5M
VCC5B
1
S1
SKRPABE010_4P
1
2
C609
2.2U_0603_25V6K
VREGIN20
VINT20
4
2
C1396
0.1U_0402_25V7K
2
1
R559
1.24M_0402_1%
1
2
C369
470P_0201_25V7K
2
2
2
2
RB521CM-30T2R_SOD923-2
1
R749
2
1
R422
D8
1
RB521CM-30T2R_SOD923-2
2
1
D
VCC5M
C611
1U_0402_6.3V6K
2K_0201_5%
1
1
C616
0.1U_0402_25V7K
33K_0201_5%
3
1
R1729
20_0603_5%
2
1
R1101
R8777
100K_0201_5%
ESR03EZPJ200
1
R522
2
1.78M_0402_1%
VREGIN20
1
R413
20_0603_5%
REFER TO VCPIN25 CIRCUIT
D
Thursday, August 13, 2015
1
Sheet
68
of
102
5
4
3
2
1
DOCK_PWR20
DOCK_PWR20_IN
4.5A max
1
2
3
PQ216
SI7121DN-T1-GE3_POWERPAK8-5
1
2
5
3
2
2
2
PR9217
100_0201_5%
PR9220
200K_0201_5%
VCC3SW
PC8461
0.1U_0402_25V6
D
1
PR9218
100_0201_5%
1
1
2
1
PC8459
0.01U_0402_25V7K
1
PR9216
200K_0201_5%
2
PR9214
470K_0201_5%
AMBER
1
PR9222
470K_0201_5%
PR9219
100K_0201_5%
2
PR9221
100K_0201_5%
1
1
-PWRSHUTDOWN
2
RB520CM-30T2R_VMN2M2
2
1
2
3
GREEN
2
VCC3SW
PLED1
12-22A-S2G6C-A30-2C_ORANGE-YG
D
2
1
2
4
5
1
LED_AC_CON
[58] LED_AC_CON
PR9255
100_0201_5%
1
2
PQ215
SI7121DN-T1-GE3_POWERPAK8-5
4
LED_AC_CHG
[58] LED_AC_CHG
PR9254
100_0201_5%
1
2
1
PQ220
2
2
LSK3541G1ET2L_VMT3
PQ219
2
1
PQ210-G - PQ218-G
DISCHARGE
1
PQ218
@
PQ214
1
1
PD294
LSK3541G1ET2L_VMT3
2
3
3
@
PQ217
LSK3541G1ET2L_VMT3
3
ACDC_ID [59]
-DOCK_ATTACHED_OP
1
3
LSK3541G1ET2L_VMT3
-DOCK_ATTACHED_3SW
2
3
LSK3541G1ET2L_VMT3
C
C
PQ36: needs Vgs = 25V
DCIN_PWR20_F
4
1SS400CMT2R_VMN2M2
1
PR145
100K_0201_5%
VCC3SW
PR9199
@ 0_0402_5%
2
1
1
1
1
VCC3SW
2
PQ210-G - PQ218-G
2
3
2
DISCHARGE2 [69]
2
VCC3SW
LSK3541G1ET2L_VMT3
2
@
PR9209
1M_0201_5%
2
PQ209
3
PQ213
1
1
PR9212
470K_0201_5%
1
1
3
LSK3541G1ET2L_VMT3
1
PQ63
2
LSK3541G1ET2L_VMT3
2
3
PR504
@0_0201_5%
[68,71] -PWRSHUTDOWN
DOCK_PWR20_IN
3
2
3
PQ212
2
1
1
[71] DOCK20_DETL
-DOCK_ATTACHED_OP
1
PQ203
LSK3541G1ET2L_VMT3
PQ79
PR9213
470K_0201_5%
1
2
LSK3541G1ET2L_VMT3
LSK3541G1ET2L_VMT3
1
PQ208
1
PQ78
[69] DISCHARGE2
-DOCK_ATTACHED_OP [58,71]
DCIN_DRV_R
2
DTC015EMT2L_VMT3
PQ210
1
3
PQ62
LSK3541G1ET2L_VMT3
B
[71] DCIN_CURRENT_N
PR9200
1M_0402_5%
1
LSK3541G1ET2L_VMT3
1
3
3
2
[71] DCIN_CURRENT_P
2
@PR662
0_0201_5%
1
2
3
PQ202
LTA015EMFS8T2L_VMT3
2
PQ61
Keep these two signals as a pair routing
1
1
1
2
PR9211
470K_0201_5%
DTA014EMT2L_VMT3
PQ107
PQ51
[59,67,71] -EXTPWR
PR224
100K_0201_5%
2
1
2
1
3
[68] DCIN_DRV
B
2
1
PR340
270_0201_5%
2
Total MLCC capacitance at DCIN connector
is smaller than 1000pF to avoid LC resonance.
@
PR65
0_0402_5%
2
2
1
2
2
C_SVT_EC011
@
PR64
0_0402_5%
1
PQ33
DTC015EMT2L_VMT3
PC8
0.01U_0402_25V7K
2
PR77
100_0201_5%
PR78
100_0201_5%
1
2
PC93
0.47U_0402_25V6K
2
2
PR222
1
PR143
2
1M_0201_5%
PR369
PD13
1
1
1
PC72
1000P_0201_25V7K
PR380
0.01_1206_1%
1
2
5
CV20
3
2
PC1088
100P_0201_25V8J
5
1
470K_0201_5%
1
2
1
DRAPH_PJSS0056-PB21H
200K_0201_5%
1
2
2
7A_24VDC_429007.WRML
VINT20
4.5A max
1
2
3
1
1
2
3
PF2
1
PQ36
SIS406DN-T1-GE3_PAK1212-8-5
PQ9
SI7121DN-T1-GE3_POWERPAK8-5
PLACE NEAR CONNECTOR
2
3
4
1
5
6
7
2
POWER
DETECT(ID)
POWER
GND
GND
GND
GND
2 4
4.5A max
PJDCIN
PC101
0.01U_0402_25V7K
1
2
@
NO
NO-ASM
ASM
ASM
ASM
ASM
NO-ASM
NO-ASM
NO-ASM
3
2
LSK3541G1ET2L_VMT3
LSK3541G1ET2L_VMT3
LSK3541G1ET2L_VMT3
3
[67,68] DISCHARGE
DISCHARGE
Compal Secret Data
Security Classification
Issued Date
LOGIC
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
4
3
2
Compal Electronics, Inc.
DC-IN
Size Document Number
Custom
Rev
0.1
LA-C581P
Date:
5
A
3
A
LSK3541G1ET2L_VMT3
1
2
@
PR9300 PQ211
1M_0201_5%
1
YES
PR662
PR369
PQ78
PQ51
2
2
[57] -DOCK_ATTACHED_3SW
3
PEAK SHIFT
PQ206
3
LSK3541G1ET2L_VMT3
TABLE
1
2
Thursday, August 13, 2015
1
Sheet
69
of
102
5
4
3
2
1
D
D
VCC3M
2
PQ13: needs Vgs = 25V
PR328
6.19K_0201_1%
2
M-BAT-PWR
5
1
2
100_0201_5%
I2C_CLK_BT [58]
I2C_DATA_BT [58]
100_0201_5%
PR483
510K_0201_5%
2
PR271
4
2
4
10A_24V_TR-3216FF10-R
PR9201
100_0201_5%
1
2
1
M_TEMP [58]
10
11
PC722
0.01U_0402_25V7K
PR1860
27K_0201_5%
2
2
150K_0201_5%
PR1861
750K_0201_5%
1
1
1
1
PC1827
1500P_0402_50V7K
C
1
PC207
[68] M2_DRV
2
PR638
2
2
@
2200P_0201_50V7K
2
1
PC203
1
PC199
2
390P_0201_25V7K
@
2200P_0201_50V7K
2
1
PC407
390P_0201_25V7K
1
1
PR79
100_0201_5%
FOX_GS73091-10272M-7H
@
C
PQ13
SIS406DN-T1-GE3_PAK1212-8-5
1
2
3
5
2
1
1
2
3
PF12
1
PR273
BAT-PWR12
2
GND
GND
M_BAT_IN
1
2
3
4
5
6
7
8
9
PQ34
SI7129DNT1GE_POWERPAK1212-8-5
2
WIDE PATTERN
PJBATT
1
2
3
4
5
6
7
8
9
VINT20
M-BAT-PWR
5A max
1
MAIN BAT CONN
1
PD251
1SS400CMT2R_VMN2M2
PR9301
2
[68] BAT_DRV
1
VCC3B
PQ224
LTA015EMFS8T2L_VMT3
DCIN_PWR20
3
1
BAT-PWR12
PF9
2
M-BAT-TRCL
3
B
2
1
1
2
0.5A_32V_ERBRD0R50X
@
PR9303
1M_0201_5%
PRT15
540_0402NEW_30%_PRF15BB541NB6RC
@
PR9302
1M_0201_5%
2
PD19
1
2
M-BAT-PWR
BAT_FET_HOT [58]
1
2
2
DAN222MGT2L_VMD3-3
1
1
PC683
2
0.5A_32V_ERBRD0R50X
1
3
PD10
PF5
1
2
DCIN_PWR20_F
PR445
@
0.1U_0201_6.3V6K
VREGIN20
4.7K_0201_5%
1
2
0_0201_5%
Near to PQ13
B
1
DAN222MGT2L_VMD3-3
@
DOCK_PWR20_IN
PD288
2
DOCK_PWR20_F
2
[57,71] -DOCK_PWRDCT
PQ225
LSK3541G1ET2L_VMT3
3
2
1
2
1
DAN222MGT2L_VMD3-3
@
PR9304
1M_0201_5%
3
PF35
1
0.5A_32V_ERBRD0R50X
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
BATTERY INPUT
Thursday, August 13, 2015
1
Sheet
70
of
102
5
4
2
DCIN_CURRENT_P_R
1
PR9206 and PR180 should be placed near R-sense (R1)
1
2
2
PR264
VINT20
Max Current = 3.25(A)
CH_AGND
PC2499
1
1
14
0_0201_5%
15
PR2353
1
2
10K_0201_5%
[59] -BOOST_MODE
16
29
B
@
[57,70] -DOCK_PWRDCT
PR9306 2
PC289
PC253
10U_0805_25V6K
/PROCHOT
GND
CMPIN
ILIM
22
VCC3M
CH_AGND
21
1
2
178K_0201_1%
CMPOUT
SRP
/BATPRES
SRN
/TB_STAT
BATDRV
PWPD
BATSRC
1
@
PR959
2.2_0805_5%
1
1
1
2
1
PC426
2
PC425
2
PC424
2
2
1
10U_0805_25V6K
PMON
2
10U_0805_25V6K
1
2
10U_0805_25V6K
G2
1
0.01_1206_1%
@
PC436
330P_0201_50V7M
PC221
23
2
PQ196
HP8K22TB_HSOP8-7
10U_0805_25V6K
LODRV
7
S1/D2
6
IDCHG
G1
Max Current = 3.5(A)
PR728
PC194
1
CHARGER_OUT12
5A max
10U_0805_25V6K
2
4
1
2
0_0402_5%
27
MPLCG0630L3R3
SPM6530T-3R3M
PL5
3.3UH_MPLCG0630L3R3_6.3A_20%
1
2
PR720
2
CH_AGND
0.047U_0402_25V7K
IADP
470K_0201_5%
[69] DOCK20_DETL
1
PR2356
TOKIN
20
Charge current limit is set to 5.94A
These MLCCs must be placed
symmetrically on Top and Bottom.
19
18
PR2357
17
1
1
PC390
2
1
10_0402_1%
BQ24780SRUYR_WQFN28_4X4
0_0201_5%
@
2
0.1U_0402_25V7K
PR175
VCC3SW
1
PC2504
1
2
VCC3SW
PR2362 2
26
NEC
TDK
1
13
0.1U_0201_6.3V6K
PHASE
2
B
0.1U_0402_25V6
PR2355 2
14.3K_0201_1%
CH_AGND
PC8595
2
1
PR9305
100K_0201_1%
HIDRV
ACOK
1
1
1
10
SCL
2
PR2359
0_0402_5%
2
1 75_0201_5%
1
0_0402_5%
PC806
1
2
PR9315
DOCK_PWR20_IN
PR2197 2
25
2
9
[6,59,75] -PROCHOT
BTST
SDA
2
[75] PSYS
8
ACDET
PC192
PR213
0_0402_5%
2
100P_0201_50V8J
TABLE PL5
1
10U_0805_25V6K
1
1
2
PC26
PC2501
100P_0201_50V8J
CH_AGND
7
24
1
1
5
PC2500
100P_0201_50V8J
PC16
REGN
C
PR2358
12
2
2
1
These MLCCs must be placed
symmetrically on Top and Bottom.
0.1U_0402_25V7K
[59] ISYS
PC2502
1
CMSRC
1
2
2
11
VCC
1
2
2
6
1
2
D1
[58] I2C_CLK_CHARGE
2
5
4
3
3
ACN
28
ACP
PU1
CH_AGND
[58] I2C_DATA_CHARGE
2
1
1
1
1U_0603_25V6K
CH_AGND CH_AGND
10U_0805_25V6K
PR227
66.5k_0201_1%
ACDRV
PC2699
0.1U_0402_10V7K
PC174
2
@
PC745
2
2
1
10U_0805_25V6K
@
PC138
1U_0402_25V6
0.01U_0402_50V7K
PC18
1U_0603_25V6K
1
1
CH_AGND
2
PR584
432K_0201_1%
2
2
PR11
3
CH_AGND
CH_AGND
C
DOCK_CONSUMP [57]
0_0201_5%
PR363, PR688
Need Anti-surge Chip Resistors
1
PQ205
LSK3541G1ET2L_VMT3
CH_AGND
[69]
2
1
PC444
1
2
1
20_0603_5%
1
1
20_0603_5%
1
1U_0402_25V6
0_0201_5%
2
PR688
2
[58,69] -DOCK_ATTACHED_OP
DCIN_CURRENT_N
2
1K_0201_1%
1
PR180
PC447
PR363
2
1
PC2498
47P_0201_25V8J
[69]
2
0_0201_5%
1
PR9206
PR9207
10_0201_1%
PD292
1U_0402_25V6
1
3
LSK3541G1ET2L_VMT3
PD291
2
2
PR9203
1M_0402_5%
PQ181
RB520CM-30T2R_VMN2M2
1
2
RB520CM-30T2R_VMN2M2
1
2
G
2
1
1
2
DCIN_CURRENT_P
2
2
PR9202
1M_0402_5%
2
10_0201_1%
PC22
2
1
DCIN_CURRENT_N_R
[59,67,69] -EXTPWR
1
PR9205
D
1
D
PQ204
RSM002P03GT2L_VMT3
3
1
S
D
PR2349
100K_0201_5%
10U_0805_25V6K
2
0_0603_5%
S2
S2
S2
1
PR2348
100K_0201_5%
1
PR9204
10U_0805_25V6K
@
2
VREGIN20
DOCK_PWR20_IN
DCIN_PWR20_F
VCC3SW
3
CH_AGND
2
CH_AGND
2
0_0402_5%
CH_AGND
1
PR8806
1M_0201_5%
1
C_SVT_EC012
2
2
PR211
100K_0201_1%
1
[68,69] -PWRSHUTDOWN
3
1
2
LSK3541G1ET2L_VMT3
PQ42
3
LSK3541G1ET2L_VMT3
PQ147
A
A
CH_AGND
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
BATTERY CHARGER(BQ24780)
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
Thursday, August 13, 2015
1
Sheet
71
of
102
5
4
3
2
1
D
D
BAT-PWR12
PC223
0.1U_0402_25V7K
2
1
1
4
PR234
470K_0201_5%
2
PQ35
SI7129DNT1GE_POWERPAK1212-8-5
1
2
5
3
5A max
2
CHARGER_OUT12
PR81
100_0201_5%
2
C
C
2
1
1
PR16
39K_0201_5%
1
1
PR129
100K_0201_5%
PR42
1
[67] BAT_CRG
2
2
PQ41
LSK3541G1ET2L_VMT3
PR128
2
1
2
1K_0201_5%
1
1
PD43
1SS400CMT2R_VMN2M2
3
2
200K_0201_5%
PC96
0.033U_0201_6.3V6M
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
CHARGE SELECTOR
Thursday, August 13, 2015
1
Sheet
72
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
73
of
102
4
2
VINT20
These MLCCs must be placed
symmetrically on Top and Bottom.
D
These MLCCs must be placed
symmetrically on Top and Bottom.
VINT20
VCC5M
Max Current = 9(A)
1
PC314
1
2
0.01UF_0402_25V7K
PC240
PC232
10U_0805_25V6K
10U_0805_25V6K
PC2421
@
2
PR895
@
2
1
+
2
C
2
PC483
1
0.1U_0402_25V7K
1
11
DRVL2
12
VIN
13
14
DRVH2
17
VBST1
VBST2
9
2
0_0402_5%
2@
PC229
1
2
0_0402_5%
TPS51285BRUKR_QFN20_3X3
SW1
1000P_0201_25V7K
SW2
PC2410
1
1
0.1U_0402_25V7K
18
PC2409
10
PR112
2
1
6TPE220MAPB Panasonic
TEPSLB20J227M(25)BR NEC-TOKIN
DRVH1
PR392
1
GND_51285
2@
ˢ
16
VO1
PU41
VREG5
1
PR525
100K_0201_1%
15
1000P_0201_25V7K
2
DRVL1
PC2408
1
1
+
2
PR1604
133K_0201_1%
2
ˢ
@
1
2
2
PR386
0_0201_5%
2
PC1306
2
1000P_0201_25V7K
PC768
1
2
5
4
3
@
VCC3M_DL
VCC3M_DH
PR1603
154K_0201_1%
1
2.2UH_SPM6530T-2R2M_8.2A_20%
1
1
VCC5M_DL
VCC5M_DH
2
C_SVT_EC006
MPLCG0630L2R2
SPM6530T-2R2M
1
PC2402
1000P_0201_25V7K
1
2
2
@
PR912
2.2_0603_5%
G2
1
TOKIN
7
S2
S2
S2
2
PR2310
HP8K22TB_HSOP8-7
2
1
G1
0_0402_5%
S2
S2
S2
G2
6
1
PL4
S1/D2
6
3
4
5
2
1
@
PC769
470P_0201_25V7K
PC217
2
1
10U_0805_25V6K
PC495
2
0_0402_5%
2
470P_0201_25V7K
1
NEC
TDK
PQ18
2
PR221
0_0201_5%
@
6TPE220MAPB Panasonic
TEPSLB20J227M(25)BR NEC-TOKIN
1
S1/D2
1
HP8K22TB_HSOP8-7
PQ16
1
1
G1
7
1
1
2
PC1304
+
2
2
2.2UH_SPM6530T-2R2M_8.2A_20%
0.01U_0201_6.3V7K
2
PC511
PC140
+
1
220U_B2_6.3VM_R25M
2
1
220U_B2_6.3VM_R25M
1
+
220U_B2_6.3VM_R25M
2
1
PC2153
PC2420
@
1000P_0201_25V7K
1
C
PR2309
2
2.2_0603_5%
PL3
2
PC227
2
MPLCG0630L2R2
SPM6530T-2R2M
D1
TOKIN
D1
@
C_SVT_EC006
NEC
TDK
2
1
0.01UF_0402_25V7K
PC225
1
2
PC2456
1
2
PC340
1
0.1U_0201_6.3V6K
1
2
Max Current = 2.75(A)
10U_0805_25V6K
PC393
PC392
1
2
10U_0805_25V6K
1
2
10U_0805_25V6K
PC145
2
10U_0805_25V6K
PC502
1
2
0.01UF_0402_25V7K
C_SVT_EC006
10U_0805_25V6K
VL5
Max Current = 9(A)
PC216
VCC5M
7A)
VCC3M
C_SVT_EC006
VINT20
220U_B2_6.3VM_R25M
Max Current = 4.17(A)
9A
(TDC
PC2457
7A)
4.7U_0402_6.3V6M
9A
(TDC
1
220U_B2_6.3VM_R25M
D
3
0.01U_0201_6.3V7K
5
1000P_0201_25V7K
8
PR2308
19
VCLK
PGOOD
Fsw=400kHz
locp = 15.7Atyp
(10.6 - 25.1A)
7
5M_3M_PWRG [68]
PR402
200K _0201_1%
M_ON
CS2
6
Fsw=470kHz
locp = 14.8Atyp
(10.0 - 23.7A)
5
VFB2
EN2
4
VFB1
VREG3
3
TP
1
21
2
[67] M_ON
EN1
CS1
20
PR364
PR299
1
2
2
GND_51285
B
1
1
200_0201_1%
B
1
2
GND_51285
2
10K_0201_1%
10K_0201_1%
GND_51285
2
1
GND_51285
PC406
4.7U_0402_6.3V6M
@
C_SVT_EC013
PR191
1
2
0_0402_5%
GND_51285
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCC5M/VCC3M
Thursday, August 13, 2015
1
Sheet
74
of
102
4
3
1 PR235
1 PR230
1
1 PR231
1
GND_81208
PR2171
1
2
1K_0201_1%
470P_0201_25V7K
1
25.5K_0201_1%
1
4.75K_0201_1%
PC2311
2
PR2170
2
1
PR2173 2200P_0201_25V7K
1
2
1
2
PC2314
470P_0201_25V7K
1
GND_81208
2
PC2312
1
2
3
4
5
6
7
8
9
10
11
12
2
15P_0201_25V8J
PC2313
37.4_0201_1%
1
PLACE CLOSE TO
VCCGT PL30
2
12.4K_0201_1%
NCP03WL224E05RL
2
165K_0201_1%
1
PR2199
2
73.2K_0201_1%
1
PR2198
1
2
2
PC2328
82P_0201_50V8J
PC2302
2
1
SW_1B [78]
1
PR2425
2
PR2161
2
PR2363
2
PR2162
1
PR2189
1
PR2168
PU137
NCP81208-MNTXG_QFN48_6X6
REV: Cab
PWM_1b
DRVON
SCLK
ALERT#
SDIO
VR_HOT#
IOUT_1a
CSP_1a
CSN_1a
ILIM_1a
COMP_1a
VSN_1a
36
35
34
33
32
31
30
29
28
27
26
25
2
0_0201_5%
1
51_0201_5%
1
0_0201_5%
1
10_0201_5%
2
75_0201_5%
2
105K_0201_1%
DRVON
1
PC2308
1
PR2190
1
PR2191
CPUCORE_ON [13,67]
PWM_1B
PWM_1B [78]
DRVON [76,77,78]
SVID_CLK
SVID_CLK [14]
-SVID_ALERT
-SVID_ALERT [14]
SVID_DATA
SVID_DATA [14]
-PROCHOT
2
220P_0201_25V7K
2
3K_0603_0.5%
2
1.4K_0201_1%
SW_1A
SW_1A [76]
PRT16
100K_0201_1%_NCP03WF104F05RL
2
@
PC2412
PC2323
1000P_0201_25V7K
2 0.068U_0201_16V6K
1
1
PR2167
GND_81208
2
2
56.2K_0201_1%
1
PC2506
PC2327
2
PLACE CLOSE TO
VCCCPUCORE PL29
CSN_1A
CSN_1A [76]
1
PR2165
1
PC2304
2
3.92K_0201_1%
2
3.92K_0201_1%
1
PR2192
1
2
2
PC2303
PR232
VSS_SENSE [14]
2
1
VCC_SENSE
2
0_0201_5%
VCC_SENSE [14]
0_0201_5%
B
PC2324
0.1U_0201_10V6K
PR2193
13K_0201_1%
GND_81208
PRT17
100K_0201_1%_NCP03WF104F05RL
PLACE CLOSE TO
VCCCPUCORE PU133
PWM_1A [76]
GND_81208
PWM1_2PH
PC2321
1
2
GND_81208
0_0402_5%
GND_81208
[77]
C_SVT_EC014
GND_81208
PWM1_2PH
2
0.01UF_0402_25V7K
PC2322
1
2
@
PR185
VSS_SENSE
PWM_1A
2_0201_5%
1
PC2305
1000P_0201_25V7K
1
1U_0402_6.3V6K
2
2
1
1000P_0201_25V7K
1
0_0201_5%
1
1K_0402_5%
PR2187
VCC5M
1
2
2.49K_0201_1%
2
715_0201_1%
2
2200P_0201_25V7K
2
PR236
2
PR2186
2
VINT20
GND_81208
1
PR2166
1
GND_81208
1
15P_0201_25V8J
2
1500P_0201_25V7K
1
PR2436
1
PR2164
PC2330
0.1U_0201_10V6K
1
2
1000P_0201_25V7K
2
2
1
48.7K_0201_1%
1
90.9K_0201_0.1%
1
15.8K_0201_1%
1
10K_0201_1%
PLACE CLOSE TO
VCCGT PU134
1
0_0201_5%
1
B
2
PR2202
PR2203
13K_0201_1%
1
PRT19
100K_0201_1%_NCP03WF104F05RL
GND_81208
PR233
0_0201_5%
1
2
PR2182
2
PR2183
2
PR2184
2
PR2185
2
[77] CSP1
PC2325
0.022U_0201_16V6K
1
PR2195
2
PR2194
2
CSP1
1
PC2307
1
24K_0201_5%
1
24K_0201_5%
2
2
1K_0201_1%
1
8.25K_0201_1%
@
PC2700
0.1U_0201_10V6K
2
PR2180
2
PR2181
VCC5M
PC2306
1
1
[77] CSN1
1
PR2196
2
2
10_0201_1%
CSN1
C
-PROCHOT [6,59,71]
GND_81208
1
64.9K_0603_1%
CPUCORE_PWRGD [13,19]
CPUCORE_ON
2
1
0.01U_0201_6.3V7K
0.1U_0201_6.3V6K
2
1
2
PR2159
1
100_0201_5%
2
1
2
47_0201_5%
PR2160
PR2424
0_0201_5%
1
2
PR2188
1
SW_1B
CPUCORE_PWRGD
1
0_0201_5%
2
PR2200
100K_0201_1%_NCP03WF104F05RL
2
1.4K_0201_1%
2
3K_0603_0.5%
1
1
CSP1
1
PR2205
IOUT_2ph
DIFFOUT_2ph
FB_2ph
COMP_2ph
ILIM_2ph
CSCOMP_2ph
CSSUM_2ph
CSREF_2ph
CSP2_2ph
CSP1_2ph
TSENSE_2ph
VRMP
1
PC2329
680P_0201_25V7K
1
PR2204
1
PR2206
13
14
15
16
17
18
19
20
21
22
23
24
2
PRT18
Place near U137
2
PR9173
PR2172
C
PC2331
0.047U_0201_16V6K
2
3300P_0201_25V7K
D
PLACE CLOSE TO
VCCSA PL32
2
PC2309
1
0_0201_5%
@
PR2157
510_0201_5%
CSN_1B [78]
PRT20
2
PR2169
48
47
46
45
44
43
42
41
40
39
38
37
[15] VSSGT_SENSE
2
1
1K_0201_1%
49
VSSGT_SENSE
2
TAB
PC2310
1000P_0201_25V7K
VSN_2ph
VSP_2ph
PSYS
VSP_1b
VSN_1b
COMP_1b
ILIM_1b
CSN_1b
CSP_1b
IOUT_1b
VR_RDY
EN
2
0_0201_5%
VCCST
CSN_1B
VCC
ROSC_COREGT
RSOC_SAUS
PWM1_2ph
PWM2_2ph
ICCMAX_2ph
ICCMAX_1a
ICCMAX_1b
ADDR_VBOOT
PWM_1a
TSENSE_1ph
VSP_1a
VCCGT_SENSE
[15] VCCGT_SENSE
1
20K_0201_5%
VCCSTG
2
2
PR2163
GND_81208
@
1
2
0_0201_5%
1
1 PR229
2
[71] PSYS
2
1
VCCSA_SENSE 2
0_0201_5%
PSYS
[15] VCCSA_SENSE
1
1000P_0201_25V7K
1
PC2319
2
715_0201_1%
2
PC2316
1
2.15K_0201_1%
1
2.15K_0201_1%
2
PC2317
1000P_0201_25V7K
2
2
PC2320
2
1
2
PC2411
0.01U_0201_25V7K
1 PR228
1
PC2318
PC2507
1
27.4K_0201_1%
1
1.5K_0201_1%
VSSSA_SENSE
2
0_0201_5%
[15] VSSSA_SENSE
2
1
VCC5M VCCST
10K_0201_5%
1
15P_0201_25V8J
2
1
PR2176 8200P_0201_25V7K
1
PR2175
1
2200P_0201_25V7K
2
2
PC2315
PR2426
2
PR2174
GND_81208
VCC3B
2
PR2178
1
220P_0201_25V7K
D
2
GND_81208
1000P_0201_25V8J
2
PR2177
GND_81208
1
84.5K_0201_1%
5
GND_81208
TABLE OCP
A
A
R2167 15.8K Ilim=35A VCCCPUCORE
R2205 12.4K Ilim=40A VCCGFXCORE
R2177 27.4K Ilim=10A VCCSA
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC IMVP8 CONTROLLER
Thursday, August 13, 2015
1
Sheet
75
of
102
5
4
3
D
2
1
D
These MLCCs must be placed
symmetrically on Top and Bottom.
Max Current = 3.50(A)
VINT20
VCCCPUCORE
PFL41
+
2
@
2
1
@
2
PC8572
ETPE330MA9GB
PSGB20E337M9
1
10U_0402_6.3V6M
1
Panasonic,
NEC TOKIN
PC8571
TABLE for PC77
10U_0402_6.3V6M
1
PC77
2
330U_B_2.5VM_R9M
1
PC2326
1
2
2
0.1U_0402_25V6
1
PC2267
2
1000P_0201_25V7K
1
PC2266
2
10U_0805_25V6K
1
PC2265
2
10U_0805_25V6K
1
PC2264
2
10U_0805_25V6K
1
PC2263
2
10U_0805_25V6K
PC2299
10U_0805_25V6K
1
2
MPZ1608S300AT_2P
PC8483
0.1U_0402_25V6
PC2262
VINT20_CPUCORE
2
10U_0805_25V6K
1
VCC5M
PR2135
2
2
8pcs 22uF for VCCCPUCORE
2
30
TABLE PL29
[75] PWM_1A
[75,77,78] DRVON
4
@
DRVON
2
PWM
PR223
1
2
2
DISB#
2
GND
GND
SMOD#
PC6402
1
2
PC6401
1
2
PC6400
1
2
22U_0603_6.3V6M
@
PC2422
0.1U_0201_6.3V6K
22U_0603_6.3V6M
Max Current = 28(A)
@
PC2269
1000P_0402_50V7K
CSN_1A
CSN_1A [75]
SW_1A
@
PR2136
2.2_0603_5%
18pcs (+2pcs)
SW_1A [75]
10uF for VCCCPUCORE
VCCCPUCORE
1
2
1
2
PC8561
2
1
10U_0402_6.3V6M
1
PC8560
2
10U_0402_6.3V6M
1
PC8559
2
10U_0402_6.3V6M
1
10U_0402_6.3V6M
2
PC8558
1
10U_0402_6.3V6M
2
PC8557
1
10U_0402_6.3V6M
2
PC8556
1
10U_0402_6.3V6M
2
PC8555
0603 SIZE
ESR03EZPJ2R2
ERJPA3J2R2V
CRCW06032R2JNEAHP
RN73S2CL-2R20-F
10U_0402_6.3V6M
PR2136
PC8554
Rohm
Pana
Vishay
YDS
PC8553
TABLE
B
10U_0402_6.3V6M
1
19
26
3
GL
GL
GL
GL
GL
VCC5M
3
ZOD_EN
8
9
10
11
32
C_SVT_EC015
31
4
2
1
0_0201_5%
0.12UH_MPCH0730LR12_32A_25%
1
22U_0603_6.3V6M
12
13
14
15
16
17
18
22U_0603_6.3V6M
VSW
VSW
VSW
VSW
VSW
VSW
VSW
1
PWM_1A
NCP81382MNTXG_QFN39_4X6
GND
PC6387
1
2
PL29
5
VCCCPUCORE
PC6399
1
2
MPCH0730LR12
PCME063T-R12MS0R627
22U_0603_6.3V6M
NEC TOKIN,
CYNTEC,
VCCD
PC6398
1
2
27
PC6397
1
2
29
22U_0603_6.3V6M
PHASEF
22U_0603_6.3V6M
PHASED
7
C
VCCCPUCORE
PC6396
1
2
28
GH
20
21
22
23
24
25
1
PC2260
2.2U_0402_6.3V6M
1
22U_0603_6.3V6M
1
VCC
PC2268
0.22UF_0402_25V6K
BOOT
6
2
1
PC2261
1U_0402_6.3V6K
VIN
VIN
VIN
VIN
VIN
VIN
PU133
C
THWN
2
2_0201_5%
2
1
1
3.9_0603_1%
PR2133
B
2014/11/04
Deciphered Date
2
1
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
2
2
PC8570
1
1
10U_0402_6.3V6M
PC8569
2
10U_0402_6.3V6M
PC8568
1
A
Title
Compal Electronics, Inc.
DC/DC VCCCPUCORE
Size Document Number
Custom
Rev
0.1
LA-C581P
Date:
5
2
10U_0402_6.3V6M
10U_0402_6.3V6M
PC8567
1
1U_0201_6.3V6K
1
PC8607
2
1U_0201_6.3V6K
1
PC8606
2
1U_0201_6.3V6K
PC8605
PC8604
1U_0201_6.3V6K
1
2
Compal Secret Data
Security Classification
Issued Date
2
1
4pcs 1uF for VCCCPUCORE
VCCCPUCORE
A
2
10U_0402_6.3V6M
1
PC8566
2
10U_0402_6.3V6M
1
PC8565
2
10U_0402_6.3V6M
1
PC8564
2
10U_0402_6.3V6M
1
PC8563
PC8562
2
10U_0402_6.3V6M
VCCCPUCORE
Thursday, August 13, 2015
1
Sheet
76
of
102
5
4
3
2
1
These MLCCs must be placed
symmetrically on Top and Bottom.
VCCGFXCORE_I
9pcs 22uF for VCCGFXCORE_I
22U_0603_6.3V6M
D
330U_B_2.5VM_R9M
D
Max Current = 3.88(A)
VINT20
Panasonic,
NEC TOKIN
VCC5M
PC2515
1
2
22U_0603_6.3V6M
PC2514
1
2
22U_0603_6.3V6M
PC2513
1
2
22U_0603_6.3V6M
PC2512
1
2
22U_0603_6.3V6M
PC2511
1
2
22U_0603_6.3V6M
PC2510
1
2
22U_0603_6.3V6M
PC2509
1
2
PC2108
1
2
22U_0603_6.3V6M
TABLE for PC2508, PC2516
+
2
PC2107
1
2
2
1
22U_0603_6.3V6M
+
PC2516
PC2332
1
2
1
0.1U_0402_25V6
PC2277
1
2
1000P_0201_25V7K
PC2276
1
2
10U_0805_25V6K
PC2275
1
2
10U_0805_25V6K
PC2274
1
2
10U_0805_25V6K
PC2273
1
2
10U_0805_25V6K
1
PC2272
PC2300
10U_0805_25V6K
2
1
PC8484
0.1U_0402_25V6
2
10U_0805_25V6K
1
2
PC2508
VINT20_GFXCORE_IA
2
MPZ1608S300AT_2P
330U_B_2.5VM_R9M
PFL42
1
ETPE330MA9GB
PSGB20E337M9
PR2140
1
PR2138
20pcs (+3pcs) 10uF for VCCGFXCORE_I
30
VCCGFXCORE_I
DISB#
1
2
1
10U_0402_6.3V6M
2
PC8582
10U_0402_6.3V6M
1
PC8581
2
10U_0402_6.3V6M
1
PC8580
2
10U_0402_6.3V6M
1
PC8579
2
10U_0402_6.3V6M
1
PC8578
10U_0402_6.3V6M
2
PC8577
10U_0402_6.3V6M
PC8576
PC8573
2
1
@
PC2423
0.1U_0201_6.3V6K
@
PC2279
1000P_0402_50V7K
VCCGFXCORE_I
CSN1
CSN1 [75]
VCCGFXCORE_I
2
1
2
1
2
1
2
1
2
1
2
1
2
1
10U_0402_6.3V6M
1
PC8592
2
10U_0402_6.3V6M
1
PC8591
2
10U_0402_6.3V6M
1
PC8590
2
10U_0402_6.3V6M
0603 SIZE
ESR03EZPJ2R2
ERJPA3J2R2V
CRCW06032R2JNEAHP
RN73S2CL-2R20-F
PC8589
PR2141
Rohm
Pana
Vishay
YDS
PC8588
TABLE
10U_0402_6.3V6M
CSP1 [75]
10U_0402_6.3V6M
1
B
CSP1
@
PR2141
2.2_0603_5%
PC8587
2
GND
GND
SMOD#
19
26
3
GL
GL
GL
GL
GL
VCC5M
2
ZOD_EN
8
9
10
11
32
C_SVT_EC016
31
1
10U_0402_6.3V6M
2
1
0_0201_5%
2
PC8586
1
2
PC8585
2
3
1
10U_0402_6.3V6M
DRVON
PR225
2
PL30
4
2
PC8584
@
PWM
VSW
VSW
VSW
VSW
VSW
VSW
VSW
1
10U_0402_6.3V6M
4
NCP81382MNTXG_QFN39_4X6
GND
0.15UH PCME063T-R15MS0R907 37A 20%
1
12
13
14
15
16
17
18
2
PC8583
[75,76,78] DRVON
PWM1_2PH
VCCD
10U_0402_6.3V6M
[75] PWM1_2PH
PCME063T-R15MS0R907
1
5
CYNTEC,
PC8575
VCCGFXCORE_I
27
10U_0402_6.3V6M
29
TABLE PL30
PHASEF
PC8574
PHASED
7
C
Max Current = 31(A)
10U_0402_6.3V6M
PC2270
2.2U_0402_6.3V6M
1
PC2280
0.22UF_0402_25V6K
10U_0402_6.3V6M
VCC
GH
20
21
22
23
24
25
THWN
6
1
2
1
2
PU134
PC2271
1U_0402_6.3V6K
28
2
2_0201_5%
1
2
3.9_0603_1%
2
BOOT
1
VIN
VIN
VIN
VIN
VIN
VIN
C
B
VCCGFXCORE_I
1
2
1
1U_0201_6.3V6K
2
PC8603
1
1U_0201_6.3V6K
2
PC8602
1
1U_0201_6.3V6K
2
PC8601
1
1U_0201_6.3V6K
2
PC8600
1
1U_0201_6.3V6K
@
2
PC8599
1
1U_0201_6.3V6K
@
2
PC8598
1
10U_0402_6.3V6M
2
PC8597
PC8594
1
10U_0402_6.3V6M
PC8593
@
2
10U_0402_6.3V6M
6pcs 1uF for VCCGFXCORE-I
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCCGFXCORE_I
Thursday, August 13, 2015
1
Sheet
77
of
102
5
4
3
2
1
D
D
These MLCCs must be placed
symmetrically on Top and Bottom.
Max Current = 0.49(A)
VINT20
PFL44
1
2
1
PC2301
1
2
2
0.1U_0402_25V6
1
PC2296
2
1000P_0201_25V7K
1
PC2295
2
10U_0805_25V6K
1
PC2294
2
10U_0805_25V6K
PC2292
10U_0805_25V6K
2
1
PC8486
0.1U_0402_25V6
PC2293
VINT20_SA
2
MPZ1608S300AT_2P
10U_0805_25V6K
1
6pcs (+2pcs) 22uF for VCCSA
VCC5M
C
PR2148
TDK
NEC TOKIN
VCCD
2
PWM
PR226
1
2
VSW
VSW
VSW
VSW
VSW
VSW
VSW
12
13
14
15
16
17
18
DISB#
@
PC2424
0.1U_0201_6.3V6K
@
PC2298
1000P_0402_50V7K
CSN_1B
2
SMOD#
PC2229
1
2
22U_0603_6.3V6M
PC2228
1
2
22U_0603_6.3V6M
PC2227
1
2
22U_0603_6.3V6M
PC2226
1
2
22U_0603_6.3V6M
CSN_1B [75]
SW_1B
SW_1B [75]
@
PR2151
2.2_0603_5%
1
8
9
10
11
32
B
3
ZOD_EN
GND
GND
3
19
26
VCC5M
GL
GL
GL
GL
GL
C_SVT_EC017
31
4
2
2
1
0_0201_5%
VCCSA
0.68UH_SPM6530T-R68M140KA_16A_20%
1
2
NCP81382MNTXG_QFN39_4X6
PC2232
1
2
DRVON
VCCSA
SPM6530T-R68M140KA
MPLCH0630LR68-T70
1
4
@
PC2225
1
2
[75,76,77] DRVON
PWM_1B
22U_0603_6.3V6M
TABLE PL32
27
PL32
[75] PWM_1B
PC2233
1
2
29
TABLE
Rohm
Pana
Vishay
YDS
22U_0603_6.3V6M
PHASEF
GND
22U_0603_6.3V6M
PC2224
1
2
30
PHASED
5
@
Max Current = 5(A)
PC2290
2.2U_0402_6.3V6M
7
@
PC2297
0.22UF_0402_25V6K
22U_0603_6.3V6M
GH
20
21
22
23
24
25
1
VCC
1
BOOT
6
THWN
2
PC2291
1U_0402_6.3V6K
2
1
PU136
28
2
2_0201_5%
1
2
3.9_0603_1%
2
VIN
VIN
VIN
VIN
VIN
VIN
1
C
VCCSA
PR2150
1
B
PR2151
0603 SIZE
ESR03EZPJ2R2
ERJPA3J2R2V
CRCW06032R2JNEAHP
RN73S2CL-2R20-F
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCCSA(NCP81382)
Thursday, August 13, 2015
1
Sheet
78
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
79
of
102
5
4
3
2
1
D
D
VCC3M
VCC3M
VCC5M
PJ9225
Short Pattern
@
1
2
1
2
PD295
RB521CM-30T2R_SOD923-2
3V3_CPUIO
AGND_CPUIO
VCC3M
VCC3M
PC2361
2
1
10U_0402_6.3V6M
PC2360
2
1
10U_0402_6.3V6M
RB521CM-30T2R_SOD923-2
PC2359
2
1
PC2094
1U_0402_6.3V6K
PC2358
2
1
1
2
2
1
[13,17,59,67] -PCH_SLP_S3
10U_0402_6.3V6M
VCC5M_CPUIO
PD296
0.1U_0201_6.3V6K
1
[60,66,67,82] B_ON
PR2250
5.1_0402_1%
2
2
1
Max Current = 0.59(A)
PR9507
10K_0201_5%
Max Current = 2.73(A)
VCCCPUIO
VCC3M
PL34
1UH_FDSD0420-H-1R0M-P3T_4.9A_20%
1
2
2
Remode_VCCCPUIO
PR2454
100K_0402_5%
Rpg_VCCCPUIO 1
2
3V3_CPUIO
2
PR2451
0_0201_5%
PC2415
1
2
@
0.1U_0201_6.3V6K
PC2099
1
2
NB682GD-C669-Z QFN13_2X3
22U_0603_6.3V6M
2
PC2098
1
2
PR2061
6.8_0402_5%
22U_0603_6.3V6M
1
13
PC2364
1
2
12
22U_0603_6.3V6M
8
C_SVT_EC007
PC2564
0.22UF_0402_25V6K
PC2363
1
2
11
2
7
PG
1
22U_0603_6.3V6M
LP#
AGND
VOUT
9
PC2362
1
2
VIN
3V3
SW
C1
PR2249
10K_0201_5%
1
2
BST
C0
2
6
Cbst_VCCCPUIO
1
10
3
PGND
4
EN
PR2453
3.3_0603_1%
1
2
0.1U_0201_6.3V6K
Rbst_VCCCPUIO
PU118
5
MODE
2
@
PR2248
10K_0201_5%
1
PR2247
10K_0201_5%
1
1
@
PR2246
10K_0201_5%
2
C
2
C
1
Note: PR2061 should be 0ohm if remote sense is not used
PR2452
0_0201_5%
AGND_CPUIO
1
VCCCPUIO_SENSE [15]
PR160
1
2
VSSCPUIO_SENSE [15]
AGND_CPUIO
0_0402_5%
B
B
@
[13,17,82,87] -PCH_SLP_S0
PR153
1
C_SVT_EC018
2
AGND_CPUIO
0_0402_5%
AGND_CPUIO
TABLE : NB682 MODE M1 ( 0 to GND )
LP#
0
1
1
1
1
C1
X
0
0
1
1
C0
X
0
1
0
1
VOUT
0.000V
0.850V
0.875V
0.950V
0.975V
SLP_S0#
LOGIC
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCCCPUIO(NB682)
Thursday, August 13, 2015
1
Sheet
80
of
102
5
4
3
2
1
D
D
VCC5M
2
2
VCC5M
PJ9227
Short Pattern
@
Max Current = 0.8(A)
1
1
PR2273
100_0201_1%
VCC5M_1R0_SUS
VCC5M
2
PC2404
0.1U_0201_6.3V6K
1
PC2403
22UF_0805_6.3V6M
6
7
8
PC2406
0.1U_0201_6.3V6K
1
15
2
2 0.1U_0201_10V6K
PL38
0.47UH_FDSD0420-H-R47M-P3T_6.7A_20%
1
2
PC2407
22U_0603_6.3V6M
1
1
2
3
4
5
2
9 PC2399 1
@
PC2413
0.1U_0201_6.3V6K
FIN
PGND1
PGND2
PGND3
FB
21
16
AGND_1R0_SUS
18
19
20
RES
AGND
13
12
2
PVCC1
PVCC2
PVCC3
AVCC
BST
SW1
SW2
SW3
SW4
SW5
@
PC2401
1000P_0201_25V6K
C
C_SVT_EC008
PGD
SS
RS
1
EN
17
2
VCC1R0_SUS
1
14
10
PU142
11
[59,87] SUS_ON2
Max Current = 3.6(A)
PR2274
100K_0201_1%
1
AGND_1R0_SUS
C
2
2
2
1
1
PC2400
1000P_0201_25V6K
BD91364BMUU-ZE2_VQFN20_4X4
PC2405
1
2
AGND_1R0_SUS
220P_0201_25V6K
AGND_1R0_SUS
PR2276
150K_0201_1%
1
2
@
PR161
1
2
PR2275
37.4K_0201_1%
1
2
C_SVT_EC019
PR162
1
2
0_0402_5%
AGND_1R0_SUS
0_0402_5%
B
B
AGND_1R0_SUS
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCC1R0_SUS
Thursday, August 13, 2015
1
Sheet
81
of
102
5
4
3
2
1
D
D
VCC5M
VCC5M
2
2
VCC1R0_SUS
1
VCCST
C2414
0.1U_0201_10V6K
VCC3M
C2411
0.1U_0201_6.3V6K
1
VCCSTG
D
S
VDD
U144
3
1
VDD
3
R2280
10K_0201_5%
1
U143
C
1
2
VCC1R0_SUS
D
S
4
C
4
CAP
5
1
2
2
RB521CM-30T2R_SOD923-2
2
SLG5NT1533VTR_STDFN8-6
2
1
1
C2413
10U_0402_6.3V6M
D265
C2412
220P_0201_25V7K
[13,17,80,87] -PCH_SLP_S0
1
2
ON
CAP
6
GND
6
2
C2410
10U_0402_6.3V6M
ON
GND
D264
[60,66,67,80] B_ON
2
[67,83,85] A_ON
5
SLG5NT1533VTR_STDFN8-6
1
2
1
C2415
220P_0201_25V7K
RB521CM-30T2R_SOD923-2
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
LOAD SW VCCST & VCCSTG
Thursday, August 13, 2015
1
Sheet
82
of
102
5
4
3
2
1
D
D
[85] 2R5A_PWRGD
PD297
[67,82,85] A_ON
1
2
RB521CM-30T2R_SOD923-2
PC2355
1
2
0.1U_0402_25V7K
MODE pin : Float
fsw = 800kHz
23
1R2A_VSENSE+
0_0402_5%
22
2
0_0402_5%
1
2
PR165
PR61
21
2
1
29
28
8A
C
EN
TP
27
26
RA
REFIN2
1R2A_VSENSE-
1
25
PU32
C
VREF
24
AGND_1R2A
REFIN
AGND_1R2A
GSNS
PGOOD
VSNS
LP#
SLEW
MODE
VCC1R2A
1
2
DDR_VTT_PG_CTRL [4,84]
3
PR2479
PC2354
0.022U_0402_16V7K
VCC5M
2
20
TRIP
NC
0_0201_5%
4
PR2244
TPS51362RVER_QFN28_4P5X3P5
19
GND
BST
V5
SW
5
1
TDK
NEC TOKIN
PC2356
2
1
0_0402_5%
18
AGND_1R2A
VINT20
C_SVT_EC009
TABLE PL7
1
2
0.1U_0402_25V7K
6
1R2A_SW 1
SPM6530T-R68M140KA
MPLCH0630LR68-T70
PL7
2
PC600
1
2
0.1U_0201_6.3V6K
PC594
1
2
22U_0603_6.3V6M
PC592
1
2
22U_0603_6.3V6M
PC572
1
2
22U_0603_6.3V6M
PC520
1
2
22U_0603_6.3V6M
PC878
1
2
PC880
1
2
@
PR2245
2.2_0603_5%
1
2
@
PR2480
0_0201_5%
B
@
PR45
1
1
PC2353
1
2
1000P_0201_25V7K
PC482
@
PC493
1
2
1
2
0.1U_0402_25V7K
@
2
10U_0805_25V6K
1
PC647
2
10U_0805_25V6K
1
PC646
2
10U_0805_25V6K
PC2352
B
10U_0805_25V6K
1
10
11
12
13
14
15
@
PC2357
470P_0201_25V7K
22U_0603_6.3V6M
1
9
22U_0603_6.3V6M
8
2
PGND
PGND
PGND
PGND
PGND
SW
PC881
1
2
SW
2
1
PC8596
0.1U_0402_25V6
VIN
PL43
TDK_MPZ1608S300AT_2P
22U_0603_6.3V6M
SW
VIN
PC889
1
2
VIN
2
2
1
16
2
1
PC6336
2.2U_0402_6.3V6K
7
22U_0603_6.3V6M
0.68UH_SPM6530T-R68M140KA_16A_20%
17
2
C_SVT_EC020
0_0402_5%
AGND_1R2A
AGND_1R2A
AGND_1R2A
These MLCCs must be placed
symmetrically on Top and Bottom.
TABLE:TPS51362
REFIN
REFIN2
VOUT
GND
GND
1.05V
Float
GND
1.20V
GND
Float
1.50V
Float
Float
1.35V
LOGIC
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCC1R2A
Thursday, August 13, 2015
1
Sheet
83
of
102
5
4
3
2
1
D
D
VCC1R2A
VCC3M
CONNECT TO
DIMM CONNECTOR
CONNECT TO
DIMM CONNECTOR
1A
2
2
1
PC915
1
2
PJ2033
Short Pattern
@
C_SVT_EC021
@
PR40
0_0402_5%
1
1
PR37
0_0402_5%
VCC0R6B
0.1U_0201_6.3V6K
PC987
1
2
10U_0402_6.3V6M
PC418
1
2
10U_0402_6.3V6M
2
NEAR DIMM CONN
PC937
1
2
VCC1R2A
0.01U_0201_6.3V7K
VCC0R6B
PU70
PGND
GND
POWER PAD
4
8
11
1
PC401
TPS51206DSQR_SON10_2X2
C
PC917
1000P_0201_25V7K
2
1
2
VCC0R6B_SENSE
2 PR9508
0_0201_5%
@
PC423
1
2
S5
1
6
10U_0402_6.3V6M
S3
5
PC404
1
2
9
VTTREF
3
10U_0402_6.3V6M
7
-PCH_SLP_S4
[4,83] DDR_VTT_PG_CTRL
[13,17,59,67] -PCH_SLP_S4
VDDQSNS
1
DDR_VTT_PG_CTRL
VTTSNS
PC405
1
2
VCC1R2A_SENSE
VTT
VLDOIN
10U_0402_6.3V6M
VDD
2
0.22U_0201_6.3V6K
10
C
TABLE : TPS51206
S3
High
Low
Low
S5
High
High
Low
VTT
ON
OFF(High-Z)
OFF(Discharge)
VTTREF
ON
ON
OFF(Discharge)
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCC0R6B(TPS51206)
Thursday, August 13, 2015
1
Sheet
84
of
102
5
4
3
2
1
D
D
VCC5M
2
VCC3M
2
PR2546
100K_0201_5%
2
C
1
PC2602
0.1U_0201_6.3V6K
C
1
1
PC2601
10U_0402_6.3V6M
2R5A_PWRGD [83]
8
VCC2R5A
[67,82,83] A_ON
1
PG
EN
SW
PAD
FB
7
PL42
1
2
1UH_DFE201612R-H-1R0M-P2_2.6A_20%
5
1
4
2
1
PC2603
22U_0603_6.3V6M
2
PC2604
22U_0603_6.3V6M
PR2547
178K_0201_1%
TLV62080DSGR_WSON8_2X2
1
9
GND
VOS
GND
2
3
6
2
VIN
PU151
2
TABLE PL42
TOKO,
CYNTEC,
DFE201612R-H-1R0M
PIFE20161B-1R0MS
PR2548
39.2K_0201_1%
B
1
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCC2R5A(TLV62080)
Thursday, August 13, 2015
1
Sheet
85
of
102
5
4
3
2
1
D
D
2
VCC5M
PJ9232
Short Pattern
@
1
Max Current = 0.38(A)
@
PC2416
0.1U_0201_6.3V6K
1
1
VCC5M_1R8_SUS
2
C
2
C
PC2417
2.2U_0402_10V6M
Max Current = 0.95(A)
VCC1R8_SUS
VCC1R8_SUS_LOUT
B3
BU90004GWZ-E2_UCSP35L1-6
1
2
FB
PL39
1
2
1UH_DFE201612R-H-1R0M-P2_2.6A_20%
PC2418
4.7U_0402_6.3V6M
1
EN
B2
2
A2
LX
A3
[59,68] SUS_ON1
MODE
GND
B1
PJ9240
Short Pattern
@
DFE201612R-H-1R0M
PIFE20161B-1R0MS
1
A1
TOKO,
CYNTEC,
VIN
PU145
2
TABLE PL39
@
PC2419
0.1U_0201_6.3V6K
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCC1R8_SUS
Thursday, August 13, 2015
1
Sheet
86
of
102
5
4
3
VCC3M
2
1
VCC5M
2
D
2
D
PJ9233
Short Pattern
@
Max Current = 0.54(A)
PC2368
1
2
10U_0402_6.3V6M
PC2367
1
2
10U_0402_6.3V6M
PC2366
1
2
Rpg_VCCPCHCORE
2
1
PC2373
1
2
22U_0603_6.3V6M
PC2372
1
2
22U_0603_6.3V6M
C
@
PC2414
0.1U_0201_6.3V6K
PR2456
100K_0402_5%
3V3_VCCPCHCORE
1
2
@
PR2508
100K_0201_5%
1
PC2371
1
2
PR2253
6.8_0402_5%
NB682GD-C669-Z QFN13_2X3
22U_0603_6.3V6M
13
VCCPCHCORE_LOUT
PC2370
1
2
12
@
PR2507
10K_0201_5%
2
FDSD0420-H-1R0M
PCMB042T-1R0MS
PL35
1
1
2
1UH_FDSD0420-H-1R0M-P3T_4.9A_20%
1
2
8
1
1
@
PR2506
10K_0201_5%
PG
9
C_SVT_EC010
TOKO,
CYNTEC,
PC2565
0.22UF_0402_25V6K
22U_0603_6.3V6M
LP#
VOUT
7
2
PR9310
0_0201_5%
VIN
C1
2
2
1
BST
SW
AGND
6
PR2503
0_0201_5%
[13,17,80,82] -PCH_SLP_S0
C0
11
3
2
EN
TABLE PL35
Cbst_VCCPCHCORE
2
1
10
1
4
PGND
5
MODE
[16] VCCPCHCORE_VID1
PR2502
0_0201_5%
1
2
2
[16] VCCPCHCORE_VID0
3V3
1
1
1
C
10U_0402_6.3V6M
PC2365
1
2
PR2455
3.3_0603_1%
Rbst_VCCPCHCORE 1
2
PU139
[59,81] SUS_ON2
0.1U_0201_6.3V6K
VCCPCHCORE
@
PR2505
10K_0201_5%
PC2369
1
2
@
PR2504
10K_0201_5%
Max Current = 2.57(A)
0.1U_0201_6.3V6K
VCC3M
2
@
PR2251
10K_0201_5%
2
2
VCC3M
VCC5M_PCHCORE
AGND_PCHCORE
VCC3M
3V3_VCCPCHCORE
PC2374
1U_0402_6.3V6K
2
1
1
1
PR2252
5.1_0402_1%
PR155
1
AGND_PCHCORE
2
0_0402_5%
Note: PR2253 should be 0ohm if PR155 is not short
AGND_PCHCORE AGND_PCHCORE
AGND_PCHCORE
@
PR154
1
C_SVT_EC022
2
0_0402_5%
AGND_PCHCORE
TABLE : NB682 MODE M2 ( Float ) - ES
LP#
0
1
1
1
1
B
C1
X
0
0
1
1
C0
X
0
1
0
1
VOUT
0.700V
0.850V
0.900V
0.950V
1.000V
SLP_S0#
B
DEFAULT
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.1
LA-C581P
Date:
5
Compal Electronics, Inc.
DC/DC VCCPCHCORE(NB682)
Thursday, August 13, 2015
1
Sheet
87
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
88
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
89
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
90
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
91
of
102
5
4
3
2
1
0.3A
VCC3_SUS
D
D
1
15mA
VCC3M
R2034
Short Pattern
@
VCC5B
SVT_C_EC005
VCC5_TP
4
5
6
4
5
6
2
Short Pattern: R2034
1
3
2
R1874
33_0201_5%
1
1
R1862
33_0201_5%
3
2
1
2
Q177
SSM6K210FE_ES6
2
Q158
SSM6K210FE_ES6
C1828
0.1U_0402_25V7K
2
2
1
1
2
[68] VCC5_TP_DRV
2
[68] SUS_DRV
D254
RB521CM-30T2R_SOD923-2
1
1
1
R82
D252
RB521CM-30T2R_SOD923-2
1
R83
100_0201_5%
2
2
C
100_0201_5%
C
C1839
0.1U_0402_25V7K
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
LA-C581P
Date:
5
4
3
2
Compal Electronics, Inc.
LOAD SW PCH SUS/TRACK POIN
Thursday, August 13, 2015
1
Sheet
92
of
102
Rev
0.5
5
4
3
2
1
D
D
0.5A
VCC3LAN
5
6
7
8
VCC3M
Q69
TPCF8002_2-3U1A
2
2
1
33_0201_5%
R1053
2
4
3
100_0201_5%
1
R86
D66
RB521CM-30T2R_SOD923-2
1
2
C
1
C
[68] VCC3LAN_DRV
B
0.1U_0402_25V7K
1
2
C1183
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
LOAD SW LAN
Thursday, August 13, 2015
1
Sheet
93
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
94
of
102
5
4
3
2
1
D
D
3A
4A
VCC3B
VCC5B
VCC3M
VCC5M
SVT_C_EC023
SVT_C_EC023
5
6
7
8
5
6
7
C
8
C
Q24
TPCF8002_2-3U1A
Q23
TPCF8002_2-3U1A
2
2
1
RB521CM-30T2R_SOD923-2
100_0201_5%
1
R830
D72
2
4
2
1
@
C19
0.1U_0402_25V7K
1
R88
3
2
100_0201_5%
2
1
RB521CM-30T2R_SOD923-2
1
270_0402_1%
1
2
R532
1
D30
2
4
2
1
R87
3
2
100_0201_5%
1
5%
@
C20
0.1U_0402_25V7K
B
B
C604
0.1U_0402_25V7K
1
1
2
[68] VCC5B_DRV
2
[68] VCC3B_DRV
C706
0.047U_0402_25V7K
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
LOAD SW B
Thursday, August 13, 2015
1
Sheet
95
of
102
5
4
3
2
1
D
D
2.7A
2.7A
VCC3WLAN
VCC3WAN
VCC3M
VCC3M
SVT_C_EC023
VCC3B
SVT_C_EC023
10A
J1055
5
6
7
@
Q94
TPCF8002_2-3U1A
4
3
C
@
R8924
33_0201_5%
2
2
@
D238
RB521CM-30T2R_SOD923-2
1
1
@
1
R91
100_0201_5%
2
2
D237
RB521CM-30T2R_SOD923-2
1
R90
100_0201_5%
1
1
1
2
R8921
33_0201_5%
C
2
4
3
2
1
2
8
Q100
TPCF8002_2-3U1A
2
2MM
@
5
6
7
8
1
[68] VCC3WLAN_DRV
1
2
[68] VCC3WAN_DRV
2
C8282
0.1U_0402_25V7K
@
C8283
0.1U_0402_25V7K
1
B
B
TABLE
AOAC
R1055
YES
NO
NO-ASM
ASM
Q94
ASM
NO-ASM
R91
ASM
NO-ASM
R8924
ASM
NO-ASM
C8283
ASM
NO-ASM
D238
ASM
NO-ASM
A
A
LOGIC
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
LOAD SW WWAN & WLAN
Thursday, August 13, 2015
1
Sheet
96
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
97
of
102
5
4
3
2
1
PTH FOR SCREW HOLE
Value
TOP
QTY
BOTTOM
2
2
1
3
4.0
6.1
6.1
4
TP_O1
TESTPIN_2P5_06
@
TP_P1
TESTPIN_2P5_06
@
1
TP_M1
TESTPIN_2P5_02
1
@
1
1
TP_L1
TESTPIN_2P5_02
@
TP_Q1
TESTPIN_2P8_01
@
TP_R1
TESTPIN_4P2_01
@
TP_S1
TESTPIN_4P2_01
@
TP_T1
TESTPIN_4P2_01
@
@
@
@
@
TP_K1
TESTPIN_2P5_01
1
TESTPIN_4P0_01
@
TP_J1
TESTPIN_2P5_01
1
6.5
@
1
Square
6.5
@
TP_I1
TESTPIN_2P5_01
@
TP_U1
TP_V1
TP_W1
TP_X1
TESTPIN_4P0_01 TESTPIN_4P0_01 TESTPIN_4P0_01 TESTPIN_4P0_01
@
@
@
1
0
4.3
@
TP_H1
TESTPIN_2P5_01
1
2.8
TESTPIN_4P3_01
@
TP_G1
TESTPIN_2P5_01
1
TESTPIN_2P8_01
@
TP_F1
TESTPIN_2P5_01
1
1
5
TP_E1
TESTPIN_2P5_01
1
0
5
TP_D1
TESTPIN_2P5_01
1
Square
2.5
TP_C1
TESTPIN_2P5_01
1
2.5
TESTPIN_2P5_06
TP_B1
TESTPIN_2P5_01
1
TESTPIN_2P5_03
TP_A1
TESTPIN_2P5_01
1
7.4
1
7.4
1
2.5
D
11
TESTPIN_2P5_02
1
6
1
6
1
2.5
1
TESTPIN_2P5_01
1
D
Pad Dia
Hola Dia
@
C
C
NPTH
1
NPTH4
H_4P0X2P5N
FD1
@
FD4
@
1
FID
Board Area
B
FD2
@
1
NC, NO CONNECT TO ANY.
NC, NO CONNECT TO ANY.
@
1
B
NC, NO CONNECT TO ANY.
FD3
@
1
NC, NO CONNECT TO ANY.
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
PTH FOR SCREW HOLES
Thursday, August 13, 2015
1
Sheet
98
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
99
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
100
of
102
5
4
3
2
1
D
D
C
C
BLANK
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
BLANK
Thursday, August 13, 2015
1
Sheet
101
of
102
5
4
3
2
1
ZZZ
SVT_C_EC025
DA80013C010
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
U58
D
D
SKL QHMG 1.6G
CPU1@
SA00008M310
SKL QHMF 2.3G
CPU2@
SA00008M410
SKL QJFC i3 2.3G SKL QJ8N i5 2.3G SKL QJ8M I5 2.4G VPROSKL QJ8L I7 2.5G SKL QJ8K I7 2.6G VPRO SKL QJKR i3 2.3G SKL QJKP I5 2.3G VPRO SKL QJKM I5 2.4G VPROSKL QJKK I7 2.5G SKL QJKH I7 2.6G VPROSKL QJRM I7 2.6G VPRO
CPU3@
SA000092N10
CPU4@
SA000092O10
CPU5@
SA000092T10
CPU6@
SA000092P10
CPU7@
SA000092U10
CPU8@
SA000092N50
CPU9@
SA000092O50
CPU10@
SA000092T20
CPU11@
SA000092P50
CPU12@
SA000092U20
CPU13@
SA000092U40
SKL SR2EU I3 2.3G
CPU15@
SA000092N90
SKL SR2EY I5 2.3G
CPU16@
SA000092O90
SKL SR2F0 I5 2.4G VPRO
SKL SR2EZ I7 2.5G
CPU17@
SA000092T30
CPU18@
SA000092PA0
SKL SR2F1 I7 2.6G VPRO
CPU19@
SA000092U50
SVT_C_EC025
U13
Jacksonville WGI219V
SVT_C_EC028
NVPRO@
SA000093410
C
C
B
B
A
A
Compal Secret Data
Security Classification
Issued Date
2014/11/04
Deciphered Date
2016/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number
Custom
4
3
2
Rev
0.5
LA-C581P
Date:
5
Compal Electronics, Inc.
PCB CPU PN
Thursday, August 13, 2015
1
Sheet
102
of
102