Podany Link wzmiankuje Dell Latitude E6520 - Pal60 > platforma Compal LA-6562p Dell Latitude E6420 - Pal 50 > platforma Compal La-6591p Teraz "ruch" autora tematu. p.s w 2011 bywała płyta Dell latitude e6420 ( LA-6591p i LA-6592p )/ LA-6594p https://obrazki.elektroda.pl/3011468700_1508966469_thumb.jpg Bios z forum Link
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B
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COMPAL CONFIDENTIAL
PAL50/52
PCB NO : LA-6591P (DA80000JV10)
LA-6593P HF (DA80000MB10)
BOM P/N : 43192831L01
MODEL NAME :
1
1
GPIO MAP:{Macallan} GPIO Map 10102010.xlsx
E3 MACALLAN 14 " UMA/ATG
2
2
rPGA Sandy Bridge +
FCBGA PCH Cougar Point-M
2011-1-6
REV : 1.0(A00)
@ : Nopop Component
CONN@ : ME controll and stuff by default
3
MB Type
BOM P/N
TPM EN/ TCM DIS
43192831L01
1@
3@
7@
TPM DIS/ TCM EN
43192831L02
2@
4@
7@
TPM DIS/ TCM DIS
43192831L04
2@
3@
7@
ATG TPM EN/ TCM DIS
43192831L11
1@
3@
7@
ATG TPM DIS/ TCM EN
43192831L12
2@
4@
7@
ATG TPM DIS/ TCM DIS
43192831L13
2@
3@
7@
TPM EN/ TCM DIS HF
4
4319BP31L01
1@
3@
8@
4
7@ MB PCB1
Part Number
DA80000JV10
DELL CONFIDENTIAL/PROPRIETARY
Description
Compal Electronics, Inc.
PCB 0FD LA-6591P REV0 M/B UMA
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
8@ MB PCB2
Part Number
3
Description
DA80000MB10 PCB 0FD LA-6593P REV0 M/B UMA HF
Title
Cover Sheet
Size
B
C
D
Rev
1.0
LA-6591P
Date:
A
Document Number
Monday, January 10, 2011
Sheet
E
1
of
66
A
Block Diagram
B
C
D
E
Compal confidential Model: PAL50/52
DDRIII-DIMM X2
Memory BUS (DDR3)
1
On IO board
PAGE 12,13
PAGE 24
For MB/DOCK
Video Switch
PI3V712-AZLE
VGA
FDI
VGA
DPB
Lane x 4
INTEL
SATA
USB
PAGE 26
Trough eDP Cable
SATA Repeater
MAX4951BE
E-SATA
PAGE 39
DPC
DPD
2560
COUGAR POINT-M
USB Port
PAGE 39
BGA
DOCKING PORT
USB Port
PAGE 38
PAGE 40
LVDS CONN
LVDS
2560
PAGE 24
USB[8,9]
2
PAGE 43
Camera
DMI2
Lane x 8
DAI
BT
PAGE 6-11
HDMI CONN
1
Touch Screen
988 pins
VGA
CRT CONN
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
1066/1333MHz
Sandy Bridge
4MB (Socket 988B)
rPGA CPU
SATA5
USB Port
PAGE 14-21
2
PAGE 38
DOCK LAN
SDXC/MMC/MS
PAGE 35
2062
Card reader
OZ600FJ0LN
PCIE x1
PCI Express BUS 100MHz
EXPRESS
Card
PCIE5
PCIE2
1/2 Mini Card
Flash
PAGE 37
1/2 Mini Card Full Mini Card
WLAN
WWAN/UWB
PAGE 36
USB10
USB6
PAGE 36
USB4
Smart Card
3
PAGE 33
CPU XDP Port
PAGE 7
RFID
PAGE 33
PCH XDP Port
PAGE 14
Thermal
PWM FAN
GUARDIAN III
EMC4022
PAGE 22
DOCK LAN
SPI
Option
PCIE1
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
LPC BUS
China TPM1.2
SSX44B
PAGE 36
PAGE 14
PAGE 28
64M 4K sector
PAGE 33
USH TPM1.2
BCM5882
FP_USB
16M 4K sector
PAGE 30
HeadPhone &
MIC Jack
RJ45
3
on IO board
PAGE 28
DAI
USB7
RJ11
BC BUS
LAN SWITCH
PI3L720 PAGE 32
INT.Speaker
MDC
HDD
PAGE 14
PCIE4
SMSC SIO
ECE5028
PAGE 30
W25Q16BVSSIG
PAGE 33,34
Fingerprint
CONN
PAGE 23
HDA Codec
92HD90B2
SATA Repeater
MAX4951BE
W25X64ZE
PAGE 34
PAGE 32
SATA
33MHz
USB5
TDA8034HN
Intel Lewisville
82579LM
HD Audio I/F
PCI Express BUS 100MHz
PCIE3
on IO board
USB Port
PAGE 35
on IO board
E-Module
To Docking side
Dig.
MIC
PAGE 29
Trough eDP Cable
PAGE 41
SMSC KBC
MEC5055
PAGE 22
WiFi ON/OFF &
Power ON/OFF SW
PAGE 42
PAGE 31
4
4
DC/DC Interface
PAGE 44
TP CONN
PAGE 43
LED
KB CONN
DELL CONFIDENTIAL/PROPRIETARY
PAGE 43
Compal Electronics, Inc.
PAGE 45
Title
UMA Block Diagram
Size
Document Number
Rev
1.0
LA-6591P
Date:
A
B
C
D
Monday, January 10, 2011
2
Sheet
E
of
66
5
4
3
2
POWER STATES
Signal
SLP
S3#
SLP
S4#
SLP
S5#
SLP
A#
S0 (Full ON) / M0
HIGH
HIGH
HIGH
HIGH
S3 (Suspend to RAM) / M3
LOW
HIGH
HIGH
S4 (Suspend to DISK) / M3
LOW
LOW
S5 (SOFT OFF) / M3
LOW
S3 (Suspend to RAM) / M-OFF
LOW
State
M
PLANE
SUS
PLANE
RUN
PLANE
ON
ON
ON
ON
HIGH
ON
ON
ON
HIGH
HIGH
ON
ON
LOW
LOW
HIGH
ON
HIGH
HIGH
LOW
ON
ALWAYS
PLANE
1
USB PORT#
CLOCKS
DESTINATION
JUSB2 (Right side 1)
ON
1
JUSB3 (Right side 2)
OFF
OFF
2
JESA1 (Right Side ESATA)
OFF
OFF
OFF
3
JUSB1 (Ext Left Side )
ON
OFF
OFF
OFF
4
WLAN
OFF
ON
OFF
OFF
5
WWAN
6
JMINI3(Flash)
7
USH- & gt; BIO
8
D
0
DOCKING
9
DOCKING
10
Express card
11
Bluetooth
12
Camera
13
LCD Touch
0
BIO
1
NA
S4 (Suspend to DISK) / M-OFF
LOW
LOW
HIGH
LOW
ON
OFF
OFF
OFF
OFF
S5 (SOFT OFF) / M-OFF
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
PCH
OFF
PM TABLE
+15V_ALW
+3.3V_SUS
+5V_RUN
+3.3V_M
+5V_ALW
C
+1.5V_MEM
+3.3V_RUN
+1.05V_M +1.05V_M
+3.3V_ALW_PCH
+1.8V_RUN
+3.3V_RTC_LDO
+3.3V_M
(M-OFF)
+1.5V_RUN
SATA
+1.05V_RUN_VTT
+1.05V_RUN
State
ODD/ E3 Module Bay
NA
NA
ESATA
C
HDD
SATA 2
+VCC_CORE
SATA 0
SATA 1
+0.75V_DDR_VTT
S0
ON
ON
ON
ON
ON
SATA 4
S3
ON
ON
OFF
ON
OFF
SATA 5
S5 S4/AC
B
DESTINATION
SATA 3
power
plane
D
ON
OFF
OFF
ON
OFF
S5 S4/AC don't exist
OFF
OFF
OFF
OFF
OFF
USH
Dock
PCI EXPRESS
DESTINATION
B
Lane 1
MINI CARD-1 WWAN
Lane 2
MINI CARD-2 WLAN
Lane 3
Express card
Lane 4
E3 Module Bay (USB3)
Connetion
Lane 5
1/2vMINI CARD-3 PCIE
Port B
MB HDMI Conn
Lane 6
MMI
Port C
Dock DP port 2
Lane 7
10/100/1G LOM
Port D
Dock DP port 1
Lane 8
None
need to update Power Status and PM Table
UMA DP/HDMI Port
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Index and Config.
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
3
of
66
EN_INVPWR
3
FDC654P
Q21
2
1
MODC_EN
4
HDDC_EN
5
+BL_PWR_SRC
D
D
ADAPTER
SI3456BDV
(Q27)
+PWR_SRC
BATTERY
1.05V_VTTPWRGD
ISL95870AH
(PU13)
+5V_HDD
+VCC_SA
SI3456BDV
(Q30)
+5V_MOD
ALWON
+15V_ALW
C
SN0608098
(PU2)
CHARGER
+5V_ALW
C
RUN_ON
SI4164DY
(Q50)
(PU7)
SI3456
(Q49)
S13456
(Q54)
SI3456
(Q34)
NTMS4920
(Q55)
+3.3V_ALW_PCH
+3.3V_SUS
+3.3V_LAN
+3.3V_RUN
(PU16)
+1.5V_MEM
CPU1.5V_S3_GATE
AO4728
(QC3)
+0.75V_DDR_VTT
RUN_ON
NTGS4141N
(Q59)
SI3456
(Q58)
B
M_ON
CPU_VTT_ON
RUN_ON
+1.8V_RUN +1.05V_RUN_VTT
+3.3V_M
+1.05V_M
RUN_ON
+VCC_CORE
A
0.75V_VR_EN
DDR_ON
1.05V_0.8V_PWROK
B
M_ON
SN1003055RUWR
+5V_RUN
RUN_ON
SN1003055
TPS51311
(PU4)
AUX_ON
RT9026GFP
(PU5)
SUS_ON
RT8209BGQW
(PU3)
SI3456
(Q38)
+3.3V_WLAN
MAX17411
(PU9)
PCH_ALW_ON
AUX_EN_WOWL
+3.3V_ALW
Pop option
Pop option
+1.0V_LAN
+3.3V_M
SI4164
(Q63)
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
+1.5V_CPU_VDDQ
+1.05V_RUN
+1.5V_RUN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Power Rail
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
4
of
66
5
4
3
2
1
@ 2.2K
SMBUS Address [0x9a]
+3.3V_ALW_PCH
@ 2.2K
H14
MEM_SMBCLK
C9
MEM_SMBDATA
202
2N7002
DIMMA
SMBUS Address [A0]
DIMMB
200
SMBUS Address [A4]
2N7002
2.2K
PCH
D
202
+3.3V_LAN
2.2K
C8
LAN_SMBDATA
31
53
SML1_SMBCLK
A5
D
SMBUS Address [C8]
LOM
E14
SML1_SMBDATA
3A
200
28
G12
M16
LAN_SMBCLK
2.2K
53
3A
2.2K
B4
+3.3V_ALW
DOCK_SMB_CLK
A3
DOCK_SMB_DAT
SMBUS Address
127
129
DOCKING
2.2K
C
2.2K
SMBUS Address [TBD]
2.2K
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
2.2K
+3.3V_RUN
14
13
G Sensor
SMBUS Address [3B]
+3.3V_ALW
C
B5
1B
XDP2
51
2.2K
1A
SMBUS Address [TBD]
+3.3V_ALW_PCH
B6
1A
XDP1
51
2.2K
LCD_SMBCLK
30
A4
LCD_SMDATA
32
WWAN
1B
SMBUS Address [TBD]
2.2K
KBC
2.2K
1C
1C
A56
B59
+3.3V_ALW
100 ohm
PBAT_SMBDAT
7
100 ohm
PBAT_SMBCLK
6
BATTERY
CONN
SMBUS Address [0x16]
USH
SMBUS Address [0xa4]
2.2K
2.2K
A50
1E
B53
1E
+3.3V_ALW
M9
USH_SMBCLK
L9
USH_SMBDAT
B
B
2.2K
2.2K
MEC 5055
2B
A49
B52
7
CARD_SMBCLK
2B
+3.3V_SUS
CARD_SMBDAT
8
Express card
SMBUS Address [TBD]
2.2K
2.2K
B50
1G
A47
1G
+3.3V_ALW
10
CHARGER_SMBCLK
9
CHARGER_SMBDAT
Charger
SMBUS Address [0x12]
2.2K
2.2K
2D
A
2D
B7
A7
+3.3V_ALW
29
BAY_SMBDAT
30
BAY_SMBCLK
E3 Module Bay
SMBUS Address [0xd2]
A
2.2K
2.2K
+3.3V_RUN
2A
B49
DAI_SMBCLK
B48
DAI_SMBDAT
9
Compal Electronics, Inc.
8
2A
A/D,D/A
converter
Title
SMBUS Address [0x30]
SMBUS TOPOLOGY
Size
Document Number
Rev
1.0
LA-6591P
Date:
5
4
3
2
Monday, January 10, 2011
Sheet
1
5
of
66
5
4
3
2
1
JCPU1I
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
JCPU1A
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
B28
B26
A24
B23
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
16
16
16
16
16
16
16
16
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
G21
E22
F21
D21
16
16
16
16
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
G22
D22
F20
C21
16
16
16
16
16
16
16
16
C
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
A21
H19
E19
F18
B21
C20
D18
E17
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
16
16
16
16
16
16
16
16
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
A22
G19
E20
G18
B20
C19
D19
F17
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI_FSYNC0
FDI_FSYNC1
J18
J17
FDI_INT
H20
FDI_LSYNC0
FDI_LSYNC1
J19
H17
16 FDI_FSYNC0
16 FDI_FSYNC1
16 FDI_INT
16 FDI_LSYNC0
16 FDI_LSYNC1
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
A18
A17
B16
C15
D15
C17
F16
C16
G15
B
C18
E16
D16
F15
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX
eDP_AUX#
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
eDP
EDP_COMP
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
PCI EXPRESS* - GRAPHICS
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI
16
16
16
16
B27
B25
A25
B24
Intel(R) FDI
D
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
J22
J21
H22
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
PEG_COMP
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS
D
C
B
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
PEG Compensation
DP Compensation
+1.05V_RUN_VTT
1
1
+1.05V_RUN_VTT
RC2
24.9_0402_1%~D
2
2
RC1
24.9_0402_1%~D
PEG_COMP
EDP_COMP
A
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance & lt; 25 mohms
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Sandy Bridge (1/6)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
6
of
66
5
4
Follow DG Rev0.71 SM_DRAMPWROK topology
3
2
+1.5V_CPU_VDDQ
1
+1.05V_RUN_VTT
+3.3V_ALW_PCH
1
5
O
A
3
16 PM_DRAM_PWRGD
4
2
RUNPWROK_AND
74AHC1G09GW_TSSOP5~D
1 1
1
1
2
+1.05V_RUN_VTT
XDP_OBS0
XDP_OBS1
Place near JXDP1
XDP_OBS2
XDP_OBS3
S
QC1
SSM3K7002FU_SC70-3~D
2
G
9
9
CFG10
CFG11
CFG10
CFG11
XDP_OBS4
XDP_OBS5
The resistor for HOOK2 should beplaced
such that the stub is very small on CFG0 net
H_CPUPWRGD
1
RC51
RC6
1
RC71
@ RC9
1
RC1251
RC127
14,16 SIO_PWRBTN#_R
CFG0
+1.05V_RUN_VTT
12,13,14,15,28,36 DDR_XDP_WAN_SMBDAT
12,13,14,15,28,36 DDR_XDP_WAN_SMBCLK
H_THERMTRIP#
2
56_0402_5%~D
H_CATERR#
2
49.9_0402_1%~D
H_PROCHOT#
2
62_0402_5%~D
2 H_THERMTRIP#_R AN32
0_0402_5%~D
1
RC129
CLOCKS
2
2 0_0402_5%~D
0_0402_5%~D
DPLL_REF_CLK
DPLL_REF_CLK#
A16
A15
CPU_DPLL
CPU_DPLL#
1
RC16 1
RC17
2
2 0_0402_5%~D
0_0402_5%~D
CLK_CPU_DMI 15
CLK_CPU_DMI# 15
XDP_RST#_R
1
@ RC48
@RC48
PROCHOT#
3
Max 500mils
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
AK1
A5
A4
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_RCOMP2 -- & gt; 15mil
SM_RCOMP1/0 -- & gt; 20mil
THERMTRIP#
AP33
PM_DRAM_PWRGD_CPU
PCH_PLTRST#_R
V8
AR33
UNCOREPWRGOOD
SM_DRAMPWROK
RESET#
JTAG & BPM
2 VCCPWRGOOD_0_R
0_0402_5%~D
1
RC25
18 H_CPUPWRGD
PM_SYNC
PWR MANAGEMENT
B
AM34
TCK
TMS
TRST#
TDI
TDO
AP29
AP27
XDP_TCLK
XDP_TMS
XDP_TRST#
AR28
AP26
9
9
CFG0
CFG1
9
9
CFG2
CFG3
CFG2
CFG3
9
9
CFG8
CFG9
CFG8
CFG9
9
9
CFG4
CFG5
CFG4
CFG5
9
9
CFG6
CFG7
CFG6
CFG7
9
9
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
1
1K_0402_5%~D
1
RH107
1
RH106
PLTRST_XDP# 17
C
2
0_0402_5%~D
2
0_0402_5%~D
CLK_CPU_ITP 15
CLK_CPU_ITP# 15
9 CLK_XDP_ITP
9 CLK_XDP_ITP#
1
@ RH109
1
@ RH108
2
0_0402_5%~D
2
0_0402_5%~D
1
CC177
0.047U_0402_16V4Z~D
XDP_TDI_R
XDP_TDO_R
1
RC46
1
@ RC47
@RC47
15 DDR_HVREF_RST_PCH
42 DDR_HVREF_RST_GATE
2
0_0402_5%~D
2
0_0402_5%~D
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#
2
RC19
DBR#
AL35
XDP_DBRESET#_R
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
2
RC26
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
XDP_DBRESET#
1
RC30
RC31
RC33
RC34
RC36
RC37
RC38
RC39
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
XDP_DBRESET# 14,16
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
B
1
1K_0402_5%~D
+1.05V_RUN_VTT
XDP_TMS
XDP_TDO_R
For ESD concern, please put near CPU
1 51_0402_1%~D
1 51_0402_1%~D
XDP_TDO
XDP_TDO
2
0_0402_5%~D
1
RC24
1 51_0402_1%~D
RC29 2
XDP_PREQ# @ RC32 2
XDP_TDI
2
0_0402_5%~D
1
RC23
RC27 2
RC35 2
1 51_0402_1%~D
XDP_TCLK
XDP_TDI_R
XDP_TDI_R
RC40 2
1
XDP_TRST#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
D
XDP_PRDY#
XDP_PREQ#
AR26
AR27
AP30
CFG16
CFG17
CFG0
CFG1
DDR3_DRAMRST# 12
QC2
BSS138W-7-F_SOT323-3~D
DDR_HVREF_RST
2
PRDY#
PREQ#
H_PM_SYNC
1
RC50
4.99K_0402_1%~D
place RC129 near CPU
16 H_PM_SYNC
CLK_XDP
2
0_0402_5%~D
2
SM_DRAMRST#
DDR3_DRAMRST#_CPU
R8
CFG16
CFG17
CLK_CPU_DPLL 15
CLK_CPU_DPLL# 15
CLK_XDP#
PECI
2
RC8
CATERR#
Close to JCBU1
22 H_THERMTRIP#
1
RC13 1
RC15
1
AL32
CPU_DMI
CPU_DMI#
G
H_PROCHOT#_R
56_0402_5%~D
2
A28
A27
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
D
1
RC57
BCLK
BCLK#
S
AN33
H_PECI
42,52,54 H_PROCHOT#
DDR_XDP_WAN_SMBDAT_R1
DDR_XDP_WAN_SMBCLK_R1
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
SAMTE_BSH-030-01-L-D-A
2
AL33
SKTOCC#
DDR3
MISC
H_CATERR#
PROC_SELECT#
MISC
AN34
41 CPU_DETECT#
18
XDP_HOOK2
SYS_PWROK_XDP
Keep R1132, R1133, R1136-R119
for slew rate control.
JCPU1B
C26
C
H_CPUPWRGD_XDP
CFD_PWRBTN#_XDP
XDP_TCLK
THERMAL
1
@ RC126
1
@ RC128
1
RC44
16,41 SYS_PWROK
XDP_OBS6
XDP_OBS7
2
2 1K_0402_5%~D
0_0402_5%~D
2
2 1K_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D
+1.05V_RUN_VTT
@ JXDP1
@JXDP1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
XDP_PREQ#
XDP_PRDY#
D
3
2
SYS_PWROK_XDP
RC64
39_0402_5%~D
D
11,44 RUN_ON_CPU1.5VS3#
@ RC124
1K_0402_5%~D
2 PM_DRAM_PWRGD_CPU
130_0402_5%~D
1
RC28
1
2
2
2
+3.3V_ALW_PCH
2
200_0402_5%~D
G
1
RC18
P
UC2
1 B
41,42 RUNPWROK
RC12
200_0402_5%~D
CC66
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CC1561
2
CC65
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
+3.3V_ALW_PCH
RC41 2
1
51_0402_1%~D
Sandy Bridge_rPGA_Rev1p0
51_0402_1%~D
+3.3V_RUN
Open drain buffer
Avoid stub in the PWRGD path
while placing resistors RC25 & RC130
1
2
2
1
2
1
2
2
1
2 PCH_PLTRST#_R
43_0402_5%~D
RC45
200_0402_1%~D
SN74LVC1G07DCKR_SC70-5~D
1
RC10
RC43
25.5_0402_1%~D
25.5_0402_1%~D
PCH_PLTRST#_BUF
RC42
140_0402_1%~D
4
RC130
10K_0402_5%~D
RC4
5
75_0402_1%~D
75_0402_1%~D
14,17 PCH_PLTRST#
NC VCC
A
GND
Y
CC140
0.1U_0402_16V4Z~D
2
UC1
1
2
3
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
1
+1.05V_RUN_VTT
1
A
DELL CONFIDENTIAL/PROPRIETARY
@ RC11
0_0402_5%~D
Compal Electronics, Inc.
2
A
VCCPWRGOOD_0_R
1
Buffered reset to CPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Sandy Bridge (2/6)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
7
of
66
5
4
3
2
1
JCPU1D
JCPU1C
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
C
B
12 DDR_A_BS0
12 DDR_A_BS1
12 DDR_A_BS2
12 DDR_A_CAS#
12 DDR_A_RAS#
12 DDR_A_WE#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
AE10
AF10
V6
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
AB6
AA6
V9
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
AA5
AB5
V10
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
SA_CAS#
SA_RAS#
SA_WE#
AK3
AL3
AG1
AH1
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]
AH3
AG3
AG2
AH2
M_ODT0
M_ODT1
C4
G6
J3
M6
AL6
AM8
AR12
AM15
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
D4
F6
K3
N6
AL5
AM9
AR11
AM14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
M_CLK_DDR1 12
M_CLK_DDR#1 12
DDR_CKE1_DIMMA 12
AB3
AA3
W10
SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
DDR_CS0_DIMMA# 12
DDR_CS1_DIMMA# 12
M_ODT0
M_ODT1
12
12
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
12
12
DDR_A_MA[0..15] 12
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
13 DDR_B_BS0
13 DDR_B_BS1
13 DDR_B_BS2
13 DDR_B_CAS#
13 DDR_B_RAS#
13 DDR_B_WE#
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
AA9
AA7
R6
AA10
AB8
AB9
AE1
AD1
R10
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
AB2
AA2
T9
RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]
AA1
AB1
T10
SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]
SB_CAS#
SB_RAS#
SB_WE#
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB
RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AE2
AD2
R9
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
13 DDR_B_D[0..63]
M_CLK_DDR0 12
M_CLK_DDR#0 12
DDR_CKE0_DIMMA 12
AB4
AA4
W9
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
SA_BS[0]
SA_BS[1]
SA_BS[2]
AE8
AD9
AF9
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
DDR SYSTEM MEMORY B
12 DDR_A_D[0..63]
DDR SYSTEM MEMORY A
D
AD3
AE3
AD6
AE6
SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]
AE4
AD4
AD5
AE5
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D7
F3
K6
N3
AN5
AP9
AK12
AP15
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
C7
G3
J6
M3
AN6
AP8
AK11
AP14
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
M_CLK_DDR2 13
M_CLK_DDR#2 13
DDR_CKE2_DIMMB 13
D
M_CLK_DDR3 13
M_CLK_DDR#3 13
DDR_CKE3_DIMMB 13
DDR_CS2_DIMMB# 13
DDR_CS3_DIMMB# 13
M_ODT2
M_ODT3
13
13
C
DDR_B_DQS#[0..7]
13
DDR_B_DQS[0..7]
13
DDR_B_MA[0..15] 13
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
B
Sandy Bridge_rPGA_Rev1p0
Sandy Bridge_rPGA_Rev1p0
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Sandy Bridge (3/6)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
8
of
66
5
4
3
2
1
CFG Straps for Processor
1
CFG2
JCPU1E
RSVD1
2
49.9_0402_1%~D
1
@ RC122
@RC122
7
7
CFG16
CFG17
+VCC_CORE
RSVD1
RSVD2
RSVD3
RSVD4
@ RC120
@RC120
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD5
+DIMM0_1_VREF_CPU B4
+DIMM0_1_CA_CPU D1
RSVD6
RSVD7
@ T1
@ T2
@ T3
@ T4
@ T5
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
AT26
AM33
AJ27
@ T6
@ T7
@ T8
PAD~D
PAD~D
PAD~D
RSVD37
RSVD38
RSVD39
RSVD40
T8
J16
H16
G16
@ T11
@ T13
@ T15
@ T16
PAD~D
PAD~D
PAD~D
PAD~D
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
AR35
AT34
AT33
AP35
AR34
@ T17
@ T18
@ T19
@ T20
@ T21
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
1
@ RC52
1K_0402_5%~D
follow DG0.9 change to 1Kohm 5%
Display Port Presence Strap
1
@ RC96
@RC96
1
@ RC97
@RC97
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
@ T28
@ T29
@ T30
@ T31
@ T33
@ T35
@ T36
@ T37
@ T38
@ T40
@ T41
@ T42
@ T43
@ T44
@ T45
@ T46
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
@ T47
@ T48
@ T155
PAD~D
PAD~D
PAD~D
J20
B18
A19
@ T52
PAD~D
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
CFG4
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
@ T23
@ T24
@ T25
@ T26
@ T27
B34
A33
A34
B35
C35
C
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
PAD~D
PAD~D
PAD~D
PAD~D
PAD~D
CFG6
CFG5
RSVD51
RSVD52
VCC_DIE_SENSE
RSVD54
RSVD55
AJ32
AK32
@ T32 PAD~D
@ T34 PAD~D
AH27
@ T39 PAD~D
1
1
@ RC121
@RC121
@ T22 PAD~D
@ RC54
1K_0402_5%~D
AN35
AM35
@ RC53
1K_0402_5%~D
2
RSVD2
2
49.9_0402_1%~D
RSVD4
2
49.9_0402_1%~D
+DIMM0_1_VREF_CPU
2
1K_0402_5%~D
+DIMM0_1_CA_CPU
2
1K_0402_5%~D
1
RESERVED
C
@ RC123
@RC123
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
CFG4
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
AJ26
L7
AG7
AE7
AK2
W8
RSVD33
RSVD34
RSVD35
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
AJ31
AH31
AJ33
AH33
RSVD3
2
49.9_0402_1%~D
1
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
2
+VCC_GFXCORE
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
PAD~D
PAD~D
PAD~D
PAD~D
1
7
7
7
7
7
7
7
7
7
7
7
7
@ T9
@ T10
@ T12
@ T14
D
2
D
2
@ RC51
@RC51
1K_0402_5%~D
CLK_XDP_ITP 7
CLK_XDP_ITP# 7
PCIE Port Bifurcation Straps
RSVD24
RSVD25
VCCIO_SEL
B
J15
RSVD56
RSVD57
RSVD58
AT2
AT1
AR1
@ T49 PAD~D
@ T50 PAD~D
@ T51 PAD~D
B1
@ T53 PAD~D
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
RSVD27
KEY
B
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG7
1
Sandy Bridge_rPGA_Rev1p0
2
@ RC56
1K_0402_5%~D
PEG DEFER TRAINING
CFG7
1: (Default) PEG Train immediately
following xxRESETB de assertion
0: PEG Wait for BIOS for training
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Sandy Bridge (4/6)
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
9
of
66
5
4
3
JCPU1F
2
1
POWER
+1.05V_RUN_VTT
+VCC_CORE
+VCC_CORE
1
1
1
1
CC120
CC121
CC122
CC123
CC124
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D
2
2
2
2
2
1
B
2
CC125
22U_0805_6.3VAM~D
+VCC_CORE
1
1
+ @CC129
470U_D2_2V-M~D
2 3
+ @CC130
470U_D2_2V-M~D
2 3
1
+
1
+
2 3
1
CC131
470U_D2_2V-M~D
+
CC132
470U_D2_2V-M~D
2 3
1
+
CC133
470U_D2_2V-M~D
2 3
CC134
470U_D2_2V-M~D
2 3
2
2
D
@
C
+1.05V_RUN_VTT
1
PEG AND DDR
+
Note: Place the PU resistors close to CPU
R1555 close to CPU 300 - 1500mils
2
RC60
75_0402_1%~D
A
H_CPU_SVIDALRT#
1
RC61
2
43_0402_5%~D
VIDALERT_N
52
+1.05V_RUN_VTT
CAD Note: Place the PU
resistors close to CPU
R1558 close to CPU 300 - 1500mils
RC63
130_0402_1%~D
VIDALERT#
VIDSCLK
VIDSOUT
AJ29
AJ30
AJ28
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VIDSCLK
52
VIDSOUT
Iccmax current changed for PDDG Rev0.7
52
CPU Power Rail Table
SVID note: VIDALERT# trace
routing need to be routed between
VIDSCLK and VIDSOUT signals
Voltage Rail
0.65-1.3
VCCIO
VCC_SENSE
VSS_SENSE
8.5
0.0-1.1
26
VCCPLL
1.8
3
VDDQ
RC66
100_0402_1%~D
Place RC66, RC70near CPU
AJ35
AJ34
VCCSENSE_R
VSSSENSE_R
1
RC67 1
RC68
2
2 0_0402_5%~D
0_0402_5%~D
1.5
5
VCCSA
B10
A10
VTT_SENSE_R
1
VSSIO_SENSE_R RC1321
RC133
2
2 0_0402_5%~D
0_0402_5%~D
VCCSENSE
VSSSENSE
VCCIO_SENSE
VSSIO_SENSE
VTT_SENSE
VTT_GND
RC70
100_0402_1%~D
51
51
52
52
6
0.65-0.9
+1.5V_MEM
1.5
12-16
*
*
Description
5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Sandy Bridge_rPGA_Rev1p0
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Sandy Bridge (5/6)
Size
4
3
2
Document Number
Rev
1.0
LA-6591P
Date:
5
B
53
1.05
VAXG
+VCC_CORE
S0 Iccmax
Current (A)
Voltage
VCC
1
1
J23
2
1
2
1
2
CC115
CC116
CC117
CC118
CC119
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D
2
2
2
2
2
VCCIO40
+
1
1
1
1
2
1
2
1
1
+
2
2
1
SVID
1
SENSE LINES
1
2
1
2
1
CC86
CC86
22U_0805_6.3VAM~D
1
2
1
2
1
CC70
22U_0805_6.3VAM~D
1
2
1
2
1
CC85
22U_0805_6.3VAM~D
1
CC110
CC111
CC112
CC113
CC114
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D
2
2
2
2
2
2
1
2
1
CC109
CC109
330U_D2_2VM_R6M~D
1
C
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
2
1
2
1
CC108
330U_D2_2VM_R6M~D
+VCC_CORE
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
1
2
1
CC107
330U_D2_2VM_R6M~D
CC73
10U_0805_4VAM~D
2
1
@ CC93
@ CC93
22U_0805_6.3VAM~D
2
2
1
CC84
CC84
22U_0805_6.3VAM~D
1
CC88
10U_0805_4VAM~D
1
@ CC92
22U_0805_6.3VAM~D
2
CC77
10U_0805_4VAM~D
CC83
22U_0805_6.3VAM~D
1
CC72
10U_0805_4VAM~D
2
@ CC91
22U_0805_6.3VAM~D
2
CC76
10U_0805_4VAM~D
CC82
22U_0805_6.3VAM~D
1
CC71
10U_0805_4VAM~D
2
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
@ CC90
@ CC90
22U_0805_6.3VAM~D
2
CC68
10U_0805_4VAM~D
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
CC81
CC81
22U_0805_6.3VAM~D
1
CC87
10U_0805_4VAM~D
2
8.5A
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
CC89
22U_0805_6.3VAM~D
2
CC75
10U_0805_4VAM~D
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
CC80
22U_0805_6.3VAM~D
1
2
1
CC79
22U_0805_6.3VAM~D
CC67
10U_0805_4VAM~D
1
CC69
CC69
22U_0805_6.3VAM~D
2
1
CC78
22U_0805_6.3VAM~D
D
1
CORE SUPPLY
53AAG35
1
Monday, January 10, 2011
Sheet
1
10
of
66
5
4
3
2
1
+1.5V_CPU_VDDQ Source
1
4
2
2
RUN_ON_CPU1.5VS3
3
2
RUN_ON_CPU1.5VS3#
QC4B
DMN66D0LDW-7_SOT363-6~D
4
5
1
1
+1.5V_CPU_VDDQ
1
2
3
@ RC73
20K_0402_5%~D
8
7
6
5
CC135
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
RC72
100K_0402_5%~D
RC74
100K_0402_5%~D
D
QC3
AO4728L_SO8~D
+15V_ALW
1
+3.3V_ALW2
2
+1.5V_MEM
JCPU1H
1
CC136
4700P_0402_25V7K~D
+V_DDR_REF
1
2
0_0402_5%~D
1
1
RC79
3
QC4A
DMN66D0LDW-7_SOT363-6~D
2
1
2
0_0402_5%~D
42 CPU1.5V_S3_GATE
1
@ RC134
VREF
CC1792
SM_VREF
1 0.1U_0402_10V7K~D
CC1492
1 0.1U_0402_10V7K~D
CC1502
1 0.1U_0402_10V7K~D
AL1
+V_SM_VREF should
have 10 mil trace width
2
1
+
2
1
2
PAD-OPEN 4x4m
6A
M27
M26
L26
J26
J25
J24
H26
H25
1
2
1
2
1
2
+VCC_SA
+
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
D
C
B
CC172
330U_D2_2VM_R6M~D
Sandy Bridge_rPGA_Rev1p0
2
2
0_0402_5%~D
H23
C22
C24
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
1
+GND_VCC_SA 55
+VCCSA_SENSE 55
1
RC138
H_FC_C22
2
0_0402_5%~D
VCCSA_VID_1 55
2
Sandy Bridge_rPGA_Rev1p0
RC83
10K_0402_5%~D
FC_C22
VCCSA_VID1
2
1
VCCSA_SENSE
1
@ CC171
10U_0603_6.3V6M~D
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
CC170
10U_0805_4VAM~D
SA RAIL
2
1
CC167
2
1
330U_D2_2VM_R6M~D
2
1
CC166
10U_0805_4VAM~D
2
1
CC165
10U_0805_4VAM~D
2
1
1
RC137
MISC
+1.5V_MEM
@ PJP2
1
CC164
10U_0805_4VAM~D
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
5A
CC169
10U_0805_4VAM~D
10U_0805_4VAM~D
VCCPLL1
VCCPLL2
VCCPLL3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
2
PAD-OPEN 4x4m
CC163
10U_0805_4VAM~D
10U_0805_4VAM~D
DDR3 -1.5V RAILS
@ PJP1
1
CC168
10U_0805_4VAM~D
+
2
1 0.1U_0402_10V7K~D
+V_SM_VREF_CNT
CC162
10U_0805_4VAM~D
2
1
CC176
330U_D2_2.5VM_R6M~D
2
1
CC175
1U_0402_6.3V6K~D
1
CC174
1U_0402_6.3V6K~D
2
A
CC173
10U_0805_4VAM~D
1
B6
A6
A2
VCC_AXG_SENSE 52
VSS_AXG_SENSE 52
+1.5V_CPU_VDDQ
3A
+1.8V_RUN
AK35
AK34
CC161
10U_0805_4VAM~D
10U_0805_4VAM~D
B
VAXG_SENSE
VSSAXG_SENSE
CC1782
GRAPHICS
2
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
1.8V RAIL
2
1
CC148
22U_0805_6.3VAM~D
2
1
CC139
22U_0805_6.3VAM~D
2
1
CC147
22U_0805_6.3VAM~D
1
2
CC146
22U_0805_6.3VAM~D
2
2
1
CC153
22U_0805_6.3VAM~D
1
1
CC145
22U_0805_6.3VAM~D
2
2
CC152
22U_0805_6.3VAM~D
1
CC141
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
CC151
22U_0805_6.3VAM~D
1
2
1
CC144
22U_0805_6.3VAM~D
2
1
CC138
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
C
CC137
22U_0805_6.3VAM~D
1
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
SENSE
LINES
JCPU1G
26A
2
0_0402_5%~D
RUN_ON_CPU1.5VS3
POWER
+VCC_GFXCORE
RC78
100K_0402_5%~D
2
RUN_ON_CPU1.5VS3# 7,44
2
1
@ RC77
37,41,44,49 RUN_ON
+V_SM_VREF_CNT
QC5
NTR4503NT1G_SOT23-3~D
6
2
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Sandy Bridge (6/6)
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
11
of
66
4
2
All VREF traces should
have 10 mil trace width
1
2
8 DDR_A_D[0..63]
D
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
8 DDR_A_DQS[0..7]
Populate RD1 for Intel DDR3
VREFDQ multiple methods M1
8 DDR_A_MA[0..15]
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
Layout Note:
Place near JDIMMA
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
+1.5V_MEM
2
1
2
DDR_A_D26
DDR_A_D27
CD6
1U_0402_6.3V6K~D
2
1
CD5
1U_0402_6.3V6K~D
1
CD4
1U_0402_6.3V6K~D
2
CD3
1U_0402_6.3V6K~D
1
8 DDR_CKE0_DIMMA
8
DDR_A_BS2
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
C
DDR_A_MA8
DDR_A_MA5
+1.5V_MEM
DDR_A_MA3
DDR_A_MA1
2
+
2
8 M_CLK_DDR0
8 M_CLK_DDR#0
CD14
330U_SX_2VY~D
2
1
@ CD13
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
1
CD12
2
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD11
CD11
2
1
10U_0603_6.3V6M~D
CD10
2
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD9
1
10U_0603_6.3V6M~D
CD8
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
10U_0603_6.3V6M~D
1
1
8
DDR_A_BS0
8
8
DDR_A_WE#
DDR_A_CAS#
8 DDR_CS1_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D40
DDR_A_D41
B
+0.75V_DDR_VTT
DDR_A_D42
DDR_A_D43
1
2
CD20
1U_0402_6.3V6K~D
2
CD19
1U_0402_6.3V6K~D
2
CD18
1U_0402_6.3V6K~D
CD17
1U_0402_6.3V6K~D
2
1
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
RD21
1
2
1
2
CD22
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
A
CD21
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
RD3
2 10K_0402_5%~D
+3.3V_RUN
2
10K_0402_5%~D
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
+0.75V_DDR_VTT
205
GND1
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
JDIMMA H=5.2
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
+1.5V_MEM
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
RD27
1K_0402_1%~D
D
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
13 DDR3_DRAMRST#_R
DDR3_DRAMRST#_R 1
RD28
2
1K_0402_1%~D
DDR3_DRAMRST# 7
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA 8
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
C
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
M_CLK_DDR1 8
M_CLK_DDR#1 8
DDR_A_BS1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 8
M_ODT0
8
+DIMM0_1_VREF_CA
M_ODT1
8
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
1
2
1
2
CD16
0.1U_0402_16V4Z~D
DDR_A_D34
DDR_A_D35
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
CD15
DDR_A_DQS#4
DDR_A_DQS4
Layout Note:
Place near JDIMMA.203,204
1
1
2-3A to 1 DIMMs/channel
2.2U_0603_6.3V6K~D
DDR_A_D32
DDR_A_D33
1
+1.5V_MEM
1
1
8 DDR_A_DQS#[0..7]
2
+1.5V_MEM
JDIMM1
CD2
CD2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
3
+DIMM0_1_VREF_DQ
2
0_0402_5%~D
2
0_0402_5%~D
CD1
2.2U_0603_6.3V6K~D
1
RD1
1
+DIMM0_1_VREF_CPU
@ RD7
+V_DDR_REF
2
5
1
RD29
2
0_0402_5%~D
+V_DDR_REF
1
@ RD31
2
0_0402_5%~D
+DIMM0_1_CA_CPU
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
DDR_XDP_WAN_SMBDAT 7,13,14,15,28,36
DDR_XDP_WAN_SMBCLK 7,13,14,15,28,36
+0.75V_DDR_VTT
206
FOX_AS0A626-U4SN-7F
CONN@
A
change footprint.
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
DDRIII-SODIMM SLOT1
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
12
of
66
5
4
3
2
1
2-3A to 1 DIMMs/channel
+DIMM0_1_VREF_DQ
All VREF traces should
have 10 mil trace width
2
8 DDR_B_MA[0..15]
1
2
DDR_B_D0
DDR_B_D1
CD24
0.1U_0402_16V4Z~D
Populate RD4 for Intel DDR3
VREFDQ multiple methods M1
CD23
2.2U_0603_6.3V6K~D
1
8 DDR_B_DQS[0..7]
D
+1.5V_MEM
JDIMM2
8 DDR_B_DQS#[0..7]
8 DDR_B_D[0..63]
+1.5V_MEM
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
Layout Note:
Place near JDIMMB
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS
DQ0
DQ1
VSS
DM0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
VSS
DQ26
DQ27
VSS
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD
NC
BA2
VDD
A12/BC#
A9
VDD
A8
A5
VDD
A3
A1
VDD
CK0
CK0#
VDD
A10/AP
BA0
VDD
WE#
CAS#
VDD
A13
S1#
VDD
TEST
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SA0
VDDSPD
SA1
VTT
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
DDR_B_D4
DDR_B_D5
JDIMMB H=9.2
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#_R
D
DDR3_DRAMRST#_R 12
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
+1.5V_MEM
DDR_CKE2_DIMMB
8 DDR_CKE2_DIMMB
2
1
2
CD28
1U_0402_6.3V6K~D
2
1
CD27
1U_0402_6.3V6K~D
1
CD26
1U_0402_6.3V6K~D
2
CD25
1U_0402_6.3V6K~D
1
C
8
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
2
1
+
2
DDR_B_MA10
DDR_B_BS0
DDR_B_BS0
8
8
CD36
330U_SX_2VY~D
2
1
DDR_B_WE#
DDR_B_CAS#
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
8 DDR_CS3_DIMMB#
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
B
DDR_B_D40
DDR_B_D41
Layout Note:
Place near JDIMMB.203,204
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
+0.75V_DDR_VTT
DDR_B_D50
DDR_B_D51
2
1
2
CD42
1U_0402_6.3V6K~D
2
1
CD41
1U_0402_6.3V6K~D
1
CD40
1U_0402_6.3V6K~D
2
CD39
1U_0402_6.3V6K~D
1
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
+3.3V_RUN
1
10K_0402_5%~D
1
2
1
2
CD44
CD44
2.2U_0603_6.3V6K~D
2
+0.75V_DDR_VTT
CD43
0.1U_0402_16V4Z~D
A
RD6
10K_0402_5%~D
2
RD5
1
+3.3V_RUN
205
GND1
GND2
DDR_CKE3_DIMMB
206
DDR_CKE3_DIMMB 8
DDR_B_MA15
DDR_B_MA14
C
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
M_CLK_DDR3 8
M_CLK_DDR#3 8
DDR_B_BS1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 8
M_ODT2
8
+DIMM0_1_VREF_CA
M_ODT3
8
DDR_B_D36
DDR_B_D37
1
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
2
1
2
B
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
DDR_XDP_WAN_SMBDAT 7,12,14,15,28,36
DDR_XDP_WAN_SMBCLK 7,12,14,15,28,36
+0.75V_DDR_VTT
A
FOX_AS0A626-U8SN-7F
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
DDRIII-SODIMM SLOT2
Size
4
3
2
Document Number
Rev
1.0
LA-6591P
Date:
5
CD38
CD38
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_B_D32
DDR_B_D33
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
CD37
2.2U_0603_6.3V6K~D
@ CD35
10U_0603_6.3V6M~D
2
1
CD34
10U_0603_6.3V6M~D
2
1
CD33
10U_0603_6.3V6M~D
2
1
CD32
10U_0603_6.3V6M~D
2
1
CD31
10U_0603_6.3V6M~D
1
CD30
10U_0603_6.3V6M~D
CD29
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
8
2
M_CLK_DDR2
M_CLK_DDR#2
8 M_CLK_DDR2
8 M_CLK_DDR#2
+1.5V_MEM
1
DDR_B_BS2
DDR_B_BS2
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
Monday, January 10, 2011
Sheet
1
13
of
66
4
1
ME_CLR1 TPM setting
RH66
1K_0402_5%~D
Clear ME RTC Registers
Open
Keep ME RTC Registers
2
Shunt
+RTC_CELL
18
GPIO36
18
GPIO37
18 EN_ESATA_RPTR#
18,41 TEMP_ALERT#
18 PCH_GPIO15
18 SIO_EXT_SCI#_R
PCH_AZ_SYNC
1
1
D
@ RH282
100K_0402_5%~D
@ RH24
+3.3V_ALW_PCH
1
3
5
7
1
XDP_FN0
9
XDP_FN1
@CH1
@CH1
11
0.1U_0402_16V4Z~D
13
2
XDP_FN2
15
XDP_FN3
17
19
21
23
25
XDP_FN4
27
XDP_FN5
29
31
XDP_FN6
33
XDP_FN7
35
@ RH283 1K_0402_5%~D
37
1.05V_0.8V_PWROK_R
1
2
39
41
1
2 PCH_PWRBTN#_XDP
@ RH21
0_0402_5%~D
43
45
47
@ RH284 0_0402_5%~D
49
1
2 DDR_XDP_WAN_SMBDAT_R2
51
DDR_XDP_WAN_SMBCLK_R2
1
2
53
@ RH285 0_0402_5%~D
55
PCH_JTAG_TCK
57
59
+3.3V_ALW_PCH
42,52 1.05V_0.8V_PWROK
7,16 SIO_PWRBTN#_R
PCH_INTVRMEN
1
2
1 RSMRST#_XDP
1K_0402_5%~D
2
16,42 PCH_RSMRST#_Q
2
RH38
330K_0402_5%~D
HDD_DET#_R
BBS_BIT0_R
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
YH1
1
G
2
4
G
3
32.768KHZ_12.5PF_Q13MC1461000~D
2
1
1
30
30 PCH_AZ_CODEC_SYNC
30 PCH_AZ_CODEC_RST#
1
N32
K5
RH43 2
1 200_0402_1%~D
@ RH47
2
1
100_0402_1%~D
@ RH49
2
1
100_0402_1%~D
2
SATAICOMPI
JTAG_TDO
PCH_SPI_CLK
T3
Y14
T1
1
PCH_AZ_SYNC
2
3
4
DO
/WP
GND
VCC
/HOLD
8
6
DIO
5
SATA3RBIAS
SPI_CLK64 1
R899
SPI_DO64 1
R901
HDD
29
29
29
29
ODD/ E Module Bay
2
@ RH35
@RH35
1
10K_0402_5%~D
Low = Default
High = No Reboot
ESATA_PRX_DTX_N4_C 39
ESATA_PRX_DTX_P4_C 39
ESATA_PTX_DRX_N4_C 39
ESATA_PTX_DRX_P4_C 39
Y3
Y1
AB3
AB1
SATA_PRX_DKTX_N5_C 40
SATA_PRX_DKTX_P5_C 40
SATA_PTX_DKRX_N5_C 40
SATA_PTX_DKRX_P5_C 40
+1.05V_RUN
Y11
+SATA_COMP
1
RH40
1
RH42
2
49.9_0402_1%~D
1
RH46
DOCK
B
2
37.4_0402_1%~D
+SATA3_COMP
E-SATA
2
750_0402_1%~D
+1.05V_RUN
AH1
RBIAS_SATA3
P3
SATA_ACT#
+3.3V_RUN
SPI_CS0#
SPI_CS1#
C
No Reboot Strap
Y7
Y5
AD3
AD1
Y10
1
8.2K_0402_5%~D
1
10K_0402_5%~D
1
100K_0402_5%~D
1
4.7K_0402_5%~D
SPKR
RH30
10K_0402_5%~D
SATALED#
SPI_MOSI
SATA0GP / GPIO21
V14
SATA1GP / GPIO19
P1
BBS_BIT0_R
SATA_ACT#
HDD_DET#_R
SPI_MISO
SPI_PCH_CS1#1
R935
SPI_PCH_DIN 1
R895
SPI_WP#_SEL
1
SPI_PCH_CLK
@ R896
@R896
2
33_0402_5%~D
SPI_PCH_DO
2
33_0402_5%~D
2
RH28
PCH_AZ_SYNC_Q 2
RH37
PCH_GPIO33
2
RH355
BBS_BIT0_R
2
RH51
SPKR
1
RH290
3
1
QH1
CougarPoint_Rev_1p0
45
2
0_0402_5%~D
HDD_DET#
28
PCH_SATA_MOD_EN# 42
BSS138W-7-F_SOT323-3~D
7,17 PCH_PLTRST#
1
2 SPI_CS1#
47_0402_5%~D
2 SPI_DIN32
33_0402_5%~D
2
0_0402_5%~D
200 MIL SO8
16Mb Flash ROM
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
BBS_BIT0 - BIOS BOOT STRAP BIT 0
A
R892
3.3K_0402_5%~D
U53 X76@
1
C745
0.1U_0402_16V4Z~D
1
2
VCC
8
/HOLD(IO3)
7
CLK
6
DI(IO0)
5
DELL CONFIDENTIAL/PROPRIETARY
SPI_CLK32 1
R897
SPI_DO32 1
R900
2 SPI_PCH_CLK
33_0402_5%~D
2 SPI_PCH_DO
33_0402_5%~D
Compal Electronics, Inc.
Title
PCH (1/8)
Size
W25Q16BVSSIG_SO8~D
W25Q64BVSSIG_SO8~D
Document Number
Rev
1.0
LA-6591P
Date:
4
PCH_JTAG_TDI
PCH_JTAG_TMS
+3.3V_RUN
HRS_FH12-16S-0P5SH(55)~D
5
XDP_DBRESET# 7,16
PCH_JTAG_TDO
AB8
AB10
AF3
AF1
AB13
SPI_CLK
R888
3.3K_0402_5%~D
7
CLK
RSMRST#_XDP
XDP_DBRESET#
AD7
AD5
AH5
AH4
2
/CS
SATA_ODD_PRX_DTX_N1_C
SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_N1_C
SATA_ODD_PTX_DRX_P1_C
V4
C746
0.1U_0402_16V4Z~D
1
2
U52 X76@
1
+3.3V_ALW_PCH
IRQ_SERIRQ
AM10
AM8
AP11
AP10
U3
R891
3.3K_0402_5%~D
64Mb Flash ROM
XDP_FN14
XDP_FN15
+3.3V_RUN
PSATA_PRX_DTX_N0_C 28
PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28
PCH_SPI_DIN
1
1
2 SPI_CS0#
47_0402_5%~D
2 SPI_DIN64
33_0402_5%~D
2
0_0402_5%~D
200 MIL SO8
D
XDP_FN12
XDP_FN13
33,34,41,42
33,34,41,42
33,34,41,42
33,34,41,42
AB12
+3.3V_SPI
R890
3.3K_0402_5%~D
IRQ_SERIRQ
PCH_SPI_DO
3
2
1
R933
1
R894
SPI_WP#_SEL
1
@ R898
SPI_PCH_DIN
SATAICOMPO
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
AM3
AM1
AP7
AP5
SATA3COMPI
SSM3K7002FU_SC70-3~D
QH7
+3.3V_SPI
2
SPI_PCH_CS0#
1
1M_0402_5%~D
JTAG_TDI
D
+3.3V_SPI
+3.3V_M
2 PCH_AZ_SYNC_Q
33_0402_5%~D
JTAG_TMS
V5
SATA3RCOMPO
PCH_SPI_CS1#
1
RH33
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
JTAG_TCK
H1
PCH_SPI_CS0#
2
RH31
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
J3
PCH_JTAG_TDO
@ RH48
2
1
100_0402_1%~D
2
1
2
PCH_JTAG_TDI
31 PCH_AZ_MDC_SYNC
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
HDA_DOCK_RST# / GPIO13
1 200_0402_1%~D
S
2
0_0402_5%~D
1
RH345
1
RH346
1
RH347
1
RH348
1
RH349
41 SPI_WP#_SEL
LPC
USB30_SMI#
H7
G
17
18
SPI_PCH_CS1#
PCH_SPI_CS1#
SPI_PCH_DO
PCH_SPI_DO
SPI_PCH_DIN
PCH_SPI_DIN
SPI_PCH_CLK
PCH_SPI_CLK
SPI_PCH_CS0#
PCH_SPI_CS0#
HDA_SDO
HDA_DOCK_EN# / GPIO33
RH45 2
1
RH350
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
C36
PCH_JTAG_TMS
+3.3V_M
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
HDA_SDIN3
A36
1 200_0402_1%~D
17,34,36,37,41,42 PCH_PLTRST#_EC
G1
G2
A34
PCH_AZ_SDOUT
PCH_JTAG_TCK
High: Enable Intel
Anti-Theft Technology
Left floating: Disable Intel Anti-Theft Technology
A
HDA_SDIN2
RH44 2
+3.3V_SPI
XDP_FN10
XDP_FN11
33,34,41,42
HDA_SDIN1
1 51_0402_1%~D
SPI_MOSI
IRQ_SERIRQ
HDA_SDIN0
RH59 2
+3.3V_ALW_PCH_JTAG
XDP_FN8
XDP_FN9
41
41
HDA_RST#
E34
2
1K_0402_5%~D
29 USB30_SMI#
@ RH288
@RH288
0_0603_5%~D
CONN@
JSPI1
SPKR
K34
PCH_GPIO33
PCH_SPI_DO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
HDA_SYNC
G34
2 33_0402_5%~D
2 1K_0402_5%~D
2
@ RH295
8.2K_0402_5%~D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
HDA_BCLK
L34
C34
1
@ RH287
@RH287
+3.3V_ALW_PCH
+3.3V_RUN
B
N34
+3.3V_ALW_PCH
RH36 1
RH50 1
LPC_LDRQ0#
LPC_LDRQ1#
SERIRQ
PCH_AZ_MDC_SDIN1
31 PCH_AZ_MDC_SDOUT
41
ME_FWP
XDP_FN16
XDP_FN17
LPC_LFRAME# 33,34,41,42
E36
K36
INTVRMEN
PCH_AZ_CODEC_SDIN0
1
@ CH101
27P_0402_50V8J~D
C17
PCH_AZ_RST#
2
33_0402_5%~D
31 PCH_AZ_MDC_SDIN1
D36
LDRQ0#
LDRQ1# / GPIO23
JTAG
30 PCH_AZ_CODEC_BITCLK
2 PCH_AZ_SDOUT
33_0402_5%~D
2 PCH_AZ_SYNC_Q
33_0402_5%~D
2 PCH_AZ_RST#
33_0402_5%~D
2 PCH_AZ_BITCLK
33_0402_5%~D
INTRUDER#
SPKR
30 PCH_AZ_CODEC_SDIN0
1
RH29
1
RH26
1
RH27
1
RH25
30 PCH_AZ_CODEC_SDOUT
K22
PCH_AZ_BITCLK
2
33_0402_5%~D
PCH_AZ_SYNC
1
RH34
C38
A38
B37
C37
FWH4 / LFRAME#
T10
31 PCH_AZ_MDC_RST#
CMOS place near DIMM
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
SPI
1
CH5
@
CMOS1 SHORT PADS~D
1
2
1U_0402_6.3V6K~D
CH4
SHORT PADS~D
2
1U_0402_6.3V6K~D
SRTCRST#
PCH_INTVRMEN
1
RH32
31 PCH_AZ_MDC_BITCLK
@
ME1
RTCRST#
INTRUDER#
2
2
D20
G22
2
2
RTCX2
SRTCRST#
2
1
@ CH100
27P_0402_50V8J~D
1
RTCX1
PCH_RTCX2
2
0_0402_5%~D
2
20K_0402_5%~D
2
20K_0402_5%~D
2
1M_0402_5%~D
C
1
A20
C20
PCH_RTCRST#
1
RH286
SATA 6G
1
RH22
1
RH23
1
RH11
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
SAMTE_BSH-030-01-L-D-A
UH4A
RTC
CH3
18P_0402_50V8J~D
2
1
+RTC_CELL
RH2
10M_0402_5%~D
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
2
INTVRMEN- Integrated SUS
1.1V VRM Enable
* High - Enable Internal VRs
Low - Enable External VRs
7,12,13,15,28,36 DDR_XDP_WAN_SMBDAT
7,12,13,15,28,36 DDR_XDP_WAN_SMBCLK
PCH_RTCX1
1
2
CH2
18P_0402_50V8J~D
2
1
IHDA
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
@ RH39
@RH39
330K_0402_5%~D
@ JXDP2
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
1
+3.3V_ALW_PCH
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
Keep CMOS
@ RH1
@ RH3
@ RH4
@ RH5
@ RH6
@ RH7
@ RH8
@ RH9
@ RH10
@ RH12
@ RH13
@ RH14
@ RH15
@ RH16
@ RH17
@ RH18
@ RH19
@ RH20
S
Open
17 USB_OC0#_R
17 USB_OC1#_R
17 USB_OC2#
17 USB_OC3#
17 USB_OC4#
17 USB_OC5#
17 USB_OC6#
17,42 SIO_EXT_SMI#
18,41 SLP_ME_CSW_DEV#
18,36 USB_MCARD1_DET#
1
D
Clear CMOS
2
1
Shunt
3
Can be place in 0 height area.
2
G
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
CMOS setting
SATA
5
CMOS_CLR1
3
2
Monday, January 10, 2011
Sheet
1
14
of
66
5
4
3
2
1
2
+3.3V_RUN
MEM_SMBCLK
QH5A
DMN66D0LDW-7_SOT363-6~D
1
DDR_XDP_WAN_SMBCLK 7,12,13,14,28,36
5
6
MEM_SMBDATA
PERN1
PERP1
PETN1
PETP1
SMBCLK
PERN2
PERP2
PETN2
PETP2
37
37
37
37
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
BG36
BJ36
AV34
AU34
PERN3
PERP3
PETN3
PETP3
E3 Module Bay--- & gt;
29
29
29
29
PCIE_PRX_EMBTX_N4
PCIE_PRX_EMBTX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_EMBRX_P4
BF36
BE36
AY34
BB34
SMBDATA
PERN4
PERP4
PETN4
PETP4
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
BJ38
BG38
AU36
AV36
32
32
32
32
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
MiniWWAN (Mini Card 1)--- & gt;
10/100/1G LAN --- & gt;
32 CLK_PCIE_LAN#
32 CLK_PCIE_LAN
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_MINI1#
PCIE_MINI1
2
RH82 2
RH83
1
1 0_0402_5%~D
0_0402_5%~D
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
32 LANCLK_REQ#
MMI Card--- & gt;
MiniWPAN (Mini Card 3)--- & gt;
Express card--- & gt;
MiniWLAN (Mini Card 2)--- & gt;
35 CLK_PCIE_MMI#
35 CLK_PCIE_MMI
+3.3V_RUN
35 MMICLK_REQ#
36 CLK_PCIE_MINI3#
36 CLK_PCIE_MINI3
+3.3V_ALW_PCH
36 MINI3CLK_REQ#
MINI1CLK_REQ#
2
RH85 2
RH86 1
RH87
2
RH88 2
RH90 2
RH152
1
1 0_0402_5%~D
2 0_0402_5%~D
10K_0402_5%~D
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_MMI#
PCIE_MMI
MMICLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
Y40
Y39
J2
AB49
AB47
M1
AA48
AA47
V10
Y37
Y36
A8
37 CLK_PCIE_EXP#
37 CLK_PCIE_EXP
+3.3V_ALW_PCH
37 EXPCLK_REQ#
2
RH92 2
RH93 2
RH94
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_EXP#
PCIE_EXP
Y43
Y45
EXPCLK_REQ#
L12
36 CLK_PCIE_MINI2#
36 CLK_PCIE_MINI2
+3.3V_ALW_PCH
36 MINI2CLK_REQ#
2
RH95 2
RH96 2
RH97
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_MINI2#
PCIE_MINI2
V45
V46
MINI2CLK_REQ#
L14
AB42
AB40
+3.3V_ALW_PCH
1
RH98
2
10K_0402_5%~D
PEG_B_CLKRQ#
E6
V40
V42
T13
A
29 CLK_PCIE_EMB#
29 CLK_PCIE_EMB
+3.3V_ALW_PCH
29 EMBCLK_REQ#
2
RH3102
RH3122
RH104
1
1 0_0402_5%~D
1 0_0402_5%~D
10K_0402_5%~D
PCIE_EMB#
PCIE_EMB
7 CLK_CPU_ITP#
7 CLK_CPU_ITP
eModule Bay--- & gt;
2
RH2802
RH281
1
1 0_0402_5%~D
0_0402_5%~D
CLK_BCLK_ITP# AK14
CLK_BCLK_ITP AK13
EMBCLK_REQ#
V38
V37
K12
A12
DDR_HVREF_RST_PCH
C8
LAN_SMBCLK
G12
LAN_SMBDATA
DDR_HVREF_RST_PCH 7
SML1_SMBCLK
LAN_SMBDATA 32
C13
SML1_SMBCLK
M16
SML1_SMBDATA
+3.3V_ALW_PCH
M7
CL_DATA1
PCH_CL_DATA1
CL_RST1#
P10
DDR_HVREF_RST_PCH 2
RH300
GPIO74
2
RH301
MEM_SMBCLK
2
RH302
MEM_SMBDATA
2
RH303
PCH_SMB_ALERT#
2
RH304
PEG_A_CLKRQ#
2
RH80
SML1_SMBDATA 42
PCH_CL_CLK1
PCH_CL_RST1#
PCH_CL_CLK1 36
PCH_CL_DATA1 36
C
+3.3V_LAN
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
PCIECLKRQ1# / GPIO18
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
M10
PEG_A_CLKRQ#
LAN_SMBDATA
2
RH305
2
RH306
AV22
AU22
CLK_CPU_DMI#
CLK_CPU_DMI
AM12
AM13
CLK_CPU_DPLL#
CLK_CPU_DPLL
BF18
BE18
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_CPU_DMI# 7
CLK_CPU_DMI 7
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_CPU_DPLL# 7
CLK_CPU_DPLL 7
1
RH74 1
RH75
CLK_BUF_BCLK
CLKIN_DMI_N
CLKIN_DMI_P
PCIECLKRQ2# / GPIO20
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
AB37
AB38
2
2 10K_0402_5%~D
10K_0402_5%~D
1
2
RH91
10K_0402_5%~D
CLKIN_GND1_N
CLKIN_GND1_P
PCIECLKRQ3# / GPIO25
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKOUT_PCIE4N
CLKOUT_PCIE4P
CLKIN_SATA_N
CLKIN_SATA_P
PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
REFCLK14IN
PCIECLKRQ5# / GPIO44
CLKIN_PCILOOPBACK
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
XTAL25_IN
XTAL25_OUT
BJ30
BG30
CLK_BUF_BCLK
G24
E24
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
1
CLK_BUF_CKSSCD
RH78 1
RH79
2
2 10K_0402_5%~D
10K_0402_5%~D
CLK_PCH_14M
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
2
AK7
AK5
1
RH76 1
RH77
2
2 10K_0402_5%~D
10K_0402_5%~D
B
K45
CLK_PCI_LOOPBACK
V47
V49
XTAL25_IN
XTAL25_OUT
10K_0402_5%~D
CLK_PCH_14M
H45
1
RH183
CLOCK TERMINATION for FCIM and need close to PCH
CLK_PCI_LOOPBACK 17
2
RH309
1
0_0402_5%~D
RH99
1M_0402_5%~D
PEG_B_CLKRQ# / GPIO56
XCLK_RCOMP
XCLK_RCOMP
Y47
CLKOUTFLEX0 / GPIO64
K43
PCI_TCM
4@ RH311
2
1 22_0402_5%~D
SIO_14M
RH313
2
1 22_0402_5%~D
CLK_SIO_14M 41
CLKOUTFLEX2 / GPIO66
H47 PCI_TPM
RH314
2
1 22_0402_5%~D
CLK_PCI_TPM 33
CLKOUTFLEX3 / GPIO67
K49
@ RH315
2
1 22_0402_5%~D
YH2
25MHZ_18PF_7A25000110~D
2
1
CLK_PCI_TPM_CHA 34
F47
JETWAY_CLK14M 34
CLKOUT_PCIE6N
CLKOUT_PCIE6P
1
RH100
2
+1.05V_RUN
90.9_0402_1%~D
PCIECLKRQ6# / GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKOUTFLEX1 / GPIO65
JETWAY_14M
2
1
2
1
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
PCH (2/8)
4
3
2
Size
Document Number
Date:
5
1
1K_0402_5%~D
1
10K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
1
10K_0402_5%~D
PCH_CL_RST1# 36
LAN_SMBCLK
PEG_A_CLKRQ# / GPIO47
CLKOUT_PCIE1N
CLKOUT_PCIE1P
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
SML1_SMBCLK 42
T11
CL_CLK1
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
1
RH298
1
RH299
GPIO74
E14
CougarPoint_Rev_1p0
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
+3.3V_ALW_PCH
LAN_SMBCLK 32
SML1DATA / GPIO75
PERN8
PERP8
PETN8
PETP8
2
RH3072
RH3082
RH81
MEM_SMBDATA
SML1CLK / GPIO58
PERN7
PERP7
PETN7
PETP7
36 CLK_PCIE_MINI1#
36 CLK_PCIE_MINI1
+3.3V_ALW_PCH
36 MINI1CLK_REQ#
MEM_SMBCLK
C9
2
0_0402_5%~D
PCH_SMB_ALERT#
H14
SML1ALERT# / PCHHOT# / GPIO74
PERN6
PERP6
PETN6
PETP6
BG40
BJ40
AY40
BB40
1
@ RH297
E12
SML1_SMBDATA
Controller
10/100/1G LAN --- & gt;
35
35
35
35
SML0DATA
FLEX CLOCKS
C
PERN5
PERP5
PETN5
PETP5
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5
SML0CLK
CLOCKS
MMI --- & gt;
BG37
BH37
AY36
BB36
BE38
BC38
AW38
AY38
1/2vMINI CARD-3 PCIE
(Mini Card 3)--- & gt;
36
36
36
36
SML0ALERT# / GPIO60
PCI-E*
EXPRESS Card--- & gt;
B
SMBALERT# / GPIO11
2
0_0402_5%~D
CH19
18P_0402_50V8J~D
BE34
BF34
BB32
AY32
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2
D
1
@ RH296
CH18
18P_0402_50V8J~D
BG34
BJ34
AV32
AU32
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
DDR_XDP_WAN_SMBDAT 7,12,13,14,28,36
1
36
36
36
36
UH4B
Link
MiniWLAN (Mini Card 2)--- & gt;
36
36
36
36
4
QH5B
DMN66D0LDW-7_SOT363-6~D
SMBUS
MiniWWAN (Mini Card 1)--- & gt;
3
2
Follow DG0.9 Device down & Express/Mini card
topology
D
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
15
of
66
5
4
3
2
1
1
2
1
2 SYS_PWROK
0_0402_5%~D
1
@ RH321
PCH_RI#
2
10K_0402_5%~D
ME_SUS_PWR_ACK_R
1
RH323
6
PCH_CRT_DDC_CLK
PCH_SDVO_CTRLCLK
2
RH351
PCH_SDVO_CTRLDATA 2
RH352
PCH_CRT_DDC_CLK 25
QH6A
DMN66D0LDW-7_SOT363-6~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
D
+3.3V_RUN
DSWODVREN - On Die DSW VR Enable
G_DAT_DDC2
Enabled (DEFAULT)
1
RH140
2
G_CLK_DDC2
2
RESET_OUT#
SIO_SLP_LAN#
2
10K_0402_5%~D
1
@ RH319
+3.3V_RUN
5
PCH_PCIE_WAKE#
2
10K_0402_5%~D
RH317
ME_SUS_PWR_ACK
2
10K_0402_5%~D
1
RH142
2.2K_0402_5%~D
2.2K_0402_5%~D
1
RH144
2PCH_RSMRST#_R
0_0402_5%~D
1
RH113
RH316
PCH_DPWROK
D
2.2K_0402_5%~D
2.2K_0402_5%~D
SUS_STAT#/LPCPD#
2
10K_0402_5%~D
1
@ RH318
1
+3.3V_RUN
+3.3V_ALW_PCH
2 SUSACK#_R
0_0402_5%~D
QH6B
DMN66D0LDW-7_SOT363-6~D
PCH_CRT_DDC_DAT
3
4
PCH_CRT_DDC_DAT 25
HIGH: R221 STUFFED,
R222 UNSTUFFED
+3.3V_RUN
PCH_RSMRST#_Q
1
RH137
1
RH322
Disabled
2
10K_0402_5%~D
ME_SUS_PWR_ACK
1
@ RH145
CLKRUN#
2
8.2K_0402_5%~D
2
10K_0402_5%~D
LOW: R221 STUFFED,
R222 UNSTUFFED
L_DDC_DATA - LVDS Detected
1
LVDS is detected
0
LVDS is not detected
Intel request DDPB can not support eDP
UH4C
UH4D
AY24
AY20
AY18
AU18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
AW16
FDI_INT
FDI_FSYNC0
AV12
FDI_FSYNC0
FDI_FSYNC1
BC10
FDI_FSYNC1
AV14
FDI_LSYNC0
BB10
FDI_LSYNC1
FDI_INT
+1.05V_RUN
BJ24
DMI_COMP_R
2
49.9_0402_1%~D
RBIAS_CPY
2
750_0402_1%~D
1
RH111
1
RH112
BG25
BH21
DMI_ZCOMP
DMI_IRCOMP
DMI2RBIAS
FDI_LSYNC0
FDI_LSYNC1
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
6
6
6
6
6
6
6
6
24 BIA_PWM_PCH
24 LDDC_CLK_PCH
24 LDDC_DATA_PCH
6
6
6
6
6
6
6
6
1
@ RH114
SUSACK#
SUSACK#_R
2
0_0402_5%~D
C12
XDP_DBRESET# K3
7,14 XDP_DBRESET#
SUSACK#
SYS_RESET#
B
7,41 SYS_PWROK
1
RH116
2
0_0402_5%~D
42 RESET_OUT#
1
RH117
2
0_0402_5%~D
42 PM_APWROK
1
RH118
SYS_PWROK_R P12
2
0_0402_5%~D
PCH_PWROK L22
PM_APWROK_R
L10
7 PM_DRAM_PWRGD
1
RH320
PM_DRAM_PWRGD_R B13
2
0_0402_5%~D
14,42 PCH_RSMRST#_Q
1
RH120
2
0_0402_5%~D
42 ME_SUS_PWR_ACK
1
RH121
2
0_0402_5%~D
PCH_RSMRST#_R C21
ME_SUS_PWR_ACK_R K16
SYS_PWROK
PWROK
APWROK
DRAMPWROK
RSMRST#
System Power Management
41
DPWROK
A18
E22
DSWODVREN
FDI_FSYNC0
PCH_DPWROK
6
FDI_LSYNC0
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
@ RH129
@RH1291
1
RH122
SIO_PWRBTN#_R E20
2
0_0402_5%~D
6
2 330K_0402_1%~D
B9
PCH_PCIE_WAKE#
N3
CLKRUN#
G8
SUS_STAT#/LPCPD#
T56
PAD~D
N14
SUSCLK
T57
SLP_S3#
PAD~D
D10
SIO_SLP_S5#
H4
SIO_SLP_S4#
CLKRUN#
F4
SIO_SLP_S3#
PWRBTN#
SLP_A#
G10
ACPRESENT / GPIO31
SLP_SUS#
G16
1
RH139
PCH_BATLOW#
2
8.2K_0402_5%~D
PCH_RI#
E10
A10
BATLOW# / GPIO72
PMSYNCH
RI#
SLP_LAN# / GPIO29
L_IBG
2
2.37K_0402_1%~D
1
RH344
AF37
AF36
AN48
AM47
AK47
AJ48
24 LCD_A0+_PCH
24 LCD_A1+_PCH
24 LCD_A2+_PCH
AN47
AM49
AK49
AJ47
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
24 LCD_BCLK-_PCH
24 LCD_BCLK+_PCH
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AF40
AF39
24 LCD_B0-_PCH
24 LCD_B1-_PCH
24 LCD_B2-_PCH
AH45
AH47
AF49
AF45
24 LCD_B0+_PCH
24 LCD_B1+_PCH
24 LCD_B2+_PCH
AH43
AH49
AF47
AF43
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
AP14
H_PM_SYNC
K14
SIO_SLP_LAN#
N48
P49
T49
T39
M40
20_0402_1%~D
2 HSYNC
2 VSYNC
20_0402_1%~D
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
M47
M49
CRT_BLUE
CRT_GREEN
CRT_RED
PAD~D
CRT_DDC_CLK
CRT_DDC_DATA
PAD~D
SIO_SLP_S3# 41
PAD~D
25 PCH_CRT_HSYNC
25 PCH_CRT_VSYNC
SIO_SLP_A# 41,50
SIO_SLP_SUS#
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
G_CLK_DDC2
G_DAT_DDC2
25 PCH_CRT_BLU
25 PCH_CRT_GRN
25 PCH_CRT_RED
RH123
1
1
RH124
CRT_IREF
PAD~D
SIO_SLP_SUS# 41
AP39
AP40
SDVO_CTRLCLK
SDVO_CTRLDATA
LVD_VREFH
LVD_VREFL
AK39
AK40
AM42
AM40
SDVO_INTN
SDVO_INTP
LVD_IBG
LVD_VBG
AE48
AE47
SIO_SLP_S4# 41
T63
+3.3V_ALW_PCH
34,41,42
SIO_SLP_S5# 42
T62
H20
42 AC_PRESENT
L_CTRL_CLK
L_CTRL_DATA
AP43
AP45
SDVO_STALLN
SDVO_STALLP
PAD~D
PCH_PCIE_WAKE# 41
T60
SUSWARN#/SUSPWRDNACK/GPIO30
L_DDC_CLK
L_DDC_DATA
PCH_DPWROK 41
T61
7,14 SIO_PWRBTN#_R
42 SIO_PWRBTN#
L_BKLTCTL
T40
K47
SDVO_TVCLKINN
SDVO_TVCLKINP
2 330K_0402_1%~D
T59
SLP_S4#
P45
LDDC_CLK_PCH
LDDC_DATA_PCH
6
FDI_LSYNC1
T58
WAKE#
L_BKLTEN
L_VDD_EN
24 LCD_A0-_PCH
24 LCD_A1-_PCH
24 LCD_A2-_PCH
6
FDI_FSYNC1
RH1271
J47
M45
BIA_PWM_PCH
24 LCD_ACLK-_PCH
24 LCD_ACLK+_PCH
6
+RTC_CELL
DSWVRMEN
PANEL_BKEN_PCH
ENVDD_PCH
T45
P39
24 PANEL_BKEN_PCH
24,41 ENVDD_PCH
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
Digital Display Interface
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
LVDS
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
AW24
AW20
BB18
AV18
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
6
6
6
6
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
CRT_HSYNC
CRT_VSYNC
T43
T42
DAC_IREF
CRT_IRTN
1
6
6
6
6
BE24
BC20
BJ18
BJ20
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
PAD~D
C
P38
M39
PCH_SDVO_CTRLCLK 26
PCH_SDVO_CTRLDATA 26
AT49
AT47
AT40
HDMIB_PCH_HPD 26
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
TMDSB_PCH_N2 26
TMDSB_PCH_P2 26
TMDSB_PCH_N1 26
TMDSB_PCH_P1 26
TMDSB_PCH_N0 26
TMDSB_PCH_P0 26
TMDSB_PCH_CLK# 26
TMDSB_PCH_CLK 26
P46
P42
HDMI D2
HDMI D1
HDMI D0
HDMI CLK
PCH_DDPC_CTRLCLK 27
PCH_DDPC_CTRLDATA 27
AP47
AP49
AT38
DPC_PCH_DOCK_AUX# 27
DPC_PCH_DOCK_AUX 27
DPC_PCH_DOCK_HPD 40
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
DPC_PCH_LANE_N0
DPC_PCH_LANE_P0
DPC_PCH_LANE_N1
DPC_PCH_LANE_P1
DPC_PCH_LANE_N2
DPC_PCH_LANE_P2
DPC_PCH_LANE_N3
DPC_PCH_LANE_P3
M43
M36
40
40
40
40
40
40
40
40
B
PCH_DDPD_CTRLCLK 27
PCH_DDPD_CTRLDATA 27
AT45
AT43
BH41
DPD_PCH_DOCK_AUX# 27
DPD_PCH_DOCK_AUX 27
DPD_PCH_DOCK_HPD 40
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
DPD_PCH_LANE_N0
DPD_PCH_LANE_P0
DPD_PCH_LANE_N1
DPD_PCH_LANE_P1
DPD_PCH_LANE_N2
DPD_PCH_LANE_P2
DPD_PCH_LANE_N3
DPD_PCH_LANE_P3
40
40
40
40
40
40
40
40
CougarPoint_Rev_1p0
H_PM_SYNC 7
RH126
1K_0402_0.5%~D
2
C
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
BC24
BE20
BG18
BG20
FDI
6
6
6
6
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI
6
6
6
6
SIO_SLP_LAN# 32,41
CougarPoint_Rev_1p0
A
1
RH131
1
RH132
1
RH133
1
RH134
A
2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 ENVDD_PCH
100K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (3/8)
Size
Document Number
Rev
1.0
LA-6591P
Date:
5
4
3
2
Monday, January 10, 2011
Sheet
1
16
of
66
5
4
3
2
1
+3.3V_RUN
1
RH324
PCI_PIRQA#
2
8.2K_0402_5%~D
1
RH325
PCI_PIRQB#
2
8.2K_0402_5%~D
UH4E
1
RH327
PCI_REQ1#
2
10K_0402_5%~D
1
RH330
ATG_MAC_LCD_DET#
2
10K_0402_5%~D
1
RH331
CAM_MIC_CBL_DET#
2
10K_0402_5%~D
1
RH328
BT_DET#
2
10K_0402_5%~D
1
@ RH332
PCH_GPIO3
2
10K_0402_5%~D
C
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
1
PCI_GNT3#
2
@ RH333
1K_0402_5%~D
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
Swap Override jumper
36 PCIE_MCARD2_DET#
43
BT_DET#
Low = A16 swap
K40
K38
H38
G38
PCI_REQ1#
A16 swap override Strap/Top-Block
PCI_GNT#3
TP21
TP22
TP23
TP24
C46
C44
E40
BT_DET#
BBS_BIT1
High = Default
B
D47
E42
F46
PCI_GNT3#
24 ATG_MAC_LCD_DET#
24 CAM_MIC_CBL_DET#
1
2
RH334
0_0402_5%~D
28 HDD_FALL_INT
33
35
7
32
29
PLTRST_USH#
PLTRST_MMI#
PLTRST_XDP#
PLTRST_LAN#
PLTRST_EMB#
RH335
RH336
RH337
RH338
RH340
1
1
1
1
1
2
2
2
2
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
41 CLK_PCI_5028
42 CLK_PCI_MEC
40 CLK_PCI_DOCK
15 CLK_PCI_LOOPBACK
RH160
RH102
RH103
PAD~D
T104 @
K10
PCH_PLTRST#
2
2
1
2
RH105
ATG_MAC_LCD_DET# G42
PCH_GPIO3
G40
CAM_MIC_CBL_DET# C42
FFS_PCH_INT
D44
C6
PCI_5028
1
PCI_MEC
1 22_0402_5%~D
PCI_DOCK
2 22_0402_5%~D
33_0402_5%~D
PCI_LOOPBACKOUT
1
22_0402_5%~D
H49
H43
J48
K42
H40
RSVD5
RSVD6
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
RSVD23
RSVD24
AV5
AV10
RSVD25
AT8
RSVD26
RSVD27
AY5
BA2
RSVD28
RSVD29
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
D
AY7
AV7
AU3
BG4
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
AT12
BF3
C
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+
USBP13USBP13+
USBRBIAS#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
USBRBIAS
USBRBIAS
PIRQA#
PIRQB#
PIRQC#
PIRQD#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USB
1
RH329
PCI_PIRQD#
2
8.2K_0402_5%~D
RSVD
PCI_PIRQC#
2
8.2K_0402_5%~D
RSVD1
RSVD2
RSVD3
RSVD4
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
B21
M20
AY16
BG46
1
RH326
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
PCI
D
B33
USBP0- 38
USBP0+ 38
USBP1- 38
USBP1+ 38
USBP2- 39
USBP2+ 39
USBP3- 31
USBP3+ 31
USBP4- 36
USBP4+ 36
USBP5- 36
USBP5+ 36
USBP6- 36
USBP6+ 36
USBP7- 33
USBP7+ 33
USBP8- 40
USBP8+ 40
USBP9- 40
USBP9+ 40
USBP10- 37
USBP10+ 37
USBP11- 43
USBP11+ 43
USBP12- 24
USBP12+ 24
USBP13- 24
USBP13+ 24
----- & gt; Right Side 1
----- & gt; Right Side 2
----- & gt; Right Side (ESATA)
----- & gt; Left Side
----- & gt; WLAN/WIMAX
----- & gt; WWAN/UWB
----- & gt; Flash
----- & gt; USH
----- & gt; DOCK
----- & gt; DOCK
----- & gt; Express Card
----- & gt; Blue Tooth
----- & gt; Camera
----- & gt; LCD Touch
Within 500 mils
1
2
RH151
22.6_0402_1%~D
USB_OC5#
USB_OC6#
USB_OC2#
PME#
PLTRST#
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
A14
K20
B17
C16
L16
A16
D14
C14
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
1
RH3391
RH341
2
2 0_0402_5%~D
0_0402_5%~D
4
3
2
1
5
6
7
8
B
10K_1206_8P4R_5%~D
RPH2
4
5
3
6
2
7
1
8
10K_1206_8P4R_5%~D
USB_OC0#
39
USB_OC1#
31,39
USB_OC2#
14
USB_OC3#
14
USB_OC4#
14
USB_OC5#
14
USB_OC6#
14
SIO_EXT_SMI# 14,42
SIO_EXT_SMI# 2
RH41
1
10K_0402_5%~D
USB_OC0#_R 14
USB_OC1#_R 14
CougarPoint_Rev_1p0
+3.3V_RUN
+3.3V_ALW_PCH
RPH1
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#
CH102
0.1U_0402_16V4Z~D
1
2
BBS_BIT1
O
A
4
SATA_SLPD
(BBS_BIT0)
A
Boot BIOS Location
PCH_PLTRST#_EC 14,34,36,37,41,42
0
0
LPC
0
1
Reserved (NAND)
1
0
PCI
1
1
BBS_BIT1
SPI
TC7SH08FU_SSOP5~D
1
2
B
@ RH342
1K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
2
1
G
PCH_PLTRST#
3
7,14 PCH_PLTRST#
UH3
P
5
Boot BIOS Strap
A
PCH (4/8)
Size
*
4
3
Rev
1.0
LA-6591P
Date:
5
Document Number
2
Monday, January 10, 2011
Sheet
1
17
of
66
5
4
3
2
1
+3.3V_RUN
CONTACTLESS_DET# 1
RH256
+3.3V_ALW_PCH
2
10K_0402_1%~D
D
D
IO_LOOP#
SIO_EXT_WAKE#
41 SIO_EXT_WAKE#
C41
PCIE_MCARD3_DET# 36
TACH7 / GPIO71
A40
USB_MCARD2_DET# 36
GPIO15
U2
MEDIA_DET#
TACH0 / GPIO17
2
T5
E3_PAID_TS_DET#
SCLOCK / GPIO22
SLP_ME_CSW_DEV#
SLP_ME_CSW_DEV#
C
E16
GPIO27
P8
FFS_INT2
43
V8
INIT3_3V#
DF_TVS
AY1
M3
V13
+3.3V_RUN
+1.05V_RUN_VTT
H_CPUPWRGD 7
2
RH262
@ T106
SIO_A20GATE
1
56_0402_5%~D
2
RH158
2
RH203
PCH_GPIO1
1
RH164
SIO_EXT_SCI#
1
RH263
SIO_RCIN#
1
CH97
0.1U_0402_16V4Z~D
KB_DET#
SLOAD / GPIO38
C
NC_1
NC_1
BG2
VSS_NCTF_16
BH3
VSS_NCTF_17
BH47
VSS_NCTF_18
BJ4
VSS_NCTF_19
BJ44
VSS_NCTF_20
BJ45
VSS_NCTF_21
BJ46
VSS_NCTF_22
VSS_NCTF_23
BJ5
VSS_NCTF_23
BJ6
VSS_NCTF_24
VSS_NCTF_15
SATA5GP / GPIO49
VSS_NCTF_16
GPIO57
VSS_NCTF_17
A4
A44
VSS_NCTF_3
A45
A46
A5
VSS_NCTF_5
VSS_NCTF_6
A6
VSS_NCTF_6
VSS_NCTF_24
VSS_NCTF_19
VSS_NCTF_2
VSS_NCTF_20
VSS_NCTF_3
VSS_NCTF_21
NCTF
VSS_NCTF_1
VSS_NCTF_4
VSS_NCTF_22
VSS_NCTF_7
B3
VSS_NCTF_7
VSS_NCTF_25
C2
B47
VSS_NCTF_8
VSS_NCTF_26
C48
VSS_NCTF_26
VSS_NCTF_9
BD1
VSS_NCTF_9
VSS_NCTF_27
D1
VSS_NCTF_27
VSS_NCTF_10
BD49
VSS_NCTF_10
VSS_NCTF_28
D49
VSS_NCTF_28
VSS_NCTF_11
BE1
VSS_NCTF_11
VSS_NCTF_29
E1
VSS_NCTF_29
VSS_NCTF_12
BE49
VSS_NCTF_12
VSS_NCTF_30
E49
VSS_NCTF_30
VSS_NCTF_13
BF1
VSS_NCTF_13
VSS_NCTF_31
F1
VSS_NCTF_31
VSS_NCTF_14
BF49
VSS_NCTF_14
VSS_NCTF_32
F49
PLACE RH150 CLOSE TO THE BRANCHING POINT
( TO CPU and NVRAM CONNECTOR)
VSS_NCTF_25
VSS_NCTF_8
VSS_NCTF_32
B
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
@ T108
VSS_NCTF_15
BG48
SDATAOUT1 / GPIO48
D6
SIO_EXT_WAKE#
2
10K_0402_5%~D
AK10
P37
SDATAOUT0 / GPIO39
VSS_NCTF_5
+3.3V_ALW_PCH
KB_DET#
2
10K_0402_5%~D
+VCCDFTERM
RH149
2.2K_0402_5%~D
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
DF_TVS_R1
RH150
DMI & FDI Termination Voltage
DF_TVS
+3.3V_RUN
2
Set to Vcc when HIGH
1
3@ RH268
20K_0402_5%~D
2
1@ RH267
10K_0402_5%~D
1
TPM_ID1
2@ RH270
10K_0402_5%~D
TPM_ID1
0
0
0
1
1
1
No TPM, No China TPM
1
2
TPM_ID0
TPM_ID0
China TPM
4@ RH271
2.2K_0402_5%~D
USH2.0
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
2
IO_LOOP#
2
10K_0402_5%~D
LEDB_DET#
2
10K_0402_5%~D
GPIO17
1
1K_0402_5%~D
Set to Vss when LOW
+3.3V_RUN
1
1
RH163
1
RH272
2
@ RH273
2 DF_TVS
0_0402_5%~D
CougarPoint_Rev_1p0
GPIO36
1
10K_0402_5%~D
GPIO37
1
1K_0402_5%~D
EN_ESATA_RPTR#
1
10K_0402_5%~D
TEMP_ALERT#
1
10K_0402_5%~D
MEDIA_DET#
1
10K_0402_5%~D
GPIO17
2
8.2K_0402_5%~D
B
RH149 need to close to CPU
RH171, RH173 should be no pop as reverse strap.
1
RH269
1
10K_0402_5%~D
1
10K_0402_5%~D
2
10K_0402_5%~D
2
10K_0402_5%~D
AH10
VSS_NCTF_4
A
7
42
AK11
VSS_NCTF_2
2
@ RH171
2
@ RH173
2
RH265
2
RH266
2
RH179
2
1.5K_0402_1%~D
42
AH8
VSS_NCTF_1
+3.3V_RUN
SIO_RCIN#
PECI_EC
H_PECI
2
TS_VSS4
V3
+3.3V_ALW_PCH
1
RH170
2
0_0402_5%~D
2
0_0402_5%~D
DF_TVS
VSS_NCTF_18
1
RH177
1
RH260
SATA3GP / GPIO37
N2
1
RH261
SIO_A20GATE 42
1
@ RH159
PCH_THRMTRIP#_R
T14
SATA2GP / GPIO36
M5
TEMP_ALERT#
KB_DET#
AY10
INIT3_3V#
TS_VSS3
FFS_INT2
1
28
14,41 TEMP_ALERT#
THRMTRIP#
GPIO35
TPM_ID1
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
AY11
TS_VSS2
GPIO37
GPIO36
PROCPWRGD
H_CPUPWRGD
TS_VSS1
GPIO36
GPIO37
SIO_RCIN#
STP_PCI# / GPIO34
TPM_ID0
14
14
P5
GPIO28
K4
14,36 USB_MCARD1_DET#
@ RH353
1K_0402_5%~D
H_PECI_R
RCIN#
GPIO24 / MEM_LED
K1
24 E3_PAID_TS_DET#
SIO_A20GATE
AU16
SATA4GP / GPIO16
E8
36 PCIE_MCARD1_DET#
P4
A20GATE
PECI
D40
+3.3V_ALW_PCH
14,41 SLP_ME_CSW_DEV#
GPIO69
LAN_PHY_PWR_CTRL / GPIO12
EN_ESATA_RPTR#
31 MEDIA_DET#
CONTACTLESS_DET# 33
GPIO8
G2
GPIO17
1
TACH6 / GPIO70
PCH_GPIO15
14 EN_ESATA_RPTR#
2
GPIO69
C4
32 PM_LANPHY_ENABLE
14 PCH_GPIO15
RH356
4.7K_0402_5%~D
CONTACTLESS_DET#
B41
TACH3 / GPIO7
C10
C40
TACH5 / GPIO69
TACH2 / GPIO6
E38
TACH4 / GPIO68
TACH1 / GPIO1
H36
LEDB_DET#
IO_LOOP#
LEDB_DET#
BMBUSY# / GPIO0
2
T7
0_0402_5%~D
A42
1
31
31
SIO_EXT_SCI# 1
RH259
PCH_GPIO1
2
TLS Confidentiality
42 SIO_EXT_SCI#
CPU/MISC
PCH_GPIO15
Low = Intel ME Crypto Transport Layer
Security (TLS) cipher suite with no
confidentiality
High = Intel ME Crypto TLS cipher suite
with confidentiality
UH4F
14 SIO_EXT_SCI#_R
GPIO
2 PCH_GPIO15
1K_0402_5%~D
1
RH354
PCH (5/8)
Size
Document Number
Rev
1.0
LA-6591P
Date:
5
4
3
2
Monday, January 10, 2011
Sheet
1
18
of
66
5
4
+1.05V_RUN
3
UH4G
2
1
PCH Power Rail Table
POWER
Voltage Rail
AN16
AN17
CRT
LVDS
VCC CORE
VCCIO[16]
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
CH51
CH51
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2 +VCCAPLL_FDI
0.022_0805_1%
1
AP16
+1.05V_+1.5V_1.8V_RUN
+VCCAPLL_FDI
BG6
+1.05V_RUN
AP17
+1.05V_RUN_VTT
@ RH195
@RH195
AU20
B
DFT / SPI
BH29
2
AB36
VCCDFTERM[1]
VCC3_3[3]
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
VCCDFTERM[2]
1.05
0.08
1.05
1.3
VccDMI
1.05
0.042
1.05
2.925
1.05
1.01
3.3
0.020
3.3
0.003
VccpNAND
1
AG16
1
2
1
2
1U_0402_6.3V6K~D
CH49
2
1
+1.05V_RUN
LH9
HK1608R10J-T_0603~D
1.8
0.19
VccRTC
3.3
3.3
0.119
VccSusHDA
3.3
0.01
+VCCDFTERM
AG17
VccVRM
1
@ RH276
2
0_0805_5%~D
1.8 / 1.5
0.16
+3.3V_RUN
VccClkDMI
VCCSPI
VccSSC
AJ17
2
CH52
0.1U_0402_10V7K~D
V1
2
PAD-OPEN1x1m
0.055
3.3
0.001
1.8
0.06
+3.3V_M
2
CH54
1U_0402_6.3V6K~D
B
+1.05V_RUN
+1.05V_+1.5V_1.8V_RUN
1
0_0603_5%~D
2
@ RH198
0.095
1.05
+1.8V_RUN
1
2
RH197
1.05
VccTX_LVDS
1
1
0.02
VccALVDS
VCCDFTERM[4]
AJ16
1.05
VccDIFFCLKN
VCCDFTERM[3]
C
2 (mA)
VccSus3_3
PJP51
+1.5V_RUN
1
0_0603_5%~D
1
+1.05V_RUN
0.08
VccCore
+1.05V_RUN_VTT
CougarPoint_Rev_1p0
+1.8V_RUN
0.001
1.05
VccADPLLB
AT20
VCCIO[25]
+3.3V_RUN
+1.05V_RUN
VCCDMI[1]
VCCCLKDMI
VCCIO[26]
3.3
+1.05V_+1.5V_1.8V_RUN
2
AN33
AN34
1
AT16
@
@ CH106
10U_0603_4VAM~D
AP24
DMI
VCCIO[21]
0.266
VccASW
2
CH43
0.1U_0402_10V7K~D
V34
CH50
1U_0402_6.3V6K~D
2
CH48
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
CH47
1U_0402_6.3V6K~D
2
CH46
CH46
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
CH45
1U_0402_6.3V6K~D
CH44
CH44
10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
2
1
VCCIO[20]
AP23
3.3
VccADPLLA
+1.8V_RUN
+3.3V_RUN
2
VCCVRM[3]
VCCIO
AP21
1
V33
1
2
1
LH8
HK1608R10J-T_0603~D
1
VCC3_3[7]
0.001
Vcc3_3
VCCIO[18]
VCCIO[19]
VCC3_3[6]
0.001
5
D
VCCIO[17]
AN26
AN27
1
AP37
1
VCCAPLLEXP
AN21
+1.05V_RUN
C
AP36
2
VCCIO[15]
5
V5REF_Sus
VccIO
+1.8V_RUN_LVDS
AM38
VCCTX_LVDS[4]
HVCMOS
BJ22
V5REF
AM37
VCCIO[28]
FDI
CH40
10U_0805_4VAM~D
2 @
1
VCCTX_LVDS[2]
0.001
V_PROC_IO
+3.3V_RUN
CH105
CH105
22U_0805_6.3VAM~D
1
1
VCCTX_LVDS[1]
AK37
2
1.05
VccDSW3_3
VSSALVDS
2
1
CH36
CH36
10U_0805_4VAM~D
10U_0805_4VAM~D
1UH_LB2012T1R0M_20%~D
S0 Iccmax
Current (A)
Voltage
VccSPI
VCCALVDS
1
CH104
0.01U_0402_16V7K~D
+VCCAPLLEXP
2
1
AK36
VCCTX_LVDS[3]
AN19
+3.3V_RUN
VccADAC3
U47
2
50 mA
1
@RH247
@RH247
VSSADAC
CH103
0.01U_0402_16V7K~D
+1.05V_RUN
VCCADAC
CH35
0.1U_0402_10V7K~D
2
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
LH1
2
1
BLM18PG181SN1_0603~D
+VCCADAC
U48
CH34
0.01U_0402_16V7K~D
2
1
CH31
1U_0402_6.3V6K~D
2
1
CH33
1U_0402_6.3V6K~D
+1.05V_RUN
1
CH32
CH32
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
D
CH30
10U_0805_4VAM~D
1
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
+
2
2
@ RH199
1
@ CH41
330U_D2_2VM_R6M~D
+
@ CH42
330U_D2_2VM_R6M~D
2
1
0_0603_5%~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
PCH (6/8)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
19
of
66
5
4
3
2
1
RH202
0_0402_5%~D
1
2
+1.05V_RUN
+5V_ALW
POWER
VCCIO[31]
Note: Check Intel
1
+3.3V_RUN_VCC_CLKF33 T38
DCPSUSBYP
VCCIO[32]
VCCIO[33]
BH23
VCCSUS3_3[8]
VCCIO[14]
AL24
1
VCCSUS3_3[10]
VCCASW[6]
AA31
1
2
VCCASW[7]
@ RH215
@RH215
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
AD31
2
0.022_0805_1%
W21
2
W23
W24
CH74
1U_0402_6.3V6K~D
2
CH73
10U_0805_6.3V6M~D
LH4
10UH_LBR2012T100M_20%~D
+3.3V_RUN_VCC_CLKF33
1
2
1
1
DCPSUS[4]
W26
W29
W31
W33
VCCASW[12]
VCCASW[13]
VCCASW[14]
N16
1
2
Y49
+1.05V_+1.5V_1.8V_RUN
VCCASW[15]
V5REF
BF47
CH79
1U_0402_6.3V6K~D
AF17
AF33
AF34
AG34
2 CH81
1U_0402_6.3V6K~D
1
AG33
+1.05V_RUN
VCCSUS3_3[5]
VCC3_3[4]
CH70
1U_0603_10V6K~D
VCCIO[13]
VCCADPLLA
VCCADPLLB
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
2
W16
+
2
1
2
2
G
2
CH72
0.1U_0402_10V7K~D
VCCIO[2]
VCCIO[4]
CH71
1U_0603_10V6K~D
+3.3V_RUN
+VCCA_USBSUS
T34
1
1
CH75
0.1U_0402_10V7K~D
2
AJ2
@CH62
@CH62
1U_0402_6.3V6K~D
1
AF13
CH76
0.1U_0402_10V7K~D
+1.05V_RUN
1
AH13
2
AH14
CH77
1U_0402_6.3V6K~D
Note: Check Intel
+VCCSATAPLL
AK1
B
@ LH5
10UH_LBR2012T100M_20%~D
1
2
AF14
+1.05V_RUN
1
AF11
+1.05V_+1.5V_1.8V_RUN
2
VCCSSC
1
1
AA16
2
VCCVRM[4]
+PCH_V5REF_RUN
1
2
DCPRTC
DH3
RB751S40T1_SOD523-2~D
+3.3V_RUN
+3.3V_RUN
+1.05V_RUN_VCC_SATA
AC16
AC17
@ CH80
10U_0805_6.3V6M~D
+1.05V_RUN
1
AD17
CH82
1U_0402_6.3V6K~D
+1.05V_M
DCPSST
V_PROC_IO
MISC
VCCASW[22]
CPU
DCPSUS[1]
DCPSUS[2]
VCCASW[23]
VCCASW[21]
2
1
2
A22
1
2
VCCRTC
CougarPoint_Rev_1p0
HDA
1
CH93
1U_0402_6.3V6K~D
1
CH95
220U_B2_2.5VM_R35M~D
2
CH92
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
2
VCCASW[18]
VCCASW[20]
C
RH213
10_0402_5%~D
1
VCCASW[17]
VCC3_3[2]
CH63
0.1U_0402_10V7K~D
+5V_RUN +3.3V_RUN
P22
VCC3_3[8]
VCCASW[19]
2
T21
V21
T19
+RTC_CELL
+1.05V_RUN_VCCA_B_DPL
1
+
5
BJ8
+1.05V_RUN_VCCA_A_DPL
CH94
220U_B2_2.5VM_R35M~D
1
2
LH7
10UH_LBR2012T100M_20%~D
2
T17
V19
@CH83
@CH83
1U_0402_6.3V6K~D
CH89
0.1U_0402_10V7K~D
LH6
10UH_LBR2012T100M_20%~D
1
2
1
CH87
0.1U_0402_10V7K~D
1
CH85
4.7U_0603_6.3V6K~D
2
2
CH86
0.1U_0402_10V7K~D
1
V16
1
2
2
A
P20
VCC3_3[1]
+PCH_V5REF_SUS
+1.05V_M_VCCSUS
1
CH84
0.1U_0402_10V7K~D
+1.05V_RUN_VTT
DH2
RB751S40T1_SOD523-2~D
+1.05V_RUN
+3.3V_ALW_PCH
2
+VCCSST
CH88
0.1U_0402_10V7K~D
2
1
+PCH_V5REF_RUN
N22
VCCIO[3]
1
CH96
1U_0402_6.3V6K~D
RH208
10_0402_5%~D
N20
VCCSUS3_3[4]
VCCASW[16]
RTC
2
BD47
+1.05V_RUN_VCCA_B_DPL
1
2 +1.05V_M_VCCSUS
0.022_0805_1%
P34
VCCSUS3_3[3]
SATA
+1.05V_RUN_VCCA_A_DPL
1
@ RH248
AN24
VCCIO[12]
CH78
0.1U_0402_10V7K~D
+3.3V_ALW_PCH
+3.3V_ALW_PCH
VCCSUS3_3[2]
+1.05V_RUN
+1.05V_M
+VCCA_USBSUS
VCCIO[5]
+VCCRTCEXT
B
AN23
2
PCI/GPIO/LPC
VCCASW[5]
AA29
CH69
1U_0402_6.3V6K~D
+3.3V_RUN
2
+5V_ALW_PCH
1
M26
V5REF_SUS
Clock and Miscellaneous
VCCASW[4]
AA27
1
2
+3.3V_ALW_PCH
+PCH_V5REF_SUS
VCCSUS3_3[1]
VCCASW[3]
AA26
CH68
1U_0402_6.3V6K~D
2
1
CH67
CH67
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
T26
1
VCCASW[2]
AC26
C
P24
2
D
+3.3V_ALW_PCH
CH66
0.1U_0402_10V7K~D
2
V24
VCCASW[1]
AA24
CH65
22U_0805_6.3VAM~D
+1.05V_M
CH64
22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
AA19
V23
VCCIO[34]
DCPSUS[3]
1
T24
VCCSUS3_3[9]
@
CH61
1U_0402_6.3V6K~D
AA21
1
T23
VCCSUS3_3[6]
+VCCSUS1
2
T29
CH60
0.1U_0402_10V7K~D
AL29
2
VCCSUS3_3[7]
VCCAPLLDMI2
2
2
+VCCAPLL_CPY_PCH
2
T27
1
44 ALW_ENABLE
VCC3_3[5]
2
+1.05V_RUN
CH56
1U_0402_6.3V6K~D
P28
CH59
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@ CH58
10U_0805_6.3V6M~D
@ CH57
0.1U_0402_10V7K~D
USB
@ LH3
10UH_LBR2012T100M_20%~D
1
2
V12
@ QH4
SSM3K7002FU_SC70-3~D
1
1
+PCH_VCCDSW
+1.05V_RUN
P26
S
D
VCCDSW3_3
N26
2
VCCIO[30]
1
T16
VCCIO[29]
2
+VCCDSW3_3
VCCACLK
1
CH55
0.1U_0402_10V7K~D
2
2
1
3
@ RH278
20K_0402_5%~D
AD49
1
D
+1.05V_RUN
+5V_ALW_PCH
1
CH98
CH98
0.1U_0402_10V7K~D
2
0_0402_5%~D
2
0_0402_5%~D
1
UH4J
1
RH201
1
@ RH253
@RH253
2
+VCCACLK
2
0.022_0805_1%
1
@ RH200
+3.3V_ALW_PCH
+3.3V_ALW2
VCCSUSHDA
P32
+3.3V_ALW_PCH
1
CH90
1U_0402_6.3V6K~D
2
A
CH91
0.1U_0402_10V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
+1.05V_RUN_VCCA_A_DPL 1
@ RH279
@RH279
2 +1.05V_RUN_VCCA_B_DPL
0_0805_5%~D
PCH (7/8)
Size
Document Number
Rev
1.0
LA-6591P
Date:
4
3
2
Monday, January 10, 2011
Sheet
1
20
of
66
5
4
3
2
1
UH4I
D
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
UH4H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
C
B
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
CougarPoint_Rev_1p0
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
D
C
B
A
A
CougarPoint_Rev_1p0
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
PCH (8/8)
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
21
of
66
5
4
3
2
+FAN1_VOUT
JFAN1 CONN@
2
1
2
1
2
3 G1
4 G2
5
6
MOLEX_53398-0471~D
+3.3V_M
C
3
2
1
E
2
B
Q12
MMBT3904WT1G_SC70-3~D
2
R385
2
R426
1
10K_0402_5%~D
2
R402
D
1
10K_0402_5%~D
FAN1_DET#
1
BC_INT#_EMC4022
FAN1_TACH_FB
REM_DIODE1_P_4022
@
C266
100P_0402_50V8J~D
1
2
3
4
FAN1_TACH_FB
C219
22U_0805_6.3VAM~D
Place under CPU
Place C266 close to the Q12 as possible
D2
RB751S40T1_SOD523-2~D
1
FAN1_DET#
D
1
1
10K_0402_5%~D
REM_DIODE1_N_4022
+5V_RUN
2
+3.3V_RUN
2
1
1
3
2
C
Q14
MMBT3904WT1G_SC70-3~D
+3.3V_M
1
R389
1
C270
2
2200P_0402_50V7K~D
2
Q13
MMBT3904WT1G_SC70-3~D
REM_DIODE3_N_4022
VDDH
VDDH
VDDL
VDD_PWRGD
REM_DIODE1_N_4022
REM_DIODE1_P_4022
23
24
THERMTRIP2#
17
THERMATRIP2#
THERMTRIP3#
2 VDD_PWRGD
10K_0402_5%~D
E
E
2
B
E
2
U9
2
3
6
13
B
2
C
1
@ C277
@ C272
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
3
REM_DIODE3_P_4022
C
1
C1171
C1171
0.1U_0402_16V4Z~D
1
C305
10U_0805_6.3V6M~D
Diode circuit at DP5/DN5 is used for skin temp sensor and place
C272 close to Q14 (placed Q13 close to JMINI1 for WWAN card).
Diode circuit at DP3/DN3 isnused for sensor SO-DIMM temp. Place
Q14 near DIMM1 and place C277 close to Q13
1
C275
0.1U_0402_16V4Z~D
2
C276
C276
10U_0805_10V4Z~D
1
18
THERMATRIP3#
SYS_SHDN#
19
C
DN1/THERM
DP1/VREF_T
26
27
2
C271
54 MAX8731_IINP
DN2/DP4
DP2/DN4
POWER_SW#
20
1
2200P_0402_50V7K~D
REM_DIODE3_P_4022
REM_DIODE3_N_4022
30
29
DP3/DN5
DN3/DP5
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
21
9
2
VCP2
31
25
1
4.7K_0402_5%~D
R387
VSET_4022
28
FAN1_TACH_FB
FAN1_DET#
11
1 PWM
R1178
2
10K_0402_5%~D
FAN_OUT
FAN_OUT
VSET
TACH/GPIO1
SMCLK/BC_CLK
SMDATA/BC_DATA
5
4
1
@ R390
2
47K_0402_1%~D
47
+RTC_CELL
ACAV_IN
42,54,56
BC_INT#_EMC4022 42
BC_INT#_EMC4022
+FAN1_VOUT
8
7
BC_CLK_EMC4022 42
BC_DAT_EMC4022 42
GPIO2
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
+3.3V_M
1
+3.3V_M
10
VCP
VIN
THERM_STP#
POWER_SW#
2 3V_PWROK#
1K_0402_5%~D
R388
22_0402_5%~D
14
22
33
16
2
THERMATRIP2#
2
3
1
R398
C
2.2K_0402_5%~D
1
2
2
B
Q15 E
PMST3904_SOT323-3~D
1
2
C278
0.1U_0402_16V4Z~D
C274
1U_0402_6.3V6K~D
+1.05V_RUN_VTT
1
RTC_PWR3V
+VCC_4022
R403
10K_0402_5%~D
EMC4022-1-EZK-TR_QFN32_5X5~D
2
1
+RTC_CELL
R395
8.2K_0402_5%~D
2
R393
SMSC request
1
2
1U_0402_6.3V6K~D
C1179
TEST1
TEST2
VSS
+3.3V_M
+VCC_4022
+ADDR_XEN
1
4.7K_0402_5%~D
0.1U_0402_16V4Z~D
C273
VDD
ADDR_MODE/XEN
B
1
32
2
1
R391
1
42 PCH_PWRGD#
B
1
2
7 H_THERMTRIP#
+RTC_CELL
VSET_4022
1
R405
8.2K_0402_5%~D
5
A
1
DOCK_PWR_SW# 42
2
POWER_SW_IN# 42
Rest=953, Tp=88degree
A
2
A
B
3
1
2
U10
TC7SH08FU_SSOP5~D
POWER_SW#
4 O
R406
953_0402_1%~D
G
C282
0.1U_0402_16V4Z~D
C281
0.1U_0402_16V4Z~D
2
2
+3.3V_M
P
1
1
THERMATRIP3#
DELL CONFIDENTIAL/PROPRIETARY
1
2
C280
0.1U_0402_16V4Z~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
FAN & Thermal Sensor
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
22
of
66
5
4
3
2
1
D
D
C
C
Fingerprint CONN.
JBIO1
7
8
1
2
3
4
G1 5
G2 6
1
2
3
4
5
6
+3.3V_FP
+3.3V_FP
FP_USB_DFP_USB_D+
U12
FP_RESET#
1
33
1
TYCO_2041084-6~D
CONN@
C285 Place close to JBIO1.1
2
FP_USB_DC285
0.1U_0402_16V4Z~D
2
GND
IO1
33 FP_USBD+
4
VCC
3
IO2
1
33 FP_USBD-
@ L8
@L8
DLW21SN121SQ2L_4P~D
1
2 2
4
FP_USB_D+
+3.3V_RUN
FP_USB_D+
1
R409
1
R410
PRTR5V0U2X_SOT143-4~D
4
3
3
FP_USB_D-
2
0_0402_5%~D
2
0_0402_5%~D
B
B
+3.3V_RUN
+3.3V_ALW
R1135
0_0603_5%~D
1
2
+3.3V_FP
@ R1136
0_0603_5%~D
1
2
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
FP Conn.
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
23
of
66
5
4
3
2
1
LCD Power
Q18
SI3456DDV-T1-GE3_TSOP6~D
+3.3V_ALW
6
4
5
2
R412
1
100K_0402_5%~D
1
+LCDVDD
D
+15V_ALW
S
S
16,41 ENVDD_PCH
1
3
2
4
1
EN_LCDPWR
1
3
1
2
6 2
1
3
LDDC_CLK_PCH
2
2.2K_0402_5%~D
LDDC_DATA_PCH
2
2.2K_0402_5%~D
1
R159
1
R160
LCD_ACLK+_PCH 16
LCD_ACLK-_PCH 16
2
Q20
PDTC124EU_SC70-3~D
BAT54CW_SOT323-3~D
Place near to JLVDS1
+3.3V_RUN
+LCDVDD
ATG_MAC_LCD_DET# 17
2
Close to JLVDS1.42,43
1
Close to JLVD1.41
2
ACES_59003-0400C-001
CONN@
4
40mil
6
5
2
1
G
2
40mil
+BL_PWR_SRC
1
3
1
C298
0.1U_0402_16V4Z~D
S
1
Q21
FDC654P-G_SSOT-6~D
+PWR_SRC
1
+LCDVDD
C297
1000P_0402_50V7K~D
LCD_A2+_PCH 16
LCD_A2-_PCH 16
LCD_A1+_PCH 16
LCD_A1-_PCH 16
LCD_A0+_PCH 16
LCD_A0-_PCH 16
LDDC_DATA_PCH 16
LDDC_CLK_PCH 16
LCD_TST
41
+3.3V_RUN
D
LDDC_DATA_PCH
LDDC_CLK_PCH
LCD_TST
2
+3.3V_RUN
2
D
3
41 LCD_VCC_TEST_EN
16
16
16
16
16
16
1
R422
100K_0402_5%~D
2
C296
0.1U_0603_50V4Z~D
C
2
LCD_B2+_PCH
LCD_B2-_PCH
LCD_B1+_PCH
LCD_B1-_PCH
LCD_B0+_PCH
LCD_B0-_PCH
5
C292
0.1U_0402_16V4Z~D
C293
0.1U_0402_25V4Z~D
LCD_BCLK+_PCH 16
LCD_BCLK-_PCH 16
G
D6
2
2
Q19B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DISP_ON
BIA_PWM_LVDS
1
2
LE92 BLM18BB221SN1D_2P~D
R414
100K_0402_5%~D
1
2
C246
0.1U_0603_50V4Z~D
+15V_ALW
R413
130_0402_5%~D
C
BATT_WHITE_LED 45
BATT_YELLOW_LED 45
BREATH_WHITE_LED 45
+BL_PWR_SRC
C243
0.1U_0402_16V4Z~D
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Q19A
DMN66D0LDW-7_SOT363-6~D
D
GND
BATT_WHITE_LED
BATT_YELLOW_LED
BREATH_WHITE_LED
VR_SRC
VR_SRC
VR_SRC
NC
DISP_ON/OFF#
PWM
CONNTST_GND
VR_GND
VR_GND
VR_GND
LCD_B_CLK+
LCD_B_CLKGND
LVDS_B2+
LVDS_B2LVDS_B1+
LVDS_B1LVDS_B0+
LVDS_B0GND
LVDS_A_CLK+
LVDS_A_CLKGND
LVDS_A2+
LVDS_A2LVDS_A1+
LVDS_A1LVDS_A0+
LVDS_A0EDID_DATA
MGND6
EDID_CLK
MGND5
BIST
MGND4
V_EDID
MGND3
LCD_VDD
MGND2
LCD_VDD
MGND1
CONNTST
1
+LCDVDD
JLVDS1
PWR_SRC_ON
Q22
SSM3K7002FU_SC70-3~D
2
G
PANEL_BKEN_PCH 16
1
42
D69
RB751V-40GTE-17_SOD323-2~D
1
2
PANEL_BKEN_EC 41
FDC654P: P CHANNAL
Panel backlight power control by EC
2
BIA_PWM_EC 42
EN_INVPWR
EN_INVPWR
+5V_TSP
+5V_RUN
+CAMERA_VDD
4
USBP12-
1
1
1
2
2
USBP12_D+
USBP12_D-
42 TOUCH_SCREEN_PD#
2
1
1
CCD_OFF
A
D
2
G
3
41
CCD_OFF
S
1
R427
Q24
SSM3K7002FU_SC70-3~D
Webcam PWR CTRL
2
2
0_0402_5%~D
1
R428
1
2
2
1
3
2
1
@ L10 DLW21SN121SQ2L_4P~D
4
3 3
5
1
2
C304
0.1U_0402_25V4Z~D
18 E3_PAID_TS_DET#
17
USBP1317
USBP13+
USBP13-
2
IO1
4
VCC
USBP13+
3
IO2
B
+3.3V_RUN
PRTR5V0U2X_SOT143-4~D
Place close JTCH1
+5V_TSP
JTCH1
1 1
2 2
3 3
USBP134 4
USBP13+
5 5
6 6
+5V_TSP
1
2
C302
0.1U_0402_10V7K~D
TYCO_1734595-6
2
0_0402_5%~D
7
USBP12-
USBP12+
2
17
USBP12+
1
2
R431
100K_0402_5%~D
6
C301
0.1U_0402_16V4Z~D
17
2
1
2
2
1
R429
100K_0402_5%~D
2
Q32
C306
0.1U_0402_25V4Z~D
1
R430
100K_0402_5%~D
+3.3V_ALW
Q125B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
JST_BM08B-SRSS-TB1-LF-SN~D
CONN@
30
@ U86
1 GND
1
G
DMIC0
DMIC0
3
30
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q125A
+15V_ALW
DMIC_CLK
Touch Screen Connector
PMV45EN_SOT23-3~D
D
+3.3V_RUN
G
2
Q23
PMV45EN_SOT23-3~D
1
DMIC_CLK
@ D8
@ D8
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
D
D
S
S
1
C300
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C299
0.1U_0402_16V4Z~D
2
3
CAM_MIC_CBL_DET# 17
S
S
+CAMERA_VDD
CAM_MIC_CBL_DET#
USBP12_D+
USBP12_D-
1
2
3
4
5
6
7
8
9
10
@ D7
SD05.TCT_SOD323-2~D
1
2
3
4
5
6
7
8
G1
G2
B
1
+15V_ALW
JCAM1
4
For Webcam
@ R1592
0_0603_5%~D
1
2
8
R1138
100K_0402_5%~D
G2
D68
RB751V-40GTE-17_SOD323-2~D
1
2
2
R1137
10K_0402_5%~D
3
S
2
1
47K_0402_5%~D
G1
DISP_ON
BIA_PWM_PCH 16
1
BIA_PWM_LVDS
D64
RB751V-40GTE-17_SOD323-2~D
1
2
D
1
R423
D63
RB751V-40GTE-17_SOD323-2~D
1
2
CONN@
C303
0.1U_0402_25V4Z~D
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
eDP & CAM & TS Conn
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
24
of
66
2
B
1
VGA SW for MB/DOCK
B
+3.3V_RUN
U14
PCH_CRT_VSYNC
PCH_CRT_HSYNC
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU
1
2
5
6
7
A0
A1
A2
A3
A4
CRT_SWITCH
16 PCH_CRT_VSYNC
16 PCH_CRT_HSYNC
16 PCH_CRT_RED
16 PCH_CRT_GRN
16 PCH_CRT_BLU
8
SEL1
VDD
VDD
VDD
VDD
VDD
4
16
23
29
32
27
25
22
20
18
12
14
VSYNC_BUF
HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT
CRT_SWITCH
41 CRT_SWITCH
26
24
21
19
17
13
15
VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK
9
10
A5
A6
30
SEL2
3
11
28
31
33
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
16 PCH_CRT_DDC_DAT
16 PCH_CRT_DDC_CLK
0B1
1B1
2B1
3B1
4B1
5B1
6B1
GND
GND
GND
GND
GPAD
0B2
1B2
2B2
3B2
4B2
5B2
6B2
VSYNC_BUF 31
HSYNC_BUF 31
RED_CRT
31
GREEN_CRT 31
BLUE_CRT
31
DAT_DDC2_CRT 31
CLK_DDC2_CRT 31
VSYNC_DOCK 40
HSYNC_DOCK 40
RED_DOCK
40
GREEN_DOCK 40
BLUE_DOCK 40
DAT_DDC2_DOCK 40
CLK_DDC2_DOCK 40
PI3V712-AZLEX_TQFN32_6X3~D
+3.3V_RUN
1
2
1
2
1
2
1
2
1
2
1
2
C321
C321
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
APR/SPR
C320
0.1U_0402_16V4Z~D
A=B2
C319
C319
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
MB
1
C318
0.01U_0402_16V7K~D
Source
A=B1
C317
C317
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
Chanel
0
C316
10U_0805_6.3V6M~D
SEL1/SEL2
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
CRT/Video switch
Size
Document Number
Date:
Monday, January 10, 2011
Rev
1.0
LA-6591P
2
1
Sheet
25
of
66
2
1
D4
BAT1000-7-F_SOT23-3~D
2
+5V_RUN_HDMI
2
1
NC
2
3
+5V_RUN
F2
@ R5
0_1206_5%~D
B
1
@ R451
L19
1
2
1
1
1
680_0402_5%~D
680_0402_5%~D
1
16 TMDSB_PCH_P0
C350 2
16 TMDSB_PCH_N0
2
1
C351 2
2
680_0402_5%~D
680_0402_5%~D
1
R456
1
2 10K_0402_5%~D
TMDSB_CON_CLK#
1
2
1 0.1U_0402_10V7K~D TMDSB_PCH_C_P0
1 0.1U_0402_10V7K~D TMDSB_PCH_C_N0
1
@ R462
L20
4 4
1
2
1
1
2
0_0402_5%~D
3
2
TMDSB_CON_P0
3
2
JHDMI1
HDMIB_PCH_HPD_Q
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
DLW21SN900HQ2L_0805_4P~D
1
2
@ R466
0_0402_5%~D
D
2
G
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TMDSB_CON_N0
HDMI_CEC
TMDSB_CON_CLK#
Q26
SSM3K7002FU_SC70-3~D
3
+3.3V_RUN
2
680_0402_5%~D
R455
R458
2
DLW21SN900HQ2L_0805_4P~D
1
2
@ R459
0_0402_5%~D
2
R454
TMDSB_PCH_C_CLK#
3
2
1
TMDSB_PCH_C_CLK
1
TMDSB_CON_CLK
2
1
R453
TMDSB_PCH_C_N0
1
+VDISPLAY_VCC
3
680_0402_5%~D
R452
TMDSB_PCH_C_P0
1 0.1U_0402_10V7K~D TMDSB_PCH_C_CLK#
680_0402_5%~D
R450
TMDSB_PCH_C_N1
C353 2
B
2
0_0402_5%~D
2
R448
TMDSB_PCH_C_P1
TMDSB_PCH_C_R
680_0402_5%~D
4
16 TMDSB_PCH_CLK#
2
R449
TMDSB_PCH_C_N2
4
C338
10U_0805_10V4Z~D
TMDSB_PCH_C_P2
1 0.1U_0402_10V7K~D TMDSB_PCH_C_CLK
C337
0.1U_0402_10V7K~D
16 TMDSB_PCH_CLK
C352 2
1
1
2A_8VDC_SMD1812P200TF
TMDSB_CON_CLK
TMDSB_CON_N0
S
16 TMDSB_PCH_P1
C348 2
1 0.1U_0402_10V7K~D TMDSB_PCH_C_P1
1
@ R468
L21
4 4
16 TMDSB_PCH_N1
C349 2
1 0.1U_0402_10V7K~D TMDSB_PCH_C_N1
1
1
2
0_0402_5%~D
3
2
TMDSB_CON_P0
TMDSB_CON_N1
3
TMDSB_CON_P1
2
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
DLW21SN900HQ2L_0805_4P~D
1
2
@ R469
0_0402_5%~D
1
@ R470
L22
16 TMDSB_PCH_P2
C346 2
1 0.1U_0402_10V7K~D TMDSB_PCH_C_P2
4
16 TMDSB_PCH_N2
C347 2
1 0.1U_0402_10V7K~D TMDSB_PCH_C_N2
1
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
GND
D2GND
D2_shield GND
D2+
GND
20
21
22
23
TYCO_2041270-1
CONN@
2
0_0402_5%~D
4
3
1
2
3
TMDSB_CON_P2
2
TMDSB_CON_N2
DLW21SN900HQ2L_0805_4P~D
1
2
@ R471
0_0402_5%~D
+5V_RUN_HDMI
PCH_SDVO_CTRLDATA_R
1
R1152
PCH_SDVO_CTRLCLK_R
1
R1153
+3.3V_RUN
A
+5V_HDMI_DDC
2
2.2K_0402_5%~D
2
2.2K_0402_5%~D
A
1
2
+3.3V_RUN
R1168
1M_0402_5%~D
6
PCH_SDVO_CTRLCLK_R
HDMI_CEC
G
2
16 PCH_SDVO_CTRLCLK
+3.3V_RUN
Q120A
DMN66D0LDW-7_SOT363-6~D
1
2
R1165
5
1
1
10K_0402_5%~D
D
HDMIB_PCH_HPD_Q
1
2
3
S
R1128
20K_0402_5%~D
Q121
SSM3K7002FU_SC70-3~D
16 PCH_SDVO_CTRLDATA
4
3
PCH_SDVO_CTRLDATA_R
Q120B
DMN66D0LDW-7_SOT363-6~D
2
16 HDMIB_PCH_HPD
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HDMI port
Document Number
Date:
2
Size
Monday, January 10, 2011
LA-6591P
1
+3.3V_RUN
Sheet
Rev
1.0
26
of
66
5
4
3
16 DPC_PCH_DOCK_AUX
C357
0.1U_0402_10V7K~D
DPC_AUX_C
2
1
40 DPC_DOCK_AUX
16 DPC_PCH_DOCK_AUX#
2
C360
40 DPC_DOCK_AUX#
1
+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK
D
2
2
C356
1
0.1U_0402_16V4Z~D
U20
BE0
A0
3
DPC_DOCK_AUX
12
BE1
A1
6
9
A2
GND
PCH_DDPC_CTRLCLK 16
11
10
B3
BE2
B1
7
D
14
13
B0
4
5
DPC_AUX#_C
1
0.1U_0402_10V7K~D
DPC_DOCK_AUX#
VCC
BE3
A3
1
2
B2
PCH_DDPC_CTRLDATA 16
8
PI3C3125LEX_TSSOP14~D
5
P
2
U21
NC
DPC_CA_DET
A
DPC_CA_DET#
4
Y
G
40 DPC_CA_DET
1
+5V_RUN
2
1
C365
0.1U_0402_16V4Z~D
3
NC7SZ04P5X-G_SC70-5~D
C
C
+3.3V_RUN
AUX/DDC SW for DPD to E-DOCK
16 DPD_PCH_DOCK_AUX
C367
0.1U_0402_10V7K~D
DPD_AUX_C
2
1
40 DPD_DOCK_AUX
16 DPD_PCH_DOCK_AUX#
2
C368
1 C366
0.1U_0402_16V4Z~D
U23
1
2
DPD_DOCK_AUX
3
4
5
DPD_AUX#_C
1
0.1U_0402_10V7K~D
DPD_DOCK_AUX#
BE0
A0
VCC
BE3
B0
A3
BE1
A1
B3
BE2
14
13
12
PCH_DDPD_CTRLCLK 16
11
10
6
B1
A2
9
7
40 DPD_DOCK_AUX#
2
GND
B2
8
PCH_DDPD_CTRLDATA 16
PI3C3125LEX_TSSOP14~D
B
B
P
A
1
U24
Y
4
DPD_CA_DET#
3
G
2
NC
DPD_CA_DET
40 DPD_CA_DET
5
+5V_RUN
2
1
C369
0.1U_0402_16V4Z~D
NC7SZ04P5X-G_SC70-5~D
+3.3V_RUN
A
PCH_DDPC_CTRLCLK
2
2.2K_0402_5%~D
PCH_DDPC_CTRLDATA
2
2.2K_0402_5%~D
PCH_DDPD_CTRLCLK
2
2.2K_0402_5%~D
PCH_DDPD_CTRLDATA
2
2.2K_0402_5%~D
1
R487
1
R488
1
R489
1
R490
1
R491
1
R492
Intel WW18 Strapping option
A
Intel WW18 Strapping option
DELL CONFIDENTIAL/PROPRIETARY
DPD_CA_DET
2
1M_0402_5%~D
DPC_CA_DET
2
1M_0402_5%~D
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
DP122/DP512
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
27
of
66
5
4
3
2
1
1
+3.3V_RUN
2
PJP63
PAD-OPEN1x1m
+3.3V_RUN_HDDR
INT 1
INT 2
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD
7
3
11
1
2
1
1
2
4
5
10
2
1
2
8
9
12
13
14
GND
GND
GND
GND
2
HDD_FALL_INT
FFS_INT2
VDD_IO
VDD
2
1
2
1
1
2
1
2
1
2
PSATA_PRX_DTX_P0_RP
PSATA_PRX_DTX_N0_RP
1
BINP
BINM
2
PSATA_PTX_DRX_P0_RP
PSATA_PTX_DRX_N0_RP
11
12
1
15
14
2
1
2
1
6
17 HDD_FALL_INT
7,12,13,14,15,36
7,12,13,14,15,36
DE351DLTR
GND
GND
GND
GND
EP
MAX4951BECTP+TGH7_TQFN20_4X4~D
Note: +HDD_DEW1, +HDD_DEW2, +HDD_EQ1, +HDD_EQ2 need to route
10 mils and R1169,R1171,R1174,R1176 need to change to 10k and
no stuff R1174, R1176 to support TI SN75LVCP601
R1176
0_0402_5%~D
2
U26
C388
0.1U_0402_16V4Z~D
R1174
R1174
0_0402_5%~D
0_0402_5%~D
2
C387
10U_0805_6.3V6M~D
C
1
@ R1175
10K_0402_5%~D
+3.3V_RUN_FFS
@ R1173
@ R1173
10K_0402_5%~D
10K_0402_5%~D
Free Fall Sensor
3
13
17
19
21
PA
PB
R495
0_0402_5%~D
+3.3V_RUN
PJP53
PAD-OPEN1x1m
1
+HDD_EQ1
+HDD_EQ2
AOUTP
AOUTM
BOUTM
BOUTP
HDD_PE1
HDD_PE2
R496
0_0402_5%~D
0_0402_5%~D
C385
4
5
+HDD_DEW1
9
8
@ R1170
@R1170
10K_0402_5%~D
2
AINP
AINM
+HDD_DEW2
6
10
16
20
1
2
C386
VCC
VCC
VCC
VCC
@ R1172
@R1172
10K_0402_5%~D
14 PSATA_PRX_DTX_P0_C
EN
CAD
2
14 PSATA_PRX_DTX_N0_C
+3.3V_RUN
2
C384
1
2
@ R494
0_0402_5%~D
14 PSATA_PTX_DRX_N0_C
C383
@ R493
0_0402_5%~D
0_0402_5%~D
14 PSATA_PTX_DRX_P0_C
7
18
1
D
R1169
0_0402_5%~D
U25
PSATA_PTX_DRX_P0
0.01U_0402_16V7K~D
PSATA_PTX_DRX_N0
1
0.01U_0402_16V7K~D
PSATA_PRX_DTX_N0
1
0.01U_0402_16V7K~D
PSATA_PRX_DTX_P0
1
0.01U_0402_16V7K~D
2
2
+3.3V_RUN
R1171
R1171
0_0402_5%~D
2
1
C382
C382
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
HDD Repeater
C381
0.01U_0402_16V7K~D
1
D
+3.3V_RUN
C
HDD PWR
DE351DLTR8_LGA14_3X5~D
+5V_ALW
+15V_ALW
PAD-OPEN1x1m
14 HDD_DET#
HDD_DET#
+5V_HDD
+5V_HDD
+3.3V_RUN
+5V_HDD
@ R506
@R506
100K_0402_5%~D
2
G
2
1
D16
FFS_INT2
3
1
1
2
FFS_INT2_Q
D
FFS_INT2
S
18
2
RB751S40T1_SOD523-2~D
C395
1000P_0402_50V7K~D
1
FFS_INT2_Q
1
2
C396
0.1U_0402_16V4Z~D
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V
42
2
HDDC_EN
R505
100K_0402_5%~D
GND1
GND2
23
24
1
2
5
6
@ Q27
G
SI3456DDV-T1-GE3_TSOP6~D
3
S
4
+5V_HDD
1
2
1
2
+5V_RUN
PJP3
1
1
2
3
2
5
4
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3.3V_RUN_HDD
6
2
D
@ Q28A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1
+3.3V_RUN
1
PJP64
B
1
SATA_PRX_DTX_N0
1
1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0
0.01U_0402_16V7K~D
2
PSATA_PRX_DTX_N0_RP
2
PSATA_PRX_DTX_P0_RP C391 2
C392
GND
RX+
RXGND
TXTX+
GND
C394
C394
10U_0805_10V4Z~D
1 0.01U_0402_16V7K~D SATA_PTX_DRX_P0
1 0.01U_0402_16V7K~D SATA_PTX_DRX_N0
@ C393
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
PSATA_PTX_DRX_P0_RP C389 2
PSATA_PTX_DRX_N0_RP C390 2
@ Q28B
DMN66D0LDW-7_SOT363-6~D
2 DDR_XDP_WAN_SMBDAT
10K_0402_5%~D
2 DDR_XDP_WAN_SMBCLK
10K_0402_5%~D
2 HDD_FALL_INT
100K_0402_5%~D
1
R501
1
R502
1
R503
@ R500
100K_0402_5%~D HDD_EN_5V
1
2
2
JUMP_43X79
SHORT DEFAULT
B
R504
100K_0402_5%~D
2
JSATA1
1
2
3
4
5
6
7
@ R499
100K_0402_5%~D
1
+3.3V_RUN
1
+3.3V_ALW2
For HDD Temp.
+5V_HDD Source
JAE_SP100421-HDD
CONN@
Main SATA +5V Default
Q29
SSM3K7002FU_SC70-3~D
Pleace near HDD CONN
+3.3V_RUN_HDD
1
2
C402
0.1U_0402_16V4Z~D
A
A
1
2
C399
0.1U_0402_16V4Z~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
Pleace near HDD CONN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HDD CONNECTOR
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
28
of
66
5
4
3
2
1
+3.3V_ALW
1
R510
2 ZODD_WAKE#
10K_0402_5%~D
1
R513
2 MOD_MD
10K_0402_5%~D
1
R514
2 USB30_SMI#
100K_0402_5%~D
For ODD
+3.3V_ALW_PCH
D
D
+5VMOD Source
15 PCIE_PRX_EMBTX_P4
15 PCIE_PRX_EMBTX_N4
0.1U_0402_10V7K~D 2
0.1U_0402_10V7K~D 2
15 PCIE_PTX_EMBRX_P4
15 PCIE_PTX_EMBRX_N4
EMBCLK_REQ#
PCIE_WAKE#
PLTRST_EMB#
BAY_SMBDAT
BAY_SMBCLK
15 EMBCLK_REQ#
36,37,41 PCIE_WAKE#
17 PLTRST_EMB#
42,46 BAY_SMBDAT
42,46 BAY_SMBCLK
41 MOD_SATA_PCIE#_DET
+3.3V_ALW
1
R1183
1 C409 PCIE_PTX_EMBRX_P4_C
1 C408 PCIE_PTX_EMBRX_N4_C
+5V_MOD
2
10K_0402_5%~D
25
26
27
28
29
30
31
+5V
CLKREQ#
WAKE#
PERST#
SMB_DATA
SMB_CLK
HPD
2
GND1
GND2
2
3
4
2
JUMP_43X79
R511
100K_0402_5%~D
C
TYCO_2-2129116-3
CONN@
+3.3V_ALW
B
D
D
S
S
3
1
+5V_RUN
@ PJP4
1 1
2
32
33
1
SSM3K7002FU_SC70-3~D
MOD_MD
2
MODC_EN
R512
100K_0402_5%~D
Q76
B
1
2
5
6
1
2
6
41
2
+5V_MOD
1
GND
REFCLK+
REFCLKGND
PETX+
PETXGND
GND
PERX+
PERXGND
1
S
2
14
15
16
17
18
19
20
21
22
23
24
MODC_EN# 5
SI3456DDV-T1-GE3_TSOP6~D
3
C401
C401
10U_0805_10V4Z~D
Pleace near ODD CONN
15 CLK_PCIE_EMB
15 CLK_PCIE_EMB#
D Q30
G
2 MOD_EN
Q31A
Q31A
DMN66D0LDW-7_SOT363-6~D
2
C398
0.1U_0402_16V4Z~D
C
C397
1000P_0402_50V7K~D
2
1
R507
100K_0402_5%~D
R509
100K_0402_5%~D
C400
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
MOD_MD
1
DP
+5V
+5V
MD
GND
GND
+5V_ALW
Q31B
DMN66D0LDW-7_SOT363-6~D
+5V_MOD
8
9
10
11
12
13
+3.3V_ALW2
1
42 DEVICE_DET#
+5V_MOD
GND
A+
AGND
BB+
GND
1
SATA_ODD_PRX_DTX_N1
SATA_ODD_PRX_DTX_P1
1
2
3
4
5
6
7
2
14 SATA_ODD_PRX_DTX_N1_C
14 SATA_ODD_PRX_DTX_P1_C
SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1
1
+15V_ALW
14 SATA_ODD_PTX_DRX_P1_C
14 SATA_ODD_PTX_DRX_N1_C
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
4
JSATA2
2
C407 2
C406
2
C405 2
C404
ZODD_WAKE#
1
R515
100K_0402_5%~D
ZODD_WAKE# 41
2
2
G
MODC_EN#
USB30_EN
4
DMN66D0LDW-7_SOT363-6~D
USB30_SMI#
3
6
Q123B
USB30_SMI# 14
USB30_EN
Q123A
DMN66D0LDW-7_SOT363-6~D
2
1
5
MOD_SATA_PCIE#_DET
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ODD CONNECTOR
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
29
of
66
2
1
DVDD_IO should match
with HDA Bus level
Internal Speakers Header
+3.3V_RUN
Speaker Connector
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
+3.3V_RUN
place close to pin27
+VDDA_AVDD
DVDD_IO
PCH_AZ_CODEC_SDOUT
5
10
Place R1096 close to codec
PCH_AZ_SDIN0_R
2
33_0402_5%~D
PCH_AZ_CODEC_RST#
1
R1096
45
39
13
14
PORTA_L
PORTA_R
VrefOut_A
SDATA_OUT
PORTB_L
PORTB_R
SYNC
14 PCH_AZ_CODEC_RST#
11
28
29
23
31
32
PORTD_+L
PORTD_-L
SDATA_IN
40
41
44
43
RESET#
I2S_12MHZ
15
I2S_MCLK
MONO_OUT
25
I2S_BCLK
16
I2S_SCLK
PC_BEEP
12
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
2
4
46
48
CAP+
I2S_DO
Place R1097 close to codec
I2S_DI#
Close to U16 pin6
PCH_AZ_CODEC_SDOUT
PCH_AZ_CODEC_BITCLK
47
EAPD
2
2
+3.3V_RUN
42
49
DVSS
PVSS
AVSS1
AVSS
AVSS
GND
Place C963~C966 close to Codec
+VREFOUT_R
1
26
30
33
2
92HD90B2X5NLGXYAX8_QFN48_7X7~D
Tie Analog Ground to Digital ground
under codec by a single point
3A
3Y#
41 EN_I2S_NB_CODEC#
2
33_0402_5%~D
10
4A
4Y#
5Y#
6Y#
13
2
1
1
15
R1078
2.49K_0402_1%~D
2
1
1
1
+3.3V_RUN
2
SENSE_A
SENSE_B
39.2K
PORT A (HP0)
PORT B (HP1)
PORT F
I2S_DI#
CE573
12P_0402_50V8J~D
1
2
A
8
+3.3V_RUN
CD74HC366M96_SO16~D
@ D58
DA204U_SOT323-3~D
DAI_DI
Pull-up to AVDD
40
R1082
100K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
2
5
4
2
Q106A
DMN66D0LDW-7_SOT363-6~D
1
41 DOCK_HP_DET
2
3
DAI_12MHZ# 40
RE1102
33_0402_5%~D
1
2
+3.3V_RUN
2.49K
40
DAI_DO# 40
PORT E
20K
40
DAI_LRCK#
3
6
2
2
R1081
100K_0402_5%~D
R1080
20K_0402_1%~D
2
R1079
39.2K_0402_1%~D
C979
C979
1000P_0402_50V7K~D
1
Resistor
GND
DAI_BCLK#
1
AUD_SENSE_B
OE1#
OE2#
CE574
12P_0402_50V8J~D
1
2
1
+VDDA_AVDD
1
11
6A
2
9
5A
3
7
R1110
1K_0402_5%~D
Place closely to Pin 14
2
2
I2S_12MHZ
1
RE1100
RE1101
33_0402_5%~D
1
2
5
12
Internal SPK
2
3
3
2Y#
6
Add for solve pop noise and detect issue
1
1Y#
2A
I2S_DO
Dock Audio
PORT D
1A
4
14
PORT C
@C967
@C967
0.1U_0402_16V4Z~D
2
2
33_0402_5%~D
I2S_LRCLK
3
2
4
1
I2S_BCLK
1
RE1098
VCC
1
1
1
2
3
1
2
HeadPhone Out
U73
16
@ D57
DA204U_SOT323-3~D
External MIC
PORT B
1
2
1
+3.3V_RUN
@ D56
@ D56
DA204U_SOT323-3~D
2
1
PORT A
AUD_HP_NB_SENSE 31,41
Q107B
DMN66D0LDW-7_SOT363-6~D
2
A
@ C983
100P_0402_50V8J~D
GNDA1
2
R1087
100K_0402_5%~D
5
Q107A
DMN66D0LDW-7_SOT363-6~D
+3.3V_RUN
@ D55
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
31 AUD_MIC_SWITCH
@ C982
100P_0402_50V8J~D
1
2
PAD-OPEN1x1m
+3.3V_RUN
@ D54
DA204U_SOT323-3~D
2
2
1
1
C1103
0.1U_0402_10V7K~D
1
R1086
20K_0402_1%~D
C980
C980
1000P_0402_50V7K~D
@ R1088
100K_0402_5%~D
@ R352
39.2K_0402_1%~D
6
2
1
AUD_SENSE_A
+3.3V_RUN
2
1
@ C981
100P_0402_50V8J~D
1
2
PJP62
2
1
+VDDA_AVDD
R1083
2.49K_0402_1%~D
2
1
Place closely to Pin 13.
1
C966
10U_0805_10V6K~D
2
10K_0402_5%~D
+5V_RUN
Place C962 close to Codec
21
22
34
37
C965
1U_0603_10V6K~D
1
R1099
1
C962
4.7U_0603_10V6K~D
C964
4.7U_0603_10V6K~D
2
7
@ C977
10P_0402_50V8J~D
35
VREFFILT
CAP2
VVreg
2
C963
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
@C978
@C978
0.1U_0402_10V7K~D
1
Place R1106 close to codec
1
CAP-
1
1
C1180
1U_0603_10V6K~D
1
2
No Connect
@ R1076
10_0402_5%~D
41 AUD_NB_MUTE#
R1095
0_0805_5%~D
1
2
MIC_IN_R
31 2
2
2
2
MIC_IN_L
1
2
MIC_IN_RR C1162 1U_0402_6.3V6K~D
1
2 +VREFOUT_R
R1154 2.2K_0402_5%~D
+VREFOUT
AUD_HP_OUT_L
AUD_HP_OUT_L 31
AUD_HP_OUT_R
AUD_HP_OUT_R 31
MIC_IN_L and MIC_IN_RR Pop R161 0-ohm for Combo Jack,
INT_SPK_L+
must symmetric in layout pop C1164 1UF for E2 backup circuit B
INT_SPK_LMIC_IN_RR
1
2
INT_SPK_R+
R161
0_0402_5%~D
INT_SPK_R+VREFOUT_R 2
MIC_IN_R
1
D70
RB751V-40GTE-17_SOD323-2~D
SPKR_R
1
2
1
2
SPKR
14
C1105
0.1U_0402_16V4Z~D
R1119
100K_0402_5%~D
AUD_PC_BEEP
BEEP_R
1
2
1
2
BEEP
42
C1106
0.1U_0402_16V4Z~D
R1120
100K_0402_5%~D
LE93
1
2
DMIC_CLK_L1
@ R1141
10K_0402_5%~D
2
DMIC_CLK
24
BLM18BB221SN1D_2P~D
1
2
DMIC0
24
@ R1142
10K_0402_5%~D
No Connect
20
1
1
19
@ R1077
@R1077
47_0402_5%~D
1
2
Close to U16 pin5
2
36
I2S_DO_R
2
33_0402_5%~D
I2S_LRCLK
1
R1097
2
1
AUD_SENSE_A
AUD_SENSE_B
SENSE_A
SENSE_B
BITCLK
2
1
+VDDA_PVDD
PORTD_+R
PORTD_-R
14 PCH_AZ_CODEC_SDIN0
B
8
PVDD
PVDD
DVDD
27
38
3
14 PCH_AZ_CODEC_SYNC
2
AVDD1
AVDD2
1
C961
0.1U_0402_16V4Z~D
6
1
1
2
3
DVDD_CORE
3
PCH_AZ_CODEC_BITCLK
14 PCH_AZ_CODEC_SDOUT
2
U72
1
9
14 PCH_AZ_CODEC_BITCLK
1
C960
10U_0805_10V6K~D
10U_0805_10V6K~D
1
2
3
2
Place C951~C961 close to Codec
C959
0.1U_0402_16V4Z~D
1
2
1
C958
10U_0805_10V6K~D
10U_0805_10V6K~D
@ DE2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
@ DE1
PESD5V0U2BT_SOT23-3~D
2
1
C976
680P_0402_50V7K~D
680P_0402_50V7K~D
2
1
C975
680P_0402_50V7K~D
1
C974
C974
680P_0402_50V7K~D
680P_0402_50V7K~D
2
C973
680P_0402_50V7K~D
1
2
1
C1173
C1173
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
MOLEX_53398-0471~D
1
C1172
1U_0603_10V6K~D
1
5
6
C957
0.1U_0402_16V4Z~D
1
2
3 G1
4 G2
C956
1U_0603_10V6K~D
1U_0603_10V6K~D
1
2
3
4
C955
10U_0805_10V6K~D
INT_SPK_L+_L
INT_SPK_L-_L
INT_SPK_R+_L
INT_SPK_R-_L
BLM18BD121SN1D_2P~D
BLM18BD121SN1D_2P~D
BLM18BD121SN1D_2P~D
BLM18BD121SN1D_2P~D
C954
10U_0805_10V6K~D
2
2
2
2
C953
0.1U_0402_16V4Z~D
1
1
1
1
C952
1U_0603_10V6K~D
JSPK1 CONN@
L91
L92
L93
L94
C994
0.1U_0402_16V4Z~D
20 mils trace
INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-
L77
BLM21PG600SN1D_0805~D
1
2
+5V_RUN
place close to pin38
DOCK_MIC_DET 41
Q106B
DMN66D0LDW-7_SOT363-6~D
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Azalia (HD) Codec
Document Number
Date:
2
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
1
Sheet
30
of
66
5
4
3
SW1
POWER_SW#_MB
42,43 POWER_SW#_MB
2
2
I/O board CONN.
1
Change to TYCO_2041300-2_60P-T and Horizonal reverse
4
JIO1
3
PESD24VS2UT_SOT23-3~D
2
32 SW_LAN_TX132 SW_LAN_TX1+
32 SW_LAN_TX2+
32 SW_LAN_TX2-
@ SW2
LAT_ON_SW_BTN#
2
1
4
32 SW_LAN_TX332 SW_LAN_TX3+
3
Media Board
42
42
42
USBP3+
USBP3-
39,41 ESATA_USB_PWR_EN#
30,41 AUD_HP_NB_SENSE
DETECT_GND
41 WIRELESS_ON#/OFF
41,45 LID_CL#
GND
GND
GND
61
63
65
IO_LOOP#
18
VSYNC_BUF 25
HSYNC_BUF 25
D
RED_CRT
25
GREEN_CRT 25
BLUE_CRT
25
DAT_DDC2_CRT 25
CLK_DDC2_CRT 25
XFR_ID_BIT# 42
MIC_IN_R
AUD_HP_OUT_R 30
MIC_IN_R 30
AUD_HP_OUT_L 30
+5V_ALW
1
+3.3V_ALW_PCH
2
PCH_AZ_MDC_RST1#
PCH_AZ_MDC_SDIN1 14
PCH_AZ_MDC_SYNC 14
PCH_AZ_MDC_SDOUT 14
PCH_AZ_MDC_BITCLK 14
Analog_GND
C
TYCO_2041300-2
CONN@
+3.3V_LAN
GND
GND
1
13
14
2
TYCO_1-2041070-2~D
CONN@
+3.3V_ALW_PCH
C1000
0.1U_0402_16V4Z~D
C1001
0.1U_0402_16V4Z~D
18 MEDIA_DET#
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
C997
0.1U_0402_16V4Z~D
1
2
3
4
5
6
7
8
9
10
11
12
VOL_MUTE
VOL_DOWN
VOL_UP
+3.3V_ALW
2
17
17
JMDIA1
C
1
2
17,39 USB_OC1#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
C1003
0.1U_0402_16V4Z~D
POWER & INSTANT ON SWITCH
C50
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
+5V_RUN
+3.3V_LAN
32 LED_100_ORG#
32 LED_10_GRN#
32 LAN_ACTLED_YEL#
+5V_ALW
SKRBAAE010_4P~D
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
@ D23
42 LAT_ON_SW_BTN#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
32 SW_LAN_TX0+
32 SW_LAN_TX0-
1
to SSI
3
SKRBAAE010_4P~D
D
1
2
Place close
to JIO1.35
Place close
to JIO1.13
LED Board
JLED1
7
8
PJP65
+5V_MIC
@ R425
3
@ R38
560K_0402_1%~D
@ U6
IN+
O
IN-
4
+5V_MIC
@ R424
47K_0402_5%~D
AUD_MIC_SWITCH 30
G
3
2
1
1
1
P
5
0.1U_0402_16V4Z~D
LMV331IDCKRG4_SC70-5~D
2
+5V_ALW_MIC_G
1
@ Q46
SSM3K7002FU_SC70-3~D
S
3
D
1
2
G
@ R33
47K_0402_1%~D
2
2
1
0.1U_0402_16V4Z~D
S
D
14 PCH_AZ_MDC_RST#
MIC_IN_R
+5V_RUN
2
D
@ C308
2
B
@ Q33
SI2301CDS-T1-GE3_SOT23-3~D
G
3
1
100K_0402_5%~D
1
@ D71
RB751V-40GTE-17_SOD323-2~D
Q44
SSM3K7002FU_SC70-3~D
@ C307
2
2
S
S
1
1
PAD-OPEN1x1m
1
TYCO_2041084-6~D
CONN@
2
B
1
2
3
4
5 G1
6 G2
2
1
2
3
4
5
6
LEDB_DET#
BATT_WHITE
BATT_YELLOW
SATA_LED
WLAN_LED
1
18
45
45
45
45
30,41 AUD_HP_NB_SENSE
PCH_AZ_MDC_RST1#
AUD_HP_NB_SENSE
SI2301CDS: P CHANNAL
need to route the trace as short as possible
A
1
2
G
+5V_ALW
A
DELL CONFIDENTIAL/PROPRIETARY
2
R752
10K_0402_5%~D
2
1
R751
100K_0402_5%~D
Compal Electronics, Inc.
41 MDC_RST_DIS#
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PWR SW/Sub-board Connector
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
31
of
66
5
4
3
2
1
+3.3V_LAN
+3.3V_RUN
1
TP_LAN_JTAG_TMS
2
10K_0402_5%~D
TP_LAN_JTAG_TCK
2
10K_0402_5%~D
R547
10K_0402_5%~D
2
PERp
PERn
23
24
MDI_PLUS3
MDI_MINUS3
+1.0V_LAN
SMB_CLK
SMB_DATA
RSVD_NC
LAN_DISABLE#_R
3
REGCTL_PNP10
RSVD_VCC3P3_1
RSVD_VCC3P3_2
VDD3P3_IN
1
2
5
4
26
27
25
LED0
LED1
LED2
VDD1P0_43
1
2
1
2
Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3
40
22
16
8
JTAG
RBIAS
1
TEST_EN
12
CTRL_1P0
7
VSS_EPAD
R562
3.01K_0402_1%~D
R561
1K_0402_5%~D
1
30
RES_BIAS
C471
33P_0402_50V8J~D
C470
33P_0402_50V8J~D
2
11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
XTAL_OUT
XTAL_IN
LAN_TEST_EN
Y3
25MHZ_18PF_7A25000110~D
1
2
9
10
43
VDD1P0_11
+1.0V_LAN
2
1
2
1
2
1
2
+3.3V_LAN
1
2
REGCTL_PNP10
1
2
C1178
C1178
22U_0805_6.3V6M~D
XTALO
XTALI
47
46
37
2
2
C464
1U_0603_10V6K~D
C1177
22U_0805_6.3V6M~D
VDD1P0_47
VDD1P0_46
VDD1P0_37
1
Place R548, C462, C463 and L29 close to U31
1
+1.0V_LAN
C469
0.1U_0402_10V7K~D
C
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
1
2
C468
0.1U_0402_10V7K~D
R1144
0_0402_5%~D
1
2
32
34
33
35
15
19
29
+3.3V_LAN
C467
C467
0.1U_0402_10V7K~D
VDD3P3_15
VDD3P3_19
VDD3P3_29
1
1 4.7K_0402_1%~D
4.7K_0402_1%~D
C466
0.1U_0402_10V7K~D
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
T142 PAD~D
T143 PAD~D
2
+3.3V_LAN_OUT
LAN_DISABLE_N
2
@ R557
10K_0402_5%~D
1
Idc max=330mA
+RSVD_VCC3P3_1
2
+RSVD_VCC3P3_2 R553 2
R554
LED
1
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+1.05V_M
@ R548
@R548
0_0805_5%~D
1
2
L29
6
41 LAN_DISABLE#_R
1
LAN_TX3+
LAN_TX3-
4.7UH_CBC2012T4R7M_20%~D
28
31
SMBus Device Address 0xC8
2
0_0402_5%~D
2
LAN_TX2+
LAN_TX2-
C
Place C1178 close to pin5
49
Note:
+1.0V_LAN will work at 0.95V to 1.15V
82579_QFN48_6X6~D
+3.3V_M
+1.0V_LAN POWER OPTIONS
Shared with PCH
1.05V SVR
R1200 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM
STUFF: R548
NO STUFF: L29
@ R563
0_1206_5%~D
* Internal SRV
STUFF: L29
NO STUFF: R548
Q34
+3.3V_ALW
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
27
26
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
C3+
C3-
23
22
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
LEDC0
LEDC1
LEDC2
19
20
40
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
A2-
LAN_TX3+ 1
2
L36
12NH_0603CS-120EJTS_5%~D
LAN_TX31
2
L37
12NH_0603CS-120EJTS_5%~D
A
10
LAN_TX3+R
11
A3+
C0+
C0-
LAN_TX3-R
12
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
Layout Notice : Place bead as
close PI3L500 as possible
15
16
42
5
43
FROM NIC
DOCKED
A3-
C1+
C1-
SEL
C2+
C2-
LEDA0
LEDA1
LEDA2
PD
1
R566
16,41 SIO_SLP_LAN#
SW_LAN_TX2+ 31
SW_LAN_TX2- 31
1
@ R567
2
0_0402_5%~D
SW_LAN_TX3+ 31
SW_LAN_TX3- 31
LAN_ACTLED_YEL# 31
LED_100_ORG# 31
LED_10_GRN# 31
DOCK_LOM_TRD1+ 40
DOCK_LOM_TRD1- 40
LOM_SPD100LED_ORG#
1
LOM_SPD10LED_GRN#
DOCK_LOM_TRD2+ 40
DOCK_LOM_TRD2- 40
2
DOCK_LOM_TRD3+ 40
DOCK_LOM_TRD3- 40
DOCK_LOM_ACTLED_YEL# 40
DOCK_LOM_SPD100LED_ORG# 40
DOCK_LOM_SPD10LED_GRN# 40
B
A
O
4
3
D
G
WLAN_LAN_DISB# 41
TC7SH08FU_SSOP5~D
U15
A
DELL CONFIDENTIAL/PROPRIETARY
PAD_GND
Compal Electronics, Inc.
TO
DOCK
PI3L720ZHEX_TQFN42_9X3P5~D
2
+3.3V_LAN
C478
0.1U_0402_10V7K~D
1
2
DOCK_LOM_TRD0+ 40
DOCK_LOM_TRD0- 40
1: TO DOCK
0: TO RJ45
3
2
2
0_0402_5%~D
4
32
31
LAN_TX2-R
LEDB0
LEDB1
LEDB2
13
2
1
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
A2+
6
36
35
B3+
B3-
9
B2+
B2-
AUX_ON
1
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
A1-
LAN_TX2+R
A1+
42
5
17
18
41
7
SW_LAN_TX1+ 31
SW_LAN_TX1- 31
Title
Intel 82579 (Hanksville) / LAN SW
Size
Document Number
Date:
Monday, January 10, 2011
Rev
1.0
LA-6591P
5
4
3
B
P
SW_LAN_TX3+
SW_LAN_TX3-
LAN_TX1-R
A0-
B1+
B1-
1
2
G
SW_LAN_TX2+
SW_LAN_TX2-
25
24
6
A0+
3
29
28
3
LAN_TX1+R
2
2
39
30
21
14
8
4
1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SW_LAN_TX1+
SW_LAN_TX1-
LAN_TX0-R
SW_LAN_TX0+ 31
SW_LAN_TX0- 31
2
ENAB_3VLAN
1
C476
C476
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
34
33
LAN_TX0+R
Q35A
DMN66D0LDW-7_SOT363-6~D
SW_LAN_TX0+
SW_LAN_TX0-
LAN_TX2+ 1
2
L34
12NH_0603CS-120EJTS_5%~D
LAN_TX21
2
L35
12NH_0603CS-120EJTS_5%~D
DOCKED
1
C475
10U_0603_6.3V6M~D
5
38
37
B0+
B0-
LAN_TX1+ 1
2
L33
12NH_0603CS-120EJTS_5%~D
LAN_TX11
2
L32
12NH_0603CS-120EJTS_5%~D
41
4
C477
2200P_0402_50V7K~D
U32
LAN_TX0+ 1
2
L30
12NH_0603CS-120EJTS_5%~D
LAN_TX01
2
L31
12NH_0603CS-120EJTS_5%~D
DOCKED
R565
100K_0402_5%~D
LAN ANALOG
SWITCH
Q35B
DMN66D0LDW-7_SOT363-6~D
1
R564
100K_0402_5%~D
C474
0.1U_0402_16V4Z~D
1
C473
0.1U_0402_16V4Z~D
C472
0.1U_0402_16V4Z~D
1
B
2
6
5
2
1
1
+3.3V_ALW2
+3.3V_LAN
2
+3.3V_LAN
SI3456DDV-T1-GE3_TSOP6~D
+15V_ALW
2
D
2
1
1
R555
20
21
MDI_PLUS2
MDI_MINUS2
VDD3P3_OUT
2
18 PM_LANPHY_ENABLE
PETp
PETn
LAN_TX1+
LAN_TX1-
C463
0.1U_0402_10V7K~D
15 LAN_SMBCLK
15 LAN_SMBDATA
41
42
17
18
MDI_PLUS1
MDI_MINUS1
C462
C462
10U_0805_6.3V6M~D
15 PCIE_PTX_GLANRX_N7
R549
10K_0402_5%~D
38
39
PE_CLKP
PE_CLKN
Default solution:
PCH +1.05V_M SVR - stuff R119, unstuff L99
Also, option to use iSVR - stuff L99, unstuff R119
LAN_TX0+
LAN_TX0-
1
15 PCIE_PTX_GLANRX_P7
44
45
13
14
MDI_PLUS0
MDI_MINUS0
S
15 PCIE_PRX_GLANTX_N7
+3.3V_LAN
CLK_PCIE_LAN
CLK_PCIE_LAN#
2
1 PCIE_PRX_GLANTX_P7_C
C458
0.1U_0402_10V7K~D
2
1 PCIE_PRX_GLANTX_N7_C
C459
0.1U_0402_10V7K~D
1
2 PCIE_PTX_GLANRX_P7_C
C460
0.1U_0402_10V7K~D
1
2 PCIE_PTX_GLANRX_N7_C
C461
0.1U_0402_10V7K~D
R551
0_0402_5%~D
1
2 LAN_SMBCLK_R
1
2 LAN_SMBDATA_R
R552
0_0402_5%~D
CLK_REQ_N
PE_RST_N
MDI
15 CLK_PCIE_LAN
15 CLK_PCIE_LAN#
15 PCIE_PRX_GLANTX_P7
48
36
PCIE
D
U31
LANCLK_REQ#_R
2
0_0402_5%~D
1
R1187
15 LANCLK_REQ#
17 PLTRST_LAN#
SMBUS
1
@ R545
1
@ R546
2
Sheet
1
32
of
66
5
M9
L9
K9
M7
N8
SMBCLK
SMBDAT
SMBALERT_N
SMB_GPIO_0
SMB_GPIO_1
2 USH_PWR_STATE#_R
0_0402_5%~D
1
2
R619
1K_0402_5%~D
1
2
R622
1K_0402_5%~D
1
2
R624
1K_0402_5%~D
1
R613
L7
WAKEUP_N
K1
IDDQ_EN
P1
CORE_PWRDN
E12
ALDO_PWRDN
USBH_OC1
SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11
SSP_RXD1_GPIO_12
SSP_TXD1_GPIO_13
C3
B2
A2
A1
JTAG_RST#_USH
@ R605
0_0402_5%~D
1
2
BCMGPIO_10
BCMGPIO_11
BCMGPIO_12
BCMGPIO_13
M11
M12
F2
F1
M2
L11
M10
N14
P14
L10
SC_CLK
SC_FCB
SC_SEL5V_GPIO_25
SC_SEL18V_GPIO_26
SC_DET
SC_IO
SC_RST
SC_PWR_N14
SC_PWR_P14
SC_VCC
R607
R608
R609
R611
R614
R616
R620
T146PAD~D
T147PAD~D
T148PAD~D
T150PAD~D
1 0_0402_5%~D
1 0_0402_5%~D
1 0_0402_5%~D
1 0_0402_5%~D
1 0_0402_5%~D
1 0_0402_5%~D
1 0_0402_5%~D
+SC_PWR
2
2
2
2
2
2
2
SC_TEST
2
R623
SBOOT
HF_RX_TEST0
@ R621
0_0402_5%~D
1
2
BCM5882_SCCLK
AUX1UC
BCM5882_GPIO25
BCM5882_GPIO26
BCM5882_SCDET
BCM5882_IO
BCM5882_SCRST
All XTAL components and traces should be
placed/layout on top layer. The gnd/pwr
layer below will provide shielding from
27.12Mhz interference which might affect
cellular certification.
+1.2V_ALW_AVDD
1
VDDP
XTAL2
GPAD
GND
12
2
1
SPI_CLK
GND
DIO
5
SPI_TXD
1
2
3 G1
4 G2
W25X32VSSIG_SO8~D
4
CLK
UART
F9
A7
+RFID_AVDD2P5
HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7
D8
B7
+RFID_AVDD3P3
C7
C8
E7
HF_RFIDTAG_DVSS
1
L40
150NH_0805CS-151EGTS_2%~D
1
2
RFREADER_TXN1
A9
B11
E8
D9
B
1
2
RFID
JCS1
1
2
3
4
5
6
RFREADER_TXP1_PI
Q
VSS
VCC
W#
8
7
6
5
SPI_RXD
BCM5882_GPIO15
3
+3.3V_ALW_USH
1
2
2
D28
DA204U_SOT323-3~D
+3.3V_ALW_USH
L41
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD3P3
2
4.7K_0402_5%~D
2
2
1
18 CONTACTLESS_DET#
1
5
6
MOLEX_53398-0471~D
1
FCI_10089709-010010LF~D
5
UART_RX/GPIO0
UART_TX/GPIO1
M45PE16-VMW6TG_SO8W8~D
BCM5882_GPIO15
1
R647
HF_RX_AVDD2P5
HF_TX_AVDD2P5
HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5
HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2
+2.5V_ALW_AVDD
L42
2
1
2
3
2
1
BLM18BB100SN1D_2P~D
1 +RFID_AVDD2P5
2
1
1
2
1
2
3
4
5 G1
6 G2
CONN@
7
8
TYCO_2041084-6~D
1
2
connector list: 2041084-6
Hardware enable for USH TPM:Populate R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff
R841, Populate R483
+1.2V_ALW_AVDD
L43
BLM18BB100SN1D_2P~D
2
1 +RFID_AVDD1P2
1
2
1
2
1
2
C522
0.1U_0402_16V4Z~D
SPI_RST
6
+RFID_AVDD1P2
HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7
C514
1U_0603_10V6K~D
7
CLK
D7
F8
D10
D6
B5
C521
1U_0603_10V6K~D
/HOLD
/WP
4
GND
GND
CONN@
JBCM1
1
2
3
4
C520
0.1U_0402_16V4Z~D
DO
3
D
C
RESET#
S#
HF_TX_AVDD1P2
HF_RX_AVDD1P2
HF_RX_ADC_AVDD1P2
HF_RFIDTAG_AVDD2P5_C6
HF_RFIDTAG_AVDD2P5_E6
1
+3.3V_ALW
C519
1U_0603_10V6K~D
11
12
2
1
2
3
4
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
C6
E6
+2.5V_ALW_AVDD
R644
15K_0402_1%~D
1
SPI_TXD
SPI_CLK
SPI_RST
SPI_CS
B9
C9
C10
E9
HF_RFIDTAG_DVDD1P2
RFREADER_TXN1_PI
C518
1U_0603_10V6K~D
R646
1.5K_0402_5%~D
SPI_RXD
8
HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3
HF_RFIDTAG_VREF
RFREADER_RXN_C
C517
0.1U_0402_16V4Z~D
2
2
@ D26
DA204U_SOT323-3~D
C505
0.1U_0402_16V4Z~D
1
2
C516
1U_0603_10V6K~D
1
1
DA204U_SOT323-3~D
U36
VCC
BCM5882_GPIO15
1
2
+3.3V_ALW_USH
@ U35
3
+3.3V_ALW_USH
2
2
/CS
RFREADER_RXP
RFREADER_RXN
BCM5882KFBG_FBGA196~D
1
DA204U_SOT323-3~D
3
@ D27
CONN@
1
A10
B10
L39
150NH_0805CS-151EGTS_2%~D
1
2
RFREADER_TXP1
1
+3.3V_ALW_USH
Place C508 close
to U33 pin15
SPI_CS
HF_RX_P
HF_RX_N
HF_RX_AVSS_A9
HF_RX_AVSS_B11
2
+3.3V_ALW_USH
1
2
3
4
5
6
7
8
9
10
2
RFREADER_RXP_C
3
C515
3.3U_0603_10V6K~D
3.3U_0603_10V6K~D
SC_IO
SC_C8
SC_DET
1
2
3
4
5
6
7
8
9
10
1
HF_RFIDTAG_VTX
C
RFREADER_TXP1
RFREADER_TXN1
C5
C512
390P_0603_50V8G~D
SC_RST
SC_CLK
SC_C4
2
1
C511
390P_0603_50V8G~D
JSC1
1
1
2
@
1
C502
0.1U_0402_16V4Z~D
1
2
RFREADER_RXP
C513
0.1U_0402_16V4Z~D
A
2
C510
0.22U_0402_10V6K~D
2
@ C509
10U_0805_10V4Z~D
1
SC_VCC should be 3X wide as
regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be p
laced very close to SC cage pin
2
A8
B8
R636
15K_0402_1%~D
+3.3V_ALW_USH
SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET
T153 PAD~D
HF_TX_P
HF_TX_N
2
RFREADER_RXN
+SC_VCC
TDA8034HN_HVQFN24_4X4~D
+SC_VCC
0_0402_5%~D
22_0402_5%~D
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
1
1
PAD-OPEN1x1m
@ D25
2
2
2
2
2
2
T151 PAD~D
PLL_TESTOUT
BCM5882
2
2
24
1
1
1
1
1
1
T149 PAD~D
SWV
HF_RFIDTAG_VRX_P
HF_RFIDTAG_VRX_N
C504
390P_0603_50V8G~D
XTAL1
1
+SC_VCC
R638
R639
R640
R641
R642
R643
PLL_TESTOUT
C13
POR_MONITOR
43
PJP55
C507
C507
10P_0402_50V8J~D
10P_0402_50V8J~D
23
14
13
9
10
11
8
2
1
2
C503
390P_0603_50V8G~D
AUX1UC
AUX2UC
I/OUC
OFFN
15
RST
CLK
I/O
AUX1
AUX2
PRESN
C506
10P_0402_50V8J~D
21
22
20
19
VCC
RSTIN
CMDVCCN
EN_5V/3VN
EN_1.8VN
C508
.47U_0402_6.3V6-K~D
AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET
16
1
2
2
C491
10U_0603_6.3V6M~D
@
PAD~D T154
3
5
2
4
25
@ R637
0_0402_5%~D
BCM5882_SCRST
1SCC_CMDVCC_N
BCM5882_GPIO25
BCM5882_GPIO26
BCM5882_SCCLK
2
1
17
1
C489
C489
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
SCC_CMDVCC_N_R
VDD(intf)
VDD
PORadj
CLKDIV1
CLKDIV2
1
1
+5V_ALW
R634
3.3M_0402_5%~D
18
6
7
2
C501
10U_0805_10V6M~D
10U_0805_10V6M~D
PORADJ
CLKDIV1
CLKDIV2
2
+5V_ALW_SC
C500
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
B
2
1
C499
10U_0805_10V6M~D
2
U34
1
C498
0.1U_0402_16V4Z~D
1
C497
0.1U_0402_16V4Z~D
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV2
4.7K_0402_5%~D
1
@ R631
1
R633
2 PORADJ
4.7K_0402_5%~D
2 CLKDIV1
4.7K_0402_5%~D
1
K11
A6
B6
A4
+3.3V_ALW_SC
1
R632
1
R635
PAD-OPEN1x1m
+5V_ALW_SC
2
J13
SWV
POR_EXTR
A5
2
0.01U_0402_16V7K~D
B4
1
C487
C496
1U_0402_6.3V6K~D
+3.3V_ALW_SC
2
2
SPI_RST
TESTMODE
+1.2V_ALW_AVDD
PJP52
SBOOT
POR_EXTR
J14
RFTAG_VRXP
RFTAG_VRXN
0_0402_5%~D
0_0402_5%~D
+2.5V_ALW_AVDD
C488
1U_0402_6.3V6K~D
Smart Card
2
2
+3.3V_ALW
1
C1
BT_PRI_STATUS
T144 PAD~D
U33C
C490
10U_0603_6.3V6M~D
C493
15P_0402_50V8J~D
2
CLKOUT
BCM5882KFBG_FBGA196~D
+3.3V_ALW_USH
C495
1U_0402_6.3V6K~D
1
D1
1 SCC_CMDVCC_N
0_0402_5%~D
C494
C494
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
27.12MHZ_12PF_1N227120CC0B~D
C492
12P_0402_50V8J~D
D3
POR_MONITOR
SECURE_BOOT
CONTACTLESS_DET#
SCC_CMDVCC_N_R
BCM5882_GPIO15
BT_PRI_STATUS
RSTOUT_N
E2
J1
D2
C2
B1
SCANACCMODE
C487 should be placed
closer to pin A5
+3.3V_ALW_SC
D
GPIO_4
GPIO_14
GPIO_15
GPIO_16
OVSTB
E3
43
L14
CLKOUT
E1
FP_RESET# 23
BT_COEX_STATUS2
2
XO
4
R630
5.1M_0402_5%~D
2
GND
GND
3
R629
4.7K_0402_5%~D
1
OUT
IN
2
2
1
BT_COEX_STATUS2
HF_RX_TEST3
BCM5882KFBG_FBGA196~D
2
Y4
XI
POR_EXTR
@ R626
1K_0402_5%~D
HF_RX_TEST2
@ R618
0_0402_5%~D
1
2
1
R625 1
R628
REF_XIN
2
10M_0402_5%~D
USH_TESTMODE
HF_RX_TEST1
2 REF_XOUT
0_0402_5%~D
1
1
@ R612
OVSTB
@ R601
0_0402_5%~D
SCANACCMODE
@ T145 PAD~D
JTCE_USH
C
1
R627
2
LRESET_N_GPIO_17
LPCEN
LPCPD_N_GPIO_24
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
JTCE
UART_TX/GPIO1
UART_RX/GPIO0
1
1
2
PCI_TPM_TERM
M3
M5
N6
USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#
2 150_0402_5%~D
SMB_GPIO1
2
0_0402_5%~D
SC_DET
R606 1
BT_COEX_STATUS2 1
@ R1131
41 USH_PWR_STATE#
PLTRST1#_USH
USH_LPCEN
LPD#
L1
M1
N1
N2
L3
L2
NC
JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH
JTCE_USH
JTAG_TDO_USH
@ R599
0_0402_5%~D
1
2
SPI_CLK
SPI_CS
SPI_RXD
SPI_TXD
G3
G2
H1
H2
RST_N
JTAG_TDI_USH
JTAG_TMS_USH
SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9
G1
D4
C4
B3
A3
UART_TX_GPIO_1
UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3
@
@ C486
4.7P_0402_50V8C~D
1
2 JTAG_RST#_USH
1K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
LCLK
LAD0_GPIO_20
LAD1_GPIO_21
LAD2_GPIO_22
LAD3_GPIO_23
LFRAME_N_GPIO_18
LSERIRQ_GPIO_19
REFCLK_XTALIN
REFCLK_XTALOUT
@
42 USH_SMBCLK
42 USH_SMBDAT
41 BCM5882_ALERT#
P2
N3
M4
K5
N4
K4
L4
2
2
2
2
2
FP_USBD- 23
FP_USBD+ 23
1
4.7K_0402_5%~D
2
R590
RST_N
G14
F14
@
34,41 SP_TPM_LPC_EN
USBH_DN_1
USBH_UP_1
USBH_OC_1
P11
P12
P10
REF_XIN
REF_XOUT
JTAG_CLK_USH
@ R591
0_0402_5%~D
1
2
@@@@
1
@ R600
1
R602
1
R604
USBH_DN_0
USBH_UP_0
USBH_OC_0
USBD_DN
USBD_UP
USBD_ATTACH_GPIO_27
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
IRQ_SERIRQ_R
R593 1
R594 1
R595 1
R597 1
R598 1
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
FP_USBDFP_USBD+
USBH_OC0#
P7
P8
P9
BCM5882
1
2
CLK_PCI_TPM
15 CLK_PCI_TPM
14,34,41,42 LPC_LAD0
14,34,41,42 LPC_LAD1
14,34,41,42 LPC_LAD2
14,34,41,42 LPC_LAD3
14,34,41,42 LPC_LFRAME#
14,34,41,42 IRQ_SERIRQ
@ R603
10_0402_5%~D
P5
P6
N7
U33D
2
PAD-OPEN 2x2m~D
+3.3V_ALW_USH
BCM5882
+3.3V_ALW_USH
PJP56
1
USBP7USBP7+
3
S
R587 0_0402_5%~D
USBP7-_R
1
2
USBP7+_R
1
2
USB_GPIO27
R588 0_0402_5%~D
LPC
SPI
2USB_GPIO27
17
G
17
17 PLTRST_USH#
1
R610
1
2@ R615
U33A
SM BUS
Smard Card
1
1
Q37
SSM3K7002FU_SC70-3~D
+3.3V_ALW
2 RST_N
4.7K_0402_5%~D
2 OVSTB
4.7K_0402_5%~D
2 FP_RESET#
4.7K_0402_5%~D
2 SPI_RST
4.7K_0402_5%~D
JTAG
2
2
G
R580
4.7K_0402_5%~D
D
1
@
2 PLTRST1#_USH
10K_0402_5%~D
2 USH_LPCEN
4.7K_0402_5%~D
2 LPD#
4.7K_0402_5%~D
2 IRQ_SERIRQ_R
4.7K_0402_5%~D
2 USH_SMBCLK
2.2K_0402_5%~D
2 USH_SMBDAT
2.2K_0402_5%~D
2 BCM5882_ALERT#
2.2K_0402_5%~D
2 USH_PWR_STATE#
4.7K_0402_5%~D
2 USBH_OC1
4.7K_0402_5%~D
2
1
R577
1
R578
1
R582
1
R645
3
D
1
CLK_PCI_TPM
2
3
+3.3V_ALW_USH
S
2
0_0402_5%~D
2
1.5K_0402_5%~D
1
@ R579
1
1@ R583
1
@ R584
1
R581
1
R589
1
R585
1
R592
1
R586
1
R596
D
4
+3.3V_ALW_PCH
Q36
SI2301CDS-T1-GE3_SOT23-3~D
USB_GPIO27 1
@ R575
USBP7+
1
R576
+3.3V_ALW_USH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
USH BCM5882 (1/2)
Size
Document Number
Date:
2
A
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
33
of
66
5
4
3
2
1
U33B
+3.3V_ALW_USH
2
+3.3V_ALW_USH
2
1
2
C526
10U_0603_6.3V6M~D
D11
P13
C535
0.1U_0402_16V4Z~D
2
2
1
+VDDC_5882
+3.3V_ALW_USH
2
1
C546
C546
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
K10
K12
L12
L13
N5
E13
POR_AVSS
G13
D
AVDD33_LDO25
OTP_PWR
VDDO_33_E4
VDDO_33_J2
VDDO_33_K3
VDDO_33_L8
VDDO_33_N10
L6
M6
D12
AVDD25_PLL_A14
VDDC_D13
VDDC_F3
VDDC_J4
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J10
VDDC_J11
VDDC_K7
VDDC_K8
M13
N13
F13
PLL_AVSS
D13
F3
J4
J5
J6
J7
J8
J10
J11
K7
K8
D5
E5
LOW:Power Down Mode
High:Working Mode
B14
AVSS_REF
PLL_AVDD_1P2I
PLL_AVDD_1P2O
PLL_DVDD_1P2I
G4
H3
H4
J3
C549
10U_0603_6.3V6M~D
1
1
C545
1U_0402_6.3V6K~D
2
2
C548
C548
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C547
1U_0402_6.3V6K~D
2
1
C544
C544
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C543
1U_0402_6.3V6K~D
C
2
AVSS_PLL
D14
E14
C14
+1.2V_ALW_PLL
+VDDC_5882
2
C11
B13
C12
AVDD25_LDO12_A13
AVDD25_LDO12_B12
E4
J2
K3
L8
N10
1
AVSS_LDO12
AVSS_LDO25_B13
AVSS_LDO25_C12
PLL_DVSS
A14
+SC_PWR
C1161
1U_0402_6.3V6K~D
2
2
1
C525
C525
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
1
C542
1U_0402_6.3V6K~D
2
2
C534
C534
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C533
1U_0402_6.3V6K~D
1
2
C541
1U_0402_6.3V6K~D
2
C532
1U_0402_6.3V6K~D
1
1
C540
C540
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C531
1U_0402_6.3V6K~D
1
1
C539
1U_0402_6.3V6K~D
2
2
C530
1U_0402_6.3V6K~D
1
1
C538
C538
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
2
C529
1U_0402_6.3V6K~D
2
1
C537
1U_0402_6.3V6K~D
1
C536
C536
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
2
C528
1U_0402_6.3V6K~D
1
C527
1U_0402_6.3V6K~D
2
C524
1U_0402_6.3V6K~D
1
AVDD_2P5I
AVDD_2P5O_E10
AVDD_2P5O_E11
A13
B12
C523
C523
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
+1.2V_ALW_PLL
AVDD_1P2I_REF
AVDD_1P2O_A11
AVDD_1P2O_A12
H13
E10
E11
+2.5V_ALW_AVDD
D
BCM5882
H14
A11
A12
+1.2V_ALW_PLL
+1.2V_ALW_AVDD
VSSC_F4
VSSC_F5
VSSC_F6
VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12
VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8
VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12
VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8
VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12
VSSC_J9
VSSC_J12
VSSC_K2
VSSC_K6
VSSC_K13
VSSC_K14
VSSC_L5
VSSC_M8
VSSC_M14
VSSC_N9
VSSC_N11
VSSC_N12
VSSC_P3
VSSC_P4
VDDO_33CORE_G4
VDDO_33CORE_H3
VDDO_33CORE_H4
VDDO_33CORE_J3
VDDO_33SC_M13
VDDO_33SC_N13
VDDO_LPC_L6
VDDO_LPC_M6
VDDO_SC_K10
VDDO_SC_K12
VDDO_SC_L12
VDDO_SC_L13
F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4
C
VDDO_VAR_D5
VDDO_VAR_E5
VESD
BCM5882KFBG_FBGA196~D
China TCM: NationZ & Jetway co-lay
+3.3V_RUN
4@ U37
B
R650
R649
R648
R651
R652
1
1
1
1
1
1
4@ R653 1
4@ R654
1
4@ R655
2
2
2
2
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
0_0402_5%~D
2
0_0402_5%~D
C_TPM_LPC_EN
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
28
26
23
20
17
21
LPC_LFRAME#_R 22
PCI_RST#_R
16
27
CLKRUN#_R
15
7
TCM_BA1
3
TCM_BA0
9
LPCPD#
LAD0
LAD1
LAD2
LAD3
GND_11
GND_18
GND_25
GND_4
2
11
18
25
4
NC_5
NC_12
NC_13
+3.3V_RUN
5
12
13
NC_1
NC_2
NC_6
NC_8
NC_P
LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP
BA_1
BA_0
1
1
2
6
8
14
SSX44-B-D-T1_TSSOP28~D
TCM Vender
USH_LPCEN
SIO 5028 - & gt; SP_TPM_LPC_EN
PCH GPIO38 - & gt; TPM_ID0
JETWAY_PIN5
4@ C554
1U_0402_6.3V6K~D
2
@C555
@C555
0.1U_0402_16V4Z~D
A
R659, R660, C550, C554
C555, RH315
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
4@ R660
1K_0402_5%~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
4@ R659
1K_0402_5%~D
Title
USH BCM5882 (2/2)
4
3
2
Size
Document Number
Date:
5
B
ALL TPM/TCM Disable
@
@
@
@
POP
@
@
POP
POP
NationZ
Jetway
1
2
JETWAY_CLK14M 15
1
TCM_BA0
TCM_BA1
2
2
USH BCM5882 and China TCM Z8H172T Option
Ref Des
TCM Enable TPM Enable
All 4@
POP
@
PU R583
@
POP
PD R615
POP
@
PU R772
@
@
PU RH268
@
POP
PD RH271
POP
@
PU RH267
@
POP
PD RH270
POP
@
2
A
1
1
PART/PIN
TCM circuit
PCH GPIO39 - & gt; TPM_ID1
JETWAY_CLK14M
1
1
2
@ R658
@R658
10K_0402_5%~D
1
2
JETWAY_PIN5
1
@ R657
10K_0402_5%~D
2
4@ C550
10U_0603_6.3V6M~D
15 CLK_PCI_TPM_CHA
14,33,41,42 LPC_LFRAME#
14,17,36,37,41,42 PCH_PLTRST#_EC
+3.3V_RUN
14,33,41,42 IRQ_SERIRQ
16,41,42 CLKRUN#
1
2
@ R656
4.7K_0402_5%~D
4@
4@
4@
4@
4@
4@ C553
C553
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
4@ C552
0.1U_0402_16V4Z~D
33,41
14,33,41,42
14,33,41,42
14,33,41,42
14,33,41,42
10
19
24
4@ C551
C551
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
VDD_0
VDD_1
VDD_2
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
34
of
66
A
B
C
D
E
1
1
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
R677
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
2
191_0402_1%~D
PE_REFCLKP
PE_REFCLKM
6
7
5
4
3
PE_TXP
PE_TXM
PE_RXP
PE_RXM
PE_REXT
33
place close to pin U38.32
GPAD
13
PE_RST#
14
31
MULTI-IO1
MULTI-IO2
17 PLTRST_MMI#
15 MMICLK_REQ#
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
28
26
29
27
25
24
23
22
21
20
SD/MMCDAT1_R
SD/MMCDAT2_R
SD/MMC/MSDAT0_R
MSDAT1_R
MSDAT2_R
SD/MMC/MSDAT3_R
SD/MMCDAT4_R
SD/MMCDAT5_R
SD/MMCDAT6_R
SD/MMCDAT7_R
11
19
18
12
30
MS_CD#
SD/MMC/MS_CMD_R R674 1
SD/MMC/MS_CLK_R
1
SD/MMCCD#
R676
SDWP
MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD#
SD_WPI
R663
R664
R665
R666
R667
R668
R669
R670
R672
R673
2
1
1
1
1
1
1
1
1
1
1
+3.3V_RUN_CARD
2
2
2
2
2
2
2
2
2
2
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
33_0402_5%~D
SD/MMCDAT1
SD/MMCDAT2
SD/MMC/MSDAT0
MSDAT1
MSDAT2
SD/MMC/MSDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
1
2
1
2
R826
10K_0402_5%~D
PCIE_PRX_MMITX_P6
PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_P6
PCIE_PTX_MMIRX_N6
2
2
2
2
+SKT_VCC
2
C572
4.7U_0603_10V6K~D
15
15
15
15
1
1
1
1
17
15
2
2
C570
0.1U_0402_16V4Z~D
2
C569
C571
C567
C568
+OZ_DVDD
+OZ_AVDD
2
2
1
15 CLK_PCIE_MMI
15 CLK_PCIE_MMI#
@ C574
0.01U_0402_16V7K~D
2
@ C573
0.1U_0402_16V4Z~D
2
1
1
10
8
SKT_VCC
MMI_VCC_OUT
+PE_VDDH
1
1
DVDD
AVDD
3.3VDDH
VDDH
PE_VDDH
2
1
16
9
32
1
2
L44
+3.3VDDH
+VDDH_SD
+PE_VDDH
2
BLM18BD601SN1D_0603~D
1
U38
1
C560
4.7U_0603_10V6K~D
1
2
C564
4.7U_0603_10V6K~D
2
C566
4.7U_0603_10V6K~D
2
2
1
C565
0.1U_0402_16V4Z~D
1
C562
C562
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
C561
4.7U_0603_10V6K~D
1
1
C563
C563
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C558
0.1U_0402_16V4Z~D
L47
1
2
BLM18BD601SN1D_0603~D
L45
BLM18PG471SN1D_0603~D
1
2
1
C557
C557
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
BLM18BD601SN1D_0603~D
C556
C556
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
+1.5V_RUN
C559
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@ L46
2
2 33_0402_5%~D SD/MMC/MS_CMD
SD/MMC/MS_CLK
2
33_0402_5%~D
OZ600FJ0LN_QFN32_5X5~D
Note: The trace need to route as
daisy-chain and the trace of SD signals
need to route as short as possible
JSD1
7
9
+3.3V_RUN_CARD
3
SD/MMC/MSDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMC/MSDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
SD/MMC/MS_CMD
SD/MMC/MS_CLK
SD/MMCCD#
SDWP
2
1
@ RE678
@RE678
33_0402_5%~D
1
2
@ CE757
@CE757
14
15
13
11
SD/MMC/MS_CLK
MS_CD#
SD/MMC/MS_CMD
SD/MMC/MS_CLK
4
18
24
25
45
SD/MMC/MSDAT0
MSDAT1
MSDAT2
SD/MMC/MSDAT3
EMI request
22
23
1
2
3
5
19
21
10
12
16
10P_0402_50V8J~D
6
8
17
20
VDD
VCC
VCC
44
3
DAT0
DAT1
DAT2
CD/DAT3
DAT4
DAT5
DAT6
DAT7
CD
R/-B
-RE
-CE
CLE
ALE
-WE
-WP
CMD
CLK
COM(SW)
CD(SW)
WP(SW)
D0
D1
D2
D3
D4
D5
D6
D7
DATA0
DATA1
DATA2
DATA3
SCLK
INS
BS
GND
GND
VSS
VSS
VSS
VSS
GND1
GND2
GND3
GND4
27
28
29
30
31
32
33
34
36
37
38
39
40
41
42
43
26
35
46
47
48
49
T-SOL_152-1300302601_NR
CONN@
4
4
Support SD/MMC/MS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Card Reader OZ600FJ0
Size
B
C
D
Rev
1.0
LA-6591P
Date:
A
Document Number
Monday, January 10, 2011
Sheet
E
35
of
66
5
4
3
2
1
+3.3V_PCIE_WWAN
1
@ R693
2
2
100K_0402_5%~D
DDR_XDP_WAN_SMBCLK
7,12,13,14,15,28 DDR_XDP_WAN_SMBDAT
1
0_0402_5%~D
1
0_0402_5%~D
PCIE_MCARD1_DET# 1
R692
WLAN_RADIO_DIS#_R
2
D31
RB751S40T1_SOD523-2~D
USB_MCARD1_DET#
1
@ R698
WWAN_SMBDAT
+3.3V_WLAN
+1.5V_RUN
C
GND2
@ C600
33P_0402_50V8J~D
USB_MCARD2_DET# 1
@ R697
2 PCIE_MCARD2_DET#
0_0402_5%~D
+1.5V_RUN
2
2
R719
1
2
1
2
1
2
1
2
C608
4.7U_0603_6.3V6K~D
2
1
C607
0.1U_0402_16V4Z~D
2
1
C606
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
2
1
WIMAX_LED#
Voltage
Tolerance
+3.3V
Primary Power
Peak
5
6
7
8
9
10
+-9%
1000
750
+-9%
330
250
+-5%
500
375
Normal
250 (Wake enable)
5 (Not wake enable)
NA
UIM_VPP
UIM_DATA
+1.5V_RUN
+3.3V_PCIE_FLASH
53
WIRELESS_LED#
3
Q124B
DMN66D0LDW-7_SOT363-6~D
6
USB_MCARD3_DET#
2
2
1
2
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2 PCIE_MCARD3_DET#
0_0402_5%~D
1
@ R708
@R708
B
+1.5V_RUN
Confirm with DELL about UWB
2
R710
1 PCH_PLTRST#_EC
0_0402_5%~D
USBP6USBP6+
USB_MCARD3_DET#
USBP6- 17
USBP6+ 17
2
@ R712
just reserve
1
100K_0402_5%~D
+3.3V_ALW_PCH
WPAN Noise
USB_MCARD3_DET#
54
1
2
@ C627
4700P_0402_25V7K~D
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Mini Card
4
3
2
Size
Document Number
Date:
5
DMN66D0LDW-7_SOT363-6~D
4
1
TYCO_1775861-1~D
C626
4.7U_0603_6.3V6K~D
2
1
C625
0.1U_0402_16V4Z~D
2
1
C624
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
2
1
C623
0.047U_0402_16V4Z~D
2
1
2
1
C622
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
@ C631
33P_0402_50V8J~D
2
SRV05-4.TCT_SOT23-6~D
2
UIM_DATA
@ C630
33P_0402_50V8J~D
1
@ C629
@ C629
33P_0402_50V8J~D
2
@ C628
33P_0402_50V8J~D
1
4
+SIM_PWR
1
@ C621
@C621
0.1U_0402_16V4Z~D
3
UIM_CLK
5
1
C620
C620
0.047U_0402_16V4Z~D
2
1
C619
0.047U_0402_16V4Z~D
A
UIM_VPP
6
C
+3.3V_PCIE_FLASH
PCIE_WAKE#
COEX2_WLAN_ACTIVE
1
2
R709
0_0402_5%~D
MINI3CLK_REQ#
15 MINI3CLK_REQ#
@ U40
1
42
+3.3V_WLAN
WLAN_LED#
+3.3V_PCIE_FLASH
CONN@
JMINI3
1 1
3 3
5 5
7 7
9 9
CLK_PCIE_MINI3#
11 11
15 CLK_PCIE_MINI3#
CLK_PCIE_MINI3
13 13
15 CLK_PCIE_MINI3
15 15
17 17
19 19
21 21
PCIE_PRX_WPANTX_N5
23 23
15 PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
25 25
15 PCIE_PRX_WPANTX_P5
27 27
C617
0.1U_0402_10V7K~D
29 29
PCIE_PTX_WPANRX_N5_C
1
2
31 31
15 PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5_C
33 33
1
2
15 PCIE_PTX_WPANRX_P5
C618
0.1U_0402_10V7K~D
35 35
PCIE_MCARD3_DET#
37 37
18 PCIE_MCARD3_DET#
39 39
1
2
41 41
+3.3V_RUN
R711
100K_0402_5%~D
43 43
45 45
47 47
49 49
51 51
Aux Power
Normal
+1.5V
UIM_RESET
MSDATA
WIMAX_LED# STUDY FOR DEBUG
WIRELESS_LED# 41,45
JSIM1
C616
1U_0402_6.3V6K~D
MSDATA
2
0_0402_5%~D
1
@ R706
@R706
1/2 Minicard Flash Card H=4
+SIM_PWR
1
1
C605
0.047U_0402_16V4Z~D
1
+3.3Vaux
GND
VPP
I/O
NC
GND
GND
MOLEX_475531001
CONN@
54
USBP4- 17
USBP4+ 17
USB_MCARD1_DET# 14,18
Q77
SSM3K7002FU_SC70-3~D
SIM Card Push-Push
VCC
RST
CLK
NC
GND2
+3.3V_WLAN
C604
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
3
B
1
2
3
4
GND1
USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
Q124A
PWR
Rail
UIM_RESET
UIM_CLK
53
@ C603
0.1U_0402_16V4Z~D
2
2
C602
C602
0.047U_0402_16V4Z~D
+
LED_WWAN_OUT#
2
D
2
1
2
0_0402_5%~D
HOST_DEBUG_TX 42
TYCO_1775861-1~D
S
+
15 PCH_CL_DATA1
1
15 PCH_CL_RST1#
R707
check
G
2
1
@ C1176
330U_D2E_6.3VM_R25~D
2
1
C615
C615
330U_D2E_6.3VM_R25~D
2
1
C614
33P_0402_50V8J~D
1
15 PCH_CL_CLK1
1
USBP517
USBP5+
17
USB_MCARD2_DET# 18
1
C613
22U_0805_6.3VAM~D
2
COEX2_WLAN_ACTIVE
USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN_OUT#
+3.3V_PCIE_WWAN
C612
33P_0402_50V8J~D
1
C611
0.047U_0402_16V4Z~D
2
C610
0.047U_0402_16V4Z~D
1
0.1U_0402_10V7K~D
2 PCIE_PTX_WLANRX_N2_C
2 PCIE_PTX_WLANRX_P2_C
0.1U_0402_10V7K~D
PCIE_MCARD1_DET#
18 PCIE_MCARD1_DET#
TYCO_1775861-1~D
+3.3V_PCIE_WWAN
C596
1
1
C598
15 PCIE_PTX_WLANRX_N2
15 PCIE_PTX_WLANRX_P2
C601
0.047U_0402_16V4Z~D
2
GND1
54
WWAN_RADIO_DIS# 41
PCH_PLTRST#_EC 14,17,34,37,41,42
WWAN_SMBCLK
WWAN_SMBDAT
100K_0402_5%~D
1
C594
0.047U_0402_16V4Z~D
2
C593
33P_0402_50V8J~D
1
53
R704
2
0_0402_5%~D
1
2
C595 4700P_0402_25V7K~D
5
0.1U_0402_10V7K~D
2 PCIE_PTX_WANRX_N1_C
2 PCIE_PTX_WANRX_P1_C
0.1U_0402_10V7K~D
2 PCIE_MCARD2_DET#_R
0_0402_5%~D
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
15 PCIE_PRX_WLANTX_N2
15 PCIE_PRX_WLANTX_P2
D
2
100K_0402_5%~D
2
100K_0402_5%~D
WLAN_RADIO_DIS#_R
2
1 PCH_PLTRST#_EC
R703
0_0402_5%~D
2
C597
1
15 PCIE_PTX_WANRX_N1
1
15 PCIE_PTX_WANRX_P1
C599
1
17 PCIE_MCARD2_DET# R725
42 HOST_DEBUG_RX
42
MSCLK
1
2
15 PCIE_PRX_WANTX_N1
15 PCIE_PRX_WANTX_P1
+1.5V_RUN
+SIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
PCIE_MCARD1_DET# 1
@ R699
USB_MCARD1_DET#
1
R701
MSDATA
R705
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
15 MINI2CLK_REQ#
15 CLK_PCIE_MINI2#
15 CLK_PCIE_MINI2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
15 CLK_PCIE_MINI1#
15 CLK_PCIE_MINI1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
MINI1CLK_REQ#
15 MINI1CLK_REQ#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
+1.5V_RUN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
R718
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
43 COEX2_WLAN_ACTIVE
43 COEX1_BT_ACTIVE
+3.3V_PCIE_WWAN
CONN@
JMINI1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
+3.3V_PCIE_WWAN
PCIE_WAKE#
1
2
R700
0_0402_5%~D
1
2
R702
0_0402_5%~D
29,37,41 PCIE_WAKE#
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
+3.3V_RUN
2 PCIE_MCARD1_DET#
0_0402_5%~D
+3.3V_WLAN
CONN@
JMINI2
D
Mini WWAN/GPS/LTE/UWB H=5.2
2
100K_0402_5%~D
Mini WLAN/WIMAX H=4
WWAN_SMBCLK
100K_0402_5%~D
7,12,13,14,15,28
2
R1157
2
R1158
41 WLAN_RADIO_DIS#
+3.3V_ALW_PCH
2
0_0402_5%~D
1
100K_0402_5%~D
PCIE_MCARD2_DET#_R 1
R695
2
1
+3.3V_PCIE_WWAN
@ R1160
2.2K_0402_5%~D
@ R1159
@ R1159
2.2K_0402_5%~D
1
100K_0402_5%~D
1
+3.3V_RUN
USB_MCARD2_DET# 2
R694
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
36
of
66
5
4
3
2
Express Card PWR S/W
Power Control for Mini card1
+15V_ALW
+3.3V_ALW
1
Q38
+3.3V_WLAN
SI3456DDV-T1-GE3_TSOP6~D
+1.5V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_CARDAUX
+1.5V_CARD
+3.3V_CARD
4
S
1
G
3
2
2
3
1
2
6
1
1
U41
17
2
12
1
R717
11,41,44,49 RUN_ON
14,17,34,36,41,42 PCH_PLTRST#_EC
2
SHDN#
STBY#
SYSRST#
OC#
PERST#
CPPE#
CPUSB#
8
10
9
NC
NC
NC
NC
NC
2
1
2
1
2
1
2
1
2
15
3
11
4
5
13
14
16
+3.3V_RUN
+3.3V_CARD
+1.5V_CARD
+1.5V_RUN
R716
100K_0402_5%~D
AUXOUT
3.3VOUT
1.5VOUT
20
1
6
19
EXPRCRD_STBY_R#
2
0_0402_5%~D
AUXIN
3.3VIN
1.5VIN
1
C638
10U_0603_6.3V6M~D
2
C637
0.1U_0402_16V4Z~D
1
C641
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
C640
0.1U_0402_16V4Z~D
1
C643
10U_0603_6.3V6M~D
2
C642
C642
0.1U_0402_16V4Z~D
2
1
C633
0.1U_0402_16V4Z~D
1
2
C634
0.1U_0402_16V4Z~D
1
R715
20K_0402_5%~D
C635
0.1U_0402_16V4Z~D
2
41 AUX_EN_WOWL
4
C632
4700P_0402_25V7K~D
Q39A
DMN66D0LDW-7_SOT363-6~D
R714
DMN66D0LDW-7_SOT363-6~D
100K_0402_5%~D
Q39B
R713
100K_0402_5%~D
5
6
5
2
1
D
D
1
D
RCLKEN
18
GND
PAD
CARD_RESET#
EXPRCRD_CPPE#
CPUSB#
7
21
TPS2231MRGPR-2_QFN20_4X4~D
Power Control for Mini card2
D
S
1
G
2
1
2
G
MCARD_WWAN_PWREN#
S
2
0_0402_5%~D
1
@ R727
@R727
1 1
2
0_0402_5%~D
2 2
2
1
@ R724
@R724
17
17
B
USBP10-
4
USBP10+
4
2
1
1
41 MCARD_MISC_PWREN
2
3
CONN@
JEXP1
DLW21SN900SQ2L_0805_4P~D
CARD_SMBCLK
CARD_SMBDAT
29,36,41 PCIE_WAKE#
+3.3V_CARDAUX
CARD_RESET#
D
1
S
6
5
2
1
4
G
1
C646
0.1U_0402_16V4Z~D
R730
20K_0402_5%~D
1
2
15 EXPCLK_REQ#
1
2
2
C649
0.1U_0402_16V4Z~D
15 PCIE_PRX_EXPTX_N3
15 PCIE_PRX_EXPTX_P3
EXPRCRD_CPPE#
15 CLK_PCIE_EXP#
15 CLK_PCIE_EXP
2
15 PCIE_PTX_EXPRX_N3
15 PCIE_PTX_EXPRX_P3
C647
1
1
C648
C645
0.1U_0402_16V4Z~D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
+3.3V_CARD
3
1
2
3
1
6
Q43A
DMN66D0LDW-7_SOT363-6~D
3
1
USBP10_DUSBP10_D+
CPUSB#
42 CARD_SMBCLK
42 CARD_SMBDAT
Q42
+3.3V_PCIE_FLASH
SI3456DDV-T1-GE3_TSOP6~D
C650
4700P_0402_25V7K~D
5
R729
DMN66D0LDW-7_SOT363-6~D
100K_0402_5%~D
Q43B
R728
100K_0402_5%~D
2
+3.3V_ALW
4
L49
Power Control for Mini card3
+15V_ALW
+1.5V_CARD
D
2
2
+3.3V_SUS
1
1
Express Card Conn.
3
4
+3.3V_RUN
R723
1K_0402_5%~D
3
2
3
1
2
6
1
1
@ R720
0_0805_5%~D
2
R732
2.2K_0402_5%~D
R726
100K_0402_5%~D
1
R731
2.2K_0402_5%~D
41 MCARD_WWAN_PWREN
4
SSM3K7002FU_SC70-3~D
Q73
2
6
5
2
1
C644
4700P_0402_25V7K~D
Q41A
DMN66D0LDW-7_SOT363-6~D
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
100K_0402_5%~D
100K_0402_5%~D
Q41B
Q41B
R721
R721
100K_0402_5%~D
100K_0402_5%~D
MCARD_WWAN_PWREN# 5
Q40
SI3456DDV-T1-GE3_TSOP6~D
1
+3.3V_ALW
1
+15V_ALW
C
Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
+3.3V_PCIE_WWAN
2
C
0.1U_0402_10V7K~D
2 PCIE_PTX_EXPRX_N3_C
2 PCIE_PTX_EXPRX_P3_C
0.1U_0402_10V7K~D
GND1
USB_DUSB_D+
CPUSB#
RESERVED
RESERVED
SMB_CLK
SMB_DAT
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PER_N0
PER_P0
GND
PET_N0
PET_P0
GND
27
28
29
30
B
GND
GND
GND
GND
T-SOL_5421005002000-9_NR
R733
100K_0402_5%~D
A
2
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
PCIE-SATA SW / PCIE PWR
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
37
of
66
5
4
3
2
1
D
D
+USB_SIDE_PWR
2
C656
0.1U_0402_16V4Z~D
1
USB conn update ok-6/5
JUSB2
1
2
3
4
+5V
AA+ GND
GNDGND
6
5
SUYIN_020133GR004M53UZL
CONN@
2
3
USBP0_DUSBP0_D+
C
C
1
D72
PESD5V0U2BT_SOT23-3~D
L51
17
USBP0+
17
USBP0-
4
1
4
1
L52
3
2
3
USBP0_D+
2
USBP0_D-
17
USBP1+
4
17
USBP1-
1
4
3
1
2
3
USBP1_D+
2
USBP1_D-
1
@ R739
@R739
2
0_0402_5%~D
2
0_0402_5%~D
1
+
2
B
1
2
C658
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
@ R738
+USB_SIDE_PWR
DLW21SN900SQ2L_0805_4P~D
1
2
@R737
@ R737
0_0402_5%~D
C657
150U_B2_6.3V-M~D
DLW21SN900SQ2L_0805_4P~D
1
2
@ R736
0_0402_5%~D
USB conn update ok-6/5
1
2
3
4
USBP1_DUSBP1_D+
+5V
AA+ GND
GNDGND
6
5
SUYIN_020133GR004M53UZL
CONN@
2
3
B
JUSB3
1
D73
PESD5V0U2BT_SOT23-3~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
USB x2
Size
4
3
2
Rev
1.0
LA-6591P
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
38
of
66
4
3
2
ESATA Repeater
2
1
2
1
2
1
R743
0_0402_5%~D
@ R742
0_0402_5%~D
0_0402_5%~D
R1587
0_0402_5%~D
2
R1586
R1586
0_0402_5%~D
1
C662
0.1U_0402_16V4Z~D
2
2
0_0402_5%~D
D
C661
0.01U_0402_16V7K~D
1
1
+3.3V_RUN
+3.3V_RUN
1
R741
1
2
5
D
U44
BINP
BINM
11
12
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP
1
10
9
8
7
6
11
USB_OC1#
17,31
USB_OC0#
+
17
2
1
2
1
1
31,41 ESATA_USB_PWR_EN#
41 USB_SIDE_EN#
GND FAULT1#
IN
OUT1
IN
OUT2
EN1#
ILIM
EN2# FAULT#2
T-PAD
TPS2560DRCR-PG1.1_SON10_3X3~D
R747
24.9K_0402_1%~D
JESA1
USBP2_DUSBP2_D+
2
2
JUMP_43X79
1
2
3
4
5
+5V_ALW_FUSE
1
C668
0.1U_0402_16V4Z~D
1
C670
0.1U_0402_16V4Z~D
2
C669
10U_0805_10V4Z~D
1
1
C667
150U_B2_6.3V-M~D
+SATA_SIDE_PWR
2
2
+SATA_SIDE_PWR
U45
PJP7
1
C
+5V_ALW_FUSE
2
1
Note: +ESATA_DEW1, +ESATA_DEW2, +ESATA_EQ1, +ESATA_EQ2 need to
route 10 mils and R1584~R1587 need to change to 10k and no
stuff R1584, R1585 to support TI SN75LVCP601
+USB_SIDE_PWR
+5V_ALW
2
1
2
1
2
1
2
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
@ R745
0_0402_5%~D
1
AOUTP
AOUTM
MAX4951BECTP+TGH7_TQFN20_4X4~D
R1585
0_0402_5%~D
0_0402_5%~D
R1584
0_0402_5%~D
2
ESATA_PE1
ESATA_PE2
15
14
@ R746
0_0402_5%~D
0_0402_5%~D
@ R1583
10K_0402_5%~D
10K_0402_5%~D
@ R1582
10K_0402_5%~D
C
GND
GND
GND
GND
EP
9
8
PA
PB
+ESATA_DEW1
@ R1589
10K_0402_5%~D
+ESATA_EQ1
+ESATA_EQ2
+3.3V_RUN
3
13
17
19
21
BOUTM
BOUTP
+ESATA_DEW2
2
14 ESATA_PRX_DTX_P4_C
4
5
AINP
AINM
6
10
16
20
VCC
VCC
VCC
VCC
1
14 ESATA_PRX_DTX_N4_C
1
2
EN
CAD
2
14 ESATA_PTX_DRX_N4_C
7
18
ESATA_PTX_DRX_P4
0.01U_0402_16V7K~D
1 ESATA_PTX_DRX_N4
0.01U_0402_16V7K~D
1 ESATA_PRX_DTX_N4
0.01U_0402_16V7K~D
1 ESATA_PRX_DTX_P4
0.01U_0402_16V7K~D
1
@ R1588
@ R1588
10K_0402_5%~D
ESATA_PTX_DRX_P4_C 2
C664
ESATA_PTX_DRX_N4_C 2
C663
ESATA_PRX_DTX_N4_C 2
C666
ESATA_PRX_DTX_P4_C 2
C665
14 ESATA_PTX_DRX_P4_C
1
2
3
4
VBUS
DD+
GND
USB
B
B
ESATA_PTX_DRX_P4_RP
1
C671
ESATA_PTX_DRX_N4_RP
1
C672
ESATA_PRX_DTX_N4_RP
1
C673
ESATA_PRX_DTX_P4_RP
1
C674
L90
1
USBP2-
4
1
4
2
3
2
USBP2_D+
3
USBP2_D-
DLW21SN900SQ2L_0805_4P~D
1
2
@ R1150
0_0402_5%~D
1
@ R1151
5
6
7
8
9
10
11
12
13
14
15
2
17
USBP2+
3
17
2 SATA_PTX_DRX_P4
0.01U_0402_16V7K~D
2 SATA_PTX_DRX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_N4
0.01U_0402_16V7K~D
2 SATA_PRX_DTX_P4
0.01U_0402_16V7K~D
2
0_0402_5%~D
GND
A+
ESATA
AGND
BB+
GND
GND
GND
GND
GND
D74
TYCO_2129156-3
PESD5V0U2BT_SOT23-3~D
1
CONN@
Place D74 close to JESATA1
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
USB/ESATA/IO/MDC
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
39
of
66
2
1
CONN@
JDOCK1
16 DPD_PCH_LANE_P2
16 DPD_PCH_LANE_N2
16 DPD_PCH_LANE_P3
16 DPD_PCH_LANE_N3
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0
C681
C683
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
C692
C685
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
C687
C689
2
2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_AUX
DPD_DOCK_AUX#
27 DPD_DOCK_AUX
27 DPD_DOCK_AUX#
DPD_PCH_DOCK_HPD
16 DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
1
C695
0.033U_0402_16V7K~D
B
BLUE_DOCK
25 BLUE_DOCK
2
Close to DOCK
Its for Enhance ESD on dock issue.
25
RED_DOCK
RED_DOCK
GREEN_DOCK
25 GREEN_DOCK
25 HSYNC_DOCK
25 VSYNC_DOCK
DPD_PCH_DOCK_HPD
42
42
CLK_MSE
DAT_MSE
DAI_DI
DAI_DO#
1
R757
110K_0402_1%~D
DAI_BCLK#
DAI_LRCK#
30
30
2
30
30
30 DAI_12MHZ#
41
41
D_LAD0
D_LAD1
41
41
D_LAD2
D_LAD3
41
41
D_LFRAME#
D_CLKRUN#
41
41
D_SERIRQ
D_DLDRQ1#
17 CLK_PCI_DOCK
42 DOCK_SMB_CLK
42 DOCK_SMB_DAT
42,46,56 DOCK_SMB_ALERT#
46 DOCK_PSID
42 DOCK_PWR_BTN#
41,46,56 SLICE_BAT_PRES#
SLICE_BAT_PRES#
SM24.TCT_SOT23-3~D
2
1
@
145
146
147
148
153
154
155
156
157
158
GND1
PWR1
PWR1
PWR1
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
DOCK_AC_OFF
DPC_CA_DET
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
C691 2
C680 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
C682 2
C684 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
C693 2
C686 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
C688 2
C694 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_PCH_LANE_P0 16
DPC_PCH_LANE_N0 16
DPC_PCH_LANE_P1 16
DPC_PCH_LANE_N1 16
DPC_PCH_LANE_P2 16
DPC_PCH_LANE_N2 16
DPC_PCH_LANE_P3 16
DPC_PCH_LANE_N3 16
DPC_DOCK_AUX 27
DPC_DOCK_AUX# 27
DPC_PCH_DOCK_HPD
DPC_PCH_DOCK_HPD 16
ACAV_DOCK_SRC# 56
1
DAT_DDC2_DOCK 25
CLK_DDC2_DOCK 25
2
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
2
C697 2
C698
1
C699 1
C700
1
1 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
2
2 0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C696
0.033U_0402_16V7K~D
SATA_PRX_DKTX_P5_C 14
SATA_PRX_DKTX_N5_C 14
B
Close to DOCK
Its for Enhance ESD on dock issue.
SATA_PTX_DKRX_P5_C 14
SATA_PTX_DKRX_N5_C 14
USBP8+ 17
USBP8- 17
USBP9+ 17
USBP9- 17
DPC_PCH_DOCK_HPD
CLK_KBD 42
DAT_KBD 42
R758
110K_0402_1%~D
BREATH_LED# 42,45
DOCK_LOM_ACTLED_YEL# 32
DOCK_LOM_TRD0+ 32
DOCK_LOM_TRD0- 32
DOCK_LOM_TRD1+ 32
DOCK_LOM_TRD1- 32
+3.3V_ALW
+LOM_VCT
DOCK_DET#
1
+LOM_VCT
DOCK_LOM_TRD2+ 32
DOCK_LOM_TRD2- 32
2
1
R755
2
100K_0402_5%~D
C701
1U_0402_6.3V6K~D
DOCK_LOM_TRD3+ 32
DOCK_LOM_TRD3- 32
DOCK_DCIN_IS+ 54
DOCK_DCIN_IS- 54
DOCK_POR_RST# 42
DOCK_DET_R#
149
150
151
152
159
160
161
162
163
164
DOCK_AC_OFF 41,56
DOCK_LOM_SPD100LED_ORG# 32
DPC_CA_DET 27
D32
RB751S40T1_SOD523-2~D
1
2
DOCK_DET#
41
CLK_PCI_DOCK
+DOCK_PWR_BAR
1
2
R756
33_0402_5%~D
C703
0.1U_0603_50V4Z~D
2
C702
0.1U_0603_50V4Z~D
1
D33
3
+DOCK_PWR_BAR
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
1
16 DPD_PCH_LANE_P1
16 DPD_PCH_LANE_N1
C690
C679
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
2
16 DPD_PCH_LANE_P0
16 DPD_PCH_LANE_N0
DPD_CA_DET
2
32 DOCK_LOM_SPD10LED_GRN#
27 DPD_CA_DET
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
1
DOCK_DET_1
1
2
C704
6.8P_0402_50V8D~D
JAE_WD2F144WB1
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCKING CONN
Document Number
Date:
2
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
1
Sheet
40
of
66
5
4
3
2
1
+3.3V_ALW
PCIE_WAKE#
2
10K_0402_5%~D
DCIN_CBL_DET#
2
100K_0402_5%~D
CPU_DETECT#
2
100K_0402_5%~D
SLICE_BAT_PRES#
2
100K_0402_5%~D
1
R759
1
R761
1
R763
1
R760
+3.3V_ALW
1
2
1
C705
10U_0805_6.3V6M~D
2
1
C706
0.1U_0402_16V4Z~D
2
1
C707
0.1U_0402_16V4Z~D
2
1
C708
0.1U_0402_10V7K~D
1
C709
0.1U_0402_16V4Z~D
2
C710
0.1U_0402_16V4Z~D
2
D
7 CPU_DETECT#
1
R796
2 DYN_TUR_PWR_ALRT#
10K_0402_5%~D
CPU_DETECT#
29 MOD_SATA_PCIE#_DET
A1
B2
A2
B3
A3
B45
A42
B4
14,18 SLP_ME_CSW_DEV#
A59
B62
SUSACK#_EC A58
1
2
R1132
0_0402_5%~D
B61
A56
VGA_ID
B59
A55
SLP_ME_CSW_DEV#
B58
32 LAN_DISABLE#_R
56 CHARGE_EN
45 SYS_LED_MASK#
54 DYN_TUR_PWR_ALRT#
18 SIO_EXT_WAKE#
36,45 WIRELESS_LED#
16 PCH_PCIE_WAKE#
36 WLAN_RADIO_DIS#
B47
A45
SYS_LED_MASK#
B48
DYN_TUR_PWR_ALRT#
A46
R797 1
2 0_0402_5%~D B49
A47
PCH_PCIE_WAKE#
B50
A48
29 ZODD_WAKE#
33 BCM5882_ALERT#
16
SUSACK#
+3.3V_ALW
1
R800
VGA_ID
2
100K_0402_5%~D
B
VGA_ID
1
@ R803
2
100K_0402_5%~D
VGA_ID
Discrete
0
UMA
1
31 WIRELESS_ON#/OFF
43 BT_RADIO_DIS#
36 WWAN_RADIO_DIS#
7,16 SYS_PWROK
51,55 CPU_VTT_ON
16 PCH_DPWROK
WIRELESS_ON#/OFF
B13
A13
A53
B57
B14
A14
CPU_VTT_ON
B17
1
2
B18
@ R802
@R802
0_0402_5%~D
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
GPIOE0/RXD
GPIOE1/TXD
GPIOE2/RTS#
GPIOE3/DSR#
GPIOE4/CTS#
GPIOE5/DTR#
GPIOE6/RI#
GPIOE7/DCD#
GPIOF0
GPIOF1
GPIOF2
GPIOF3/TACH8
GPIOF4/TACH7
GPIOF5
GPIOF6
GPIOF7
GPIOG0/TACH5
GPIOG1
GPIOG2
GPIOG3
GPIOG4
GPIOG5
GPIOG6
GPIOG7/TACH6
5048_GPIOL0
5048_GPIOL1
5048_GPIOL2
5048_GPIOL3
5048_GPIOL4
5048_GPIOL5
5048_GPIOL6
5048_GPIOL7
B34
B39
B51
5048_GPI0M1
5048_GPI0M3
5048_GPI0M4
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
14.318MHZ/GPIOM0
CLK32/GPIOM2
A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21
A32
B35
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
B29
B28
A25
A24
B23
A19
B24
A20
TEMP_ALERT#_R 1
R1591
RUN_ON
A
2
1
O 4
D34
RB751S40T1_SOD523-2~D
U47
TC7SH08FU_SSOP5~D
DOCK_AC_OFF 40,56
1
GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6
AUX_EN_WOWL 37
WLAN_LAN_DISB# 32
SIO_SLP_LAN# 16,32
SIO_SLP_SUS# 16
GPIO_PSID_SELECT 46
MODC_EN
29
DOCK_HP_DET 30
DOCK_MIC_DET 30
ME_FWP
B
R770
33K_0402_5%~D
2
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
B60
A57
B64
B68
A9
B1
A18
A44
5
A8
B9
B10
A10
B11
A11
B12
A12
2
P
GPIOK0
GPIOK1/TACH3
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
1
DOCK_AC_OFF_EC 56
ME_FWP
14
MASK_SATA_LED# 45
1.8V_RUN_PWRGD 49
LED_SATA_DIAG_OUT# 45
2
0_0402_5%~D
TEMP_ALERT# 14,18
+3.3V_RUN
RUN_ON
11,37,44,49
SPI_WP#_SEL 14
D_CLKRUN#
2
R777
2
R780
2
R782
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
RUN_ON
2
R786
1
100K_0402_5%~D
CPU_VTT_ON
2
R789
1
100K_0402_5%~D
0.75V_DDR_VTT_ON 2
R790
SLICE_BAT_ON
1
R791
1
100K_0402_5%~D
2
100K_0402_5%~D
D_SERIRQ
D_DLDRQ1#
CLK_PCI_5028
CLK_SIO_14M
LPC_LAD0 14,33,34,42
LPC_LAD1 14,33,34,42
LPC_LAD2 14,33,34,42
LPC_LAD3 14,33,34,42
LPC_LFRAME# 14,33,34,42
PCH_PLTRST#_EC 14,17,34,36,37,42
CLK_PCI_5028 17
CLKRUN# 16,34,42
LPC_LDRQ0# 14
LPC_LDRQ1# 14
IRQ_SERIRQ 14,33,34,42
CLK_SIO_14M 15
EC_32KHZ_ECE5048 42
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP
@ R793
1K_0402_5%~D
D_LAD0
40
D_LAD1
40
D_LAD2
40
D_LAD3
40
D_LFRAME# 40
D_CLKRUN# 40
D_DLDRQ1# 40
D_SERIRQ 40
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
5048_GPIOL0
2
5048_GPIOL1 @ R1567 1
5048_GPIOL2 R1568 1
5048_GPIOL3 R1569 1
5048_GPIOL4 @ R1570 1
5048_GPIOL5 R1571 1
5048_GPIOL6 @ R1572 1
5048_GPIOL7 R1573 1
R1574
5048_GPI0M1
1
5048_GPI0M3@ R1575 1
5048_GPI0M4 R1576 1
R1577
1
2
2
2
2
2
2
2
GPIOH0
GPIOH1
SYSOPT1/GPIOH2
SYSOPT0/GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
EP
DB Version 0.4
ECE5028-LZY_DQFN132_11X11~D
A29
B31
A30
B
BC_INT#_ECE5028 42
BC_DAT_ECE5028 42
BC_CLK_ECE5028 42
A4
SP_TPM_LPC_EN
B19
2
R804
+CAP_LDO
B27
C1
CLK_PCI_5028
@ R794
10_0402_5%~D
@ R795
10_0402_5%~D
RUNPWROK 7,42
B56
B46
10K_0402_5%~D
10K_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
2
2 0_0402_5%~D
2 0_0402_5%~D
0_0402_5%~D
CLK_SIO_14M
BC_INT#
BC_DAT
BC_CLK
C
1
+3.3V_ALW
SLICE_BAT_PRES#
B32
A31
B33
B15
A15
B16
A16
B67
A64
A5
B6
A6
B7
A7
B8
2 C711
0.1U_0402_16V4Z~D
SP_TPM_LPC_EN 33,34
+3.3V_ALW
1
1K_0402_5%~D
1
@ C712
4.7P_0402_50V8C~D
2
1
@ C713
4.7P_0402_50V8C~D
2
R805
100K_0402_5%~D
1
2
2
56 MODULE_ON
56 SLICE_BAT_ON
40,46,56 SLICE_BAT_PRES#
46,56 MODULE_BATT_PRES#
56 CHARGE_MODULE_BATT
56 CHARGE_PBATT
56 DEFAULT_OVRDE
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#
GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
1
1
C
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
GPIOB0
GPIOB1
GPOC2
GPOC3
GPOC4
GPOC5
GPOC6/TACH4
GPIOC7
GPIOD0
GPIOC1
GPIOC0
GPIOB7
GPIOB6
GPIOB5
GPIOB4
GPIOB3
GPIOB2
1
2
R765
0_0402_5%~D
DOCK_AC_OFF_EC
SIO_SLP_A#
16,50
0.75V_DDR_VTT_ON 49
SIO_SLP_S4# 16
SIO_SLP_S3# 16
IMVP_PGOOD 52
IMVP_VR_ON 52
2
SYS_LED_MASK#
2
10K_0402_5%~D
1
R775
PANEL_BKEN_EC
A33
B36
A34
B37
A35
B38
A36
A37
B40
A38
B41
A39
B42
A40
B43
A41
B44
0.75V_DDR_VTT_ON
2
1
R766
1
@ R772
1
R767
USB_SIDE_EN#
B63
A60
A61
B65
A62
B66
A63
1
WIRELESS_ON#/OFF
2
100K_0402_5%~D
SP_TPM_LPC_EN
2
10K_0402_5%~D
LCD_TST
2
100K_0402_5%~D
39 USB_SIDE_EN#
30 EN_I2S_NB_CODEC#
33 USH_PWR_STATE#
56 EN_DOCK_PWR_BAR
24 PANEL_BKEN_EC
16,24 ENVDD_PCH
24
LCD_TST
46 PSID_DISABLE#
46,56 PBAT_PRES#
32
DOCKED
40 DOCK_DET#
30 AUD_NB_MUTE#
37 MCARD_WWAN_PWREN
24 LCD_VCC_TEST_EN
24
CCD_OFF
30,31 AUD_HP_NB_SENSE
31,39 ESATA_USB_PWR_EN#
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
1
+3.3V_RUN
PCIE_WAKE#
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
GPIOA6
GPIOA7
C714
4.7U_0603_6.3V6K~D
2
29,36,37 PCIE_WAKE#
DCIN_CBL_DET#
LID_CL_SIO#
B52
A49
B53
A50
B54
A51
B55
A52
42,54,56
G
25 CRT_SWITCH
31 MDC_RST_DIS#
37 MCARD_MISC_PWREN
46 DCIN_CBL_DET#
+3.3V_ALW
ACAV_IN_NB
3
USB_SIDE_EN#
2
10K_0402_5%~D
ESATA_USB_PWR_EN#
2
10K_0402_5%~D
1
R768
1
R769
VCC1
VCC1
VCC1
VCC1
VCC1
U46
+3.3V_ALW2
B5
A17
B30
A43
A54
D
LID_CL_SIO#
2
R807
1
10_0402_5%~D
LID_CL#
31,45
1
2
C716
0.047U_0402_16V4Z~D
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
ECE5028
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
41
of
66
4
3
1
I2S
1
G
3
G
2
2
32.768KHZ_12.5PF_Q13MC1461000~D
C743
1
2
PECI_VREF
PECI
I2S_DAT
I2S_CLK
I2S_WS
1
R868
1
2
1
DEVICE_DET#
RESET_OUT#
A_ON
PCH_RSMRST#
AC_PRESENT
2
1
40,46,56
2
B51
A48
2
1
10K_0402_5%~D
C
1
100K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
1
10K_0402_5%~D
+5V_RUN
1
R862 1
R863
1
@ R864 1
@ R865
2
2
22,54,56
+1.05V_RUN_VTT
trace width 20 mils
2
2 0_0402_5%~D
PECI_EC
43_0402_5%~D
R1287 close to
U149 & least 250mils
0_0402_5%~D
0_0402_5%~D
CLK_KBD
2
R845
2
R846
2
R851
2
R852
CLK_MSE
1
C737
0.1U_0402_16V4Z~D
2
R864 & R865 for MEC5045
should be populated
DAT_MSE
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
1
4.7K_0402_5%~D
2
R829
2
R822
DAT_KBD
18
1
2.2K_0402_5%~D
1
2.2K_0402_5%~D
+RTC_CELL
+3.3V_ALW
VCI_INT1#
D
S
2
G
R871
1K_0402_5%~D
SYSTEM_ID
2
PCH_RSMRST#_Q
14,16
1
100K_0402_5%~D
1
R869
1
R873
AUX_ON
2
R874
DDR_ON
2
R876
SUS_ON
2
R878
PCH_ALW_ON
2
R880
DOCK_POR_RST#
2
R881
EN_INVPWR
2
R882
1.05V_0.8V_PWROK
2
R883
RESET_OUT#
2
@ R843
CPU1.5V_S3_GATE
2
R889
2
10K_0402_5%~D
2
100K_0402_5%~D
1
2.7K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
100K_0402_5%~D
1
10K_0402_5%~D
1
8.2K_0402_5%~D
1
100K_0402_5%~D
A_ON
FWP#
1
2
R1156
MSDATA
R872
10K_0402_5%~D
1
RUNPWROK
2
R799
10K_0402_5%~D
2
B
+3.3V_RUN
GPU_SMBDAT
GPU_SMBCLK
@ D75A BAV99DW-7-F_SOT363-6~D
1
6
2
@ R879
10K_0402_5%~D
CHIPSET_ID for BID
function
A
1=JTAG interface Reset disabled
0=Reset JTAG interface
DELL CONFIDENTIAL/PROPRIETARY
1
Compal Electronics, Inc.
Title
@ R823
2.2K_0402_5%~D
S
EMC5055
2
Size
Document Number
Date:
4
2
R835
+3.3V_ALW
Monday, January 10, 2011
INTEL RSMRST# circuit
5
LAT_ON_SW_BTN# 31
2
R1590
DOCK_SMB_DAT
2
R838
DOCK_SMB_CLK
2
R841
DOCK_SMB_ALERT#
2
R762
LCD_SMBCLK
2
R418
LCD_SMBDAT
2
R420
VOL_MUTE
2
R1166
VOL_UP
2
R1167
VOL_DOWN
2
R1184
DEVICE_DET#
2
R1118
BAY_SMBDAT
2
R854
BAY_SMBCLK
2
R856
DYN_TUR_CURRNT_SET# 2
R764
47
ACAV_IN
@ D75B BAV99DW-7-F_SOT363-6~D
4
3
5
Q48
SSM3K7002FU_SC70-3~D
2
10K_0402_5%~D
XFR_ID_BIT#
CHARGER_SMBDAT 54
CHARGER_SMBCLK 54
CARD_SMBDAT 37
CARD_SMBCLK 37
USH_SMBDAT 33
USH_SMBCLK 33
DOCK_PWR_SW#
B17
B27
B28
1
R877
C740
1U_0402_6.3V6K~D
+3.3V_ALW_PCH
LAT_ON_SW#
+PECI_VREF
PECI_EC_R
1
AC_PRESENT
BAY_SMBDAT 29,46
BAY_SMBCLK 29,46
ALWON
DOCK_PWR_BTN# 40
@ C738
1U_0402_6.3V6K~D
2
1
LAT_ON_SW#
31
DOCK_SMB_DAT 40
DOCK_SMB_CLK 40
VCI_INT1#
POWER_SW_IN#
2
10K_0402_5%~D
C734
1U_0402_6.3V6K~D
R870
100K_0402_5%~D
AC_PRESENT 16
SIO_PWRBTN# 16
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
1
1
2
1
1
2
1
3
S
RESET_OUT# 2
G
@ Q47
SSM3K7002FU_SC70-3~D
2
G
22
D
3
1
D
2
2
1
2
@ R812
100K_0402_5%~D
2
R1180
0_0402_5%~D
1
1
2
PROCHOT#_EC
1
PCH_PWRGD#
VOL_MUTE
DOCK_SMB_ALERT#
VOL_UP
31
VOL_DOWN 31
ME_SUS_PWR_ACK 16
1.5V_SUS_PWRGD 48
PM_APWROK 16
1.05V_A_PWRGD 50
ALW_PWRGD_3V_5V 47
DEVICE_DET# 29
RESET_OUT# 16
A_ON
44,50
D
B
@ R1179
10K_0402_5%~D
H_PROCHOT# 7,52,54
= Amber LED
=White LED
+3.3V_ALW
E
@ R885
10_0402_5%~D
@ C747
4.7P_0402_50V8C~D
R893
100K_0402_5%~D
+3.3V_RUN
2 1K_0402_5%~D
2
0_0402_5%~D
3
@ R866
4.7K_0402_5%~D
POWER_SW#_MB 31,43
+3.3V_RUN
C
PCH_RSMRST#
2
10K_0402_5%~D
@ C733
1U_0402_6.3V6K~D
R819
100K_0402_5%~D
1
2
1
1 R825
2
@ Q126
MMBT3906WT1G_SC70-3~D
+3.3V_ALW_PCH
CLK_PCI_MEC
DOCK_PWR_SW#
20mA drive pins
DOCK_SMB_ALERT#
R886 1
2 1K_0402_5%~D
R887 1
2 1K_0402_5%~D
MEC5055-LZY_DQFN132_11X11~D
+3.3V_M
Place closely pin A29
A59
B63
A60
A63
B67
B1
A1
44 RUN_ON_ENABLE#
33P_0402_50V8J~D
A
FWP#
PROCHOT#_EC
least
15mil
X00
X01
X02
A00
1
R811
C722
1U_0402_6.3V6K~D
+RTC_CELL
C742
4700P_0402_25V7K~D
4700P_0402_25V7K~D
4
MEC_XTAL1
1
C744
4700P_0402_25V7K~D
33P_0402_50V8J~D
Y6
MEC_XTAL2
1
BOARD_ID
C741
1
2
240K 4700p
130K 4700p
62K 4700p
* 33K 4700p
8.2K 4700p
4.3K 4700p
2K 4700p
1K 4700p
15mil
REV
DYN_TUR_CURRNT_SET#
CPU1.5V_S3_GATE
MSDATA
MSCLK
22 DOCK_PWR_SW#
2
R875
33K_0402_5%~D
32 KHz Clock
C919
XFR_ID_BIT#
3
2
R875
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
DDR_ON
48,49
HOST_DEBUG_TX 36
HOST_DEBUG_RX 36
RUNPWROK
7,41
EN_INVPWR
24
PCH_SATA_MOD_EN# 14
TOUCH_SCREEN_PD# 24
XFR_ID_BIT# 31
DDR_HVREF_RST_GATE 7
DYN_TUR_CURRNT_SET# 54
CPU1.5V_S3_GATE 11
MSDATA
36
MSCLK
36
SIO_A20GATE 18
PS_ID
46
Bat2
BAT1_LED# 45
Bat1
BAT2_LED# 45
1
ACES_85204-06001~D
+3.3V_ALW
1
1
Depopulated R867 for ECE5028 use
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
1
NC1
NC2
NC3
VSS_RO
2
0_0402_5%~D
DB Version 0.12
VR_CAP
B34
A64
B68
PECI
XTAL1
XTAL2
GPIO160/32KHZ_OUT
B54
1
@ R867
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
MASTER CLOCK
A61
A62
B62
POWER_SW_IN#
22 POWER_SW_IN#
DELL PWR SW INF
B12
41 EC_32KHZ_ECE5048
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
GPIO011/nSMI
GPIO061/LPCPD#
LDRQ#
SER_IRQ
LRESET#
PCI_CLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
CLKRUN#
GPIO100/nEC_SCI
C739
4.7U_0603_6.3V6K~D
+VR_CAP
MEC_XTAL1
1 MEC_XTAL2_R
0_0402_5%~D
MEC_XTAL2 2
R1068
2
2
B64
A11
A22
B35
A41
A58
A52
B3
A26
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
VSS[1]
VSS[4]
CLK_PCI_MEC
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58
SMBUS INTERFACE
B11
B60
2
1
1
2
1
1
2
2
1
2
1
2
3
4
5
6
R861
R861
10K_0402_5%~D
10K_0402_5%~D
R860
R860
10K_0402_5%~D
10K_0402_5%~D
R859
10K_0402_5%~D
R858
10K_0402_5%~D
G1
G2
1
2
3
4
5
6
R857
49.9_0402_1%~D
7
8
A6
A27
B29
A28
B30
A29
B31
A30
B32
A31
B33
A32
A33
LPC_LDRQ#_MEC
14,33,34,41 IRQ_SERIRQ
14,17,34,36,37,41 PCH_PLTRST#_EC
17 CLK_PCI_MEC
14,33,34,41 LPC_LFRAME#
14,33,34,41 LPC_LAD0
14,33,34,41 LPC_LAD1
14,33,34,41 LPC_LAD2
14,33,34,41 LPC_LAD3
16,34,41 CLKRUN#
18 SIO_EXT_SCI#
HOST_DEBUG_TX
2
2 0_0402_5%~D HOST_DEBUG_RX
0_0402_5%~D
+3.3V_ALW
@ JTAG2
GPIO123/BCM_A_CLK
GPIO122/BCM_A_DAT
GPIO121/BCM_A_INT#
GPIO022/BCM_B_CLK
GPIO023/BCM_B_DAT
GPIO024/BCM_B_INT#
GPIO044/BCM_C_CLK
GPIO043/BCM_C_DAT
GPIO042/BCM_C_INT#
GPIO047/LSBCM_D_CLK
GPIO046/LSBCM_D_DAT
GPIO045/LSBCM_D_INT#
GPIO032/GPTP-IN3/BCM_E_CLK
GPIO31/GPTP-OUT2/BCM_E_DAT
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
14,17 SIO_EXT_SMI#
18 SIO_RCIN#
ACES_85204-06001~D
B
BC_DAT_ECE1117
BC_DAT_EMC4022
2
2
1
2
1
1
1
1
2
2
2
2
@ R850
@ R850
100K_0402_5%~D
100K_0402_5%~D
R849
R849
10K_0402_5%~D
10K_0402_5%~D
R848
R848
10K_0402_5%~D
1
MSCLK
2
MSDATA
3
4
1
5 R853 1
6 R855
R847
10K_0402_5%~D
1
2
3
4
5
6
A43
B45
A42
A12
B13
A13
B20
A18
B19
A20
B21
A19
A16
B16
A15
BC_DAT_ECE5028
43 BC_CLK_ECE1117
43 BC_DAT_ECE1117
43 BC_INT#_ECE1117
30
BEEP
16 SIO_SLP_S5#
41,54,56 ACAV_IN_NB
2
41 BC_CLK_ECE5028
41 BC_DAT_ECE5028
41 BC_INT#_ECE5028
22 BC_CLK_EMC4022
22 BC_DAT_EMC4022
22 BC_INT#_EMC4022
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
A46
R884 1
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
BC-LINK
+3.3V_ALW
@ JDEG1
PCH_ALW_ON
2
@ C721
1U_0402_6.3V6K~D
1
2
R810
100K_0402_5%~D
1
1
1
2
C735
C735
0.1U_0402_16V4Z~D
R836
100_0402_5%~D
JTAG1
SHORT PADS~D
@
2
1
2
GENERAL PURPOSE I/O
GPIO050/FAN_TACH1
GPIO051/FAN_TACH2
GPIO052/FAN_TACH3
GPIO053/PWM0
GPIO054/PWM1
GPIO055/PWM2
GPIO056/PWM3
AGND
1
2
R824
10K_0402_5%~D
2
GPIO145/I2C1K_DATA/JTAG_TDI
GPIO146/I2C1K_CLK/JTAG_TDO
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
JTAG_RST#
FAN PWM & TACH
B22
A21
B23
B24
A23
B25
A24
2
1
+RTC_CELL
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO124/GPTP-OUT5/UART_RX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP
PROCHOT#/PWM4
C736
2 0.1U_0402_16V4Z~D
DOCK_POR_RST#
SUS_ON
AUX_ON
40 DOCK_POR_RST#
44 SUS_ON
32
AUX_ON
40,45 BREATH_LED#
44 PCH_ALW_ON
24 BIA_PWM_EC
28
HDDC_EN
2
MISC INTERFACE
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
GPIO110/PS2_CLK2/GPTP-IN6
GPIO111/PS2_DAT2/GPTP-OUT6
GPIO112/PS2_CLK1A
GPIO113/PS2_DAT1A
GPIO114/PS2_CLK0A
GPIO115/PS2_DAT0A
GPIO154/I2C1C_DATA/PS2_CLK1B
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
A51
B55
B56
A53
B57
2
2
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
1
C
G1
G2
A5
B6
A37
B40
A38
B41
A39
B42
B59
A56
2
1
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
15 SML1_SMBDATA
15 SML1_SMBCLK
43
CLK_TP_SIO
43
DAT_TP_SIO
40 CLK_KBD
40
DAT_KBD
40 CLK_MSE
40
DAT_MSE
46 PBAT_SMBDAT
46 PBAT_SMBCLK
JTAG_RST# citcuit
close to U51.B57
@
7
8
U51
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
1
2
14,52
Q45
SSM3K7002FU_SC70-3~D
5
P
3
TC7SH08FU_SSOP5~D
+3.3V_ALW
JTAG_RST#
1.05V_0.8V_PWROK
G
A
1.05V_0.8V_PWROK
4
B66
1
O
PS/2 INTERFACE
CHARGER_SMBDAT
2
2.2K_0402_5%~D
CHARGER_SMBCLK
2
2.2K_0402_5%~D
1
2
U50
1
C732
0.1U_0402_16V4Z~D
2
B
1
C726
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
R828
1
2
1
C725
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
R827
55 VCCSAPWROK
PBAT_SMBDAT
2
2.2K_0402_5%~D
PBAT_SMBCLK
2
2.2K_0402_5%~D
LPC_LDRQ#_MEC
1
100K_0402_5%~D
1
1
1
C731
C731
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@ R821
51,55 1.05V_VTTPWRGD
1
C730
C730
0.1U_0402_16V4Z~D
R820
D
2
1
C729
C729
0.1U_0402_16V4Z~D
R818
2
C723
0.1U_0402_16V4Z~D
C728
C728
10U_0805_6.3V6M~D
R817
1
C720
2 0.1U_0402_16V4Z~D
1
C727
0.1U_0402_16V4Z~D
R816
BC_DAT_ECE5028
2
100K_0402_5%~D
BC_DAT_EMC4022
1
100K_0402_5%~D
BC_DAT_ECE1117
1
100K_0402_5%~D
1
1
+RTC_CELL
C724
0.1U_0402_16V4Z~D
+3.3V_ALW
R814
2
+3.3V_ALW
R815
0_0402_5%~D
+RTC_CELL_VBAT
2
1
EP
+RTC_CELL
C1
5
+3.3V_ALW
Rev
1.0
LA-6591P
3
2
Sheet
1
42
of
66
5
4
3
1
2
1
2
R902
4.7K_0402_5%~D
R903
4.7K_0402_5%~D
42
CLK_TP_SIO
L55 2
TP_DATA
1 BLM18AG601SN1D_0603~D
2
10P_0402_50V8J~D
C749
10P_0402_50V8J~D
10P_0402_50V8J~D
C750
1
1
2
3
4
5
6
7
8
TP_CLK
TP_DATA
TP_CLK
1 BLM18AG601SN1D_0603~D
C751
10P_0402_50V8J~D
C752
10P_0402_50V8J~D
2
2
0_0603_5%~D
2
0_0603_5%~D
1
2
C748
0.1U_0402_16V4Z~D
JTP1
L54 2
2
+3.3V_ALW
Touch Pad Conn. Pitch=0.5mm
DAT_TP_SIO
1
+3.3V_BT
1
R1129
1
@R1130
@ R1130
+3.3V_RUN
Touch Pad
42
1
1
BlueTooth
Pin reverse for PT
+3.3V_TP
D
2
+3.3V_TP
1
PS2_DAT_TS
PS2_CLK_TS
2
1
2
3
4
5
6
7
8
CONN@
JBT1
G1
G2
17
BT_DET#
36 COEX1_BT_ACTIVE
33 BT_COEX_STATUS2
33 BT_PRI_STATUS
45 BT_ACTIVE
41 BT_RADIO_DIS#
36 COEX2_WLAN_ACTIVE
9
10
TYCO_2041070-8
CONN@
17
17
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BT_COEX_STATUS2
BT_PRI_STATUS
USBP11USBP11+
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
E & T_3703-E12N-03R
2
1
2
C
1
R1161
0_0603_5%~D
1
2
@ D37
@D37
SD05.TCT_SOD323-2~D
2
C755
0.1U_0402_16V4Z~D
@ D36
@D36
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
1
1
TP_CLK
TP_DATA
2
@ R1162
0_0603_5%~D
1
2
1
2
+3.3V_TP
1
2
2 BT_COEX_STATUS2
1K_0402_5%~D
2 BT_PRI_STATUS
1K_0402_5%~D
1
@ R1133
1
@ R1134
+3.3V_BT
@ C754
100P_0402_50V8J~D
+3.3V_TP
R904
10K_0402_5%~D
+3.3V_RUN
C753
33P_0402_50V8J~D
+3.3V_ALW
C
Place close to JTP1
Power Switch for debug
Change KB connector to same as JSC1
KB Conn. Pitch=1.0mm
1
31,42 POWER_SW#_MB
1
2
2
1
+3.3V_ALW
+5V_RUN
1
2
1
C756
0.1U_0402_16V4Z~D
2
C758
0.1U_0402_16V4Z~D
JKB1
18
KB_DET#
KB_DET#
PS2_CLK_TS
PS2_DAT_TS
+3.3V_ALW
+5V_RUN
42 BC_INT#_ECE1117
42 BC_DAT_ECE1117
42 BC_CLK_ECE1117
1
2
3
4
5
6
7
8
9
10
11
12
Place close to JKB1
B
@ C759
100P_0402_50V8J~D
1
2
3
4
5
6
7
8
9
10
@ PWRSW1
@SHORT PADS~D
2
Place on Bottom
@LED Board FFC
@ MDC wire set cable
Part Number
GND
GND
NBX0000RP0L
FCI_10089709-010010LF~D
CONN@
Part Number
Description
FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD
DC30100BL0L
@MEDIA Board FFC
Part Number
FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
NBX0000RR0L
@ LVDS cable
Part Number
@ LVDS cable
Part Number
DC020003Y0L
Description
DC02C00180L
H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
Part Number
Part Number
GC20323MX00
Description
DC30100BN0
Description
H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
Part Number
DC020014Z10
Part Number
SP070007V0L
Description
FFC 8P F P0.5
PAD=0.3 136MM
MB-TP/B 0FD
Description
S SOCKET TYCO 1770551-1
10P H5.9 SMART
@BT wire cable
CONN SET 0FD DCJACK-MB WDMD-DCE30004-DF
@ Battery bridge cable
BATT CR2032 3V
220MAH MAXELL
Description
@KB FFC
@ UMA DC_IN wire cable
@ RTC BATT
B
@ T/P FFC
Description
Part Number
NBX0000RS0L
Description
CONN SET 0FD
MDC-RJ11
Part Number
DC020014Y0L
Description
H-CONN SET 0FD MB-BT
Description
H-CONN SET 0FD M/B-BATTERY 9PIN
@ FAN
Part Number
DC28A000800
Description
FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
@ Speak
Part Number
A
PK230003Q0L
Description
A
SPK PACK ZJX 2.0W 4 OHM FG
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
Touch PAD/Int KB/BT
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
43
of
66
5
4
3
2
1
DC/DC Interface
+3.3V_ALW_PCH Source
4
6
5
1
@C762
@C762
3300P_0402_50V7K~D
RUN_ON_ENABLE#
42 RUN_ON_ENABLE#
2
Q52B
DMN66D0LDW-7_SOT363-6~D
5
1
2
Q52A
DMN66D0LDW-7_SOT363-6~D
2
11,37,41,49 RUN_ON
1
R910
20K_0402_5%~D
D
1
1
1
2
1
1
2
5V_RUN_ENABLE
6
@ Q51A
@Q51A
DMN66D0LDW-7_SOT363-6~D
2
42 PCH_ALW_ON
2
R909
100K_0402_5%~D
+5V_RUN
C763
2200P_0402_50V7K~D
ALW_ON_3.3V#
@ Q51B
DMN66D0LDW-7_SOT363-6~D
@ R908
20K_0402_5%~D
4
D
2
PAD-OPEN 4x4m
3
3
2
1
2
G
1
3
2
4
ALW_ENABLE
ALW_ENABLE
+5V_ALW Q50
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R906
6
3
100K_0402_5%~D
5
PJP57
S
1
1
2
20
+15V_ALW
C761
10U_0805_10V4Z~D
10U_0805_10V4Z~D
6
5
2
1
@ R905
100K_0402_5%~D
C760
10U_0805_6.3V6M~D
@ R907
100K_0402_5%~D
+5V_RUN Source
+3.3V_ALW2
D
+3.3V_ALW2
+3.3V_ALW
4
@ Q49
+3.3V_ALW_PCH
SI3456DDV-T1-GE3_TSOP6~D
1
+3.3V_ALW
2
+15V_ALW
+3.3V_RUN Source
4
1
4
1
2
2
C767
4700P_0402_25V7K~D
R913
20K_0402_5%~D
1
Q56
SSM3K7002FU_SC70-3~D
2
C
C766
470P_0402_50V7K~D
1
2
S
2
G
1
6
Q53A
DMN66D0LDW-7_SOT363-6~D
2
42
SUS_ON
+3.3V_RUN
3.3V_RUN_ENABLE
1
Q53B
DMN66D0LDW-7_SOT363-6~D
5
Q55
NTMS4920NR2G_SO8~D
1
2
3
D
3
3
2
R912
100K_0402_5%~D
R914
20K_0402_5%~D
2
3
1
2
SUS_ON_3.3V#
C
8
7
6
5
1
S
1
G
2
4
SUS_ENABLE
R915
100K_0402_5%~D
+3.3V_ALW
+15V_ALW
C764
10U_0805_6.3V6M~D
6
5
2
1
C765
10U_0805_6.3V6M~D
R911
100K_0402_5%~D
+3.3V_ALW2
Q54
SI3456DDV-T1-GE3_TSOP6~D +3.3V_SUS
D
1
+3.3V_ALW
1
+15V_ALW
2
+3.3V_SUS Source
Discharg Circuit
3
2
Q62
SSM3K7002FU_SC70-3~D
1
3
S
1
3
S
1
2
1
1
R931
20K_0402_5%~D
2
1
2
D
Q64
SSM3K7002FU_SC70-3~D
+1.05V_RUN
4
1
2
2
2
1
3
1
3
1
3
1
1
1
2
2
2
1
3
1
3
1
D
2
G
1.05V_RUN_ENABLE
2
G
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Title
POWER CONTROL
4
3
2
Size
Document Number
Date:
5
B
C773
2200P_0402_50V7K~D
S
2
G
+1.05V_M Q63
SI4164DY-T1-GE3_SO8~D
8
1
7
2
R930
6
3
100K_0402_5%~D
5
R927
22_0603_5%~D
Q72
SSM3K7002FU_SC70-3~D
3
1
1
1
2
2
2
C771
4700P_0402_25V7K~D
+15V_ALW
+DDR_CHG
S
D
Q71
Q71
SSM3K7002FU_SC70-3~D
S
D
2
G
+1.5V_CPU_VDDQ_CHG
S
D
2
G
+0.75V_DDR_VTT
R926
220_0402_5%~D
7,11 RUN_ON_CPU1.5VS3#
@ Q70
SSM3K7002FU_SC70-3~D
D
2
G
+1.5V_CPU_VDDQ
@ R925
39_0402_5%~D
+1.05V_RUN_CHG
S
R929
39_0603_5%~D
Q69
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
2
G
+1.05V_RUN
+3.3V_RUN_CHG
1
@ R924
1K_0402_5%~D
@ Q68
SSM3K7002FU_SC70-3~D
3
+3.3V_RUN
+1.5V_RUN_CHG
RUN_ON_ENABLE#
@ Q67
SSM3K7002FU_SC70-3~D
S
+5V_RUN_CHG
D
ALW_ON_3.3V# 2
G
@ Q66
SSM3K7002FU_SC70-3~D
S
@ Q65
SSM3K7002FU_SC70-3~D
D
2
G
2
S
+1.05V_RUN Source
+1.5V_RUN
@ R923
1K_0402_5%~D
+3.3V_ALWPCH_CHG
+3.3V_SUS_CHG
A
@ R928
1K_0402_5%~D
R921
20K_0402_5%~D
1
D
2
G
C772
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
@ R922
1K_0402_5%~D
SUS_ON_3.3V#
+5V_RUN
1
1
+3.3V_ALW_PCH
1
2
Discharg Circuit
+3.3V_SUS
4
1.5V_RUN_ENABLE
1
1
3
4
S
2
G
C770
4700P_0402_25V7K~D
1
2
A_ON_3.3V#
D
R920
100K_0402_5%~D
2
2
1
2
1
6
A_ON_3.3V# 5
Q57A
DMN66D0LDW-7_SOT363-6~D
2
42,50
A_ON
@ R919
20K_0402_5%~D
Q60
Q60
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q57B
DMN66D0LDW-7_SOT363-6~D
6
5
2
1
1
S
3
2
3
2
A_ENABLE
+15V_ALW
D
D
1
1
G
1
+3.3V_M_CHG
2
4
C768
10U_0805_6.3V6M~D
R917
100K_0402_5%~D
R918
100K_0402_5%~D
Q59
NTGS4141NT1G_TSOP6~D
+1.5V_RUN
+1.5V_MEM
R916
39_0603_5%~D
S
+3.3V_M
C769
10U_0805_6.3V6M~D
6
5
2
1
3
+15V_ALW
+3.3V_ALW2
G
Q58
SI3456DDV-T1-GE3_TSOP6~D
1
+3.3V_ALW
B
+1.5V_RUN Source
+3.3V_M
+3.3V_M Source
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
44
of
66
5
4
3
2
1
HDD LED solution for White LED
+5V_ALW
Q82A
DMN66D0LDW-7_SOT363-6~D
1
R942
100K_0402_5%~D
31
BATT_YELLOW
D
31
Q83B
RB751S40T1_SOD523-2~D
DMN66D0LDW-7_SOT363-6~D
4
3
5
2
Q84
PDTA114EU_SC70-3~D
4
Q82B
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
1
WLAN LED solution for White LED
+3.3V_ALW
2
1
BAT2_LED
4
Y
U54
NC7SZ04P5X-G_SC70-5~D
BATT_WHITE
3
A
31
Battery LED
2
4.7K_0402_5%~D
+5V_ALW
5
SATA_LED
1
1
C774
0.1U_0402_16V4Z~D
1
R941
2
2
4.7K_0402_5%~D
Q81
PDTA114EU_SC70-3~D
2
3
2
BAT2_LED#
G
1
R934
MASK_BASE_LEDS#
2
3
D62
1
2
2
+5V_ALW
P
42
1
41 MASK_SATA_LED#
41 LED_SATA_DIAG_OUT#
DMN66D0LDW-7_SOT363-6~D
1
6
1
1
Q75
PDTA114EU_SC70-3~D
2
5
RB751S40T1_SOD523-2~D
Q83A
MASK_BASE_LEDS#
R940
47K_0402_5%~D
NC
2
5
1
Q74A
DMN66D0LDW-7_SOT363-6~D
1
6 2
2
3
D
+3.3V_ALW
3
2
D59
4
14 SATA_ACT#
+5V_ALW
6
1
R932
10K_0402_5%~D
Q74B
DMN66D0LDW-7_SOT363-6~D
R938
100K_0402_5%~D
1
2
+5V_ALW
3
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
3
R937
100K_0402_5%~D
+3.3V_ALW
2
4
3
1
1
R939
2
4.7K_0402_5%~D
WLAN_LED
4
3
1
1
BAT1_LED
31
Q92B
DMN66D0LDW-7_SOT363-6~D
4
3
2
5
R950
100K_0402_5%~D
2
150_0402_5%~D
+3.3V_ALW
3
Y
U55
NC7SZ04P5X-G_SC70-5~D
2
G
A
1
R946
R948
100K_0402_5%~D
3
2
BAT1_LED#
NC
P
42
5
+3.3V_ALW
2
C775
0.1U_0402_16V4Z~D
2
3
Q78B
DMN66D0LDW-7_SOT363-6~D
Q89B
DMN66D0LDW-7_SOT363-6~D
1
R949
4.7K_0402_5%~D
2
BATT_WHITE_LED
C
24
Q93
PDTA114EU_SC70-3~D
R951
150_0402_5%~D
1
2
1
2
5
4
C
Q88
PDTA114EU_SC70-3~D
1
1
5
1
R947
47K_0402_5%~D
1
2
Q79
PDTA114EU_SC70-3~D
MASK_BASE_LEDS#
6
Q89A
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
43 BT_ACTIVE
R945
100K_0402_5%~D
Q92A
2
DMN66D0LDW-7_SOT363-6~D
1
6
2
1
2
Q78A
DMN66D0LDW-7_SOT363-6~D
1
6
2
36,41 WIRELESS_LED#
1
2
1
+5V_ALW
SYS_LED_MASK#
BATT_YELLOW_LED
24
1
+5V_ALW
+5V_ALW
3
Y
4
BREATH_LED#_R
6
U57
NC7SZ04P5X-G_SC70-5~D
1
2
2
3
5
1
1
R955
+5V_ALW
2
4.7K_0402_5%~D
BREATH_WHITE_LED
24
3
B
Q101B
DMN66D0LDW-7_SOT363-6~D
4
3 2
Q96
PDTA114EU_SC70-3~D
1
1
5
P
A
G
2
NC
2
40,42 BREATH_LED#
SYS_LED_MASK#
R956
100K_0402_5%~D
5
1
R954
47K_0402_5%~D
B
Q94
PDTA114EU_SC70-3~D
+5V_ALW
1
6
2
Q95B
DMN66D0LDW-7_SOT363-6~D
4
3 2
2
1
C777
0.1U_0402_16V4Z~D
1
2
Q101A
DMN66D0LDW-7_SOT363-6~D
+3.3V_ALW
Q95A
DMN66D0LDW-7_SOT363-6~D
R953
100K_0402_5%~D
MASK_BASE_LEDS#
LED1
1
R957
BREATH_WHITE_LED_SNIFF
2
1K_0402_5%~D
2
1
LTW-C193TS5_WHITE~D
Place LED1 close to SW1
+3.3V_ALW
EMI CLIP
41 SYS_LED_MASK#
@ FD1
1
LID_CL#
31,41
FIDUCIAL MARK~D
A
@ FD2
1
FIDUCIAL MARK~D
LID_CL#
SYS_LED_MASK#
1
LID_CL#
2
B
O
A
3
SYS_LED_MASK#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
0
1
1
GND
4
CLIP2
EMI_CLIP
TC7SH08FU_SSOP5~D
GND
X
0
1
@ FD3
1
1
A
DELL CONFIDENTIAL/PROPRIETARY
FIDUCIAL MARK~D
@ FD4
1
1
MASK_BASE_LEDS#
G
LED Circuit Control Table
Fiducial Mark
CLIP1
EMI_CLIP
U58
P
5
C778
0.1U_0402_16V4Z~D
1
2
@ H1
H_3P2
@ H2
H_3P2
@ H3
H_3P0
@ H4
H_3P2
@ H5
H_3P0
@ H6
H_3P0
@ H7
H_3P0
@ H8
H_3P2
@ H9
H_3P0
@ H10
H_3P2
@ H12
H_3P0
@ H13
H_3P0
@ H14
H_3P0
@ H15
H_3P0
@ H16
H_3P0
@ H19
H_3P0x2P0
Compal Electronics, Inc.
@ H20
H_2P0N
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FIDUCIAL MARK~D
Title
PAD and Standoff
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
45
of
66
5
4
3
2
1
+3.3V_ALW
+COINCELL
GND
GND
Z5304
Z5305
Z5306
PR502
100_0402_5%~D
1
2
1
PR503
100_0402_5%~D
1
2
BAY_SMBCLK
BAY_SMBDAT
29,42
29,42
7
8
MPBATT+
PAD-OPEN 2x2m~D
JRTC1
Z4012
1
MODULE_BATT_PRES#
D
41,56
PD1
SUYIN_150010GR006M500ZR
1
PC1
1U_0603_10V4Z~D
2
Move to power schematic
ESD Diodes
PL1
FBMJ4516HS720NT_1806~D
1
2
@
PJP43
PBATT+_C
PR4
100_0402_5%~D
1
2
Z4304
Z4305
Z4306
PR3
100_0402_5%~D
1
2
PR5
100_0402_5%~D
1
2
PBAT_SMBCLK
PBAT_SMBDAT
1
PC2
0.1U_0603_25V7K~D
2
1
11
10
9
8
7
6
5
4
3
2
1
+3.3V_ALW
42
42
2
PBATT+
PAD-OPEN 4x4m
PR2
100K_0402_5%~D
2
1
@
PL22
FBMJ4516HS720NT_1806~D
1
2
PD4
DA204U_SOT323~D
3
1
2
PD3
DA204U_SOT323~D
3
1
2
PD2
DA204U_SOT323~D
3
1
2
@
Primary Battery Connector
PBAT_PRES#
@
41,56
PQ1
2
3
FDN338P_G_NL_SOT23-3~D
@ PD5
1
PBATT1
SUYIN_200275MR009G50PZR
1
PC3
2200P_0402_50V7K~D
2
1
3
4
+RTC_CELL
RB715FGT106_UMD3
GND
1
3
C
DOCK_SMB_ALERT#
40,42,56
RB751V-40GTE-17_SOD323~D
2
2
C
1 G
2 G
TYCO_2-1775293-2~D
+3.3V_ALW
GND
GND
9
8
7
6
5
4
3
2
1
1
2
+COINCELL
2
1
2
3
4
5
6
2
PC302
0.1U_0603_25V7K~D
2
1
PC301
2200P_0402_50V7K~D
2
1
1
2
3
4
5
6
PR501
100_0402_5%~D
1
2
PR1
1K_0402_5%~D
+3.3V_RTC_LDO
3
PJP36
MBATT+_C
MBATT1
D
+3.3V_ALW
2
PL21
FBMJ4516HS720NT_1806~D
1
2
@
1
Media Bay Battery Connector
@
PR504
100K_0402_5%~D
2
1
@
COIN RTC Battery
PD32
DA204U_SOT323~D
3
1
2
PD34
DA204U_SOT323~D
3
1
2
PD33
DA204U_SOT323~D
3
1
2
ESD Diodes
GND
SLICE_BAT_PRES#
@ PR6
1
2
0_0402_5%~D
2
1
40,41,56
@ PC4
1500P_0402_7K~D
+5V_ALW
1
PR14
0_0402_5%~D
1
2
PR8
2.2K_0402_5%~D
1
2
1
DOCK_PSID
2
NB_PSID_TS5A63157
3
NO
GND
NC
IN
V+
COM
6
GPIO_PSID_SELECT
5
4
PS_ID
41
+5V_ALW
42
TS5A63157DCKR_SC70-6~D
PQ3
MMST3904-7-F_SOT323~D
2
3
PD8
DA204U_SOT323~D
3
1
2
1
+5V_ALW
B
@
PR13
1
@
2
PSID_DISABLE#
41
10K_0402_5%~D
41
PC5
.47U_0402_6.3V6-K~D
1
2
DCIN_CBL_DET#
PU1
40
+5V_ALW
E
PR12
15K_0402_1%~D
1
2
@
PD7
SM24_SOT23
GND
PQ2
FDV301N_G_NL_SOT23-3~D
1
3
1
@
PR9
33_0402_5%~D
1
2
C
2
B
2
3
PD9
DA204U_SOT323~D
2
+5V_ALW
3
2
G
PR10
100K_0402_1%~D
1
2
1
GND
PR11
10K_0402_1%~D
D
PL2
BLM18BD102SN1D_0603~D
2
1
NB_PSID
B
PR7
1
2
0_0402_5%~D
S
@
PD6
DA204UGT106_SOT323~D
3
1
2
+3.3V_ALW
DC_IN+ Source
@
+DC_IN
PL3
FBMJ4516HS720NT_1806~D
1
2
& lt; BOM Structure & gt;
PQ4
FDS6679AZ_G_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
MOLEX_87438-0743
1
2
PC11
10U_1206_25V6M~D
PR16
100K_0402_5%~D
2
1
56
PC9
0.1U_0603_25V7K~D
2
1
SOFT_START_GC
PC8
0.1U_0603_25V7K~D
2
1
2
10K_0402_5%~D
PC7
0.1U_0603_25V7K~D
2
1
1
PR15
2
1M_0402_5%~D
PR19
@
PL4
FBMJ4516HS720NT_1806~D
1
2
PR18
1
2
+DCIN_JACK
@
2
1M_0402_5%~D
-DCIN_JACK
PC6
0.022U_0805_50V7K~D
1
2
1
2
3
4
5
6
7
A
DELL CONFIDENTIAL/PROPRIETARY
PC13
0.1U_0603_25V7K~D
2
1
A
1
2
3
4
5
6
7
@ PR17
4.7K_0805_5%~D
2
1
PC10
0.1U_0603_25V7K~D
2
1
1
PJPDC1
PD10
VZ0603M260APT_0603
PC12
0.1U_0603_25V7K~D
2
1
1
+DC_IN
+DC_IN_SS
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+DCIN
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
46
of
66
5
4
3
2
1
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO
+DC1_PWR_SRC
PJP44
2
+5V_3V_REF
PC28
0.1U_0603_25V7K~D
1
2
SECFB
+5V_ALW_LGATE
PC23
10U_0805_25V6K
2
1
1
2
5
6
7
8
@ PR37
4.7_1206_5%~D
@
1
@
GNDA_3V5V
C
+3.3V_ALWP
PC38
330U_V_6.3VM~D
PC32
0.1U_0603_25V7K~D
PC37
0.1U_0402_10V7K~D
2
1
2
4
@
PR33
0_0402_5%~D
2
1
1
GNDA_3V5V
+3.3V_ALW_LGATE
@
+3.3V_ALWP
PL6
4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
2
1
PR39
0_0402_5%~D
2
1
PR35
1_0603_5%~D
+3.3V_ALW_BOOT 1
2
4
2
PR34
1_0603_5%~D
1
2+5V_ALW_BOOT
PC22
10U_0805_25V6K
2
1
PC19
2200P_0402_50V7K~D
2
1
2
GNDA_3V5V
PQ6
AO4466L_SO8~D
REFIN2
17
18
19
20
21
22
23
24
1
PAD
@
PR29
274K_0402_1%~D
GNDA_3V5V
1
2
+3.3V_OUT2
0_0402_5%~D
2 PR31
1
POK2
EN_3V_5V
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE
32
31
30
29
28
27
26
25
PQ8
AO4406AL_SO8~D
S
2
33
D
PC34
0.1U_0603_25V7K~D
2
1
3
G
1
@
PQ7
FDMS7692 1N POWER56-8
PC31
0.1U_0603_25V7K~D
2
2
1
@
@
PR36
4.7_1206_5%~D
1
2
+5V_ALW_PHASE
1
PR32
0_0402_5%~D
2
1
+
2
PR38
0_0402_5%~D
2
1
1
PC36
0.1U_0402_10V7K~D
2
1
PC33
330U_V_6.3VM~D
+5V_ALWP
PR28
@
1
2
0_0402_5%~D
3
2
1
8
7
6
5
4
3
2
1
EN_3V_5V
+5V_ALW_UGATE
REFIN2
TRIP2
VOUT2
SKIPSEL
PGOOD2
EN2
DRVH2
LL2
Fsw = 300KHz
PR27
0_0402_5%~D
5
6
7
8
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
VSW
VOUT1
VFB1
TRIP1
PGOOD1
EN1
DRVH1
LL1
0_0603_5%~D
VBST1
DRVL1
V5DRV
SECFB
GND
PGND
DRVL2
VBST2
+5V_FB1
2
POK1
9
10
11
12
13
14
15
16
GNDA_3V5V
PU2 SN0608098_QFN32_5X5~D
LDOREFIN
LDO
VIN
VREF3
EN_LDO
V5FILT
TONSEL
VREF2
D
3
PC29
0.1U_0402_10V7K~D
2
1
PR30
348K_0402_1%~D
1
GNDA_3V5V
1
PL5
+5V_ALWP
D
2
@ PR26
GNDA_3V5V
@
2
S
PQ5
FDS8878_G 1N SO8
+5V_ALWP
C
G
1
3
2
1
LDOREFIN
PC30
0.1U_0402_10V7K~D
2
1
GNDA_3V5V
1
+5V_ALW2P
VIN
+3.3V_ALW2
EN_3V_5V
+3.3V_RTC_LDO
@ PR25
0_0402_5%~D
1
2
PC35
0.1U_0603_25V7K~D
PC26
1U_0402_6.3V4Z~D
2
1
PR23
0_0402_5%~D
2
1
PC25
0.1U_0603_25V7K~D
2
1
@ PR24
0_0402_5%~D
1
2
2
PAD-OPEN1x1m
+3.3V_ALW2
Fsw = 400KHz
@ PR22
10_0603_5%~D
2
1
PC21
10U_0805_25V6K
+5V_VCC1
2
PC20
0.1U_0805_50V7M~D
2
1
PJP45
1
+5V_ALW2
PC24
4.7U_0603_6.3V6K~D
2
1
PC18
10U_0805_25V6K
2
1
PC17
10U_0805_25V6K
2
1
PC16
10U_0805_25V6K
2
1
PC15
0.1U_0805_50V7M~D
2
1
PC14
2200P_0402_50V7K~D
2
1
5 Volt +/-5%
Thermal Design Current : 7.462A
Peak Current : 10.660A
OCP_MIN : 12.792A
3.3 Volt +/-5%
Thermal Design Current : 4.707A
Peak current : 6.725A
OCP_MIN : 8A
Pop 10 Ohm for MAX17020
PR21
0_0805_5%~D
1
2
PR20
0_0805_5%~D
1
2
PAD-OPEN 4x4m
D
PC27
1U_0603_10V6K~D
2
1
1
+PWR_SRC
1
+
2
PD11
BAT54SW-7-F_SOT323-3~D
PC42
0.1U_0603_25V7K~D
1 1
2
2
2
+3.3V_ALWP
PAD-OPEN1x1m
GNDA_3V5V
PD13
BAT54CW_SOT323~D
3
PJP47
PJP49
+15V_ALW
+5V_ALW
2
1
+15V_ALWP
PAD-OPEN 4x4m
PAD-OPEN1x1m
(100mA,20mils ,Via NO.=1)
PJP50
+3.3V_ALWP
ALW_PWRGD_3V_5V
1
2
PR46
200K_0402_1%~D
2
1
42
+3.3V_ALW
PAD-OPEN 4x4m
PJP9
1
2
PAD-OPEN 4x4m
ALW_PWRGD_3V_5V
* connect to U51 (EC) Pin B15 (Vih = & gt; 2V)
2
PAD-OPEN 4x4m
PJP48
1
2
PR47
39K_0402_5%~D
PU2
PR22
1
+5V_ALWP
POK1
2
PC43
0.1U_0603_25V7K~D
2
1
1
PR45
0_0402_5%~D
2
1
22 THERM_STP#
2
BAT54SW-7-F_SOT323-3~D
PR43
0_0402_5%~D
2
1
B
@
POK2
3
ALWON
PD12
PR44
200K_0402_5%~D
1
2
42
PR42
2K_0402_5%~D
2
1
+3.3V_ALWP
PR41
100K_0402_1%~D
1
2
+5V_ALW2
3
PJP46
1
PR40
100K_0402_1%~D
1
2
B
PC39
0.1U_0603_25V7K~D
1 1
2
2
1
PC41
0.1U_0603_25V7K~D
2
1
+5V_ALWP
PC40
1U_0603_10V6K~D
2
1
GNDA_3V5V
GNDA_3V5V
Main (X7630031L10)
@
2nd (X7630031L11)
GNDA_3V5V
SN0608098
MAX17020
10 Ohm
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DC/DC +3V/ +5V
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
47
of
66
5
4
3
2
1
+1.5V_SUS_P
1.5 Volt +/-5%
Thermal Design Current: 9.649A
Peak current: 13.785A
OCP_MIN:15.164A
D
D
@ PL601
FBMJ4516HS720NT_1806~D
1
2
PJP601
PR604
2.2_0603_5%~D
1
2
GNDA_1.5V
BST_1.5VP
47P_0402_50V8J~D
PC601
10U_1206_25V6M~D
2
1
2
1
PC602
10U_1206_25V6M~D
2
1
PC603
10U_1206_25V6M~D
1
+
2
2
C
PC606
0.1U_0402_10V7K~D
2
1
PC608
330U_SX_2VY~D
@ PR602
4.7_1206_5%~D
1
+
PC607
2200P_0402_50V7K~D
2
1
PC611
4.7U_0805_10V4Z~D
PC609
330U_SX_2VY~D
2
4
2
GND
PGND
8
1
1
DL_1.5VP
PC610
0.1U_0603_25V7K~D
0_0402_5%~D
9
RT8209MGQW_WQFN14_3P5X3P5
1
+3.3V_ALW
PC615
7
@
2
LGATE
+5V_ALW
2
10
2
PR605
6.98K_0402_1%~D
PR601
VDDP
PGOOD
1
2
FB
LX_1.5VP
12
11
+1.5V_SUS_P
1
CS
5
BOOT
PHASE
VDD
1
2
6
GNDA_1.5V
@
@
1
14
1
NC
VOUT
DH_1.5VP
13
FDMS0310S_DFN8-5
4
UGATE
PQ602
3
5
PC614
4.7U_0603_6.3V6K~D
+PWR_SRC
PL602
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
1
2
3
2
1
PR607
10_0402_5%~D
1
2
+5V_ALW
TON
EN/DEM
PU601
15
1
@ PC613
1U_0402_6.3V4Z~D
2
C
2
2
PAD-OPEN 4x4m
0.1U_0603_25V7K~D
2
2
@ PR611
300K_0402_5%~D
PC612
1
1
3
2
1
PR606
0_0402_5%~D
1
2
DDR_ON
1
42,49
@
PC604
0.1U_0805_50V7M~D
2
1
5
4
PC605
2200P_0402_50V7K~D
2
1
PR603
255K_0402_1%~D
1
2
FDMS7692_SO8~D
PQ601
1.5V_PWR_SRC
GNDA_1.5V
GNDA_1.5V
1
PR610
100K_0402_1%~D
2
1
PR608
10K_0402_1%~D
1
2
2
PR609
10K_0402_1%~D
42 1.5V_SUS_PWRGD
GNDA_1.5V
1.5V_SUS_PWRGD
* connect to U51 (EC) Pin B9 (Vih = & gt; 2V)
PJP602
B
PJP604
1
1
B
2
2
PAD-OPEN 4x4m
PJP603
PAD-OPEN1x1m
+1.5V_SUS_P
1
+1.5V_MEM
2
GNDA_1.5V
PAD-OPEN 4x4m
A
A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
+1.5V_MEM
Size
4
3
2
Rev
1.0
LA-6591
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
48
of
66
5
4
3
2
1
+1.8V_RUNP
+3.3V_ALW
@ PJP14
2
D
1.8 Volt +/-5%
Thermal Design Current: 0.824A
Peak current: 1.177 A
OCP_MIN: 1.412A
+1.8V_PWR_SRC
1
D
PR60
0_0603_5%~D
1
2
17
16
PGND
TPAD
14
15
PGND
VIN
12
VIN
PU4
+1.8V_VDD
PC69
13
2
@
1
PC68
0.1U_0603_25V7K~D
2
1
PC67
22U_0805_6.3V4Z~D
1
2
PC66
10U_0805_6.3V6M~D
1
2
PAD-OPEN 2x2m~D
VDD
PR61
24k_0402_1%~D
2
1
+1.8V_EN
1
EN
RUN_ON
11,37,41,44
.1U_0402_16V7K~D
GNDA_1.8V
11
AGND
2
RES
TPS51311RGTR_QFN16_3X3~D
10
FB
2
MODE
PR67
1
41
1.8V_RUN_PWRGD connect to
U46 Pin B10 (EC)
C
PC73
2
1
PL8
2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
2
1
PC77
47P_0402_50V8J~D
2
1
@
PC76
22U_0805_6.3V4Z~D
1
2
1
2
1
2
GNDA_1.8V
+1.8V_RUNP
PC74
680P_0603_50V8J~D
GNDA_1.8V
PC75
22U_0805_6.3V4Z~D
1
2
2
0.22U_0603_10V7K~D
+1.8V_SW
1
PAD-OPEN1x1m
1.8V_RUN_PWRGD
PR70
4.7_0805_5%~D
2
+1.8V_MODE 8
1
PR68
+3.3V_RUN
+1.8V_BST
4
VBST
PR69
57.6K_0402_1%~D
2
1
3.3_0603_1%~D
COMP
SW
9
PC72 100P_0402_50V8J~D
2
1
GNDA_1.8V
@ PJP15
1
2
PR64
10K_0402_5%~D
2K_0402_1%~D
C
3
PGOOD
5
PC71
0.018U_0402_50V7K~D
+1.8V_COMP
2
1
SW
PR66
1.43K_0402_1%~D
2
1
6
+1.8V_FB
1
SW
2
0.012U_0402_16V7K~D
10_0402_1%~D
PR65
2
1
7
PR63
2
1K_0402_1%~D
+1.8V_RUNP
PC70
1
@
+0.75V_DDR_VTT
@
2
+1.8V_RUNP
PJP16
1
+1.8V_RUN
PAD-OPEN 2x2m~D
B
B
DDR3 Termination
0.75Volt +/-5%
Thermal Design Current: 0.525A
Peak current: 0.75A
+5V_ALW
PU5
1DC_1+0.75V_VTT_PWR_SRC
1
PAD-OPEN 2x2m~D
2
VDDQSNS
VIN
+V_DDR_REF
10
2
2
1
PJP17
+1.5V_MEM
VLDOIN
PC78
4.7U_0805_10V4Z~D
PJP18
2
+0.75V_P
VTT
4
S5
GND
PC81
10U_0805_6.3V6M~D
1
2
PGND
VTTSNS
S3
+0.75V_DDR_VTT
PAD-OPEN 2x2m~D
PC79
0.1U_0603_25V7K~D
1
2
GND
VTTREF
11
5
PC80
10U_0805_6.3V6M~D
1
2
PC83
0.1U_0603_25V7K~D
2
1
PC82
10U_0805_6.3V6M~D
1
2
3
A
1
+0.75V_P
8
6
9
+0.75V_S5
7
+0.75V_S3
RT9026GFP_MSOP10~D
A
1
2
DDR_ON
42,48
PR72 0_0402_5%~D
1
PR71
2
0.75V_DDR_VTT_ON
41
DELL CONFIDENTIAL/PROPRIETARY
0_0402_5%~D
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+0.75V_DDR_VT/+1.8V_RUN
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
49
of
66
5
4
3
2
1
+1.05V_M
D
D
PC84
PJP19
+1.05V_PWR_SRC
1U_0402_6.3V6K~D
SIO_SLP_A#
PC89
0.1U_0603_25V7K~D
2
1
GNDA_1.05VM
+1.05V_MP
PC107
6800P_0402_25V7K~D
2
1
PC106
0.1U_0603_25V7K~D
2
1
PC105
22U_0805_6.3V6M~D
2
1
PC104
22U_0805_6.3V6M~D
2
1
PC103
22U_0805_6.3V6M~D
2
1
PC102
22U_0805_6.3V6M~D
2
1
PC101
22U_0805_6.3V6M~D
2
1
PC100
22U_0805_6.3V6M~D
2
1
1
PC99
22U_0805_6.3V6M~D
2
1
@ PR86
7.68K_0805_1%~D
GNDA_1.05VM
PC98
22U_0805_6.3V6M~D
2
1
PC95
0.1U_0603_25V7K~D
PC97
10U_0603_6.3V6M~D
2
1
@
PC96
10U_0603_6.3V6M~D
2
1
0_0402_5%~D
1
2
1
1
PL9
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VM_VX
2
1
2
PR85
2
PC88
0.1U_0603_25V7K~D
2
1
C
42,44
SN1003055RUWR_QFN17_3P5X3P5~D
@ PR84
2
@
1.05 Volt +/-5%
Thermal Design Current : 2.921A
Peak current : 4.173A
OCP_MIN :5.008A
16,41
A_ON
GNDA_1.05VM
GNDA_1.05VM
PC87
10U_1206_25V6M~D
2
1
1
1
PGND
2
10 +1.05VM_IMON
IMON
PR83
10K_0402_1%~D
SS
PC86
10U_1206_25V6M~D
2
1
2
16
VIN
6
MODE
+1.05VM_VX
GNDA_1.05VM
+5V_ALW
22.1K_0402_1%~D
12 +1.05VM_FSET
2
1
@ PR79
11 +1.05VM_MODE
FSET
VOUT
7
PC93
2
PR81
PC94
2
1
2
13 +1.05VM_EN
EN
VFB
0.01U_0402_25V7K~D
1
1800P_0402_50V7K~D
5
+1.05VM_SS
1
1
4
+1.05V_MP
2.67K_0402_1%~D
PR82
+1.05V_MP
2
0_0402_5%~D
2K_0402_1%~D
1
COMP
PR75 @
0_0402_5%~D
2
1
PR78
0_0402_5%~D
2
1
1.33K_0402_1%~D
+1.05VM_VFB
PR80
2
3
14 +1.05VM_PWRGD
PGOOD
PGND
+1.05VM_COMP
GND
9
PC92 680P_0402_50V7K~D
2
1
PC90
0.22U_0603_10V7K~D
PR74
3.3_0603_1%~D
15 +1.05VM_BST
1
2
VBST
SW
2
C
VCCA
8
1
VIN
PU6
+3.3V_ALW
PC91 100P_0402_50V8J~D
2
1
17
GNDA_1.05VM
5.6K_0402_5%~D
1
2
PAD-OPEN 4x4m
+1.05VM_VX
PR76
2
1
1
@ PC85
10U_1206_25V6M~D
2
1
2
B
B
PR87
100K_0402_1%~D
2
1
+3.3V_ALW
+1.05VM_PWRGD
PJP21
PJP20
1
1
2
2
PAD-OPEN 4x4m
PR88
2
0_0402_5%~D
1
1.05V_A_PWRGD
PJP22
PAD-OPEN1x1m
42
+1.05V_MP
1
2
+1.05V_M
GNDA_1.05VM
PAD-OPEN 4x4m
1.05V_A_PWRGD
* connect to U51 (EC) Pin A14 (Vih = & gt; 2V)
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
+1.05V_M
Size
Document Number
Date:
Monday, January 10, 2011
Rev
1.0
LA-6591
5
4
3
2
Sheet
1
50
of
66
5
4
3
2
1
+1.05VTT
1.05Volt
= & gt; (+/- 5% AC + DC +Ripple )
= & gt; (+/- 2% DC + Ripple)
Thermal Design Current : 5.980A
Peack current : 8.970A
OCP_MIN : 10.764A
PC108
PJP23
+1.05VTT_PWR_SRC
MODE
SS
12 +1.05VTT_FSET
PC113
0.1U_0603_25V7K~D
2
1
PC112
0.1U_0603_25V7K~D
2
1
11 +1.05VTT_MODE
10 +1.05VTT_IMON
1
GNDA_1.05VTT
SN1003055RUWR_QFN17_3P5X3P5~D
+1.05VTTP
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
+1.05VTT_VX
2
1
GNDA_1.05VTT
PC131
6800P_0402_25V7K~D
2
1
PC128
0.1U_0603_25V7K~D
2
1
PC127
22U_0805_6.3V6M~D
2
1
PC126
47U_0805_4V6M~D
2
1
PC125
22U_0805_6.3V6M~D
2
1
PC124
22U_0805_6.3V6M~D
2
1
PC123
22U_0805_6.3V6M~D
2
1
PC122
47U_0805_4V6M~D
2
1
PC130
22U_0805_6.3V6M~D
2
1
1
PC121
22U_0805_6.3V6M~D
2
1
@ PR99
7.68K_0805_1%~D
GNDA_1.05VTT
PC129
22U_0805_6.3V6M~D
2
1
GNDA_1.05VTT
PC119
0.1U_0603_25V7K~D
PC120
22U_0805_6.3V6M~D
2
1
@
@
10_0402_5%~D
2
1
PR100
1
1
0_0402_5%~D
1
2
PR98
2
CPU_VTT_ON
2
@
D
22.1K_0402_1%~D
2
1
@ PR92
PR97
GNDA_1.05VTT
41,55
0_0402_5%~D
1
2
2
PGND
IMON
PC111
10U_1206_25V6M~D
2
1
1
FSET
VOUT
+5V_ALW
2
VFB
2
PR91
14 +1.05VTT_PWRGD
13 +1.05VTT_EN
PR95
0_0402_5%~D
EN
@
PC110
10U_1206_25V6M~D
2
1
2
16
COMP
7
1
PC118
2
1
PGOOD
+1.05VTT_VX
C
VBST
GND
0.01U_0402_25V7K~D
1800P_0402_50V7K~D
PC117
6
VCCA
PGND
5
+1.05VTT_SS
2
2
0_0402_5%~D
PR94
1
4
+1.05VTT_SENSE
2K_0402_0.5%~D
1
PR96
1
3.09K_0402_0.5%~D
PR93
2
PR105
20K_0402_0.5%~D
2
1
+1.05VTT_SENSE
+1.05VTT_VFB
2
3
9
2
+1.05VTT_COMP
SW
1
PC116
680P_0402_50V7K~D
2
1
8
PC115 100P_0402_50V8J~D
2
1
PR90
5.6K_0402_5%~D
2
1
@
PC114
0.22U_0603_10V7K~D
PR89
2.2_0603_5%~D
15 +1.05VTT_BST
1
2
22.1K_0402_1%~D
+3.3V_ALW
VIN
VIN
PU7
17
+1.05VTT_VX
GNDA_1.05VTT
1
PAD-OPEN 4x4m
PC109
10U_1206_25V6M~D
2
1
1
PC350
22U_0805_6.3V4Z~D
1
2
2
PC351
22U_0805_6.3V4Z~D
1
2
1U_0402_6.3V6K~D
D
C
PR101
2
+1.05VTT_PWRGD
1
PR102
+5V_RUN
9.31K_0402_1%~D
PR103
1
2
+1.05VTT_SENSE
1
2
VTT_SENSE
10
VTT_GND
10
0_0402_5%~D
1.05V_VTTPWRGD
42,55
0_0402_5%~D
PR104
2
1
PR461
GNDA_1.05VTT
13.3K_0402_1%~D
1
2
0_0402_5%~D
1.05V_VTTPWRGD
* connect to PU13 Pin 15 (Vih = & gt; 2V)
* connect to U50 Pin 1 (Vih = & gt; 2.31V)
B
B
PJP25
PJP24
1
2
2
PAD-OPEN 43X118
1
PAD-OPEN1x1m
PJP26
+1.05VTTP
1
2
+1.05V_RUN_VTT
GNDA_1.05VTT
PAD-OPEN 43X118
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ISL95870A +1.05V_RUN_VTT
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
51
of
66
5
4
3
2
1
1
LGATE3
4
MAX17491GTA+T_TQFN8_3X3~D
2
PR127
165K_0402_1%~D
1
2
PR135
105K_0402_1%~D
1
2
1
2
PC153
10U_1206_25VAK~D
2
1
1
2
PC152
10U_1206_25VAK~D
1
C
PC159
470P_0603_50V8J~D
1
2
1
+VCC_CORE
1
2P2_Vo
1
PR145
1_0402_5%~D
2
2
PR152
2
1
22.1K_0402_1%~D
1
@
PR154
0_0402_5%~D
PC164
2
@ PC162
1
2
1000P_0402_50V7K~D
2
@
1
2
PQ16
AON6704L_DFN8-5
5
3
2
1
3
2
1
1
PC166
0.22U_0603_16V7K~D
2
1
BOST1
B
PC172
10U_1206_25VAK~D
2
1
PC171
10U_1206_25VAK~D
PC170
2200P_0402_50V7K~D
2
1
PC174
0.22U_0603_10V7K~D
1
2
PC169
0.1U_0603_25V7K~D
2
1
4
PR161
2.2_0603_5%~D
2
1 BT1_1
PC402
10U_1206_25VAK~D
2
1
UGATE1
AON6414AL 1N DFN
PQ17
+VCC_PWR_SRC
PL13
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
PHASE1
2.1K_0402_1%~D
Vcore/VAXG L/S Mosfet
PR170
1_0402_5%~D
PR176
2
1
22.1K_0402_1%~D
PR177
0_0402_5%~D
2
PC178
2
2
2
PR173
2.2_1206_1%~D
@
1000P_0402_50V7K~D
Vcore/VAXG H/S Mosfet PQ9, PQ13, PQ17, PQ24, PQ60
1
1
PC175
470P_0603_50V8J~D
1
2
1
GNDA_VCC
A
+VCC_CORE
2P1_Vo
PR169
+Vcore_CSPA1
@
1
1
P1_SW 3
@
2
3
2
1
@
4
2
1
PQ20
AON6704L_DFN8-5
AON6704L_DFN8-5
4
PC176
2200P_0402_50V7K~D
5
4
2
0_0402_5%~D
2
0_0402_5%~D
2
0_0402_5%~D
IMVP_PGOOD connect to
U46 Pin A62 (EC)
@ PC177
1
2
1000P_0402_50V7K~D
PC179
0.22U_0603_16V7K~D
2
1
A
PQ11, PQ15, PQ19, PQ25, PQ26
+Vcore_CSNA
2
Main (X7630031L06)
AON6414AL
Main (X7630031L06)
AON6704L
2nd
SIR164DP
GNDA_VCC
PAD-OPEN1x1m
GNDA_VCC
+
2
+Vcore_CSNA
0_0402_5%~D
PJP28
2
1
PR144
1000P_0402_50V7K~D
1
130_0402_1%~D
1
130_0402_1%~D
1
54.9_0402_1%~D
1
PR164
1
PR167
1
PR168
+
2.1K_0402_1%~D
@
POKA
CLK
23
PC151
2200P_0402_50V7K~D
2
1
PC148
0.1U_0603_25V7K~D
2
1
PC401
10U_1206_25VAK~D
2
1
AON6414AL 1N DFN
AON6704L_DFN8-5
@
4
+Vcore_CSPA2
LGATE1
1
2
1
P2_SW 3
PR148
2.2_1206_1%~D
PC160
2
26
25
PC161
2200P_0402_50V7K~D
+Vcore_POKA
1
5
PQ13
+Vcore_VDD
28
27
+
3
2
1
5
PQ15
4
5
VIDSCLK
PR171
2
PR126
169K_0402_1%~D
1
2
LGAT2
30
29
1
4
UGATE2
31
+PWR_SRC
PL12
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
PQ19
VIDALERT_N
10
@
VIDSOUT
10
PR166
0_0402_5%~D
1
2
2
PR165
1
10K_0402_1%~D
10
PR134
127K_0402_1%
1
2
+Vcore_SR
+Vcore_PWMA
33
32
2
PAD-OPEN 4x4m
PR141
PC157
2.2_0603_5%~D
0.22U_0603_10V7K~D
2
1 BT2_1 1
2
PHASE2
1
+1.05V_RUN_VTT
+GFX_POKB
IMVP_PGOOD
4
BOST2
PC173 0.1U_0402_25V6K~D
1
2
41
GNDA_VCC
+Vcore_IMAXA
34
PJP27
1
+Vcore_POKA 24
+GFX_DLB
2
PR159
2
@ PR160
2
PR162
PC146
0.22U_0603_16V7K~D
2
1
+VCC_PWR_SRC
GNDA_VCC
+Vcore_CLK
+GFX_DHB
53
+Vcore_ALERT# 22
+GFX_LXB
ALERT#
BSTA1
+GFX_BSTB
53
+3.3V_RUN
@
@ PC144
1
2
1000P_0402_50V7K~D
+Vcore_CSNA
+GFX_IMAXB
35
PR133
10K_0402_1%~D
1
2
+Vcore_THERMA
38
37
36
PH3
100K_0402_1%_TSM0B104F4251RZ~D
1
2
+VGFX_THERMB
39
PH2
100K_0402_1%_TSM0B104F4251RZ~D
1
2
+Vcore_CSPAAVE
40
DRVPWMA
+Vcore_CSPA1
41
CSPAAVE
LXA1
POKB
53 +GFX_DRVPWMB
53
DHA1
CSPB2
VDIO
12
AGND
11
MAX17411GTM+_TQFN48_6X6~D
CSNB
7.5K_0402_1%~D
1+VGFX_FBB
53
SR
+Vcore_CSNA
42
DLA1
GNDA_VCC
GNDA_VCC
THERMA
+Vcore_CSPA2
43
CSNA
VDDA
CSPB1
20
10
53 +GFX_CSPB2
+GFX_POKB
PC167
1000P_0402_50V7K~D
THERMB
+Vcore_CSPA3
44
CSPBAVE
VDDB
+GFX_CSNB
PC163
1000P_0402_50V7K~D
PR157
2
CSPA1
+Vcore_VCC
45
PGNDA
19
2
1
DLA2
GNDSB
+Vcore_VDIO 21
PR158 10_0402_5%~D
FBB
GNDA_VCC
+VCC_GFXCORE
B
2
2
1
DHA2
+Vcore_VDD
PR156 10_0402_1%~D
1
2
1
11 VCC_AXG_SENSE
2
@ PC165
1000P_0402_50V7K~D
9
+GFX_CSPB1
53
+VGFX_GNDSB
LXA2
AGND
DLB
PR153 10_0402_1%~D
1
2
VRHOT#
18
53
43P_0402_50V8J
BSTA2
PGNDB
PC168
8
53 +GFX_CSPBAVE
0_0402_5%~D
IMAXA
FBA
DRVPWMB
@
PR146
1
2
1
11 VSS_AXG_SENSE
GNDA_VCC
GNDSA
13
7,42,54 H_PROCHOT#
PR149 10_0402_5%~D
1
2
PR128
0_0402_5%~D
PC145
2
1000P_0402_50V7K~D
5
6
2
PR120
2
1
22.1K_0402_1%~D
3
2
1
+VGFX_FBB
+VGFX_GNDSB 7
1
GNDA_VCC
1
5
@
1
2
4
GNDA_VCC
@
+Vcore_CSPA3
+GFX_IMAXB
2.2U_0603_10V7K~D
3
17
+1.05V_RUN_VTT
11.5K_0402_1%~D
1 +Vcore_FBA
+Vcore_VRHOT#
PC158
1000P_0402_50V7K~D GNDA_VCC
IMAXB
DHB
75_0402_5%~D
1
2
GNDA_VCC
PR140
2
TONB
16
@ PR143
1
2
2
1
@ PR411 10_0402_1%~D
1
2
PC149
1000P_0402_50V7K~D
LXB
1
2
1000P_0402_50V7K~D
PR139 10_0402_1%~D
1
2
VCCSENSE
2
10
1
@ PC150
Local sense resister put HW side
CSPA2
+Vcore_GNDSA
15
VSSSENSE
C
BSTB
10
TPAD
PU9
PR138 10_0402_1%~D
1
2
CSPA3
49
@ PR410 10_0402_1%~D
1
2
+Vcore_EN
+VGFX_TONB
46
2
200K_0402_1%~D
14
1
PR136
+VGFX_PWR_SRC
VCC
+Vcore_TONA
GNDA_VCC
48
2
200K_0402_1%~D
PR113
+Vcore_IMAXA
2
0_0402_5%~D
47
@
1
PR132
2
0_0402_5%~D
PR125
1K_0402_1%~D
1
2
1
PR131
PR124
5.62K_0402_1%~D
1
2
1
PR129
41 IMVP_VR_ON
EN
14,42 1.05V_0.8V_PWROK
+VCC_PWR_SRC
PR123
5.62K_0402_1%~D
1
2
PC143
2.2U_0603_10V7K~D
1
2
GNDA_VCC
PC140
2200P_0402_50V7K~D
2
10_0402_5%~D
2
TONA
PC142
2.2U_0603_10V7K~D
2
1
PC141
1U_0603_10V6K~D
2
1
@
PR122
1
3
2
1
+Vcore_VCC
+5V_ALW
+Vcore_VDD
PR114
1_0402_5%~D
2.1K_0402_1%~D
@
3
2
1
4.32K_0402_1%~D
1
PR115
PR121 0_0402_5%~D
1
2
@
4
SIR472
2nd
3rd (X7630031L07)
MDU2657RH
3rd (X7630031L07)
@
1
PC180
2
1000P_0402_50V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
MDU2653RH
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Vcore
Size
4
3
2
Document Number
Rev
1.0
LA-6591
Date:
5
D
2
4
PC156
100U_25V_M~D
DL
EP
1
GND
2
9
PC155
100U_25V_M~D
3
PC154
100U_25V_M~D
P3_SW
+VCC_CORE
2P3_Vo
1
4.32K_0402_1%~D
1
1
P3_SW 3
2
P2_SW
PR112
2
1
2.1K_0402_1%~D
4
7
1
2
LX
2
2
PWM
PHASE3
8
1
1
10K_0402_1%_ERTJ0EG103FA~D
4.32K_0402_1%~D
1
PL11
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
1
PR117
2.2_1206_1%~D
P1_SW
1
PR110
2
DH
PC139
470P_0603_50V8J~D
1
2
1
PR111
BST
SKIP
PQ12
AON6704L_DFN8-5
PH1
VDD
AON6704L_DFN8-5
2
2
Layout Note:
PC142 close to PIN19
PC135
10U_1206_25VAK~D
2
1
PU8
5
6
5
2
1
40.2K_0402_1%~D
D
5
PC138
1U_0603_10V6K~D
2
1
PR109
PQ11
2
1_0603_1%~D
PC137
0.22U_0603_10V7K~D
1
2
PC134
10U_1206_25VAK~D
4
PR107
2.2_0603_5%~D
BOST3 2
1 BT3_1
3
2
1
+5V_ALW
PR118
PC133
2200P_0402_50V7K~D
2
1
UGATE3
0.33U_0603_10V7K~D
1
2
PC132
0.1U_0603_25V7K~D
2
1
5
1
PC136
3
2
1
2
AON6414AL 1N DFN
PQ9
PC701 0.033U_0402_16V7K~D
VCC_Core
Thermal Design Current : 38A
Peak current : 53A
OCP_MIN :63.6A
PC400
10U_1206_25VAK~D
2
1
+VCC_PWR_SRC
Monday, January 10, 2011
Sheet
1
52
of
66
5
4
3
2
1
D
4
EP
G_LGATE2
4
+Vcore_VCC
1
3
2
1
3
2
1
@ PC188
4700P_0402_25V7K~D
2
PR198
52 +GFX_CSPB2
@
1
GNDA_VCC
2
1
PC184
10U_1206_25VAK~D
2
1
+VCC_GFXCORE
GP2_Vo
1
1
2
2.74K_0402_1%~D
@
@
4
2
1
MAX17491GTA+T_TQFN8_3X3~D
1
3
@ PR181
1_0402_5%~D
@ PR180
@
2
9
PQ23
AON6704L_DFN8-5
3
GP2_SW
2
DL
4
@ PQ22
@ PR186
2
1
7.5K_0402_1%~D
1
GND
G_PHASE2
8
7
@ PR187
0_0402_5%~D
PC190
2
@ PC189
1
2
1000P_0402_50V7K~D
2
LX
2
PWM
1
AON6704L_DFN8-5
2
52 +GFX_DRVPWMB
@
PR182
2.2_1206_1%~D
DH
PC187
470P_0603_50V8J~D
1
2
1
BST
SKIP
@
VCC_AXG
Thermal Design Current : 21.5A
Peak current : 33A
OCP_MIN :39.6A
@
PL14
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
5
6
@
0_0402_5%~D
@ PU10
5
VDD
5
@ PC186
1U_0603_10V6K~D
2
1
@
PC183
10U_1206_25VAK~D
PR179
@ PC185
2.2_0603_5%~D
0.22U_0603_10V7K~D
G_BOST2 2
1 GBT2_1 1
2
@
3
2
1
@
D
PC182
2200P_0402_50V7K~D
2
1
AON6414AL 1N DFN
+5V_ALW
4
PC181
0.1U_0603_25V7K~D
2
1
5
PQ21
@
G_UGATE2
PC403
10U_1206_25VAK~D
2
1
+VGFX_PWR_SRC
@ PC191
0.22U_0603_16V7K~D
2
1
1000P_0402_50V7K~D
52 +GFX_CSNB
C
C
+VGFX_PWR_SRC
PJP29
PC196
10U_1206_25VAK~D
2
1
1
2
PC195
10U_1206_25VAK~D
PC194
2200P_0402_50V7K~D
2
1
+PWR_SRC
3
2
1
PC193
0.1U_0603_25V7K~D
2
1
AON6414AL 1N DFN
PC404
10U_1206_25VAK~D
2
1
5
PQ60
AON6414AL 1N DFN
2
PL15
0.36UH_FDUE1040J-H-R36M=P3 33A_20%~D
GNDA_VCC
PC205
2
2
@
1
1000P_0402_50V7K~D
1
+
2
PC199
2200P_0402_50V7K~D
2
1
PC201
+
2
PC202
470U_D2_2VM_R4.5M~D
@ PR196
2
1
7.5K_0402_1%~D
1
470U_D2_2VM_R4.5M~D
PC200
0.1U_0402_10V7K~D
2
1
1
2
PR191
1_0402_5%~D
1
+VCC_GFXCORE
GP1_Vo
@ PC204
1
2
B
1000P_0402_50V7K~D
@ PC206
0.22U_0603_16V7K~D
2
1
+GFX_CSNB
52 +GFX_CSNB
PC702 0.022U_0402_25V7K~D
2
1
PC208
0.33U_0603_10V7K~D
1
2
2
PR199
2
+GFX_CSPB1
52 +GFX_CSPB1
2
2.74K_0402_1%~D
@ PR197
0_0402_5%~D
B
1
3
@ PR190
1
2
PR193
2.2_1206_1%~D
@
0_0402_5%~D
1
PC198
470P_0603_50V8J~D
1
2
1
AON6704L_DFN8-5
1
GP1_SW
+GFX_CSPBAVE
@
2
PC203
4700P_0402_25V7K~D
4
3
2
1
4
+GFX_DLB
PQ26
AON6704L_DFN8-5
5
4
+GFX_LXB
PQ25
52
4
3
2
1
PR189
PC197
2.2_0603_5%~D
0.22U_0603_10V7K~D
2
1 GBT1_1 1
2
3
2
1
52 +GFX_BSTB
52
4
+GFX_DHB
5
52
5
PQ24
1
PAD-OPEN 4x4m
GNDA_VCC
1
PC207
2
.1U_0402_16V7K~D
PR119
2
1
1_0603_1%~D
PR201
2
1
40.2K_0402_1%~D
2
PH4
1
PR203
2
10K_0402_1%_ERTJ0EG103FA~D
2
1
2.1K_0402_1%~D
1
PR202
2
1.43K_0402_1%~D
1
@ PR204
GP1_SW
1.43K_0402_1%~D
GP2_SW
52 +GFX_CSNB
A
A
52 +GFX_CSPBAVE
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Vcore
Size
4
3
2
Rev
1.0
LA-6591
Date:
5
Document Number
Monday, January 10, 2011
Sheet
1
53
of
66
5
4
3
2
1
PU11
PR205
0.01_1206_1%~D
+SDC_IN
PAD-OPEN 4x4m
D
PQ28
NTR4502PT1G_SOT23-3~D
2
G
PQ30A
NTGD4161PT1G_TSOP6~D
S
D
D
S
5
6
CSSN_1
0_0402_5%~D
2
PC234
PC233
Main
120P
1u
@
2nd
@
@
0.01u
0.22u
10 ohm
2
PR233
0_0402_5%~D
2
1
PC240
0.1U_0603_25V7K~D
1
2
PC241
1
2
GNDA_CHG
0.1U_0603_25V7K~D
1
2
0.1U_0603_25V7K~D
@ PC293
GNDA_CHG
@
PQ34
RHU002N06_SOT323-3~D
PC801
100P_0402_50V8J~D
2
1
2
66.5K_0402_1%~D
3
S
1
2
G
PR804
D
PQ801
2N7002W-7-F_SOT323-3~D
1
2
@
PU12B
LM393DR_SO8~D
G
-
PR239
10K_0402_1%~D
2
1
@
1
O
PR243
41.2K_0402_1%~D
2
1
8
PU12A
P
+
4
PC243
100P_0402_50V8J~D
2
1
PR241
22.6K_0402_1%~D
2
1
S
2
G
PR238
100K_0402_1%~D
2
1
PR237
47K_0402_1%~D
2
1
+5V_ALW
2
PR242
42.2K_0402_1%~D
2
1
7
PC242
100P_0402_50V8J~D
2
1
1
D
3
-
MAX8731_REF
PR236
1M_0402_1%~D
1
2
2
1
1
PC245
2
0.01U_0402_25V7K~D
8
O
PQ802
2N7002W-7-F_SOT323-3~D
PR802
+
4
0_0402_5%~D
PC802
1
PR806
150K_0402_1%~D
42 DYN_TUR_CURRNT_SET#
5
6
1
649K_0402_1%~D
A
1
2
2
ICREF
2
220P_0402_50V8J~D
1
PR810
0_0402_5%~D
B
+3.3V_ALW
3
PR808
1.8M_0402_1%~D
1
2
P
1
PR801
2
ICOUT
PR807
0_0402_5%~D
1
2
2
@
DYN_TUR_PWR_VO
PR809
221K_0402_1%~D
G
2
PR805
20K_0402_1%~D
MAX8731_IINP 1
100P_0402_50V8J~D
1
2
@ PC244
1
PR803
150K_0402_1%~D
@
+5V_ALW
+3.3V_ALW2
Low
PR235
232K_0402_1%~D
2
1
+5V_ALW
90W
S
GNDA_CHG
MAX8731_REF
High
D
ACAV_IN
+DC_IN
65W
@
2
G
B
DYN_TUR_CURRENT_SET#
PR231
1.8K_1206_5%~D
2
1
1
PR232
0_0402_5%~D
2
1
2
2
0 ohm
@
LM393DR_SO8~D
PR240
1
2
0_0402_5%~D
ACAV_IN_NB
41,42,56
@
PR223
Main
0 ohm
PR220
PC214
PC292
PR209
PR210
PC213
@
@
@
0 ohm
0 ohm
0.1u
1u
0.1u
10 ohm
10 ohm
0.047u
1 ohm
2nd
4.7 ohm
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
Adapter Protection Circuit for Turbo Mode
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Charger
4
3
2
Size
Document Number
Date:
5
C
PR232
0.1u
1
PAD-OPEN1x1m
PC241
0.1u
3
2
@
+VCHGR
PR227
0.01_1206_1%~D
1
PJP34
PR234
4.7_1206_5%~D
1
4
1
2nd
@
PC240
1+VCHGR_L
4
PC230
1000P_0603_50V7K~D
& lt; BOM Structure & gt;
+VCHGR
TP
56P
@
2nd
PL17
100_0402_5%~D
16
NC
2
PC227
2200P
7,42,52
5.6UH 20% FDVE1040-H-5R6M=P3_9.2A_20%~D
3
1 PR230
PC225
Main
2
15 VFB
@
10K
PC239
10U_1206_25V6M~D
2
1
1_0603_1%~D
@ PC224
220P_0402_50V7K~D
CHG_LGATE
H_PROCHOT#
41
PC221
10U_1206_25V6M~D
2
1
1
1
4
CHG_UGATE
GNDA_CHG
Maximum charging current is 6.3A
7.5K
@
PC228
DYN_TUR_PWR_ALRT#
PC220
10U_1206_25V6M~D
2
1
3
2
PC214
1U_0603_10V6K~D
2
1
2
PC222 1U_0603_10V6K~D
BQ24747RHDR_QFN28_5X5~D
@
200K
Main
0_0402_5%~D
2
2
+3.3V_ALW
17
GND
29
0.01u
PC238
10U_1206_25V6M~D
2
1
CSON
VFB
12
@
2nd
@
PC219
0.1U_0603_25V7K~D
2
1
PR212
100K_0402_1%~D
2
1
GNDA_CHG
19
18
PGND
CSOP
CE
0 Ohm
@ PR812
100K_0402_5%~D
+VCHGR_B
1
@
5
6
7
8
PC227
56P_0402_50V8~D
1
2
LGATE
VREF
7
PR225
PC231
220P_0402_50V8J~D
@
PR228
1
2
10K_0402_5%~D
@
20
1
@ PR811
0_0402_5%~D
3
2
1
@
EAO
3
PR224
D
2.2K
Main
100k
PC237
10U_1206_25V6M~D
2
1
2
EAI
4
PC235
0.1U_0402_10V7K~D
2
1
@
2
PR225
7.5K_0402_5%~D
PC234
1U_0603_10V6K~D
2
1
@
PC228
120P_0402_50VNPO~D
1
2
1
MAX8731_REF
PC233
0.01U_0402_25V7K~D
2
1
PC229
220P_0402_50V8J~D
2
1
PR229
8.45K_0402_1%~D
2
1
22 MAX8731_IINP
1
PC225
2200P_0402_50V7K~D
@
PR812
PC236
0.1U_0603_25V7K~D
2
1
2 PR223
23
PHASE
FBO
@ PR813
1
PR814
DYN_TUR_PWR_VO
1
@ PC803
1
2
GNDA_CHG
@
1
56
3
2
1
VICM
5
2
PC232
0.01U_0402_25V7K~D
2
1
PR226
4.7K_0402_5%~D
2
1
42 CHARGER_SMBDAT
PC231
0.01U_0402_25V7K~D
2
1
42 CHARGER_SMBCLK
2
PR224
200K_0402_5%~D
226K
PR228
DK_CSS_GC
PC226
3300P_0402_50V7K~D
2
1
8
PD15
BAT54HT1G_SOD323-2~D
2
1
24
UGATE
2
1
PR211
100K_0402_1%~D
1
21 MAX8731A_LDO
VDDP
NC
6
GNDA_CHG
2
PC217
0.1U_0603_25V7K~D
2
1
SDA
4.7K
40
PC218
2200P_0402_50V7K~D
2
1
1
27
CSSN
1
28
CSSP
ICREF
SCL
9
MAX8731_IINP
1
PC223
0.1U_0402_10V7K~D
VDDSMB
14
GNDA_CHG
2
@ PR220
PR219
33_0603_1%~D
2.2_0603_1%~D
BOOT 1
BOOT_D
25
2
BOOT
10
DOCK_DCIN_IS-
PR216
0_0402_5%~D
1
2
ICOUT
26
ICOUT
ACOK
11
4
GNDA_CHG
ACIN
13
@
2
1
+5V_ALW
2
1
0_0402_5%~D
PR210
CSSP_1
PR209
PC215
GNDA_CHG
PU11
0.1U_0805_50V7M~D
DCIN 22
2
1
DCIN
PR221
1
2
0_0402_5%~D
1
2
0.1U_0603_25V7K~D
@ PC292
ICREF
PR222
15.8K_0402_1%~D
2
1
GNDA_CHG
0_0402_5%~D
1
1_0805_5%~D
2
1
2
PR215
10K_0402_5%~D
2
1
PR214
10K_0402_1%~D
2
1
PR217
316K_0402_1%~D
1
2
2
PC213
0.1U_0603_25V7K~D
1
2
@
HW
D
1
56 +CHGR_DC_IN
PR218
49.9K_0402_1%~D
2
1
2
PC212
0.1U_0603_25V7K~D
1
2
PR213
PR814
0 Ohm
SW
PQ30B
NTGD4161PT1G_TSOP6~D
G
MAX8731_REF
PR208
10K_0402_5%~D
2
1
PR813
40
220P
2nd
Adapter Protection Event
DOCK_DCIN_IS+
S
+SDC_IN
0.01U_0402_25V7K~D
PR226
316K
G
G
PR218
TI bq24747 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
@
5
3
S
SIR472DP-T1-GE3_SO8~D
D
E2 AC_OK=17.7 Volt
C
PC229
PR217
PC211
0.1U_0603_25V7K~D
2
1
2
2
G
PQ29
NTR4502PT1G_SOT23-3~D
ACAV_IN
15.8K
Main
PQ31
1
CSS_GC
2
1
2
PR207
56
56
0_0402_5%~D
22,42,56
@
10K
@
2
PQ33
SI4812BDY-T1-GE3_SO8~D
DC_BLOCK_GC
3
3
2
0_0402_5%~D
1
1
1
1
PC216
PR222
@
CHAGER_SRC
1
@
4
PR206
@
ISL88731C
PR214
10K
PJP33
D
MAX8731A_LDO
BQ24747
2nd (X7630031L13)
+PWR_SRC
4
PC210
0.1U_0603_25V7K~D
+DC_IN_SS
PR215
Main (X7630031L12)
PL16
FBMJ4516HS720NT_1806~D
2
1
1
SBR3A40SA-13_SMA2
PQ27
SI4835DDY-T1-GE3_SO8~D
8
1
7
2
6
3
5
PC209
47P_0402_50V8J~D
2
1
@ PD14
2
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
54
of
66
5
4
3
2
1
VCCSA
Thermal Design Current : 4.2A
Peak current : 6A
OCP_MIN :7.2A
D
D
PJP35
+VCCSA_PWR_SRC
FSEL
PR251
0_0402_5%~D
1
2
1
1
1
GNDA_VCCSA
2
2
B
1
1
2
PC249
2200P_0402_50V7K~D
VO
@
1
PC260
10U_0805_6.3V6M~D
2
1
PC257
10U_0805_6.3V6M~D
2
1
PC256
2200P_0402_50V7K~D
2
1
PC255
330U_D2_2VY_R7M~D
PC258
0.1U_0402_10V7K~D
2
1
PC261
2
1
1.05V_VTTPWRGD
PR253
42,51
2
PR252
0_0402_5%~D
12
11
10
2
47.5K_0402_1%~D
+1.05V_RUN
+VCCSA_FSEL
@ PR248
@PR248
2.2_1206_1%~D
+
2
.015U_0603_25V7K~D
PR254
CPU_VTT_ON
2
0_0402_5%~D
2
1
PR255
10K_0402_5%~D
2
ISL95870AHRUZ_UTQFN20_1P8X3P2
+3.3V_RUN
VCCSAPWROK
42
PR258
0_0402_5%~D
+VCCSA_OCSET
1
+VCCSA_SENSE
11
0_0402_5%~D
41,51
GNDA_VCCSA
1
+VCCSA_FB
2
2
@ PR260
4.12K_0402_1%~D
1
2
PR259
13
PR247
12.7K_0402_1%~D
1
10_0402_5%~D
2
1
PR257
SET1
FB
2
+VCCSA_SET1 9
2
+VCCSA_SET0 8
OCSET
PR250
113K_0402_1%~D
PQ35
AO4466L_SO8~D
3
2
1
1
+VCCSA_PWRGD
+VCCSA_LGATE
@ PC254
1000P_0603_50V7K~D
2
14
4
PGOOD
SET0
+VCCSA_EN
1
SREF
PR256
140K_0402_1%~D
PR295
1K_0402_5%~D
15
EN
PR262
PR261
0_0402_5%~D
GNDA_VCCSA
16
PHASE
VID0
1
PC262
.068U_0603_16V7~D
1
2
2
1
11 VCCSA_VID_1
7
VID1
+VCCSA_PHASE
C
+VCCSA_P
10_0402_5%~D
2
1
PR246
+VCCSA_SREF
@ PR249
@PR249
0_0402_5%~D
6
+VCCSA_UGATE
1
5
+VCCSA_VID0
+1.05V_RUN
17
1
UGATE
1 2
4
3
2
1
VCCSA_VID_1
+PWR_SRC
PL18
1UH 20% FDVE0630-H-1R0M=P3 11.9A
2
1
PC253
1
2
0.22U_0603_10V7K~D
+VCCSA_RTN
1
2
2
RTN
18
BOOT
PR245
2.2_0603_1%~D
+VCCSA_BT 1
2
PQ36
AO4406AL_SO8~D
GND
GNDA_VCCSA
19
VCC
2
5
6
7
8
2
GNDA_VCCSA
2
PC248
0.1U_0603_25V7K~D
1
PVCC
1
PGND
4
5
6
7
8
3
GNDA_VCCSA
LGATE
2
C
20
2
2
1
PC251
0.1U_0402_10V7K~D
+VCCSA_VCC
PC252
1U_0603_10V6K~D
+VCCSA_LGATE
PR244
2.2_0805_5%~D
1
PC247
10U_1206_25V6M~D
2
PC250
1U_0603_10V6K~D
1
2
PU13
1
PC246
10U_1206_25V6M~D
+5V_RUN
1
PAD-OPEN 43X118
+VCCSA_VO
2
1
12.7K_0402_1%~D
B
1
@ PR263
10K_0402_5%~D
PR265
1
+GND_VCC_SA
11
2
2
0_0402_5%~D
1
PR266
1K_0402_5%~D
VCCSAPWROK
* connect to U50 Pin 2 (Vih = & gt; 2.31V)
2
1
@ PR267
4.12K_0402_1%~D
GNDA_VCCSA
A
A
PJP37
2
1
PAD-OPEN1x1m
VCCSA_VID_1
PJP38
+VCCSA_P
1
2
+VCC_SA
0.9V
0
0.8V
1
DELL CONFIDENTIAL/PROPRIETARY
GNDA_VCCSA
Compal Electronics, Inc.
PAD-OPEN 4x4m
Title
output voltage adjustable network
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R & D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ISL95870A 0.8V_VCC_SA
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
55
of
66
5
4
1
@ PR473
1
1
PR302
2
PDS5100H-13_POWERDI5-3~D
PQ46
1
D
S
2
D
S
3
D
S
4
D
G
1
PR314
PR289
499K_0402_1%~D
1
2
DEFAULT_OVRDE
41
0_0402_5%~D
@
41,46
0_0402_5%~D
2
0_0402_5%~D
54 DC_BLOCK_GC
ACAV_IN
1
PR318
+3.3V_ALW2
1
PR319
2
0_0402_5%~D
TP
1
36
35
34
33
32
31
30
29
28
P50ALW
PBATT_OFF
DK_AC_OFF_EN
ACAV_IN_NB
GND
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
PC272
1500P_0402_7K~D
PC275
0.1U_0402_25V4Z~D
2
1
PC274
0.047U_0603_25V7K~D
2
1
ERC3
ERC2
CSS_GC
DK_CSS_GC
1
1
2
0_0402_5%~D
40,42,46
PC273
0.1U_0603_25V7K~D
2
1
DOCK_SMB_ALERT#
2
2
3
3
1
1
54
54
@
+5V_ALW
2
0_0402_5%~D
1
PR309
CD_PBATT_OFF 1
PR311
27
26
25
24
23
22
21
20
19
2
0_0402_5%~D
SLICE_BAT_ON
41
1
PR313
2
0_0402_5%~D
DOCK_AC_OFF
40,41
DK_AC_OFF
1
2 3301_ACAV_IN_NB
ACAV_IN_NB
0_0402_5%~D
1
2
PR317
0_0402_5%~D
BLKNG_MOSFET_GC
1
PR316
DK_AC_OFF_EN
SL_BAT_PRES#
1
PR320
1
PR322
2
0_0402_5%~D
2
0_0402_5%~D
SLICE_BAT_PRES#
41,42,54
DOCK_AC_OFF_EC
2
1M_0402_5%~D
PR315
41
40,41,46
+NBDOCK_DC_IN_SS
CD3301RHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
2
0_0402_5%~D
DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2
PQ51
FDN338P_G_NL_SOT23-3~D
PR321
SLICE_BAT_PRES#
1
2
ERC1
3
4
5
6
7
ACAVIN
8
P33ALW2 9
37
2
1
PD28
2
RB751V-40GTE-17_SOD323~D
1
RB751V-40GTE-17_SOD323~D
PD29
0,41,46
2
A
B
@ PR306
0_0402_5%~D
CHGVR_DCIN
DC_IN_SS
DK_PWRBAR
1
2ACAVDK_SRC
CD3301_SDC_IN
22,42,54
A
P33ALW
1
PR324
2
+3.3V_ALW
0_0402_5%~D
EN_DK_PWRBAR
1
PR325
2
0_0402_5%~D
EN_DOCK_PWR_BAR
1
STSTART_DCBLOCK_GC
41
DELL CONFIDENTIAL/PROPRIETARY
2
1M_0402_5%~D
@ PR326
Compal Electronics, Inc.
Title
3301_PWRSRC
1
PR327
2
0_0402_5%~D
+PWR_SRC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Selector
4
3
2
Size
Document Number
Date:
5
PC268
0.1U_0603_25V7K~D
2
1
C
PR323
P50ALW
NC
CHARGERVR_DCIN
DC_IN_SS
DK_PWRBAR
GND
NC
BLK_MOSFET_GC
DSCHRG_MOSFET_GC
PBatt+
+SDC_IN
PC263
0.47U_0805_25V7K~D
PR292
499K_0402_1%~D
2
1
1
2
PC270
0.22U_0603_25V7K~D
PD23
RB751V-40GTE-17_SOD323~D
2
1
2
100K_0402_5%~D
PR312
+PWR_SRC
PC267
2200P_0402_50V7K~D
2
1
PBATT_IN_SS
2
0_0402_5%~D
PU14
1
1
1
3
PR301
0_0402_5%~D
CSS_GC
DK_CSS_GC
ERC3
ERC2
GND
PWR_SRC
SS_DCBLK_GC
EN_DK_PWRBAR
P33ALW
PR310
2
2
1
1
PR305
46 SOFT_START_GC
2
40 ACAV_DOCK_SRC#
2
1
PD20
2
100K_0402_5%~D
2
PR472
0_0402_5%~D
2
MODULE_BATT_PRES#
2
0_0402_5%~D
2
0_0402_5%~D
CD3301_DCIN
0.1U_0603_50V4Z~D
1
PR269
0_0402_5%~D
2
1
PR299
+DOCK_PWR_BAR
2
47_0805_5%~D
PC271
+3.3V_ALW2
D
PR268
330K_0402_5%~D
2
PBAT_PRES#
54 +CHGR_DC_IN
1
PR307
FDS6679AZ_G_SO8~D
PBATT+
+DC_IN_SS
+DC_IN
1
2
3
4
PD21
RB751V-40GTE-17_SOD323~D
2
1
2
1
41
MPBATT+
PR471
510K_0402_5%~D
2
1
4
3
1
2
RB751V-40GTE-17_SOD323~D
PD27
5
1
S
S
S
G
1
1
2
PD19
RB751V-40GTE-17_SOD323~D
2
1
D
D
D
D
FDS6679AZ_G_SO8~D
2
MODULE_ON
+DOCK_PWR_BAR
PD18
RB751V-40GTE-17_SOD323~D
2
1
6
2
3
2
0_0402_5%~D
4
PD26
RB751V-40GTE-17_SOD323~D
1
2
SLICE_BAT_PRES#
4
390K_0402_5%~D
1
PR291
2
1
6
PR296
PD25
0_0402_5%~D
RB751V-40GTE-17_SOD323~D
2
1
1
2
1
40,41,46
PR287
1 5
PQ37
8
7
6
5
FDS6679AZ_G_SO8~D
1
3
1
6
1
2
RB751V-40GTE-17_SOD323~D
PD22
1
41,46
@
B
PR298
0_0402_5%~D
1
2 4
PR288
499K_0402_1%~D
2
1
1
2
2N7002DW-T/R7_SOT363-6~D
PQ50B
2
0_0402_5%~D
PQ54A
2N7002DW-T/R7_SOT363-6~D
1
PR294
41 DEFAULT_OVRDE
5
PQ54B
2N7002DW-T/R7_SOT363-6~D
RB751V-40GTE-17_SOD323~D
41 SLICE_BAT_ON
3
3
4
PBATT+
1
PD24
RB751V-40GTE-17_SOD323~D
1
2
2
1
PR285
0_0402_5%~D
2
PD31
PR290
200K_0402_1%~D
6
2
1
CHARGE_EN
2
2
ES2AA-13-F SMA
PD16
2
1
PR275
499K_0402_1%~D
2
1
4
PR282
620K_0402_5%~D
2
1
PR281
390K_0402_5%~D
2
1
2
PC266
0.1U_0603_25V7K~D
2
1
4
2
1
PR286
10K_0402_5%~D
6
1
1
RB751V-40GTE-17_SOD323~D
PR355
1
2
0_0402_5%~D
MPBATT_IN_SS
PR284
33_0603_5%~D
1
2
2N7002DW-T/R7_SOT363-6~D
PQ50A
2
PDS5100H-13_POWERDI5-3~D
PQ41
1
D
S
2
D
S
3
D
S
4
D
G
8
7
6
5
8
7
6
5
PQ49B
PD30
2
2N7002DW-T/R7_SOT363-6~D
PQ48B
5
PR280
20K_0402_1%~D
PQ48A
2N7002DW-T/R7_SOT363-6~D
2
PQ47B
PQ47B
2N7002DW-T/R7_SOT363-6~D
2
0_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ47A
PQ47A
1
PR293
1
3
2
PR274
33_0603_5%~D
1
2
PQ45
FDS6679AZ_G_SO8~D
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
2N7002DW-T/R7_SOT363-6~D
PR297
20K_0402_1%~D
PQ49A
41 CHARGE_PBATT
1
FDS6679AZ_G_SO8~D
PQ40
PBATT+
PQ44
SI4835DDY-T1-GE3_SO8~D
1
8
2
7
3
6
5
5
2N7002DW-T/R7_SOT363-6~D
C
PR283
330K_0402_5%~D
8
7
6
5
D
D
D
D
PR278
330K_0402_5%~D
+VCHGR
PR279
100K_0402_5%~D
1
2
PR276
390K_0402_5%~D
2
1
3
PR273
10K_0402_5%~D
6
1
2
2
0_0402_5%~D
S
S
S
G
STSTART_DCBLOCK_GC
1
PR277
5
1
2
3
4
PC265
0.22U_0603_25V7K~D
PR272
620K_0402_5%~D
2
1
4
PR271
390K_0402_5%~D
2
1
MPBATT+
PQ42A
2N7002DW-T/R7_SOT363-6~D
41 CHARGE_MODULE_BATT
1
PD17
PQ42B
2N7002DW-T/R7_SOT363-6~D
D
2
2
1
PR270
100K_0402_5%~D
1
2
PC264
0.1U_0603_25V7K~D
2
1
+VCHGR
3
PQ39
SI4835DDY-T1-GE3_SO8~D
1
8
2
7
3
6
5
Monday, January 10, 2011
Rev
1.0
LA-6591
Sheet
1
56
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item P age#
T itle
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
Delete PR264
D
D
Delete VCCSA_VID_0 net
Connect VCCSA_VID_1 net to PIN5
Depop PR249, PR267 and PR260
1
55
VCCSA
6/30
Intersil
VCCSA spike issue
Change PR261 and PR260 to 0 Ohm (SD02800008L) from 24.9k (SD03424918L)
X01
Change PR259 to 47.5k (SD03447528L) from 274k (SD03427438L)
Change PR256 to 140k (SD03414038L) from 0 Ohm (SD02800008L)
Change PR250 to 113k () from 34k (SD03434028L)
Add pull down PR295 10k(SD02810028L)
2
55
VCCSA
6/30
Intel
Change VCCSA VID pull down resistor value
Change PR295 and PR266 to 1k (SD02810018L) from 10k (SD02810028L)
X01
3
47
3V/5V
7/15
Compal
3V/5V Bulk cap interfere with ME
Change PC33 and PC38 to 330U/25m/H1.9(SGA00001A8L) from 330U/25m/H2.8
(SGA1933131L)
X01
4
48
+1.5V_SUS
7/15
Compal
Vendor will not support this part
Change PC609 and PC608 to 330U/9m/2V (SGA20331E0L) from 330U/9m/2.5V
(SGA19331D1L)
X01
5
46
DCIN
7/15
Compal
PL1 current rating is not enough for 9cell
(3.0Ah 1C) discharge current
6
47
3V/5V
7/16
Compal
+3.3V phase node over Mosfet Vds rating
Change PQ6 AO4466L (SB00000CG8L) from SI4128DY (SB00000IR0L)
Change PQ8 AO4712L (SB00000AJ1L) from SI4134DY(SB00000KB0L)
X01
7
47
3V/5V
7/16
Compal
PC24 down size to 0603 from 0805
Change PC24 to 4.7u/6.3V/0603 (SE107475K8L) from 4.7u/6.3V/0805 (SE093475K8L)
X01
8
47
3V/5V
7/16
Compal
10u/1206/X5R/25V will COS
Change PC16,PC17,PC18,PC21,PC22 and PC23 to 10u/0805/X5R (SE00000QK00) from 10u/1206/X5R
(SE142106M8L)
X01
Change +0.8V_VCC net name to +VCCSA_P
Change 0.8V_VCCPWROK net name to VCCSAPWROK
Change +0.8V_VCC_SA net name to +VCC_SA
X01
Add PR611 0402 resister pad on EN pin
X01
C
C
Compal
VCCSA output voltage is not constant so
change some net name
1.5V_SUS
7/16
Richtek
Reserve Pull down resister on EN pin for
power consumption issue
54
Charger
7/18
Compal
PQ27 body diode can handle surge current
when adapter plug in so depop PD14
Depop PD14 SBR3A40SA (SC100003J00)
X01
56
Selector
7/18
Compal
Leakage issue on PD16
Change PD16 to ES2AA (SC100005A0L) from SBR3A40SA (SC100003J00)
X01
55
10
48
11
12
VCCSA
B
52,53
AXG_Core
7/20
MAXIM
Depop one phase for AXG_core
A
14
X01
Add PL22 FBMJ4516HS720NT(SM010009C8L)
7/16
9
13
Change PL1 to FBMJ4516HS720NT(SM010009C8L) from FBMA-L18-453215-900LMA90T (SM01002078L)
54
Axg_core
Vcore
7/20
MAXIM
Change PR202 to 1.43k (SD03414318L) from 5.49k (SD03454918L)
Change PR203 to 2.1k (SD03421018L) from 2.49k (SD03424918L)
Change PC208 to 0.33u/10V/X7R (SE080334K8L) from 0.22u/16V/X7R (SE026224K8L)
Change PR201 to 40.2k (SD03440228L) from 10K (SD03410028L)
Depop PR204,PR190,PR196,PC206,PR197,PL14,PR181,PR186,PR190,PC191,PR187,PQ21,PQ22,PC184,PC183,
PC182,PC181,PC403,PC185,PR179,PC188,PU10,PC186
Pop PR198 and PR199 0 Ohm (SD02800008L)
Change PR157 to 8.66k (SD03486618L) from 13.3K (SD03413328L)
Pop PQ60 AON6414L (SB00000NW00)
Pop PQ26 AON6704 (SB00000I90L)
Change PL15 to 0.36u (SH00000HQ0L) from 0.56u (SH00000I20L)
B
X01
A
Reserve 0402 cap pad for transient fine tune Add PC701 and PC702 0402 cap pad
X01
Compal Electronics, Inc.
Title
PWR_PIR
Size
Document Number
Date:
Monday, January 10, 2011
Rev
1.0
LA-6591
5
4
3
2
Sheet
1
57
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item P age#
D
15
54
T itle
D ate
Charger
7/20
R equest
O w ner
Compal
16
55
VCCSA
7/20
Compal
17
52
Vcore
VAXG_core
7/24
MAXIM
Vcore
VAXG_core
7/24
MAXIM
18
C
19
20
21
22
52,53
54
Charger
7/28
52,53
Vcore
VAXG_core
7/28
Compal
56
Selector
9/2
Compal
46
+DCIN
9/2
TI
Compal
Issue D escription
Reserve adapter protection circuit
for turbo mode
Solution D escription
R ev.
Change PU11 pin1 net name to ICREF from GNDA_CHG
Change PU11 pin26 net name to ICOUT from VCC
Reserve PR801,PR802,PR803,PR804,PR805,PR806,PR807,PR808,PR809,PR810,PR811,PR812
Reserve PC801,PC802,PC803
D
X01
VCCSA phase node over Mosfet Vds rating
Change PQ35 AO4466L (SB00000CG8L) from SI4128DY (SB00000IR0L)
Change PQ36 AO4712L (SB00000AJ1L) from SI4172DY(SB00000HN0L)
X01
Fine tune OCP setting for Pass 2 IC
Change
Change
Change
Change
X01
PR127
PR135
PR126
PR134
to
to
to
to
165K
105K
169K
127K
(SD03416530L)
(SD03410538L)
(SD03416938L)
(SD034127380)
from
from
from
from
100K
150K
127K
100K
(SD03410038L)
(SD03415038L)
(SD034127380)
(SD03410038L)
Phase node switching waveform abnormal issue Change PR118 to 1 Ohm (SD014100B8L) from 2 Ohm
for Pass 2 IC
Change PR119 to 1 Ohm (SD014100B8L) from 2 Ohm
X01
Pop adapter protection componment for
turbo mode with TI solution
Pop
Pop
Pop
Pop
Pop
Pop
Pop
Fine tune load line and transient for
Vcore and VAXG_core
Change PR140 to 12k (SD03412020L) from 12.4k (SD00000AJ8L)
Change PR157 to 8.25k (SD03482518L) from 8.66K(SD03486618L)
Pop PC701 and PC702 0.033uF (SE076333K8L)
X01
Change PQ51 FDN338P_G (SB90338001L) from FDN338P (SB90338008L)
Change PD18, PD19, PD21, PD22, PD23, PD24, PD25, PD26, PD27, PD28, PD29, PD30 and PD31
RB751V-40GTE-17 (SCS00004L0L) from RB751V (SC1B751V08L)
Change PQ37, PQ40, PQ41, PQ45 and PQ46 FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L)
X02
Change parts to HF parts
Change parts to HF parts
PR803
PR804
PR802
PR801
PQ801
PR812
PC801
(SD013200B8L)
(SD013200B8L)
Change
Change
Change
Change
Change
PD6
PQ1
PQ4
PD1
PQ2
100k (SD03410038L)
46.4k (SD000009R8L)
110k (SD03411038L)
1.87M (SD00000WN0L)
RHU002N06 (SB50206008L)
100K (SD02810038L)
100P (SE071101J8L)
X01
DA204UGT106 (SC60000170L) from DA204UT106 (SC1A204U00L)
FDN338P_G (SB90338001L) from FDN338P (SB90338008L)
FDS6679AZ_G (SB000009D1L) from FDS6679AZ (SB000009D8L)
RB715FGT106 (SCSB715F010) from RB715F (SCSB715F08L)
FDV301N_G (SB503010020) from FDV301N (SB50301008L)
C
X02
B
B
23
47
+5V/3.3
/+15VALW
9/2
Compal
Change parts to HF parts
Change PQ5 FDS8878_G (SB00000BV1L) from FDS8878 (SB00000BV8L)
X02
24
54
Charger
9/2
Compal
Change parts to HF parts
Change PQ33 SI4812BDY-T1-GE3 (SB00000DI1L) from SI4812BDY-T1-E3 (SB00000DI0L)
Change PL17 FDVE1040-H-5R6M=P3 (SH00000CH1L)from FDVE1040-5R6M=P3 (SH00000CH0L)
Change PQ27 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L)
X02
25
48
+1.5V_SUS
9/2
Compal
Change parts to HF parts
Change PL602 FDUE1040D-H-1R0M=P3 (SH000009U1L) from FDUE1040D-1R0M=P3 (SH000009U0L)
X02
Fine tune OCP setting for +5V/+3.3V
Change PR29 to 274K (SD03427438L) from 220K (SD03422038L)
Change PR30 to 348K (SD00000WW8L) from 243K (SD03424338L)
X02
Compal
Change parts to HF parts
Change PQ39 and PQ44 SI4835DDY-T1-GE3 (SB00000FF1L) from SI4835DDY-T1-E3 (SB00000FF0L)
X02
Compal
Fine tune adapter protection circuit for
2nd source and reserve H_PROCHOT#
Delete PQ802 and PR807
MAX8731_IINP singal connect change to inverting input from Non-inverting
ICREF singal connect change to Non-inverting input from inverting input
Pop PR811 and PR813 0 Ohm (SD02800008L)
Depop PR814
X02
26
47
27
56
+5V/3.3
/+15VALW
Selector
9/2
9/13
TI
A
28
54
charger
9/13
input
A
Compal Electronics, Inc.
Title
PWR_PIR
Size
Document Number
Date:
Monday, January 10, 2011
Rev
1.0
LA-6591
5
4
3
2
Sheet
1
58
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item P age#
T itle
D ate
R equest
O w ner
29
50
+1.05VM
9/14
TI
30
46
DCIN
9/16
31
50
+1.05VM
32
51
33
55
Issue D escription
Solution D escription
R ev.
Fine tune OCP setting
Change PR83 to 10k (SD03410028L) from 57.6k (SD03457628L)
X02
Compal
6 ~ 7mA leakage current in slice
Change PR2 and PR504 to 100K (SD02810038L) from 10K (SD03410028L)
X02
10/14
Compal
22u/1206/6.3V COS issue
Change PC98 ~ PC105 to 22u/0805 (SE00000110L) from 22u/1206 (SE077226M8L)
X03
+1.05VTT
10/14
Compal
22u/1206/6.3V COS issue
Change PC123 ~ PC125, PC121, PC127, PC120, PC129 and PC130 to 22u/0805 (SE00000110L)
from 22u/1206 (SE077226M8L)
Change PC122 and PC126 to 47u/0805 (SE00000G60L) from 22u/1206 (SE077226M8L)
X03
VCCSA
10/14
Compal
Fine tune VCCSA OCP setting for 2nd and
3rd source choke
Change PR247 and PR262 to 12.7k (SD03412728L) from 11.5k (SD03411528L)
X03
Vcore
VAXG_core
10/25
Compal
D
D
34
52,53
Change PR140 to 11.5k (SD03411528L) from 12k (SD03412020L)
Fine tune Vcore and VAXG_core load line and
Change PR157 to 7.68k (SD00000238L) from 8.25k (SD03482518L)
transient for pass3 sample
Change PC702 to 0.022u (SE075223K8L) from 0.033uF (SE076333K8L)
Pop PC207 0.1U (SE076104K8L)
X03
35
56
Selector
10/27
Compal
Fine tune main and media battery switching
to slice battery transient time
36
56
Charger
11/01
Compal
Change adapter protection circuit
Change PR802 to 95.3k (SD03495328L) from 73.2K (SD00000B18L)
trip point. (Adapter rated current + 0.75A) Change PR801 to 649K (SD03464938L) from 1.87M (SD00000WN0L)
37
56
Charger
11/01
Compal
Change adapter protection event
to HW from SW
Pop PR814 0 Ohm (SD02800008L)
Depop PR813 0 Ohm (SD02800008L)
Depop PR812 100k Ohm (SD02810038L)
X03
38
56
Charger
12/21
Compal
H_PROCHOT# can not pull high issue with
external circuit at DC mode
Change PR803.1 net nam to +3.3V_ALW2 from MAX8731_REF
Change PQ801.3, PR804.1 and PC801.2 net nam to PGND from GAND_CHG
A00
X03
Change PC270 and PC265 to 0.22uF (SE000005Z8L) from 1uF (SE00000698L)
C
C
39
56
Charger
12/21
Compal
H_PROCHOT# pull low level can not meet
Intel SPEC with TI solution at AC mode
B
40
53
VAXG_core
12/21
Compal
41
56
Charger
12/30
TI
42
56
Charger
01/07
COMPAL
43
56
Charger
01/07
COMPAL
X03
Depop PR801 (SD03464938L)
Change PR802 to 150k (SD03415038L) from 95.3k (SD03495328L)
Change PR803 to 150k (SD03415038L) from 100k (SD03410038L)
Change PR804 to 68.1k (SD03468128L) from 46.4K (SD000009R8L)
Pop PR806, PR807,PR810 0 Ohm (SD02800008L)
Pop PQ802 RHU002N06 (SB50206008L)
Pop PR809 221K (SD00000HX8L)
Pop PR808 1.8M (SD00000K180)
Pop PR805 20K (SD03420028L)
Depop PR811 (SD02800008L)
A00
B
Fine tune GFX load line
for 2nd source choke
Change PR157 to 7.5k (SD03475018L) from 7.68k (SD00000238L)
A00
H_PROCHOT# spike voltage issue
when AC to DC transient
Pop PR208 10k (SD02810028L)
A00
Adapter protection trip point for 2nd source Change PR804 to 66.5k (SD03466528L) from 68.1k (SD03468128L)
Change parts for HF
Change PQ801 and PQ802
A00
to 2N7002W (SB57002040L) from RHU002N06 (SB50206008L)
A00
A
A
Compal Electronics, Inc.
Title
PWR_PIR
Size
Document Number
Date:
Monday, January 10, 2011
Rev
1.0
LA-6591
5
4
3
2
Sheet
1
59
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item Page#
D
Title
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
1
7
HW
6/15/2010
COMPAL
Boot issue
Change QC1 control from SUS_ON to RUN_ON_CPU1.5VS3#
2
11
HW
6/15/2010
COMPAL
Modify net name
Change +0.8V_VCC_SA to +VCC_SA
X01
3
HW
6/15/2010
COMPAL
Follow PPM recommendation to change
material
Change capacitors from 10uF_0805_10V Y5V to 10uF_0805_6.3V_X5R:
C305,C316,C387,C462,C705,C728,C760,C764,C765,C768,C769,
C772,CC135,CH58,CH73,CH80
Change capacitors from 10uF_0805_6.3V to 10uF_0603_6.3V:
C475,C638,C641,C643
Change resistors to 0402 size: RC134, RH201,RH253,RH208,RH213
Delete RH192 and add PJP51
X01
4
14
HW
6/15/2010
COMPAL
De-pop PCH XDP
De-pop RH1,RH3~RH10,RH12~RH21,RH24,RH283~RH285,CH1
X01
5
14
HW
6/15/2010
COMPAL
Change HDA_SYNC topology
Add QH7 and RH37
X01
6
17,29,42
HW
6/15/2010
COMPAL
Change ODD connector from 13 pin to 31 pin
Change ODD connector to 31 pin, add @R1189,RH340 and remove
C1169,C1170,U87,U88,U89, and connect ODD_DET# to U51.B36
C
C
C1168,
X01
7
18
HW
6/17/2010
COMPAL
Remove touch screen PAID pull down circuit
Remove RH241
X01
8
18
HW
6/17/2010
COMPAL
Follow Intel Design Guide Rev1.0
Change RH149 to 1k and RH150 to 4.7k
X01
9
22
HW
6/17/2010
COMPAL
Change EMC4002 to EMC4022
Change U9 to EMC4022, remove R866,R404,C279
X01
10
26
HW
6/17/2010
COMPAL
For Safety request
Add no stuff D4 and co-lay with F2, change F2 to 2A_8V
X01
X01
X01
11
HW
28, 39
6/17/2010
COMPAL
Change SATA repeater to MAX4951BE
Chagne U25, U44 to MAX4591BE and change R1169,R1171,R1174,R1176 to 0
ohm and stuff R1174,R1176
Change JSPK1 to TYCO_1734595-6 and change U72 to ZB version and stuff
C962
12
30
HW
6/17/2010
COMPAL
Change Codec to ZB version and speaker
connector
13
33
HW
6/17/2010
COMPAL
Add Jumper for power consumption measurement Add PJP52,PJP55
X01
14
33
HW
6/17/2010
COMPAL
Change SI2301BDS to C version
Change Q36 to SI2301CDS
X01
15
33
HW
6/17/2010
BRCOM
Change RFID capacitors for more popular
Change C502,C505 from 1uF to 0.1uF
X01
16
35
HW
6/17/2010
COMPAL
Link R677 to CIS and modify JSD1 connection
Link R677 to CIS to have the correct part number and swap SD/MMCCD#
from JSD1 pin16 to pin17, SDWP from JSD1 pin17 to pin 18
X01
17
37
HW
6/17/2010
COMPAL
Change express card power SW to
TPS2231MRGPR-2
Change U41 to TPS2231MRGPR-2 and remove C636,C639
X01
18
B
41
HW
6/17/2010
COMPAL
Add pull down on SLICE_BAT_ON
Add R791
X01
HW
6/18/2010
COMPAL
EOL concern
Change CC176 to SGA00005H0L, change YH1,Y6 to SJ132P7KW1L
X01
HW
6/18/2010
COMPAL
Change JKB1 to same as JSC1
X01
19
A
D
X01
20
11,14,42
43
Change connector
B
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (1/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
60
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item Page#
D
Title
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
21
43
HW
6/18/2010
COMPAL
Change TP pin definition
Reverse TP pin definition for PT
22
14
HW
6/18/2010
COMPAL
Add RTC PAID function
Add RTC_DET# and RH355 on PCH GPIO33
X01
23
41,42
HW
6/18/2010
COMPAL
Add series resistor and pull up resistors
on MIC_MUTE#, VOL_MUTE,VOL_UP,VOL_DOWN
Add R773,R806,R884,R886,R887,R1166,R1167,R1184
X01
24
24,45
HW
6/18/2010
COMPAL
Correct net name for LED signal
Modify signal name BREATH_BLUE_LED to BREATH_WHITE_LED and
BREATH_BLUE_LED_SNIFF to BREATH_WHITE_LED_SNIFF
X01
25
41
HW
6/18/2010
COMPAL
Correct net name
Modify R1132.2 from SUSACK#_R to SUSACK#_EC
X01
26
32
HW
6/21/2010
INTEL
Remove useless resistors
Remove R556, R558, R559, R560 and short the pin1 and pin2 together
X01
27
14
HW
6/22/2010
COMPAL
Modify BOM Structure
Correct RH45 BOM structure
X01
28
24,28,29,
32,37,44
HW
6/22/2010
COMPAL
Change part for Halogen free
Change Q18,Q27,Q30,Q34,Q38,Q40,Q42,Q49,Q54,Q58 to HF part
X01
31
44
HW
6/23/2010
COMPAL
Solution +1.5V_RUN voltage drop issue
Change Q59 from SI3456BDV to NTGS4141NT1G
X01
32
41
HW
6/23/2010
COMPAL
Remove double pull high resistor
Remove R1177
D
X01
X01
C
C
33
29
HW
6/23/2010
COMPAL
Remove useless resistor
Remove R1125,R1126
X01
34
44
HW
6/25/2010
COMPAL
NTMS4107NR2G EOL
Change Q55 to
X01
35
10
HW
6/25/2010
COMPAL
CC129~CC134 D2T LESR5M EOL
Change CC129~CC134 to SGA00004X0L
X01
36
24
HW
6/25/2010
COMPAL
Change LVDS connector to 40 pin
Change JLVDS1 to 40 pin
X01
37
31
HW
6/25/2010
COMPAL
Change I/O connector to TYCO
Change JIO1 vendor from Lotes to TYCO
X01
38
24
HW
6/25/2010
COMPAL
PT panel change touch screen pin definition
Change JTS1 pin definition for new TS pin define
X01
39
14,29,
36,42
HW
7/1/2010
COMPAL
Modify Module Bay circuit
1.Remove R1181,R1182,R1189. 2.Change BAY_SMBUS, DEVICE_DET# pull up
power rail from +3.3V_RUN to +3.3V_ALW. 3.Change net name ODD_DET# to
PCH_SATA_MOD_EN#. 4.Add Q123,Q76,R513,R514,R515 for USB_SMI# circuit.
5.De-pop C627,R712
X01
40
7
HW
COMPAL
For support XDP device
De-pop RC9
X01
41
15,18,
41,42
HW
COMPAL
Base on GPIO map to modify
1. Move SLP_ME_CSW_DEV# from GPIO45 to GPIO28, add MCARD_PCIE_SATA# on
5028 GPIOE3. 2. Remove RH238. 3. Change SLICE_BAT_PRES# pull up power
rail from +3.3V_ALW2 to +3.3V_ALW. 4. Add R889
X01
42
24
HW
7/1/2010
COMPAL
PWM function
Remove R1139,R1140 and add D68,D69
X01
43
11
HW
7/1/2010
COMPAL
VCCSA VID circuit
Change VCCSA_VID_0 to VCCSA_VID_1 and pop RC138
X01
NTMS4920NR2G
B
A
B
7/1/2010
7/1/2010
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (2/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
61
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item Page#
D
Title
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
44
36,45
HW
7/2/2010
COMPAL
Modify LED circuit
Remove R1578,R1579,R1580,D42,D60,D61, add Q77,Q124,R705,R718,R719
45
22
HW
7/2/2010
COMPAL
Modify thermal diode for thermal request
Remove C268,C269,use DP1/DN1 for CPU,DP3/DN3 for DIMM,DN5/DP5 for WWAM
X01
46
15,32
HW
7/5/2010
COMPAL
EOL concern
Change Y3 and YH2 from 1Y725000CE1A to 7A25000110
47
11,24,
27,45
HW
7/7/2010
COMPAL
Change part for Halogen free part
Change QC5 to NTR4501NT1G, U21,U24,U54,U55,U57
NC7SZ04P5X-G, Q21 change to FDC654P-G
X01
change to
X01
48
29
HW
7/7/2010
COMPAL
USB30 SMI circuit
Stuff R513 due to this pin is OD type on USB30 module
X01
49
29
HW
7/8/2010
COMPAL
Link CIS symbol
Link JSATA2 CIS symbol
X01
50
35
HW
7/9/2010
O2-Mirco
Add discharge circuit for +3.3V_RUN_CARD
Add R826 on +3.3V_RUN_CARD
X01
Move C408,C409,C460,C461,C567,C568,C596,C597,C598,C599,C617,C618,
C647,C648 to page 15 to close to PCH
X01
51
15,29,32,
35,36,37
HW
7/9/2010
COMPAL
Move PCIE TX AC coupling capacitors close
to PCH
52
14
HW
7/12/2010
COMPAL
To solve SPI EA
Add R933,R935 on SPI chip select signals
X01
53
24
HW
7/12/2010
COMPAL
Link CIS symbol
Link JLVDS1
X01
54
C
D
X01
28
HW
7/12/2010
COMPAL
Meet EA result
Stuff R493,R494
X01
EMI request to solve EMI issue
Add R678,C757,L92,L93, and stuff L51,L52,L90, de-pop
R736~R739,R1150,R1151, and remove R1106
X01
Remove Mic mute function and LED
Remove R773,R806, R1108,R1161, Q105 and delete MIC_MUTE# signal
X01
55
24,30,35,
38,39
EMI
7/12/2010
COMPAL
56
31,41,45
HW
7/13/2010
Dell
57
28
HW
7/13/2010
COMPAL
Follow EA result
De-pop R493,R494 and pop R495,R496
58
29
HW
7/13/2010
COMPAL
Modify zero ODD circuit
Change ZODD_WAKE#,MODC_EN#,MOD_SATA_PCIE#_DET,USB30_EN connection
59
33
HW
7/14/2010
COMPAL
Change power rail for smart card
Change R632,R635 pull up power rail from +3.3V_ALW to +3.3V_ALW_SC
X01
60
22
HW
7/14/2010
COMPAL
Reserve capacitor for WWAN thermal diode
Add @C277
X01
61
14,17,18
HW
7/14/2010
COMPAL
To solve back drive issue
Move SIO_EXT_SMI# from PCH GPIO1 to GPIO14, remove RH254, and change
RH164 pull up power rail from +3.3V_RUN to +3.3V_ALW_PCH
X01
62
45
HW
7/14/2010
COMPAL
Remove CLIP
Remove CLIP3~CLIP8
X01
63
38,39
HW
7/15/2010
COMPAL
Remove one TPS2560 for cost saving
Remove U43,C659,C660,R740,PJP6, and share with power source of U45
X01
64
31,41,45
HW
7/15/2010
COMPAL
Remove speaker LED
Remove Q119,Q102,R1109,R1059
X01
65
17,18
HW
7/15/2010
COMPAL
Add pull up for PCH GPIO1
Add RH41 and
change reference RH164 to RH41
X01
66
24,30,35
HW
7/16/2010
COMPAL
Change part reference for EMI request
Change L92 to LE92,L93 to LE93,R678 to RE678,CE757 to CE757
C
X01
X01
B
A
B
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (3/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
62
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item Page#
D
Title
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
67
20,44
HW
7/16/2010
COMPAL
For cost saving
Add PJP57,RH202, no stuff QH4,Q49,RH278,R908
68
22
HW
7/16/2010
COMPAL
Modify current sense connection
Move MAX8731_IINP from U9.25 to U9.31
69
41,42
HW
7/16/2010
DELL
Follow GPIO 0713
Add DYN_TURB_PWR_ALRT#, DYN_TUR_CURRNT_SET#, and change R796 pull
up power rail from +3.3V_RUN to +3.3V_ALW
X01
70
35
HW
7/16/2010
COMPAL
Follow vendor request
De-pop RE678,CE757
X01
71
28,45
HW
7/19/2010
COMPAL
Part leverage select
Change D16,D59,D62 to SC100000S0L
72
14
HW
7/19/2010
COMPAL
Follow Intel XDP design
Change RH43,RH44,RH45 to 200 ohm
73
38,39
HW
7/20/2010
DELL
Change power rail for layout limitation
Change U90,U91 power rail to +USB_SIDE_PWR,U92 power rail to
+SATA_SIDE_PWR
74
31
HW
7/20/2010
COMPAL
Change USB3(on IO/B) enable signal
Chnage USB3 enable signal from USB_SIDE_EN# to ESATA_USB_PWR_EN#
75
23
HW
7/20/2010
SMSC
Follow SMSC review result
Add R403
76
31
HW
7/20/2010
COMPAL
Change JIO1 for correct connector list
Change JIO1 to TYCO_2041300-2
77
26
HW
7/20/2010
Safety
Follow safety request
De-pop F2, pop D4 and add R5
78
17,30,40
HW
7/20/2010
Follow EMI request
Add RE1098,RE1100,RE1101,RE1102,CE573,CE574, change RH103,R756
to 33 ohm, C704 to 12pF
X01
79
14
HW
7/20/2010
COMPAL
Change SPI chip select damping R
Change R933,R935 to 47 ohm
X01
80
24,39
HW
7/20/2010
COMPAL
Change material for small size
Change C300,C669 from 1206 16V to 0805 10V
81
24
HW
7/20/2010
COMPAL
Change U86 power rail for touch screen
Change U86.4 power rail from +3.3V_RUN to +5V_RUN
82
38,39
HW
7/20/2010
COMPAL
Remove useless capacitors
Remove C1151~C1154
83
41
HW
7/20/2010
COMPAL
Follow GPIO map
Change R796 to 10k ohm
84
44
HW
7/20/2010
COMPAL
Change PJP57 footprint
Change PJP57 footprint to 4x4m
85
31
HW
7/21/2010
COMPAL
Modify HP & Mic circuit
Change JIO1 pin connection
86
36
HW
7/21/2010
COMPAL
Add 0 ohm R on PCIE_MCARD2_DET#
Add R725
87
40
HW
7/21/2010
COMPAL
Follow EA request
Change C704 to 6.8pF
88
35
HW
7/21/2010
COMPAL
Change JSD1 to support Memory Stick
Change R666,R667, change JSD1
D
X01
X01
X01
X01
X01
X01
C
EMI
C
X01
X01
X01
X01
X01
X01
B
B
X01
X01
X01
X01
X01
X01
89
31, 42
HW
7/22/2010
COMPAL
GPIO MAP update.
add R1590
X01
90
39
HW
7/22/2010
COMPAL
Follow Vender request.
add R1582~R1585
X01
91
39
HW
7/23/2010
COMPAL
To compatible with SN75LVCP601
Add R1586~R1589
X01
A
A
92
41
HW
7/23/2010
COMPAL
Add 0 ohm R on TEMP_ALERT# for backup
Add R1591
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (4/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
63
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
D ate
R equest
O w ner
HW
Item Page#
7/24/2010
COMPAL
Follow GPIO map to add touch screen power
down control circuit
Add TOUCH_SCREEN_PD#, Q125,Q32,R430,R431,C304,C306, and change JTCH1
pin 1,pin2 from +5V_RUN to +5V_TSP
Title
D
93
24,42
Issue D escription
Solution D escription
R ev.
D
X01
X01
94
24
HW
7/26/2010
COMPAL
Reserve a 0 ohm resistor for +5V_TSP
Add R1592
95
45
HW
7/26/2010
COMPAL
Add pull down 100k on BT_ACTIVE
Add R950
96
15
HW
7/26/2010
COMPAL
Add BOM structure for TCM
Use 4@ for RH311
97
37
HW
8/23/2010
COMPAL
Add connection for express card SW
Add connection of pin4,pin5,pin13 and pin 14
98
18
HW
8/23/2010
Intel
Follow Intel design guide Rev1.2
Change RH149 to 2.2k and RH150 to 0 ohm
99
10
HW
8/23/2010
COMPAL
For better return path
De-pop CC129,CC130 and pop CC133,CC134
X01
HW
8/23/2010
DELL
Remove PAID function of RTC and speaker
Change speaker connector to 4 pin and remove RTC_DET# and SPEAKER_DET#
X01
100
14,18,30
X01
X01
X01
X01
C
C
101
17
HW
8/26/2010
Intel
Follow Intel check list rev1.2
Add @RH332
X01
102
14,18
HW
8/26/2010
Intel
Follow Intel request
Add RH51 and RH356
X01
103
33
HW
8/27/2010
BRCOM
Follow BRCOM request
Change L39,L40 to rated current is 400mA
X01
104
26
HW
8/27/2010
Intel
Follow Intel design guide rev1.2
Remove R1164,D65, change R1128 to 20k,
X01
105
45
HW
8/27/2010
COMPAL
Follow ME request
Add H21
X01
106
16
HW
8/27/2010
COMPAL
Reserve pull down R for ME_SUS_PWR_ACK
Add @RH145
X01
107
36
HW
9/2/2010
COMPAL
De-pop ESD diode
De-pop U40
X01
108
11
HW
9/2/2010
COMPAL
Change QC5 VGS to 20V part
Change QC5 to SB00000HK0L
X01
109
26
HW
9/3/2010
COMPAL
Follow safety request
Pop F2 and de-pop R5
X01
110
24
HW
9/8/2010
COMPAL
Change RB751V to HF part
Change D63,D64,D68,D69 to SCS00004L0L
X01
111
30,31
HW
9/9/2010
IDT
To solve pop noise and detect issue
Add U6,Q33,Q46,D70,D71,R425,R33,R38,R424,R161,R352,R1088,C967,C307,C308
X01
112
35
HW
9/10/2010
O2
To solve RF noise issue
Add @C573,@C574,L45
X01
HW
9/14/2010
For EMI request
Change C973~C976 to 680pF and pop, add L91~L94, D72~D74, remove U90~U92
X01
O2
Modify circuit
Remove R661,R662, add L46,L47, change L45 to SM01000GG0L
X01
B
B
113
30,38,39
COMPAL
114
HW
9/14/2010
115
A
35
17,24,32,
41,43
HW
10/11/2010
DELL
Follow GPIO Map
Remove R771, add U15,C478, change LVDS_CBL_DET# to ATG_MAC_LCD_DET#,
TP_DET# to WLAN_LAN_DISB#
X02
116
24
HW
10/11/2010
DELL
Solve PWM leakage issue
Change R1137 to 10k
X02
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (5/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
64
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item Page#
D
Title
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
117
14
HW
10/11/2010
COMPAL
DG1.5 update
Add RH31
118
45
HW
10/11/2010
COMPAL
LED brightness test result
Change R957 to 1k, R955,R941,R949,R939,R934 to 4.7k
X02
X02
119
32
HW
10/11/2010
COMPAL
Solve LAN package lost problem
Change L30~L37 to 12nH
120
9
HW
10/11/2010
COMPAL
DG1.5 update
Depop RC96,RC97
121
30
HW
10/11/2010
COMPAL
Change codec to YA version
Change PN from SA00003ZZ1L to SA00003ZZ2L
122
31
HW
10/11/2010
DELL
Remove Latitude On button
Depop SW2
123
32
HW
10/11/2010
COMPAL
Change LAN to C0 stepping
Change PN from SA00003SI1L to SA00003SI2L
124
C
28
HW
10/14/2010
DELL
Support SSD
Add PJP64,C399,C402
125
38,39
HW
10/15/2010
COMPAL
For layout routing
Swap D72~D74 pin 2 and pin 3 for better USB routing
126
127
31
X02
X02
X02
X02
X02
HW
10/18/2010
IDT
Change GND reference
10/18/2010
COMPAL
Link CIS
X02
C
X02
Change Mic detect circuit DGND to AGND
HW
37,38,39
D
X02
Link CIS for L49,L51,L52,L90
X02
X02
128
30
HW
10/18/2010
COMPAL
Change Mic detect to external detect
Remove R161 and add C1164
129
14,18
HW
10/19/2010
COMPAL
Follow Intel debug port DG
Connect PCH_GPIO15 to PCH XDP
130
42
HW
10/19/2010
COMPAL
Change borad ID to X02
Change R875 to 62k
131
30,31
HW
10/21/2010
COMPAL
Modify Mic detect circuit
1. Add PJP65, 2. Change C307,C308 to 0402 size 3. Change C308
connection, 4. Change Mic detect power from +5V_ALW to +5V_RUN,
5. De-pop Q33,Q46,R424, 6. Move C1180 to +VREFOUT_R
132
18
HW
10/21/2010
COMPAL
Follow check list
133
9
HW
10/25/2010
COMPAL
Follow Intel DG
X02
X02
X02
Change RH177 to 10k
X02
De-pop RC120~RC123
X02
B
B
X02
134
14~21
HW
10/28/2010
COMPAL
Change PCH stepping
Change UH4 to B2 stepping
135
15
HW
11/5/2010
COMPAL
To fix ME issue
De-pop RH296,RH297, pop QH5,RH302,RH303
136
25
HW
11/9/2010
COMPAL
To fix VGA SW EOS issue
Change C317,C318 to 0.01uF
137
37
HW
11/16/2010
COMPAL
To fix soldering issue
Change express card connector JEXP1 to TAISOL 5-421005002000-9
X02
138
28
HW
11/17/2010
Intel
Follow CRB design
Change R501,R502 to 10k
X02
139
12,13
HW
11/18/2010
COMPAL
Follow part reference design rule
Change JDIMMA1 & JDIMMB1 to JDIMM1 & JDIMM2
X02
140
28,44
HW
11/19/2010
COMPAL
For cost saving
De-pop R499,R500,C393,Q28,R905,R907,C762,Q51
X02
X02
X02
A
A
141
31
HW
11/22/2010
COMPAL
Follow part reference design rule
X02
Change JMEDIA1 to JMDIA1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (6/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
65
of
66
5
4
3
2
1
V ersion Change L ist ( P. I. R . L ist )
Item Page#
D
Title
D ate
R equest
O w ner
Issue D escription
Solution D escription
R ev.
142
18
HW
12/17/2010
COMPAL
Audio MIC detect selection
Add @RH273
143
42
HW
12/17/2010
COMPAL
Follow INTEL DG1.5 RSMRST# timing cicuit
Just add RSMRST# circuit for backup. but de-pop
A00
144
34
HW
12/17/2011
COMPAL
Follow NXP design guide
Add @C575
A00
145
14
HW
12/17/2011
COMPAL
For cost saving
De-pop RH47,RH48,RH49,RH288
A00
146
42
HW
12/20/2011
COMPAL
Change Board ID
Change R875 to 33k
A00
147
42
HW
12/21/2011
COMPAL
To solve backdrive issue
Pop Q45
A00
148
33,34
HW
12/24/2011
COMPAL
Change USH chip to CID7
Change U33 to SA00003AO1L
A00
149
34
HW
1/6/2011
COMPAL
update TPM/TCM pop option table
Correct pop option table
D
A00
A00
C
C
B
B
A
A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ( " DELL " ) THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EE P.I.R (7/7)
4
3
2
Document Number
Date:
5
Size
Monday, January 10, 2011
Rev
1.0
LA-6591P
Sheet
1
66
of
66