USBISP działał u mnie z programem ProgISP: 850543
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 : LB2 = 0] Same as previous, but verify is also disabled
6
11
0x03
0x03
Mode 1: No memory lock features enabled
0x03
0x02
Mode 2: Further programming disabled
0x03
0x00
Mode 3: Further programming and verification disabled
0x0C
0x0C
Application Protection Mode 1: No lock on SPM and LPM in Application Section
0x0C
0x08
Application Protection Mode 2: SPM prohibited in Application Section
0x0C
0x00
Application Protection Mode 3: LPM and SPM prohibited in Application Section
0x0C
0x04
Application Protection Mode 4: LPM prohibited in Application Section
0x30
0x30
Boot Loader Protection Mode 1: No lock on SPM and LPM in Boot Loader Section
0x30
0x20
Boot Loader Protection Mode 2: SPM prohibited in Boot Loader Section
0x30
0x00
Boot Loader Protection Mode 3: LPM and SPM prohibited in Boot Loader Section
0x30
0x10
Boot Loader Protection Mode 4: LPM prohibited in Boot Loader Section
LB1
Lock bit
LB2
Lock bit
BLB01
Boot Lock bit
BLB02
Boot Lock bit
BLB11
Boot lock bit
BLB12
Boot lock bit
0xff,0xdf,0xff
0xff,0xdf,0xff
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x40,0x00,WARNING! Enabling DEBUGWIRE will make the ISP interface inaccessible!
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x40,0x00,WARNING! Enabling DEBUGWIRE will make the ISP interface inaccessible!
2
5
1
4
0x00,8.0 MHz
16384
512
64
4
9
15
50
9
9
100
0x50000000
0x58080000
0x50080000
3
0xaca00000
0xaca80000
0xaca40000
3
0x58000000
3
0xace00000
3
0xff9962
0xffdfff
AT90PWM216
8MHz
17
RELEASED
$1E
$94
$83
[LOW:HIGH:EXTENDED]
8
CKDIV8
Divide clock by 8
0
CKOUT
Oscillator output option
1
SUT1
Select start-up time
0
SUT0
Select start-up time
0
CKSEL3
Select Clock Source
0
CKSEL2
Select Clock Source
0
CKSEL1
Select Clock Source
0
CKSEL0
Select Clock Source
1
55
0x80
0x00
Divide clock by 8 internally; [CKDIV8=0]
0x40
0x00
Clock output on PORTD1; [CKOUT=0]
0x3F
0x00
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0000 SUT=00]
0x3F
0x10
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0000 SUT=01]
0x3F
0x20
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0000 SUT=10]
0x3F
0x02
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]
0x3F
0x12
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0010 SUT=01]
0x3F
0x22
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0010 SUT=10]; default value
0x3F
0x08
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]
0x3F
0x18
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1000 SUT=01]
0x3F
0x28
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1000 SUT=10]
0x3F
0x38
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]
0x3F
0x09
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1001 SUT=00]
0x3F
0x19
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1001 SUT=01]
0x3F
0x29
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]
0x3F
0x39
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1001 SUT=11]
0x3F
0x0A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]
0x3F
0x1A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1010 SUT=01]
0x3F
0x2A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1010 SUT=10]
0x3F
0x3A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]
0x3F
0x0B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1011 SUT=00]
0x3F
0x1B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1011 SUT=01]
0x3F
0x2B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]
0x3F
0x3B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1011 SUT=11]
0x3F
0x0C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]
0x3F
0x1C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1100 SUT=01]
0x3F
0x2C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1100 SUT=10]
0x3F
0x3C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]
0x3F
0x0D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1101 SUT=00]
0x3F
0x1D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1101 SUT=01]
0x3F
0x2D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]
0x3F
0x3D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1101 SUT=11]
0x3F
0x0E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]
0x3F
0x1E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1110 SUT=01]
0x3F
0x2E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1110 SUT=10]
0x3F
0x3E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]
0x3F
0x0F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1111 SUT=00]
0x3F
0x1F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1111 SUT=01]
0x3F
0x2F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]
0x3F
0x3F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1111 SUT=11]
0x3F
0x03
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]
0x3F
0x13
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms; [CKSEL=0011 SUT=01]
0x3F
0x23
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms; [CKSEL=0011 SUT=10]
0x3F
0x33
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=0011 SUT=11]
0x3F
0x01
PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms; [CKSEL=0001 SUT=00]
0x3F
0x11
PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms; [CKSEL=0001 SUT=01]
0x3F
0x21
PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms; [CKSEL=0001 SUT=10]
0x3F
0x05
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0101 SUT=00]
0x3F
0x15
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms; [CKSEL=0101 SUT=01]
0x3F
0x25
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms; [CKSEL=0101 SUT=10]
0x3F
0x35
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms; [CKSEL=0101 SUT=11]
0x3F
0x04
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0100 SUT=00]
0x3F
0x14
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms; [CKSEL=0100 SUT=01]
0x3F
0x24
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms; [CKSEL=0100 SUT=10]
0x3F
0x34
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms; [CKSEL=0100 SUT=11]
8
RSTDISBL
External Reset Disable
1
DWEN
debugWIRE Enable
1
SPIEN
Enable Serial programming and Data Downloading
0
WDTON
Watchdog timer always on
1
EESAVE
EEPROM memory is preserved through chip erase
1
BODLEVEL2
Brown out detector trigger level
1
BODLEVEL1
Brown-out Detector trigger level
1
BODLEVEL0
Brown-out Detector trigger level
1
13
0x80
0x00
Reset Disabled (Enable PC6 as i/o pin); [RSTDISBL=0]
0x40
0x00
Debug Wire enable; [DWEN=0]
0x20
0x00
Serial program downloading (SPI) enabled; [SPIEN=0]
0x10
0x00
Watch-dog Timer always on; [WDTON=0]
0x08
0x00
Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0]
0x07
0x07
Brown-out detection disabled; [BODLEVEL=111]
0x07
0x06
Brown-out detection level at VCC=4.5 V; [BODLEVEL=110]
0x07
0x05
Brown-out detection level at VCC=2.7 V; [BODLEVEL=101]
0x07
0x04
Brown-out detection level at VCC=4.3 V; [BODLEVEL=100]
0x07
0x03
Brown-out detection level at VCC=4.4 V; [BODLEVEL=011]
0x07
0x02
Brown-out detection level at VCC=4.2 V; [BODLEVEL=010]
0x07
0x01
Brown-out detection level at VCC=2.8 V; [BODLEVEL=001]
0x07
0x00
Brown-out detection level at VCC=2.6 V; [BODLEVEL=000]
7
PSC2RB
PSC2 Reset Behaviour
1
PSC1RB
PSC1 Reset Behaviour
1
PSC0RB
PSC0 Reset Behaviour
1
PSCRV
PSCOUT Reset Value
1
BOOTSZ1
Select Boot Size
0
BOOTSZ0
Select Boot Size
0
BOOTRST
Select Reset Vector
1
9
0x80
0x00
PSC2 Reset Behavior; [PSC2RB=0]
0x40
0x00
PSC1 Reset Behavior; [PSC1RB=0]
0x20
0x00
PSC0 Reset Behavior; [PSC0RB=0]
0x10
0x00
PSCOUT Reset Value; [PSCRV=0]
0x06
0x06
Boot Flash section size=256 words Boot start address=$1F00; [BOOTSZ=11]
0x06
0x04
Boot Flash section size=512 words Boot start address=$1E00; [BOOTSZ=10]
0x06
0x02
Boot Flash section size=1024 words Boot start address=$1C00; [BOOTSZ=01]
0x06
0x00
Boot Flash section size=2048 words Boot start address=$1800; [BOOTSZ=00] ; default value
0x01
0x00
Boot Reset vector Enabled (default address=$0000); [BOOTRST=0]
EN25B40
0x1C
0x20
0x12
2
5
4
0
262144
256
1000
9
ATtiny861
16MHZ
0x1E
0x93
0x0D
0xff,0xdf
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x40,0x00,WARNING! Enabling the debugWIRE interface will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x40,0x00,WARNING! Enabling the debugWIRE interface will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
2
5
1
4
0x00,8.0 MHz
8192
512
64
4
9
15
50
9
9
100
0x50000000
0x58080000
0x50080000
3
0xaca00000
0xaca80000
0xaca40000
3
0x58000000
3
0xace00000
3
0xfedf62
0x1dfff
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 : LB2 = 0] Same as previous, but verify is also disabled
3
2
0x03
0x03
Mode 1: No memory lock features enabled
0x03
0x02
Mode 2: Further programming disabled
0x03
0x00
Mode 3: Further programming and verification disabled
LB1
Lockbit
LB2
Lockbit
[LOW:HIGH:EXTENDED]
50
8
0x80
0x00
Divide clock by 8 internally; [CKDIV8=0]
0x40
0x00
Clock output on PORTB5; [CKOUT=0]
0x3F
0x00
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0000 SUT=00]
0x3F
0x10
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0000 SUT=01]
0x3F
0x20
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0000 SUT=10]
0x3F
0x01
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms; [CKSEL=0001 SUT=00]
0x3F
0x11
PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms; [CKSEL=0001 SUT=01]
0x3F
0x21
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms; [CKSEL=0001 SUT=10]
0x3F
0x31
PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms; [CKSEL=0001 SUT=11]
0x3F
0x02
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]
0x3F
0x12
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0010 SUT=01]
0x3F
0x22
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0010 SUT=10]; default value
0x3F
0x03
WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]
0x3F
0x13
WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms; [CKSEL=0011 SUT=01]
0x3F
0x23
WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; [CKSEL=0011 SUT=10]
0x3F
0x04
Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms; [CKSEL=0100 SUT=00]
0x3F
0x14
Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms; [CKSEL=0100 SUT=01]
0x3F
0x24
Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms; [CKSEL=0100 SUT=10]
0x3F
0x08
Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]
0x3F
0x18
Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1000 SUT=01]
0x3F
0x28
Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1000 SUT=10]
0x3F
0x38
Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]
0x3F
0x09
Ext. Ceramic Res.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1001 SUT=00]
0x3F
0x19
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1001 SUT=01]
0x3F
0x29
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]
0x3F
0x39
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1001 SUT=11]
0x3F
0x0A
Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]
0x3F
0x1A
Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1010 SUT=01]
0x3F
0x2A
Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1010 SUT=10]
0x3F
0x3A
Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]
0x3F
0x0B
Ext. Ceramic Res.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1011 SUT=00]
0x3F
0x1B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1011 SUT=01]
0x3F
0x2B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]
0x3F
0x3B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1011 SUT=11]
0x3F
0x0C
Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]
0x3F
0x1C
Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1100 SUT=01]
0x3F
0x2C
Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1100 SUT=10]
0x3F
0x3C
Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]
0x3F
0x0D
Ext. Ceramic Res.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1101 SUT=00]
0x3F
0x1D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1101 SUT=01]
0x3F
0x2D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]
0x3F
0x3D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1101 SUT=11]
0x3F
0x0E
Ext. Ceramic Res.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]
0x3F
0x1E
Ext. Ceramic Res.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1110 SUT=01]
0x3F
0x2E
Ext. Ceramic Res.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1110 SUT=10]
0x3F
0x3E
Ext. Ceramic Res.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]
0x3F
0x0F
Ext. Ceramic Res.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1111 SUT=00]
0x3F
0x1F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1111 SUT=01]
0x3F
0x2F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]
0x3F
0x3F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1111 SUT=11]
CKSEL0
Select Clock source
0
CKSEL1
Select Clock source
1
CKSEL2
Select Clock source
0
CKSEL3
Select Clock source
0
SUT0
Select start-up time
0
SUT1
Select start-up time
1
CKOUT
Clock Output Enable
1
CKDIV8
Divide clock by 8
0
13
8
0x80
0x00
Reset Disabled (Enable PB7 as i/o pin); [RSTDISBL=0]
0x40
0x00
Debug Wire enable; [DWEN=0]
0x20
0x00
Serial program downloading (SPI) enabled; [SPIEN=0]
0x10
0x00
Watch-dog Timer always on; [WDTON=0]
0x08
0x00
Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0]
0x07
0x04
Brown-out detection level at VCC=4.3 V; [BODLEVEL=100]
0x07
0x05
Brown-out detection level at VCC=2.7 V; [BODLEVEL=101]
0x07
0x06
Brown-out detection level at VCC=1.8 V; [BODLEVEL=110]
0x07
0x03
Brown-out detection level at VCC=2.3 V; [BODLEVEL=011]
0x07
0x02
Brown-out detection level at VCC=2.2 V; [BODLEVEL=010]
0x07
0x01
Brown-out detection level at VCC=1.9 V; [BODLEVEL=001]
0x07
0x00
Brown-out detection level at VCC=2.0 V; [BODLEVEL=000]
0x07
0x07
Brown-out detection disabled; [BODLEVEL=111]
BODLEVEL0
Brown-out Detector trigger level
1
BODLEVEL1
Brown-out Detector trigger level
1
BODLEVEL2
Brown-out Detector trigger level
1
EESAVE
EEPROM memory is preserved through the Chip Erase
1
WDTON
Watchdog Timer always on
1
SPIEN
Enable Serial Program and Data Downloading
0
DWEN
DebugWIRE Enable
1
RSTDISBL
External Reset disable
1
SELFPRGEN
Self-Programming Enable
1
1
1
0x01
0x00
Self Programming enable; [SELFPRGEN=0]
AT90PWM2
16MHZ
0x1E
0x93
0x81
0xff,0xdf,0xff
0xff,0xdf,0xff
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x40,0x00,WARNING! Enabling DEBUGWIRE will make the ISP interface inaccessible!
2,0x90,0x00,WARNING! These fuse settings will make the Parallel interface inaccessible!
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x40,0x00,WARNING! Enabling DEBUGWIRE will make the ISP interface inaccessible!
2,0x90,0x00,WARNING! These fuse settings will make the Parallel interface inaccessible!
2
5
0
0
0x00,8.0 MHz
8192
512
64
4
9
15
50
9
9
100
0x50000000
0x58080000
0x50080000
3
0xaca00000
0xaca80000
0xaca40000
3
0x58000000
3
0xace00000
3
0xff9962
0xffdfff
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 : LB2 = 0] Same as previous, but verify is also disabled
6
11
0x03
0x03
Mode 1: No memory lock features enabled
0x03
0x02
Mode 2: Further programming disabled
0x03
0x00
Mode 3: Further programming and verification disabled
0x0C
0x0C
Application Protection Mode 1: No lock on SPM and LPM in Application Section
0x0C
0x08
Application Protection Mode 2: SPM prohibited in Application Section
0x0C
0x00
Application Protection Mode 3: LPM and SPM prohibited in Application Section
0x0C
0x04
Application Protection Mode 4: LPM prohibited in Application Section
0x30
0x30
Boot Loader Protection Mode 1: No lock on SPM and LPM in Boot Loader Section
0x30
0x20
Boot Loader Protection Mode 2: SPM prohibited in Boot Loader Section
0x30
0x00
Boot Loader Protection Mode 3: LPM and SPM prohibited in Boot Loader Section
0x30
0x10
Boot Loader Protection Mode 4: LPM prohibited in Boot Loader Section
LB1
Lock bit
LB2
Lock bit
BLB01
Boot Lock bit
BLB02
Boot Lock bit
BLB11
Boot lock bit
BLB12
Boot lock bit
8
CLKDIV8
Divide clock by 8
0
CKOUT
Oscillator output option
1
SUT1
Select start-up time
0
SUT0
Select start-up time
0
CKSEL3
Select Clock Source
0
CKSEL2
Select Clock Source
0
CKSEL1
Select Clock Source
0
CKSEL0
Select Clock Source
1
44
0x80
0x00
Divide clock by 8 internally; [CKDIV8=0]
0x40
0x00
Clock output on PORTD1; [CKOUT=0]
0x3F
0x00
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0000 SUT=00]
0x3F
0x10
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0000 SUT=01]
0x3F
0x20
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0000 SUT=10]
0x3F
0x02
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]
0x3F
0x12
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0010 SUT=01]
0x3F
0x22
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0010 SUT=10]; default value
0x3F
0x08
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]
0x3F
0x18
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1000 SUT=01]
0x3F
0x28
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1000 SUT=10]
0x3F
0x38
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]
0x3F
0x09
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1001 SUT=00]
0x3F
0x19
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1001 SUT=01]
0x3F
0x29
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]
0x3F
0x39
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1001 SUT=11]
0x3F
0x0A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]
0x3F
0x1A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1010 SUT=01]
0x3F
0x2A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1010 SUT=10]
0x3F
0x3A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]
0x3F
0x0B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1011 SUT=00]
0x3F
0x1B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1011 SUT=01]
0x3F
0x2B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]
0x3F
0x3B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1011 SUT=11]
0x3F
0x0C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]
0x3F
0x1C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1100 SUT=01]
0x3F
0x2C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1100 SUT=10]
0x3F
0x3C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]
0x3F
0x0D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1101 SUT=00]
0x3F
0x1D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1101 SUT=01]
0x3F
0x2D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]
0x3F
0x3D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1101 SUT=11]
0x3F
0x0E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]
0x3F
0x1E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1110 SUT=01]
0x3F
0x2E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1110 SUT=10]
0x3F
0x3E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]
0x3F
0x0F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1111 SUT=00]
0x3F
0x1F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1111 SUT=01]
0x3F
0x2F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]
0x3F
0x3F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1111 SUT=11]
0x3F
0x03
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]
0x3F
0x13
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms; [CKSEL=0011 SUT=01]
0x3F
0x23
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms; [CKSEL=0011 SUT=10]
0x3F
0x33
PLL clock; Frequency 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=0011 SUT=11]
8
RSTDISBL
External Reset Diasble
1
DWEN
debugWIRE Enable
1
SPIEN
Enable Serial programming and Data Downloading
0
WDTON
Watchdog timer always on
1
EESAVE
EEPROM memory is preserved through chip erase
1
BOOTSZ1
Select Boot Size
0
BOOTSZ0
Select Boot Size
0
BOOTRST
Select Reset Vector
1
13
0x80
0x00
Reset Disabled (Enable PC6 as i/o pin); [RSTDISBL=0]
0x40
0x00
Debug Wire enable; [DWEN=0]
0x20
0x00
Serial program downloading (SPI) enabled; [SPIEN=0]
0x10
0x00
Watch-dog Timer always on; [WDTON=0]
0x08
0x00
Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0]
0x07
0x07
Brown-out detection disabled; [BODLEVEL=111]
0x07
0x06
Brown-out detection level at VCC=4.5 V; [BODLEVEL=110]
0x07
0x05
Brown-out detection level at VCC=2.7 V; [BODLEVEL=101]
0x07
0x04
Brown-out detection level at VCC=4.3 V; [BODLEVEL=100]
0x07
0x03
Brown-out detection level at VCC=4.4 V; [BODLEVEL=011]
0x07
0x02
Brown-out detection level at VCC=4.2 V; [BODLEVEL=010]
0x07
0x01
Brown-out detection level at VCC=2.8 V; [BODLEVEL=001]
0x07
0x00
Brown-out detection level at VCC=2.6 V; [BODLEVEL=000]
4
BODLEVEL2
Brown out detector trigger level
1
BODLEVEL1
Brown-out Detector trigger level
1
BODLEVEL0
Brown-out Detector trigger level
1
TA0SEL
(Reserved to factory tests)
1
8
0x10
0x00
PSCOUT Reset Value; [PSCRV=1]
0x80
0x00
PSC2 Reset Behavior; [PSC2RB=0]
0x20
0x00
PSC0 Reset Behavior; [PSC0RB=0]
0x06
0x06
Boot Flash section size=128 words Boot start address=$0F80; [BOOTSZ=11]
0x06
0x04
Boot Flash section size=256 words Boot start address=$0F00; [BOOTSZ=10]
0x06
0x02
Boot Flash section size=512 words Boot start address=$0E00; [BOOTSZ=01]
0x06
0x00
Boot Flash section size=1024 words Boot start address=$0C00; [BOOTSZ=00] ; default value
0x01
0x00
Boot Reset vector Enabled (default address=$0000); [BOOTRST=0]
[LB1 = 1 : LB2 = 1] No memory lock features enabled. [LB1 = 0 : LB2 = 1] Further programming of Flash and EEPROM is enabled. [LB1 = 0 : LB2 = 0] Same as previous, but verify is also disabled
6
11
0x03
0x03
Mode 1: No memory lock features enabled
0x03
0x02
Mode 2: Further programming disabled
0x03
0x00
Mode 3: Further programming and verification disabled
0x0C
0x0C
Application Protection Mode 1: No lock on SPM and LPM in Application Section
0x0C
0x08
Application Protection Mode 2: SPM prohibited in Application Section
0x0C
0x00
Application Protection Mode 3: LPM and SPM prohibited in Application Section
0x0C
0x04
Application Protection Mode 4: LPM prohibited in Application Section
0x30
0x30
Boot Loader Protection Mode 1: No lock on SPM and LPM in Boot Loader Section
0x30
0x20
Boot Loader Protection Mode 2: SPM prohibited in Boot Loader Section
0x30
0x00
Boot Loader Protection Mode 3: LPM and SPM prohibited in Boot Loader Section
0x30
0x10
Boot Loader Protection Mode 4: LPM prohibited in Boot Loader Section
LB1
Lock bit
LB2
Lock bit
BLB01
Boot Lock bit
BLB02
Boot Lock bit
BLB11
Boot lock bit
BLB12
Boot lock bit
0xff,0xdf,0xff
0xff,0xdf,0xff
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x40,0x00,WARNING! Enabling DEBUGWIRE will make the ISP interface inaccessible!
1,0x20,0x20,WARNING! These fuse settings will disable the ISP interface!
1,0x80,0x00,WARNING! Disabling external reset will make the ISP interface inaccessible!
1,0x40,0x00,WARNING! Enabling DEBUGWIRE will make the ISP interface inaccessible!
2
5
1
4
0x00,8.0 MHz
16384
512
64
4
9
15
50
9
9
100
0x50000000
0x58080000
0x50080000
3
0xaca00000
0xaca80000
0xaca40000
3
0x58000000
3
0xace00000
3
0xff9962
0xffdfff
AT90PWM316
8MHz
15
RELEASED
$1E
$94
$83
[LOW:HIGH:EXTENDED]
8
CKDIV8
Divide clock by 8
0
CKOUT
Oscillator output option
1
SUT1
Select start-up time
0
SUT0
Select start-up time
0
CKSEL3
Select Clock Source
0
CKSEL2
Select Clock Source
0
CKSEL1
Select Clock Source
0
CKSEL0
Select Clock Source
1
55
0x80
0x00
Divide clock by 8 internally; [CKDIV8=0]
0x40
0x00
Clock output on PORTD1; [CKOUT=0]
0x3F
0x00
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0000 SUT=00]
0x3F
0x10
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0000 SUT=01]
0x3F
0x20
Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0000 SUT=10]
0x3F
0x02
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]
0x3F
0x12
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0010 SUT=01]
0x3F
0x22
Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0010 SUT=10]; default value
0x3F
0x08
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]
0x3F
0x18
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1000 SUT=01]
0x3F
0x28
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1000 SUT=10]
0x3F
0x38
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]
0x3F
0x09
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1001 SUT=00]
0x3F
0x19
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1001 SUT=01]
0x3F
0x29
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]
0x3F
0x39
Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1001 SUT=11]
0x3F
0x0A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]
0x3F
0x1A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1010 SUT=01]
0x3F
0x2A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1010 SUT=10]
0x3F
0x3A
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]
0x3F
0x0B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1011 SUT=00]
0x3F
0x1B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1011 SUT=01]
0x3F
0x2B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]
0x3F
0x3B
Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1011 SUT=11]
0x3F
0x0C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]
0x3F
0x1C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1100 SUT=01]
0x3F
0x2C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1100 SUT=10]
0x3F
0x3C
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]
0x3F
0x0D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1101 SUT=00]
0x3F
0x1D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1101 SUT=01]
0x3F
0x2D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]
0x3F
0x3D
Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1101 SUT=11]
0x3F
0x0E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]
0x3F
0x1E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1110 SUT=01]
0x3F
0x2E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1110 SUT=10]
0x3F
0x3E
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]
0x3F
0x0F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1111 SUT=00]
0x3F
0x1F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1111 SUT=01]
0x3F
0x2F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]
0x3F
0x3F
Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1111 SUT=11]
0x3F
0x03
PLL clock /4; PLL input: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]
0x3F
0x13
PLL clock /4; PLL input: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms; [CKSEL=0011 SUT=01]
0x3F
0x23
PLL clock /4; PLL input: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms; [CKSEL=0011 SUT=10]
0x3F
0x33
PLL clock /4; PLL input: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=0011 SUT=11]
0x3F
0x01
PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms; [CKSEL=0001 SUT=00]
0x3F
0x11
PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms; [CKSEL=0001 SUT=01]
0x3F
0x21
PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms; [CKSEL=0001 SUT=10]
0x3F
0x05
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0101 SUT=00]
0x3F
0x15
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms; [CKSEL=0101 SUT=01]
0x3F
0x25
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms; [CKSEL=0101 SUT=10]
0x3F
0x35
PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms; [CKSEL=0101 SUT=11]
0x3F
0x04
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0100 SUT=00]
0x3F
0x14
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms; [CKSEL=0100 SUT=01]
0x3F
0x24
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms; [CKSEL=0100 SUT=10]
0x3F
0x34
Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms; [CKSEL=0100 SUT=11]
8
RSTDISBL
External Reset Disable
1
DWEN
debugWIRE Enable
1
SPIEN
Enable Serial programming and Data Downloading
0
WDTON
Watchdog timer always on
1
EESAVE
EEPROM memory is preserved through chip erase
1
BODLEVEL2
Brown out detector trigger level
1
BODLEVEL1
Brown-out Detector trigger level
1
BODLEVEL0
Brown-out Detector trigger level
1
13
0x80
0x00
Reset Disabled (Enable PC6 as i/o pin); [RSTDISBL=0]
0x40
0x00
Debug Wire enable; [DWEN=0]
0x20
0x00
Serial program downloading (SPI) enabled; [SPIEN=0]
0x10
0x00
Watch-dog Timer always on; [WDTON=0]
0x08
0x00
Preserve EEPROM memory through the Chip Erase cycle; [EESAVE=0]
0x07
0x07
Brown-out detection disabled; [BODLEVEL=111]
0x07
0x06
Brown-out detection level at VCC=4.5 V; [BODLEVEL=110]
0x07
0x05
Brown-out detection level at VCC=2.7 V; [BODLEVEL=101]
0x07
0x04
Brown-out detection level at VCC=4.3 V; [BODLEVEL=100]
0x07
0x03
Brown-out detection level at VCC=4.4 V; [BODLEVEL=011]
0x07
0x02
Brown-out detection level at VCC=4.2 V; [BODLEVEL=010]
0x07
0x01
Brown-out detection level at VCC=2.8 V; [BODLEVEL=001]
0x07
0x00
Brown-out detection level at VCC=2.6 V; [BODLEVEL=000]
7
PSC2RB
PSC2 Reset Behaviour
1
PSC1RB
PSC1 Reset Behaviour
1
PSC0RB
PSC0 Reset Behaviour
1
PSCRV
PSCOUT Reset Value
1
BOOTSZ1
Select Boot Size
0
BOOTSZ0
Select Boot Size
0
BOOTRST
Select Reset Vector
1
9
0x80
0x00
PSC2 Reset Behavior; [PSC2RB=0]
0x40
0x00
PSC1 Reset Behavior; [PSC1RB=0]
0x20
0x00
PSC0 Reset Behavior; [PSC0RB=0]
0x10
0x00
PSCOUT Reset Value; [PSCRV=0]
0x06
0x06
Boot Flash section size=256 words Boot start address=$1F00; [BOOTSZ=11]
0x06
0x04
Boot Flash section size=512 words Boot start address=$1E00; [BOOTSZ=10]
0x06
0x02
Boot Flash section size=1024 words Boot start address=$1C00; [BOOTSZ=01]
0x06
0x00
Boot Flash section size=2048 words Boot start address=$1800; [BOOTSZ=00] ; default value
0x01
0x00
Boot Reset vector Enabled (default address=$0000); [BOOTRST=0]
AT25F512B
0x1F
0x65
0x00
2
5
4
0
65536
256
1000
9
RDY/BSY
Lockbit
WEL
Lockbit
SWP0
Lockbit
SWP1
Lockbit
WPP
Lockbit
EPE
Lockbit
SPM
Lockbit
SPRL
Lockbit
AT26DF161A
0x1F
0x46
0x01
2
5
4
0
2097152
256
3000
9
RDY/BSY
Lockbit
WEL
Lockbit
SWP0
Lockbit
SWP1
Lockbit
WPP
Lockbit
EPE
Lockbit
SPM
Lockbit
SPRL
Lockbit
W25x10
0xEF
0x30
0x11
2
5
4
0
131072
256
2000
9
93C46
2
1
7
7
128
16
9
50
MX25L8005
0xC2
0x20
0x14
2
5
4
0
1048576
256
2000
9
A25L40P
0x37
0x20
0x13
2
5
4
0
524288
256
2000
9
RDY/BSY
Lockbit
WEL
Lockbit
SWP0
Lockbit
SWP1
Lockbit
WPP
Lockbit
EPE
Lockbit
SPM
Lockbit
SPRL
Lockbit