Oddaj opisz efekt. ______________ MSI GTX 1070 Gaming X.... na gpu GP106 - 400-A1 czyli modyfikacja GTX1060 z 6GB RAM - zasilanie jest faz: 5+1+1 (GPU/МЕМ/PLL) http://obrazki.elektroda.pl/5794748600_1499883493_thumb.jpg As main IC for core of the PWM controller chip is used here uP9511P uPI Semiconductor, which supports Nvidia Open Voltage Regulator. Link Kazda z 5-ciu faz dla gpu jest na dual N-ch,UbiQ Semiconductor M3816N. (zał.) Link oraz driver (brak danych) - być może to International Rectifier CHL8510 QFN56 (4x14)( podobnie jak w msi-radeon-rx-480-gaming), tam main kontroler International Rectifier IR3567B, .... 6+2 fazy (/pb-ir3567b) Подробнее: https://www.overclockers.ru/lab/81269_4/obzor-i-testirovanie-videokarty-msi-radeon-rx-480-gaming-x-8g.html http://obrazki.elektroda.pl/5605856000_1499886616_thumb.jpg http://obrazki.elektroda.pl/2223602000_1499883773_thumb.jpg
NTMFD4C86N
PowerPhase, Dual
N-Channel SO8FL
30 V, High Side 20 A / Low Side 32 A
Features
•
•
•
•
Co−Packaged Power Stage Solution to Minimize Board Space
Minimized Parasitic Inductances
Optimized Devices to Reduce Power Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
www.onsemi.com
V(BR)DSS
RDS(on) MAX
5.4 mW @ 10 V
Q1 Top FET
30 V
20 A
8.1 mW @ 4.5 V
Q2 Bottom
FET
30 V
• DC−DC Converters
• System Voltage Rails
• Point of Load
ID MAX
2.6 mW @ 10 V
32 A
3.4 mW @ 4.5 V
D1
(3, 4, 9)
(1) G1
(2) S1
SW (5, 6, 7)
(8) G2
S2 (10)
PIN CONNECTIONS
Figure 1. Typical Application Circuit
D1 4
100
D1 3
EFFICIENCY (%)
95
S1 2
5 SW
9
D1
10
S2
6 SW
7 SW
G1 1
8 G2
90
(Bottom View)
85
MARKING
DIAGRAM
80
VIN = 12 V
VOUT = 1.2 V
VGS = 5 V
FSW = 300 kHz
TA = 25°C
75
70
0
5
10
15
LOAD CURRENT (A)
20
1
DFN8
CASE 506CR
4C86N
AYWZZ
1
25
4C86N
A
Y
W
ZZ
Figure 2. Typical Efficiency Performance
POWERPHASEGEVB Evaluation Board
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
September, 2016 − Rev. 3
1
Publication Order Number:
NTMFD4C86N/D
NTMFD4C86N
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Drain−to−Source Voltage
Q1
Drain−to−Source Voltage
Q1
Gate−to−Source Voltage
Unit
30
V
VGS
±20
V
ID
14.8
Q2
Gate−to−Source Voltage
Value
VDSS
Q2
Continuous Drain Current RqJA (Note 1)
TA = 25°C
Q1
TA = 85°C
TA = 25°C
10.7
Q2
23.7
TA = 85°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
Continuous Drain Current RqJA ≤ 10 s (Note 1)
TA = 25°C
A
17.1
Q1
PD
1.89
ID
W
20.2
Q2
Q1
TA = 85°C
TA = 25°C
Steady
State
14.5
Q2
32.3
TA = 85°C
Power Dissipation
RqJA ≤ 10 s (Note 1)
TA = 25°C
Continuous Drain Current
RqJA (Note 2)
TA = 25°C
A
23.3
Q1
PD
3.51
ID
W
11.3
Q2
Q1
TA = 85°C
TA = 25°C
8.1
Q2
18.1
TA = 85°C
Power Dissipation
RqJA (Note 2)
TA = 25 °C
Pulsed Drain Current
TA = 25°C
tp = 10 ms
A
13.0
Q1
PD
1.10
W
IDM
160
A
TJ, TSTG
−55 to +150
°C
IS
10
A
Q2
Operating Junction and Storage Temperature
Q1
Q2
Q1
280
Q2
Source Current (Body Diode)
Q1
Q2
Drain to Source DV/DT
10
dV/dt
Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C,
VDD = 50 V, VGS = 10 V, L = 0.1 mH, RG = 25 W)
6
V/ns
20
mJ
IL = 20 Apk
Q1
EAS
IL = 40 Apk
Q2
EAS
80
TL
260
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm2.
www.onsemi.com
2
NTMFD4C86N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Top) – Steady State (Note 3)
Parameter
RqJC
3.3
Junction−to−Ambient – Steady State (Note 3)
RqJA
66.0
Junction−to−Ambient – Steady State (Note 4)
RqJA
113.7
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
RqJA
Unit
35.6
°C/W
3. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm2.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
FET
Symbol
Test Condition
V(BR)DSS
VGS = 0 V, ID = 250 mA
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Q1
Drain−to−Source Breakdown Voltage Temperature
Coefficient
Q1
Q2
V(BR)DSS
/ TJ
Zero Gate Voltage Drain
Current
Q1
IDSS
Q2
Q2
Gate−to−Source Leakage
Current
Q1
30
17
mV /
°C
16.5
VGS = 0 V,
VDS = 24 V
VGS = 0 V,
VDS = 24 V
IGSS
V
30
TJ = 25°C
1
TJ = 125°C
10
TJ = 25°C
1
VGS = 0 V, VDS = +20 V
mA
100
Q2
100
nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Q1
VGS(TH)
VGS = VDS, ID = 250 mA
Negative Threshold Temperature Coefficient
Q1
Drain−to−Source On Resistance
Q1
Q2
VGS(TH) /
TJ
RDS(on)
2.2
1.3
Q2
1.3
2.2
4.5
mV /
°C
4.6
VGS = 10 V
ID = 30 A
4.3
5.4
VGS = 4.5 V
ID = 18 A
6.5
8.1
VGS = 10 V
ID = 30 A
1.7
2.6
VGS = 4.5 V
Q2
V
ID = 12.5 A
2.4
3.4
mW
CAPACITANCES
Q1
Input Capacitance
Q2
1153
CISS
3050
Q1
Output Capacitance
Q2
532
COSS
VGS = 0 V, f = 1 MHz, VDS = 15 V
Q1
Reverse Capacitance
Q2
1650
pF
107
CRSS
77
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
3
NTMFD4C86N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
FET
Symbol
Test Condition
Min
Typ
Max
Unit
CHARGES, CAPACITANCES & GATE RESISTANCE
Q1
Total Gate Charge
Q2
10.9
QG(TOT)
21.6
Q1
Threshold Gate Charge
Q2
1.2
QG(TH)
Q1
Gate−to−Source Charge
Q2
1.4
VGS = 4.5 V, VDS = 15 V; ID = 30 A
QGS
Q2
5.4
QGD
5.5
Q1
Total Gate Charge
Q2
22.2
QG(TOT)
VGS = 10 V, VDS = 15 V; ID = 30 A
RG
Q1
Gate Resistance
nC
8.6
Q1
Gate−to−Drain Charge
3.4
47.5
1.0
TA = 25°C
Q2
1.0
nC
W
SWITCHING CHARACTERISTICS (Note 6)
Q1
Turn−On Delay Time
Q2
8.9
td(ON)
8.3
Q1
Rise Time
21.2
tr
Q2
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
Q1
Turn−Off Delay Time
Q2
td(OFF)
15.3
ns
19.3
Q1
Fall Time
15.1
4.4
tf
Q2
4.2
SWITCHING CHARACTERISTICS (Note 6)
Q1
Turn−On Delay Time
Q2
6.7
td(ON)
6.3
Q1
Rise Time
Q2
19.5
tr
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
Q1
Turn−Off Delay Time
Q2
td(OFF)
Q2
20.1
ns
22.8
Q1
Fall Time
13.8
2.8
tf
3.2
DRAIN−SOURCE DIODE CHARACTERISTICS
VGS = 0 V,
IS = 10 A
Q1
Forward Voltage
VSD
Q2
VGS = 0 V,
IS = 10 A
TJ = 25°C
0.80
TJ = 125°C
0.60
TJ = 25°C
0.78
TJ = 125°C
0.62
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
4
NTMFD4C86N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
FET
Symbol
Test Condition
Min
Typ
Max
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Q1
Reverse Recovery Time
Q2
29.1
tRR
33.7
Q1
Charge Time
Q2
14.5
ta
VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A
Q1
Discharge Time
Q2
17.4
tb
Q2
14.6
16.3
Q1
Reverse Recovery Charge
ns
21
QRR
27.5
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
5
NTMFD4C86N
TYPICAL CHARACTERISTICS − Q1
100
4.5 V to 10 V
100
4.0 V
90
TJ = 25°C
90
3.8 V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
80
70
3.6 V
60
3.4 V
50
40
3.2 V
30
3.0 V
20
2.8 V
VGS = 2.6 V
10
VDS = 3 V
80
70
60
50
40
30
20
TJ = 125°C
10
0
1
2
3
4
0
5
TJ = −55°C
TJ = 25°C
0
0
0.5 1.0 1.5 2.0
2.5 3.0
3.5 4.0
4.5 5.0 5.5
Figure 4. Transfer Characteristics
0.026
0.024
0.022
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Region Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID = 30 A
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
3
4
5
6
7
8
9
10
0.009
0.008
TJ = 25°C
VGS = 4.5 V
0.007
0.006
0.005
VGS = 10 V
0.004
0.003
10
20
30
40
50
60
70
VGS, GATE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 5. On−Resistance vs. Gate−to−Source
Voltage
Figure 6. On−Resistance vs. Drain Current and
Gate Voltage
2000
1.6
1.5
1800
VGS = 10 V
ID = 30 A
C, CAPACITANCE (pF)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
1.7
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50
VGS = 0 V
TJ = 25°C
f = 1 MHz
1600
1400
Ciss
1200
1000
Coss
800
600
400
Crss
200
0
−25
0
25
50
75
100
125
150
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. On−Resistance Variation with
Temperature
Figure 8. Capacitance Variation
www.onsemi.com
6
30
NTMFD4C86N
20
12
QT
18
10
IS, SOURCE CURRENT (A)
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS − Q1
VGS = 45 V
VDS = 15 V
ID = 30 A
TJ = 25°C
8
6
4
QGS
QGD
2
TJ = 25°C
16
14
12
10
8
6
4
2
0
0
0
2
6
4
8
0.1
10
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
QG, TOTAL GATE CHARGE (nC)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 10. Diode Forward Voltage vs. Current
1000
1000
ID, DRAIN CURRENT (A)
t, TIME (ns)
VGS = 10 V
VDS = 15 V
ID = 15 A
td(off)
tf
100
tr
td(on)
10
VGS ≤ 10 V
Single Pulse
TC = 25°C
100
10 ms
100 ms
1 ms
10
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
dc
0.1
1
1
100
10
0.1
1
10
100
RG, GATE RESISTANCE (W)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
100
50% Duty Cycle
R(t) (°C/W)
10
1
0.1
0.01
20%
10%
5%
2%
1%
PCB Cu Area 650 mm2
PCB Cu thk 1 oz
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 13. Thermal Characteristics
www.onsemi.com
7
1
10
100
1000
NTMFD4C86N
TYPICAL CHARACTERISTICS − Q2
160
3.6 V
ID, DRAIN CURRENT (A)
140
140
3.2 V
3.8 V to 10 V
120
VDS = 3 V
TJ = 25°C
3.4 V
ID, DRAIN CURRENT (A)
160
100
3.0 V
80
60
2.8 V
40
2.6 V
20
0
1
2
3
4
100
80
60
TJ = 125°C
40
20
VGS = 2.4 V
0
120
0
5
TJ = −55°C
TJ = 25°C
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Figure 15. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(mW)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 14. On−Region Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(mW)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
4.5
ID = 30 A
4.0
3.5
3.0
2.5
2.0
1.5
1.0
2
4.0
3
4
5
6
7
8
9
10
3.0
TJ = 25°C
VGS = 4.5 V
2.5
2.0
VGS = 10 V
1.5
1.0
0.5
0
25
50
75
100
125
150
VGS, GATE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 16. On−Resistance vs. Gate−to−Source
Voltage
Figure 17. On−Resistance vs. Drain Current
and Gate Voltage
10000
1.6
VGS = 10 V
ID = 30 A
Ciss
1.4
C, CAPACITANCE (pF)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (mW)
1.8
1.2
1.0
0.8
0.6
0.4
Coss
1000
Crss
100
VGS = 0 V
TJ = 25°C
f = 1 MHz
0.2
0
−50
10
−25
0
25
50
75
100
125
150
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 18. On−Resistance Variation with
Temperature
Figure 19. Capacitance Variation
www.onsemi.com
8
30
NTMFD4C86N
1.00E+06
12
QT
8
6
4
QGS
QGD
VGS = 4.5 V
VDS = 15 V
ID = 30 A
TJ = 25°C
2
0
0
4
12
8
VGS = 0 V
1.00E+05
16
IDSS, LEAKAGE (nA)
10
TJ = 150°C
1.00E+04
TJ = 125°C
1.00E+03
TJ = 85°C
1.00E+02
1.00E+01
1.00E+00
0
20
5
10
15
20
25
30
QG, TOTAL GATE CHARGE (nC)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 20. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 21. Drain−to−Source Leakage Current
vs. Voltage
20
18
IS, SOURCE CURRENT (A)
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS − Q2
TJ = 25°C
16
14
12
10
8
6
4
2
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 22. Diode Forward Voltage vs. Current
www.onsemi.com
9
0.9
35
NTMFD4C86N
TYPICAL CHARACTERISTICS − Q2
1000
1000
td(off)
100
ID, DRAIN CURRENT (A)
t, TIME (ns)
VGS = 10 V
VDS = 15 V
ID = 15 A
tf
tr
td(on)
10
VGS ≤ 10 V
Single Pulse
TC = 25°C
100
10 ms
100 ms
1 ms
10
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
dc
0.1
1
1
10
100
0.1
1
10
100
RG, GATE RESISTANCE (W)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 23. Resistive Switching Time Variation
vs. Gate Resistance
Figure 24. Maximum Rated Forward Biased
Safe Operating Area
100
50% Duty Cycle
R(t) (°C/W)
10
1
0.1
0.01
20%
10%
5%
2%
1%
PCB Cu Area 650 mm2
PCB Cu thk 1 oz
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 25. Thermal Characteristics
ORDERING INFORMATION
Package
Shipping†
NTMFD4C86NT1G
DFN8
(Pb−Free)
1500 / Tape & Reel
NTMFD4C86NT3G
DFN8
(Pb−Free)
5000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
10
NTMFD4C86N
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P PowerPhase FET
CASE 506CR
ISSUE C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b AND b1 APPLY TO PLATED TERMINAL AND ARE
MEASURED BETWEEN 0.15 AND 0.25 MM FROM THE TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED PADS AS WELL AS THE
TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
0.20 C
D
A
B
D1
8
6
1
2
2X
0.20 C
5
E1
ÉÉ
ÉÉ
PIN ONE
IDENTIFIER
7
E
4X
h
3
c
4
A1
TOP VIEW
A
0.10 C
DETAIL A
0.10 C
C
NOTE 4
SIDE VIEW
8X
b
0.10
M
0.05
M
1
5X
DETAIL A
L
6X
SEATING
PLANE
NOTE 6
0.10
C A B
C
C A B
NOTE 3
1
E3
b2
0.10
M
C A B
E2
G
RECOMMENDED
SOLDERING FOOTPRINT*
L2
D3
e/2
e
BOTTOM VIEW
MILLIMETERS
MAX
MIN
1.10
0.90
0.00
0.05
0.40
0.60
0.40
0.60
0.20
0.30
5.15 BSC
4.90
5.10
3.70
3.90
2.96
3.16
6.15 BSC
5.80
6.00
2.37
2.57
1.05
1.25
1.36
1.56
1.27 BSC
0.625 BSC
1.615 BSC
−−−
12 _
0.34
0.59
1.68
1.93
D2
G1
E4
M
DIM
A
A1
b
b2
c
D
D1
D2
D3
E
E1
E2
E3
E4
e
G
G1
h
L
L2
5.50
4.05
SUPPLEMENTAL
BOTTOM VIEW
1.27
PITCH
0.62
2.07
5X
0.75
0.54
1.22
2.67
1.66
5X
0.71 2.31
0.76
0.23
0.98
6.50
6X
0.65
4.10
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
11
NTMFD4C86N
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
◊
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
12
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFD4C86N/D