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BISS0001
Micro Power PIR Motion Detector IC
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Features
Low power CMOS technology (ideal for battery operated PIR devices)
CMOS high input impedance operational amplifiers
Bi-directional level detector / Excellent noise immunity
Built-in Power up disable & output pulse control logic
Dual mode : retriggerable & non-retriggerable
Pin description
Pin Number
Symbol
1
A
Description
2
3
4
5
6
7
8
VO
RR1
RC1
RC2
RR2
Vss
VRF
9
VC
10
11
12
13
14
IB
Vdd
2OUT
2IN1IN+
Op-amp input bias current setting
15
16
1IN1OUT
1 st stage Op-amp inverting input
1 st stage Op-amp output
Retriggerable & non-retriggerable mode select
(A=1 : re-triggerable)
Detector output pin (active high)
Output pulse width control (Tx) * See definition below
Output pulse width control (Tx) *
Trigger inhibit control (Ti)
*
Trigger inhibit control (Ti)
*
Ground
RESET & voltage reference input
(Normally high. Low=reset)
Trigger disable input
(VC & gt; 0.2Vdd=enable;
Vc & lt; 0.2Vdd =disabled)
Supply voltage
2nd stage Op-amp output
2nd stage Op-amp inverting input
1 st stage Op-amp non-inverting input
*
Tx = The time duration during which the output pin (Vo) remains high after triggering.
Ti = During this time period, triggering is inhibited. See timing charts for details.
Tx ≈ 24576 xR10 x C6；
Ti ≈ 24 x R9 x C7。 (ref to schematic)
Absolute max. ratings
Description
Supply voltage
Input voltage
Output current
Operating
temperature
Storage
temperature
Condition
--Vdd=5V
--
Range
3~5
Vss-0.3~ Vdd+0.3
10
-20 ~ +70
Unit
V
V
mA
°C
--
-40 ~ +125
°C
Retrigerrable waveform
(NOTE : VH=0.7Vdd,
VL=0.3Vdd)
Non-retriggerable waveform
(NOTE : VH=0.7Vdd,
VL=0.3Vdd)
Internal Block Diagram
Tx – Output pulse width control
Ti - Trigger inhibit timing control
Application Example
-- Passive Infrared Detector for alarm system
Tx ≈ 24576 x R10 x C6 ；
Ti ≈ 24 x R9 x C7。 (ref to schematic)
R3 is a light dependent resistor which has low resistance under strong ambient
light. This causes the detector to be operational only when the detection area
is sufficiently dark.