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5
4
ME3 Block Diagram
3
2
Intel CPU
D
G792
4,5,6
REALTEK RTM875
22
3
5V_S3
DCBATOUT
INPUTS
7,8,9,10,11,12
13,14
1D05V_S0
1D8V_S3
nVIDIA
DDR I/F
LVDS, CRT I/F
OUTPUTS
15
DCBATOUT
INTEGRATED GRAHPICS
DDRII 667 Channel B
D
MAX8743
Crestline-GM/GML
AGTL+ CPU I/F
Slot 1
OUTPUTS
3V_S5
13,14
DDRII
INPUTS
Host BUS
533/667MHz
DDRII 667 Channel A
Slot 0
TPS51120
SYSTEM DC/DC
TV OUT
DDRII
SYSTEM DC/DC
Project code : 91.4X601.001
PCB P/N :
Revision :
Meron 2M/4M SV
FSB:667 or 800 MHz
CLK GEN
1
PCIE x 16
CRT
15
SYSTEM DC/DC
NB8M-GS
FAN5234
LCD
44,45,46
16
INPUTS
OUTPUTS
VGA_CORE_S0
DCBATOUT
C
Power Switch
G577
23
New card
23
Mini Card_2
Mini Card_1
Robson
802.11a/b/g/n 23
23
11A
HDMI
DMI I/F
100MHz
17
MAXIM CHARGER
EEPROM
PCI-E x 1
PCI-E x 2
ICH8-M
INPUTS
OUTPUTS
BT+
DCBATOUT
18V
3.0A
5V
GDDR3
Graphics RAM
256-Mbit
INTEL
MAX8725
46
100mA
C
47,48
10/100 Controller
Realtek
RTL8101E 24
RJ45
CONN 25
PCI-E x 1
CPU DC/DC
10 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
MAX8736ETL
High Definition Audio
Finger print 26
Camera
DCBATOUT
26
RF
ATA 66/100
INPUTS
26
Codec
Mic In
ALC662
VCC_CORE
ACPI 1.1
AZALIA
LPC I/F
34
Line In
PCI/PCI BRIDGE
27MHz
B
AMP
INT.SPKR
or
Blue tooth 26
35
USB X 4
35
Realtek
RTL5158
AMP
G1412
MDC Card
USB 2.0
18,19,20,21
AZALIA
A
27
LPC
LPC BUS
DEBUG
CONN. 32
Winbond
ALC268
HDMI
(SPDIF)
WPC8763
SATA
E-SATA
SIL3531
E-SATA
CONN
28
29
SATA
HDD30
PATA
CDROM
30
CAPACITY
BUTTON 33
Touch
Pad
TPM
32.768KHz
KBC
Codec
B
4
3
1
2
3
4
5
5
Prepare by Steven CF Chou
A
Wistron Corporation
32
Flash Rom
32.768KHz
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Block Diagram
Size
A3
W25X80-VSS
32
Document Number
Date: Monday, July 30, 2007
5
Signal
GND
Signal
Signal
GND
VCC
Signal
Signal
GND
Signal
SLB9635TT
SPI
31
INT.
KB 33
33
L1:
L2:
L3:
L4:
L5:
L6:
L7:
L8:
L9:
L10:
MS/MS Pro/xD/
MMC/SD 4 in 1 27
28
INT. MIC Array
Digital
PCB LAYER
28
MODEM
RJ11
0.844~1.3V
44A
32.768KHz
G1432
Line Out
(SPDIF)
OUTPUTS
2
Rev
ME3-Discrete
Sheet
1
1
SA
of
51
A
B
C
E
INTEL ICH8-M STRAP PIN
Signal
Usage/When Sampled
HDA_SDOUT
XOR Chain Entrance/
PCIE Port Config 1 bit1,
Rising Edge of PWROK
4
U45 : 71.0NB8M.00U (VGA)
U35: 71.00662.00G (Audio)
U28: 71.08763.B0G (KBC)
U74: 71.08101.B0G (LAN)
U26: 71.ICH8M.C0U (SB)
U18: 71.PM965.A0U (NB)
TV1: 22.10021.H21
Hole,Spring
HDMI1: 22.10296.011
XOR Chain Entrance Strap
Comment
Allows entrance to XOR Chain testing when TP3
pulled low at rising edge of PWROK.When TP3 not
pulled low at rising edge of PWROK,sets bit1 of
RPC.PC(Config Registers:offset 224h)
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
HDA_SYNC
PCIE Port Config 1 bit0,
Rising Edge of PWROK.
GNT2#
PCIE Port Config 2 bit0,
Rising Edge of PWROK.
GPIO20
Reserved
Top-Block Swap Override.
Rising Edge of PWROK.
GNT0#
SPI_CS1#
Boot BIOS Destination
Selection.
Rising Edge of PWROK.
Integrated VccSus1_05
VccSus1_5 and VccCL1_5
VRM Enable/Disable.Always
sampled.
AZ_DOUT_ICH
0
0
1
1
0
1
0
1
Description
RSVD
Enter XOR Chain
Normal Operation(default)
Set PCIE port cofig bit1
4
Weak Internal PULL-DOWN.NOTE:This signal should
not be pull HIGH.
GNT3#
ICH_RSVD
tp3
Sets bit2 of RPC.PC(Config Registers:Offset 224h)
INTVRMEN
3
Sampled low:Top-Block Swap mode(inverts A16 for all A16 swap override strap
cycles targeting FWH BIOS space).
PCI_GNT#3 low = A16 swap override enable
Note: Software will not be able to clear the
high = default
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
BOOT BIOS Strap
PCI_GNT#0 SPI_CS#1
BOOT BIOS Location
Controllable via Boot BIOS Destination bit
0
1
SPI
(Config Registers:Offset 3410h:bit 11:10).
PCI
1
0
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
1
Enables integrated VccSus1_05,VccSus1_5 and
VccCL1_5 VRM when sampled high
1
LPC(Default)
integrated VccSus1_05,VccSus1_5,VccCL1_5
SM_INTVRMEN
High=Enable
Low=Disable
3
integrated VccLan1_05VccCL1_05
Integrated VccLAN1_05
VccCL1_05 VRM enable
/Disable. Always sampled.
Enables integrated
when sampled high
SATALED#
PCIE LAN REVERSAL.Rising
Edge of PWROK.
This signal has weak internal pull-up.
set bit27 of MPC.LR(Device28:Function0:Offset D8)
SPKR
No Reboot.
Rising Edge of PWROK.
If sampled high, the system is strapped to the
" No Reboot " mode(ICH8M will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.(Offset:3410h:bit5)
TP3
XOR Chain Entrance.
Rising Edge of PWROK.
This signal should not be pull low unless using
XOR Chain testing.
LAN100_SLP
VccLAN1_05,VccCL1_05 VRM
LAN100_SLP
High=Enable
Low=Disable
DEFAULE HIGH
No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot
Internal Pull-Up.If sampled low,the Flash Descriptor
GPIO33/
Flash Descriptor Security Security will be overidden.if high,the Security
HDA_DOCK_EN# Override Strap
measures defined in the Flash Descriptor will be in
8.2K PULL HIGH
Rising Edge of PWROK.
effect.
This should only be used in manufacturing
environments
INTEL ICH8-M INTEGRATED
PULL-UPS and PULL-DOWNS
SIGNAL
Resistor Type/Value
HDA_BIT_CLK
PULL-DOWN 20K
HDA_RST#
NONE
HDA_SDIN[3:0]
PULL-DOWN 20K
HDA_SDOUT
PULL-DOWN 20K
HDA_SYNC
PULL-DOWN 20K
GNT[3:0]
PULL-UP 20K
GPIO[20]
PULL-DOWN 20K
LDA[3:0]#/FHW[3:0]#
PULL-UP 20K
LAN_RXD[2:0]
PULL-UP 20K
LDRQ[0]
PULL-UP 20K
LDRQ[1]/GPIO23
PULL-UP 20K
PME#
PULL-UP 20K
CFG 20
Normal Operation ★ Reserved Lane
Only PCIE or SDVO
PCIE and SDVO are
is operation★
operation simultaneous
PWRBTN#
PULL-UP 20K
SATALED#
PULL-UP 20K
SDVO_CTRL_DATA
NO SDVO Card
Present ★
SPI_CS1#
PULL-UP 20K
SPI_CLK
PULL-UP 20K
XOR/ALL-Z
SPI_MOSI
PULL-UP 20K
Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation
SPI_MISO
PULL-UP 20K
Wistron Corporation
TACH_[3:0]
PULL-UP 20K
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SPKR
PULL-DOWN 20K
TP[3]
PULL-UP 20K
USB[9:0][P,N]
PULL-DOWN 15K
CL_RST#
TBD
2
1
D
INTEL CRESTLINE STRAP PIN
CFG Strap
CFG 5
LOW 0
HIGH 1
DMI X 2
CFG 8
Low Power PCI Express
CFG 9
PCI Express Graphics
Lane Reversal
CFG 16
FSB Dynamic ODT
CFG 19
DMI Lane Reserved
Concurrent SDVO/PCIE
DMI X 4 ★
Normal
★
Low Power mode
Lane Reversal
Normal Mode(Lanes★
number in order)
Disabled
Enabled ★
SDVO Card Present
SDVO Present
CFG 12
CFG 13
LL(00)
LH(01)
HL(10)
HH(11)
A
B
MB: 07230
LED: 07537
FP: 07546
Audio: 07545
USB: 07547
C
2
& lt; Core Design & gt;
1
Title
Table of Content
Size
A3
Document Number
Date: Friday, September 14, 2007
D
Rev
ME3-Discrete
Sheet
E
2
of
51
5
3D3V_S0
4
3D3V_S0_CK505
3
2
1
L15
X2
1
CLK_XTAL_OUT
D
C322
U24
C607 SC4D7P50V2CN-1GP
1
1
C337
20
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2
1
C619
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
C611
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SC1U10V3KX-3GP
2
1
C610
DY
C605
2
1
C601
2
1
C341
2
1
2
MLB-160808-18-GP
C300
2
1
CLK_XTAL_IN
CLK_XTAL_OUT
2
FSA
R338
SRC-8/CPU_ITP
SRC-8#/CPU_ITP#
20
20 CLKSATAREQ#
7
CLKREQ#_B
32 PCLK_FWH
32
CLK_PCI_TCG
31
PCLK_KBC
18
CLK_PCI_ICH
63
2
2
2
2
51
50
SRC-6
SRC-6#
48
47
SRC-10
SRC-10#
41
42
CR#_H/SRC-11
CR#_G/SRC-11#
40
39
SRC-9
SRC-9#
37
38
SRC-4
SRC-4#
34
35
2
1
RN43
MCH_3GPLL
2
MCH_3GPLL#
1
CR#_C/SRC-3
CR#_D/SRC-3#
31
32
PCIE_ICH RN40 2
PCIE_ICH#
1
PCI_STOP#/SRC-5
CPU_STOP#/SRC-5#
33R2J-2-GP
33R2J-2-GP
33R2J-2-GP
33R2J-2-GP
8
10
11
12
13
14
PCI2_TME
27_SEL
ITP_EN
1
2
RN29
1
2
RN32
1
2
RN36
4 SRN0J-6-GP
3
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
4 SRN0J-6-GP
3
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
4 SRN0J-6-GP
3
CLK_PCIE_ESATA 29
CLK_PCIE_ESATA# 29
PCIE_LAN
PCIE_LAN#
1
2
RN39
1
2
RN41
PCIE_NEW
2
PCIE_NEW#
1
RN45
4 SRN0J-6-GP
3
CLK_PCIE_LAN 24
CLK_PCIE_LAN# 24
PCIE_MINI1
PCIE_MINI1#
4 SRN0J-6-GP
3
CLK_PCIE_MINI1 23
CLK_PCIE_MINI1# 23
FSLA/USB48
7
6
CK_PWRGD
1
1
1
1
CPU_XDP
CPU_XDP#
33R2J-2-GP
H_STP_PCI#
H_STP_CPU#
R149
R153
R154
R155
54
53
SRC-7/CR#_F
SRC-7#/CR#_E
17
13,14,20 ICH_SMBCLK
13,14,20 ICH_SMBDATA
C
58
57
MCH_BCLK
MCH_BCLK#
XIN
XOUT
45
44
1
CPU_BCLK
CPU_BCLK#
CPU-0
CPU-0#
2
CLK_48M_ICH
20
20
3
2
61
60
CPU-1
CPU-1#
1D25V_S0_CK505_IO
DY
L18
2
2
0R3-0-U-GP
1
VDD_REF
VDD_48
VDD_PCI
VDD_SRC
VDD_CPU
VDD_PLL3
1 R354
19
27
43
52
33
56
SC33P50V2JN-3GP
VDD_IO
VDD_PLL3_IO
VDD_SRC_IO
VDD_SRC_IO
VDD_SRC_IO
VDD_CPU_IO
SC33P50V2JN-3GP
4
16
9
46
62
23
2
1
2
1
2
1
1
X-14D31818M-36GP
C321
2
CLK_XTAL_IN
3D3V_S0
1D25V_S0
1D25V_S0_CK505_IO
C599
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
C597
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
3D3V_S0_CK505
C618
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
DY
C598
SCD1U16V2ZY-2GP
2
1
C596
SCD1U16V2ZY-2GP
2
DY
C603
SCD1U16V2ZY-2GP
2
1
C330
SC10U10V5ZY-1GP
D
2
SC1U10V3KX-3GP
2
1
1
MLB-160808-18-GP
C343
SCLK
SDATA
CK_PWRGD/PD#
CR#_A/PCI-0
CR#_B/PCI-1
TME/PCI-2
SRC-5_EN/PCI-3
27M_SEL/PCI-4
ITP_EN/PCIF-5
PCIE_MINI2
PCIE_MINI2#
3
4
CLK_PCIE_NEW 23
CLK_PCIE_NEW# 23
3D3V_S0
NEWCARD_CLKREQ# 23
SRN0J-6-GP
1
2
R367
10KR2J-3-GP
RN44 R169 1 DY
2
10KR2J-3-GP
3
4
SRN0J-6-GP
3
4
3
4
C
CLK_PCIE_MINI2 23
CLK_PCIE_MINI2# 23
SRN0J-6-GP
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
SRN0J-6-GP
CLK_PCIE_ICH 20
CLK_PCIE_ICH# 20
SRN0J-6-GP
CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19
RN37
SRC-2/SATA
SRC-2#/SATA#
64
5
FSLB/TEST_MODE
FSLC/TEST_SEL/REF
RESET#
2
1
3
4
20
21
REFCLKP
REFCLKN
2
1
3
4
1
0
1
R337
10KR2J-3-GP
SRC8
CPU_ITP
CPU_BSEL2
R339
5
CPU_BSEL1
R342
5
CPU_BSEL0
1
1
0
1
100M
133M
200M
166M
2
0
0
1
1
DY
R163
1
2
27_SEL
R146
10KR2J-3-GP
27_SEL
1
2
1
2
FSB
PIN 20
PIN 21
0
1
FSC
10KR2J-3-GP
DOT96T
SRCT0
DOT96C
SRCC0
PIN 24
PIN 25
SRCT1/LCDT_100
27M_NSS
SRCT1/LCDT_100
27M_SS
0R0402-PAD
FSA
2K2R2J-2-GP
R334 1
2 1KR2J-1-GP
MCH_CLKSEL0 7
R138 1
2 1KR2J-1-GP
MCH_CLKSEL1 7
R335 1
2
B
1
5
A
PEG_REFCLKP 45
PEG_REFCLKN 45
SRN0J-6-GP
R145
10KR2J-3-GP
CPU
SB
Output
VGA_27MHZ 47
VGA_27MHZSS 47
1
FS_A
1
0
0
0
ITP_EN
SRN33J-5-GP-U
RN31
2
1
27MHZ
27MHZSS
SRC-0/DOT96
SRC-0#/DOT96#
GND
GND_IO
GND_SRC
GND_SRC
GND_SRC
GND_CPU
GND_PLL3
SC4D7P50V2CN-1GP
FS_B
DY
2
24
25
3D3V_S0_CK505
3D3V_S0_CK505
ITP_EN
3
4
RN33
FS_C
R336
10KR2J-3-GP
2
1
65
18
15
1
1
C606
RTM875-606-LF-GP
2
C302
C303
1
2
SC4D7P50V2CN-1GP
R341
10KR2J-3-GP
2
DY
SC4D7P50V2CN-1GP
1
2
SC4D7P50V2CN-1GP
PCI2_TME
1
B
2
1
2
R347
10KR2J-3-GP
C301
1
3D3V_S0_CK505
PCIE_SATA
PCIE_SATA#
28
29
SRC-1/SE1
SRC-1#/SE2
GND_48
GND_PCI
GND_REF
CLK_14M_ICH
2 33R2J-2-GP
22
30
36
49
59
26
FSB
FSC
55
20
R340 1
2 1KR2J-1-GP
MCH_CLKSEL2 7
& lt; Variant Name & gt;
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Design Note:
Title
1. All of Input pin didn't have internal pull up resistor.
2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic.
Size
A3
Clock generator CY28548
Document Number
Date: Tuesday, August 21, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
3
of
51
5
7
4
3
2
1
H_A#[3..35]
U56A 1 OF 4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
A6
A5
C4
H_STPCLK#
H_INTR
H_NMI
H_SMI#
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
CPU_RSVD01
CPU_RSVD02
CPU_RSVD03
CPU_RSVD04
CPU_RSVD05
CPU_RSVD06
CPU_RSVD07
CPU_RSVD08
CPU_RSVD09
CPU_RSVD10
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
TPAD28 TP15
CPU_RSVD11
B1
RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6
H_IERR#
H_INIT#
H_LOCK#
C1
F3
F4
G3
G2
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
G6
E4
H_HIT#
H_HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
TP21
AD4
TP16
AD3
TP12
AD1
TP22
AC4
TP14
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
CONTROL
1
D20
B3
H4
1D05V_S0
7
7
7
H_DEFER#
7
H_DRDY# 7
H_DBSY# 7
H_BR0#
H_INIT#
7
THERMTRIP#
HCLK
BCLK0
BCLK1
D
R131
56R2J-4-GP
2
IERR#
INIT#
BR0#
PROCHOT#
THRMDA
THRMDC
STPCLK#
LINT0
LINT1
SMI#
TP26
TP28
TP19
TP24
TP17
TP25
TP18
TP30
TP23
TP29
H_BR0#
DEFER#
DRDY#
DBSY#
H_ADS#
H_BNR#
H_BPRI#
19,32
H_LOCK# 7
H_RESET#
7
H_RS#0 7
H_RS#1 7
H_RS#2 7
H_TRDY#
7
H_HIT#
7
H_HITM# 7
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
XDP_DBRESET# 20
CPU_PROCHOT# 38
THERMAL
A20M#
FERR#
IGNNE#
D5
C6
B4
A3
H_A20M#
H_FERR#
H_IGNNE#
F1
HIT#
HITM#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#
H_DEFER#
H_DRDY#
H_DBSY#
RESET#
RS0#
RS1#
RS2#
TRDY#
ICH
ICH
19
19
19
H_A20M#
H_FERR#
H_IGNNE#
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
H5
F21
E1
LOCK#
ADDR GROUP 1
H_ADSTB#1
19
19
19
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
C
7
K3
H2
K2
J3
L1
H_ADS#
H_BNR#
H_BPRI#
XDP/ITP SIGNALS
H_ADSTB#0
7
7
7
7
7
H1
E2
G5
ADS#
BNR#
BPRI#
D21
A24
B25
1
R132
2
68R3J-GP
H_THERMDA
H_THERMDC
C7
H_THERMTRIP#
A22
A21
CLK_CPU_BCLK
CLK_CPU_BCLK#
RESERVED
7
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
D
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP 0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
C
1D05V_S0
H_THERMDA 22
H_THERMDC 22
H_THERMTRIP# 7,19
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
layout note:Zo =55
ohm , 0.5 " MAX for
GTLREF
layout note : Change R237 to 649 ohm if using XTP to ITP adapter
3D3V_S0
R129
KEY_NC
XDP_DBRESET#
1
BGA479-SKT6-GPU3
2
1KR2J-1-GP
1D05V_S0
original value:BGA479-SKT6-GPU1
XDP_TDI
R114
XDP_TMS
B
R115
XDP_TDO
R116
XDP_BPM#5
R110
XDP_TRST#
R111
1D05V_S0
XDP_TCK
2
1
2
1
2
1
2
1
2
1
2
54D9R2F-L1-GP
B
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
51R2F-2-GP
54D9R2F-L1-GP
1
R112
1
R135
56R2J-4-GP
B
2
DY
CPU_PROCHOT#
E
C
DY
Q7
OCP#
20
MMBT3904WT1G-GP
& lt; Core Design & gt;
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Meron(1/3)-AGTL+/XDP
Size
Custom
Document Number
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
5
4
3
2
Sheet
1
4
of
51
5
4
3
7 H_D#[0..63]
2
1
VCC_CORE_S0
U56B 2 OF 4
VCC_CORE_S0
U56C
3 OF 4
DY
3 CPU_BSEL0
3 CPU_BSEL1
3 CPU_BSEL2
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
B22
B23
C21
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
PSI#
BSEL0
BSEL1
BSEL2
R136
R137
R113
R109
1
1
1
1
2
2 27D4R2F-L1-GP
2 54D9R2F-L1-GP
2 27D4R2F-L1-GP
54D9R2F-L1-GP
H_DPRSTP#
7,19,38
H_DPSLP#
19
H_DPWR# 7
H_PWRGOOD 19
H_CPUSLP#
7
PSI#
38
BGA479-SKT6-GPU3
PLACE C173
make sure
routing is
away other
close to the TEST4 PIN,
TEST3,TEST4,TEST5 trace
reference to GND and
noisy signals
B
CPU_BSEL
CPU_BSEL2
166
0
200
0
CPU_BSEL1
Resistor Placed
within 0.5 " of CPU
pin. Trace should
be at least 25 mils
away from any other
toggling signal .
COMP[0,2] trace
width is 18 mils.
COMP[1,3] trace
width is 4 mils .
CPU_BSEL0
1
1
1
0
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCA
VCCA
B26
C26
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AD6
AF5
AE5
AF4
AE3
AF3
AE2
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
VCCSENSE
AF7
VCC_SENSE
VSSSENSE
AE7
VSS_SENSE
C
TC13
DY
1D5V_S0
layout note:
place C3 near
PIN B26
C282
VCC_SENSE
BGA479-SKT6-GPU3
2
0R0402-PAD
2
0R0402-PAD
1
COMP0
COMP1
COMP2
COMP3
1D05V_S0
R130 1
R123 1
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
2
R26
U26
AA1
Y1
DATA GRP2
COMP0
COMP1
COMP2
COMP3
MISC
D
VSS_SENSE
CPU_VID[0..6]
38
VCC_SENSE
38
VSS_SENSE
38
1
2
R122 100R2F-L1-GP-U
1
TPAD28 TP13
TPAD28 TP34
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
2
2 C586
1
AD26
C23
D25
C24
AF26
AF1
A26
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
1
V_CPU_GTLREF
TPAD28 TP31
TPAD28 TP35
TPAD28 TP33
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
2
SCD1U16V2KX-3GP
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
SE330U2VDM-6-GP
7
7
7
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#
DATA GRP1
C
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
SCD01U16V2KX-3GP
H_DSTBN#0
H_DSTBP#0
H_DINV#0
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2
DATA GRP3
7
7
7
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0
C289
SC10U10V5ZY-1GP
Length match within
25 mils . The trace
width/space/other is
20/7/25 .
B
VCC_CORE_S0
1
2
R121 100R2F-L1-GP-U
Close to CPU pin
within 500mils
2
2KR2F-3-GP
1
R332
& lt; Core Design & gt;
C587
2
V_CPU_GTLREF
A
SCD01U16V2KX-3GP
A
R331
1KR2F-3-GP
1 1
Close to CPU
pin AD26
Z0=55 ohm
with in
500mils .
2
1D05V_S0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Meron(2/3)-AGTL+/PWR
Size
A3
Document Number
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
5
4
3
2
Sheet
1
5
of
51
2
1
VCC_CORE_S0
SC10U10V5KX-2GP
1
C272
2
SC10U10V5KX-2GP
1
C274
2
SC10U10V5KX-2GP
1
C267
DY
2
1
SC10U10V5KX-2GP
2
C268
2
1
C263
DY
SC10U10V5KX-2GP
2
1
C258
SC10U10V5KX-2GP
2
1
C271
SC10U10V5KX-2GP
1
Place these capacitors on L1
(North side ,Secondary Layer)
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
D
VCC_CORE_S0
SC10U10V5KX-2GP
1
C540
2
SC10U10V5KX-2GP
1
C558
2
1
SC10U10V5KX-2GP
2
C275
2
1
C256
SC10U10V5KX-2GP
2
1
C257
SC10U10V5KX-2GP
2
1
C532
SC10U10V5KX-2GP
1
2
Place these capacitors on L1
(North side ,Secondary Layer)
SC10U10V5KX-2GP
C559
C
Mid Frequencd
Decoupling
B
C278
SCD1U16V2KX-3GP
2
C279
SCD1U16V2KX-3GP
1
2
2
C248
SCD1U16V2KX-3GP
1
C249
SCD1U16V2KX-3GP
1
C247
SCD1U16V2KX-3GP
2
1D05V_S0
1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
4 OF 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
U56D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
SC10U10V5KX-2GP
C251
1
B
3
2
C
4
1
D
5
C280
SCD1U16V2KX-3GP
Place these
inside socket
cavity on L1
(North side
Secondary)
BGA479-SKT6-GPU3
& lt; Core Design & gt;
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Meron(3/3)-GND & Bypass
Size
A3
Document Number
Date: Monday, July 30, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
6
of
51
H_AVREF
H_DVREF
1
R284
2
10KR2J-3-GP
TP98
TP102
TP100
TP105
TP106
TP96
TP99
TP97
TP104
CFG16
TP95
TP93
TP92
From Astro demo schematic
4
4
4
4
4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
TP101
CFG[17:3] have internal pull up
CFG[19:18] have internal pull down
CFG18
CFG19
CFG20
4
4
4
20 PM_BMBUSY#
5,19,38 H_DPRSTP#
13 PM_EXTTS#0
14 PM_EXTTS#1
4,19 H_THERMTRIP#
20,38 DPRSLPVR
20,22 PM_PWROK
20,38 VGATE_PWRGD
1D05V_S0
0R2J-2-GP
R277
1
1
PM_POK_R
2
R278
2
0R0402-PAD
1
1
2
H_SWNG
2
1
1
1
Layout Note :
Place C151 within 100 mils of NB
R325
100R2F-L1-GP-U
2
SCD1U16V2ZY-2GP
1
2
2
R144
24D9R2F-L-GP
2
2
1
C568
H_RCOMP
C577
SCD1U16V2ZY-2GP
BG20 DDR_CS0_DIMMA#
BK16 DDR_CS1_DIMMA#
BG16 DDR_CS2_DIMMB#
BE13 DDR_CS3_DIMMB#
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
13
13
14
14
BH18
BJ15
BJ14
BE16
M_ODT0
M_ODT1
M_ODT2
M_ODT3
BK31
BL31
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_RCOMP
SM_RCOMP#
BL15
BK14
SM_RCOMP
SM_RCOMP#
SM_VREF#AR49
SM_VREF#AW4
AR49
AW4
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
1
R314
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
M_ODT0
M_ODT1
M_ODT2
M_ODT3
13
13
14
14
2
2 20R2F-GP
20R2F-GP
DDR_VREF_S3
DDR_VREF_S3
B42
C42
H48
H47
PEG_CLK
PEG_CLK#
K44 CLK_MCH_3GPLL
K45 CLK_MCH_3GPLL#
AN47
AJ38
AN42
AN46
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
AM47
AJ39
AN41
AN45
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
AJ46
AJ41
AM40
AM44
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
AJ47
AJ42
AM39
AM43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
20
20
20
20
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
20
20
20
20
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
20
20
20
20
C
20
20
20
20
2D5V_S0
R292
DY
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2
R290
2K2R2J-2-GP
2K2R2J-2-GP
DY
ICH_SDVO_DATA
ICH_SDVO_CLK
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN
E35
A39
C38
B39
E36
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AM49
AK50
AT43
AN49
AM50
DFGT_VID0
DFGT_VID1
DFGT_VID2
DFGT_VID3
DFGT_VR_EN
TP91
TP27
TP88
TP87
TP94
B
1D25V_S0
CLPWROK_MCH 1
2
R308 0R0402-PAD
CL_VREF
CL_CLK0 20
CL_DATA0 20
VGATE_PWRGD 20,38
CL_RST#
20
R99
1KR2F-3-GP
R98
392R2F-GP
C215
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLKREQ#
ICH_SYNC#
TEST1
TEST2
H35
K36
G39
G40
ICH_SDVO_CLK
ICH_SDVO_DATA
TP90
TP89
CLKREQ#_B
3
MCH_ICH_SYNC#
MCH_ICH_SYNC#
A37 TEST1_GMCH
R32 TEST2_GMCH
1
R298
1
2
R124
20
2
0R0402-PAD
CFG9
2
2K2R2J-2-GP
D
1D8V_S3
1
R128 1
R315
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
NC
NC
R319
2KR2F-3-GP
R323
221R2F-2-GP
H_VREF
G41
L39
L36
J36
AW49
AV20
N20
G36
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
DY
1D05V_S0
R320
1KR2F-3-GP
PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_POK_R
PLT_RST_R#
H_THERMTRIP#
DPRSLPVR
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
13
13
14
14
SM_RCOMP_VOH
SM_RCOMP_VOL
PM
PM
CRESTLINE-GP-U-NF
Layout Note :
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
13
13
14
14
1
CLKREQ#_B
BE29 DDR_CKE0_DIMMA
AY32 DDR_CKE1_DIMMA
BD39 DDR_CKE2_DIMMB
BG37 DDR_CKE3_DIMMB
CLK
2
10KR2J-3-GP
SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4
DMI
1
R288
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
1
2
PM_EXTTS#1
AW30 M_CLK_DDR#0
BA23 M_CLK_DDR#1
AW25 M_CLK_DDR#2
AW23 M_CLK_DDR#3
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
1
2
SCD01U25V2KX-3GP
2
C264
2
10KR2J-3-GP
layout note :
Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces
SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4
DDR MUXING
1
SCD01U25V2KX-3GP
2
1
2
1
H_RS#0
H_RS#1
H_RS#2
1
R300
B
A
C255
SC2D2U10V3ZY-1GP
2
1
C252
H_RS#0
H_RS#1
H_RS#2
PM_EXTTS#0
13
13
14
14
2
E12
D7
D8
5
5
5
5
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
3D3V_S0
RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24
RSVD#BJ29
RSVD#BE24
RSVD#BH39
RSVD#AW20
RSVD#BK20
RSVD#C48
RSVD#D47
RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
2
H_RS#0
H_RS#1
H_RS#2
H_CPURST#
H_CPUSLP#
5
5
5
5
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
DDR_A_MA14
DDR_B_MA14
3 MCH_CLKSEL0
3 MCH_CLKSEL1
3 MCH_CLKSEL2
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
AV29
BB23
BA25
AV23
2
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_SCOMP
H_SCOMP#
M14
E13
A11
H13
B12
R127
1KR2F-3-GP
13 DDR_A_MA14
14 DDR_B_MA14
5
5
5
5
SM_CK0
SM_CK1
SM_CK3
SM_CK4
1
B9
A9
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20
1
H_VREF
B6
E5
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
L7
K2
AC2
AJ10
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
R125
1KR2F-3-GP
2
H_RESET#
H_CPUSLP#
H_SWING
H_RCOMP
M7
K3
AD2
AH11
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI#
4
H_BR0# 4
H_DEFER#
4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 5
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK#
4
H_TRDY#
4
FOR Calero: 80.6 ohm
Crestline: 20 ohm
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
1
4
5
H_RESET#
H_CPUSLP#
B3
C2
W1
W2
SM_RCOMP_VOL
1
U18B 2 OF 10
1D8V_S3
R126
3K01R2F-3-GP
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
2
SCD1U16V2KX-3GP
2
H_SCOMP
H_SCOMP#
K5
L2
AD13
AE13
3
4
SM_RCOMP_VOH
H_ADS#
G12
H_ADSTB#0
H17
H_ADSTB#1
G20
H_BNR#
C8
H_BPRI#
E8
H_BR0#
F12
H_DEFER#
D6
H_DBSY#
C10
CLK_MCH_BCLK
AM5
CLK_MCH_BCLK#
AM7
H_DPWR#
H8
H_DRDY#
K7
H_HIT#
E4
H_HITM#
C6
H_LOCK#
G10
H_TRDY#
B7
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_A#[3..35]
GRAPHICS VID
2
H_SWNG
H_RCOMP
4
CFG
CFG
54D9R2F-L1-GP
1
R141
54D9R2F-L1-GP
2
1
R133
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
ME
1D05V_S0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
MISC
C
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
1
D
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
RSVD
RSVD
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
C265
SC2D2U10V3ZY-1GP
1
2
U18A 1 OF 10
5
H_D#[0..63]
HOST
5
20KR2J-L2-GP
CRESTLINE-GP-U-NF
Layout Note :
Place C153 near
pin B3 of NB
1
R291
ICH_SDVO_DATA
2
2K2R2J-2-GP
A
& lt; Core Design & gt;
R316
PLT_RST_R#
1
2
Wistron Corporation
PLT_RST1# 18,20,23,29,31,32,45
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
100R2J-2-GP
Title
CRESTLINE(1/6)-AGTL+/DMI/DDR2
Size
Document Number
Custom
Date: Wednesday, August 15, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
7
of
51
5
4
3
DDR_A_D[0..63]
1
13
DDR_A_BS[0..2]
2
13
DDR_B_D[0..63]
DDR_A_DQS[0..7]
14
DDR_B_DM[0..7]
DDR_A_DM[0..7]
D
14
DDR_B_BS[0..2]
14
13
DDR_B_DQS[0..7]
B
14
U18E 5 OF 10
SA_BS0
SA_BS1
SA_BS2
BB19
BK19
BF29
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
SA_CAS#
BL17
DDR_A_CAS#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDR SYSTEM MEMORRY A
C
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
SA_RAS#
SA_RCVEN#
BE18
AY20
DDR_A_RAS#
SA_RCVEN#
SA_WE#
BA19
DDR_A_WE#
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_A_CAS# 13
DDR_A_RAS# 13
TP107
DDR_A_WE# 13
CRESTLINE-GP-U-NF
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
SB_BS1
SB_BS2
AY17
BG18
BG36
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
SB_CAS#
BE17
DDR_B_CAS#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
DDR SYSTEM MEMORY B
U18D 4 OF 10
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
14
13
DDR_B_MA[0..13]
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
14
13
DDR_B_DQS#[0..7]
DDR_A_MA[0..13]
D
13
DDR_A_DQS#[0..7]
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
SB_RAS#
SB_RCVEN#
AV16
AY18
DDR_B_RAS#
SB_RCVEN#
SB_WE#
BC17
DDR_B_WE#
DDR_B_CAS# 14
C
DDR_B_RAS#
TP108
DDR_B_WE#
B
14
14
CRESTLINE-GP-U-NF
& lt; Core Design & gt;
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRESTLINE(2/6)-DDR2 A/B CH
Size
A3
Document Number
5
4
3
2
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
Sheet
1
8
of
51
5
4
3
1D05V_S0
U18C 3 OF 10
L41
L43
N41
N40
D46
C45
D44
E42
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
G51
E51
F49
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
G50
E50
F48
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
E44
A47
A45
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
C
TVA_DAC
TVB_DAC
TVC_DAC
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
P33
TV_DCONSEL0
TV_DCONSEL1
TV
TV
E27
G27
K27
K33
G35
E33
C32
F33
B
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_VSYNC
CRT_TVO_IREF
CRT_HSYNC
VGA
VGA
H32
G32
K29
J29
F29
E29
N43
M43
PEGCOMP trace
width and spacing
is 20/25 mils.
PEGCOMP
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
G44
B47
B45
PEG_COMPI
PEG_COMPO
PCI_EXPRESS GRAPHICS
D
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS
J40
H39
E39
E40
C37
D35
K40
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
M45 TXP0
T38 TXP1
T46 TXP2
N50 TXP3
R51 TXP4
U43 TXP5
W42 TXP6
Y47 TXP7
Y39 TXP8
AC38 TXP9
AD47 TXP10
AC50 TXP11
AD43 TXP12
AG39 TXP13
AE50 TXP14
AH43 TXP15
C460
C478
C455
C211
C212
C473
C469
C458
C490
C462
C464
C447
C457
C449
C208
C444
C461
C479
C454
C210
C213
C472
C470
C459
C494
C463
C465
C446
C456
C448
C209
C445
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
010 = FSB 800MHz
011 = FSB 667MHz
Others = Reserved
CFG5 (DMI select)
PEG_RXN15 45
PEG_RXN14 45
PEG_RXN13 45
PEG_RXN12 45
PEG_RXN11 45
PEG_RXN10 45
PEG_RXN9 45
PEG_RXN8 45
PEG_RXN7 45
PEG_RXN6 45
PEG_RXN5 45
PEG_RXN4 45
PEG_RXN3 45
PEG_RXN2 45
PEG_RXN1 45
PEG_RXN0 45
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CFG[2:0] FSB Freq select
PEG_RXP15 45
PEG_RXP14 45
PEG_RXP13 45
PEG_RXP12 45
PEG_RXP11 45
PEG_RXP10 45
PEG_RXP9 45
PEG_RXP8 45
PEG_RXP7 45
PEG_RXP6 45
PEG_RXP5 45
PEG_RXP4 45
PEG_RXP3 45
PEG_RXP2 45
PEG_RXP1 45
PEG_RXP0 45
N45 TXN0
U39 TXN1
U47 TXN2
N51 TXN3
R50 TXN4
T42 TXN5
Y43 TXN6
W46 TXN7
W38 TXN8
AD39 TXN9
AC46 TXN10
AC49 TXN11
AC42 TXN12
AH39 TXN13
AE49 TXN14
AH44 TXN15
2
Strap Pin Table
1
2
R281 24D9R2F-L-GP
0 = DMI x 2
1 = DMI x 4
CFG6
D
Reserved
0 = Reserved
1 = Mobile CPU
CFG7 (CPU Strap)
*
0 = Normal mode
1 = Low Power mode
CFG8 (Low power PCIE)
CFG9
(PCIE Graphics Lane Reversal)
*
0 = Reverse Lane
1 = Normal Operation
CFG[11:10]
*
Reserved
00
01
10
11
CFG[13:12] (XOR/ALLZ)
CFG[15:14]
=
=
=
=
Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation (Default)*
Reserved
0 = Disable
1 = Enable *
CFG16 (FSB Dynamic ODT)
PEG_TXP15 45
PEG_TXP14 45
PEG_TXP13 45
PEG_TXP12 45
PEG_TXP11 45
PEG_TXP10 45
PEG_TXP9 45
PEG_TXP8 45
PEG_TXP7 45
PEG_TXP6 45
PEG_TXP5 45
PEG_TXP4 45
PEG_TXP3 45
PEG_TXP2 45
PEG_TXP1 45
PEG_TXP0 45
*
CFG[18:17]
C
Reversed
SDVO_CTRLDATA
0 = No SDVO Device Present *
1 = SDVO Device Present
0 = Normal Operation
(Lane number in Order)
1 = Reverse lane
CFG19(DMI Lane Reversal)
*
0 = Only PCIE or SDVO is operational *
1 = PCIE/SDVO are operating simu.
CFG20(PCIE/SDVO consurrent)
PEG_TXN15 45
PEG_TXN14 45
PEG_TXN13 45
PEG_TXN12 45
PEG_TXN11 45
PEG_TXN10 45
PEG_TXN9 45
PEG_TXN8 45
PEG_TXN7 45
PEG_TXN6 45
PEG_TXN5 45
PEG_TXN4 45
PEG_TXN3 45
PEG_TXN2 45
PEG_TXN1 45
PEG_TXN0 45
B
CRESTLINE-GP-U-NF
& lt; Core Design & gt;
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
CRESTLINE(3/6)-VGA/LVDS/TV
Document Number
Document Number
5
4
3
2
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
Sheet
1
9
of
51
2
1
Intel spec:
VCC_RXR_DMI , Imax=200 mA
1
2
1
1
2
SCD22U16V3ZY-GP
1
1
2
1
2
1
C288
2
2
SSM5818SLPT-GP
R295
2
1
0R0402-PAD
1
1
1
2
1D25V_S0
C281 BLM18AG121SN-1GP
3D3V_S0_HV
1
1
1
0R0805-PAD
R108
1
B
L13
1D05V_S0
1D05V_S0_D
D19
10R2J-2-GP
3D3V_S0
2
1D05V_S0
C194
2
2
TC3
ST220U2VBM-3GP
C571
2
2
TC17
1
1
1
2
1D25V_S0
2
1D25V_S0_MPLL
R81
60mil
ST220U2VBM-3GP
C284
2
1
2
1
2
1
HV
PEG
2
CRESTLINE-GP-U-NF
C283
SCD47U16V3ZY-3GP
VCCD_LVDS
VCCD_LVDS
1
VCCD_PEG_PLL
J41
H42
A7
F2
AH1
1
1D25V_S0_PEGPLL
VTTLF
VTTLF
VTTLF
SCD47U16V3ZY-3GP
2
VCCD_HPLL
U48
20mil
SCD47U16V3ZY-3GP
2
AN2
VTTLF1
VTTLF2
VTTLF3
1
1D25V_S0_HPLL
VTTLF
VCCD_QDAC
AH50
AH51
2
C573 BLM18AG121SN-1GP
1D05V_S0_PEG
SCD1U16V2ZY-2GP
N28
VCC_RXR_DMI
VCC_RXR_DMI
C
SC10U10V5KX-2GP
Intel spec:
VCC_PEX ,Imax=1200 mA
SC10U10V5KX-2GP
VCCD_CRT
VCCD_TVDAC
1D05V_S0_PEG
SC10U10V5KX-2GP
M32
L29
AD51
W50
W51
V49
V50
1D5V_S0
L29
1
C575
C506
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
2
C526 0R0805-PAD
1D25V_S0_HPLL
3D3V_S0_HV
VCCA_TVA_DAC
VCCA_TVA_DAC
VCCA_TVB_DAC
VCCA_TVB_DAC
VCCA_TVC_DAC
VCCA_TVC_DAC
1D8V_S3
1
C40
B40
C201
A43
VCC_HV
VCC_HV
DY
C198
1
VCC_TX_LVDS
2
1
2
1D8V_S3_SM_CK
DY
C525
2
VCCA_SM_CK
VCCA_SM_CK
2
SC4D7U6D3V3KX-GP
1
2
1
2
BK24
BK23
BJ24
BJ23
AXF
1D25V_S0_DMI
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
SM CK
A SM
BC29
BB29
C25
B25
C27
B27
B28
A28
1D5V_S0_TVDAC
AJ50
1D25V_S0_AXF
1
A PEG
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM_NCTF
VCCA_SM_NCTF
A CK
C527
AT22
AT21
AT19
AT18
AT17
AR17
AR16
TV
SC1U10V3KX-3GP
1
SCD22U16V3ZY-GP
2
1
2
SC4D7U25V5KX-GP
1
1
2
1
C524
C552
B23
B21
A21
2
C547 0R0805-PAD
1 R328
1D05V_S0_PEG
VCC_AXF
VCC_AXF
VCC_AXF
D
1D5V_S0_TVDAC
MV-2
SCD1U16V2ZY-2GP
SCD22U16V3ZY-GP
2
1
C519
C562
SCD1U16V2ZY-2GP
2
C512
SC1U10V3KX-3GP
2
0R0603-PAD
DY
1
DY
2
C582
C530
SCD1U16V2ZY-2GP
1D25V_S0_SM_CK
R139
1
ST22U6D3VBM-1GP
1
2
C581
SC1U10V3KX-3GP
2
0R0805-PAD
0R0805-PAD
SCD1U16V2ZY-2GP
2
BLM18PG121SN-1GP
2
SCD1U16V2ZY-2GP
1 R143
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
DY
C535
C538
SC10U10V5KX-2GP
VCC_DMI
AW18
AV19
AU19
AU18
AU17
1D25V_S0_A_SM
AR29
VCCA_PEG_PLL
TV/CRT
2
1D25V_S0
U51
DMI
1
2
20mil
1D25V_S0_PEGPLL
VCC_AXD_NCTF
C545
C214
1D25V_S0
SCD1U16V2ZY-2GP
C218
SCD1U16V2ZY-2GP
1D25V_S0
1 R140
1 R103
2
SCD022U16V2KX-3GP
C
SC10U10V5KX-2GP
2
VSSA_PEG_BG
C205
1
K49
LVDS
0R0603-PAD
1D25V_S0_AXD
AT23
AU28
AU24
AT29
AT25
AT30
L12
1
2
VCCA_PEG_BG
2
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
1D25V_S0_PEGPLL
SC2D2U6D3V3MX-1-GP
K50
3D3V_S0_PEG_BG
1 R97
1
3D3V_S0
POWER
SC4D7U6D3V3KX-GP
VSSA_LVDS
SC1KP50V2KX-1GP
SC1U10V3KX-3GP
VCCA_LVDS
B41
C499
1D25V_S0
C539
SC1U16V3ZY-GP
C544
SC10U10V5KX-2GP
2
0R0603-PAD
1D8V_S3_SM_CK
C565
1
VCCA_MPLL
A41
1
AM2
2
1D25V_S0_MPLL
1D8V_S0_TXLVDS
PLL
VCCA_HPLL
A LVDS
AL2
AXD
VCCA_DPLLB
1D25V_S0_HPLL
C207 0R0603-PAD
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
H49
1D25V_S0
C504
C503
2
VCCA_DPLLA
2
SCD1U16V2ZY-2GP
B49
TC18
2
VSSA_DAC_BG
DY
SCD47U16V3ZY-3GP
2
1
VCCA_DAC_BG
B32
VTT
A30
CRT
VCCA_CRT_DAC
VCCA_CRT_DAC
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
SCD1U16V2ZY-2GP
A33
B33
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
1
ST220U2VBM-3GP
VCC_SYNC
1 R311
1 R102
1
C509
2
U18H 8 OF 10
J32
1D25V_S0_AXF
1D25V_S0_DMI
2
1D05V_S0
D
B
3
2
4
SCD22U16V3ZY-GP
5
C501
SCD1U16V2KX-3GP
& lt; Core Design & gt;
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
CRESTLINE(4/6)-PWR
Document Number
5
4
3
2
Rev
ME3-Discrete
Date: Sunday, September 09, 2007
Sheet
1
10
of
51
5
4
2
1
1D05V_S0
1D05V_S0
LIB C
U18F 6 OF 10
SCD22U10V2KX-1GP
1
2
1
2
SC4D7U6D3V3KX-GP
2
1
C498
1
SC1U10V3KX-3GP
2
SC1U10V3KX-3GP C476
C495
1
SCD47U16V3ZY-3GP
2
C576
1
SCD22U10V2KX-1GP C557
2
1
SCD22U10V2KX-1GP
2
C567
1
1
2
SC10U10V5KX-2GP C548
2
1
C554
1
SC10U10V5KX-2GP
2
ST220U2VBM-3GP
1
VCC GFX NCTF
CRESTLINE-GP-U-NF
2
1
10R2J-2-GP
2
2
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
SCD1U16V2ZY-2GP
K
AW45
BC39
BE39
BD17
BD4
AW8
AT6
B
C569
1
R303
A
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
D
C537
C
1
D29
CH751H-40PT-1GP
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
C550
2
3D3V_S0
2
1
2
1D05V_S0
TC19
R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
VCC SM LF
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
CRESTLINE-GP-U-NF
SC1U10V3KX-3GP C555
1D05V_S0
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC SM
1D05V_S0
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
VCC GFX
1
1
SC22U6D3V5MX-2GP
2
1
2
ST220U2VBM-3GP
1
VSS AXM
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
2
TP32
TP36
TP37
TP38
TP9
TP11
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
SC22U6D3V5MX-2GP
2
VSS NCTF
VSS SCB
A3
B2
C1
BL1
BL51
A51
VSS AXM NCTF
1
2
1
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
2
1
2
1
2
1
1
2
2
DY
SCD1U16V2ZY-2GP
1
TC4
C553
2
POWER
1D8V_S3
C508 SCD01U16V2KX-3GP
C516
C513
C518
C518
C510 C549
0R0603-PAD
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
SCD1U16V2ZY-2GP
VCC
VCC CORE
2VCC_GMCH1 R30
R305
1
C259
B
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
POWER
1D05V_S0
AL24
AL26
AL28
C563
AM26
C566
AM28
SC10U10V5KX-2GP
AM29
SC10U10V5KX-2GP AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
C514
C
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC NCTF
1
2
1
1
2
1
1
2
SC22U6D3V5MX-2GP
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
ST220U2VBM-3GP
2
C533
C533
C534
C520
C520
C574
TC12
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
SCD1U16V2ZY-2GP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C529
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
U18G 7 OF 10
1D05V_S0
D
A
3
A
& lt; Core Design & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRESTLINE(5/6)-PWR/GND
Size
Document Number
Custom
Date: Monday, July 30, 2007
Rev
ME3-Discrete
Sheet
11
of
51
5
4
U18I
A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
D
C
B
A
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3
9 OF 10
VSS
2
U18J
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
1
10 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
D
C
VSS
B
CRESTLINE-GP-U-NF
& lt; Core Design & gt;
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
CRESTLINE-GP-U-NF
CRESTLINE(6/6)-PWR/GND
Document Number
Date: Monday, July 30, 2007
5
4
A
Wistron Corporation
3
2
Rev
ME3-Discrete
Sheet
1
12
of
51
5
4
3
2
8 DDR_A_DQS#[0..7]
DM2
1
TC5
2
ST220U2VBM-3GP
1
2
1
C231
SCD1U16V2ZY-2GP
2
1
C237
SCD1U16V2ZY-2GP
2
1
C515
SCD1U16V2ZY-2GP
2
1
C228
SCD1U16V2ZY-2GP
2
1
C266
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
2
1
C260
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_VREF_S0
1
C234
C253
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
C227
2
1
C243
2
1
C219
2
1
C502
2
1
C507
2
1
C493
2
1
DY
C497
2
1
C481
2
1
DY
2
1
C483
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
DY
C468
2
C474
SCD1U16V2ZY-2GP
2
1
DY
B
Layout Note:
Place these resistors
closely DM1,all
trace length Max=1.5 "
DDR_VREF_S0
SRN56J-4-GP
DDR_A_BS2
1
DDR_CKE0_DIMMA
2
RN51 SRN56J-4-GP
DDR_A_MA7
4
1
DDR_A_MA6
3
2
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DDR_A_RAS#
DDR_CS0_DIMMA#
RN54 SRN56J-4-GP
1
4
2
3
4
3
RN11 SRN56J-4-GP
DDR_A_MA12
1
DDR_A_MA9
2
DDR_A_MA10
DDR_A_BS0
RN19 SRN56J-4-GP
1
4
2
3
4
3
RN52 SRN56J-4-GP
DDR_A_MA4
1
DDR_A_MA2
2
13
31
51
70
131
148
169
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DDR_A_WE#
DDR_CS1_DIMMA#
RN22 SRN56J-4-GP
1
4
2
3
4
3
RN53 SRN56J-4-GP
DDR_A_MA0
1
DDR_A_BS1
2
M_ODT1
DDR_A_CAS#
RN25 SRN56J-4-GP
1
4
2
3
4
3
RN55 SRN56J-4-GP
M_ODT0
1
DDR_A_MA13
2
RN49 SRN56J-4-GP
DDR_CKE1_DIMMA 1
4
2
3
4
3
RN50 SRN56J-4-GP
1 DDR_A_MA14
DDR_A_MA11
2
DDR_VREF_S3
7
7
M_ODT0
M_ODT1
DDR_VREF_S3
114
119
OTD0
OTD1
1
2
SC2D2U16V5ZY-2GP
DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#
DDR_CS0_DIMMA# 7
DDR_CS1_DIMMA# 7
DDR_CKE0_DIMMA 7
DDR_CKE1_DIMMA 7
DDR_A_RAS# 8
DDR_A_WE# 8
DDR_A_CAS# 8
CS0#
CS1#
110
115
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
CKE0
CKE1
79
80
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
CK0
CK0#
30
32
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 7
M_CLK_DDR#0 7
CK1
CK1#
164
166
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 7
M_CLK_DDR#1 7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
10
26
52
67
130
147
170
185
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SDA
SCL
195
197
ICH_SMBDATA
ICH_SMBCLK
VDDSPD
199
SA0
SA1
198
200
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
50
69
83
120
163
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
D
ICH_SMBDATA 3,14,20
ICH_SMBCLK 3,14,20
SCD1U16V2ZY-2GP
R321 1
R322 1
2 10KR2J-3-GP
2 10KR2J-3-GP
3D3V_S0
C570
PM_EXTTS#0 7
C572
SC2D2U6D3V3KX-GP
1D8V_S3
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
202
GND
GND
201
MH1
MH1
MH2
MH2
C
B
1
DDR_A_MA3
DDR_A_MA1
RN16 SRN56J-4-GP
1
4
2
3
C84
C90
2
RN8
4
3
1
RN13 SRN56J-4-GP
1
4
2
3
2
DDR_A_MA8
DDR_A_MA5
A
11
29
49
68
129
146
167
186
DY
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
2
DY
C250
2
1
C242
SC2D2U16V5ZY-2GP
C
C223
SC2D2U16V5ZY-2GP
2
1
DY
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_ODT0
M_ODT1
1D8V_S3
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
7 DDR_A_MA14
BA0
BA1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
8 DDR_A_BS[0..2]
Layout Note:
Place near DM1
107
106
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
8 DDR_A_MA[0..13]
108
109
113
RAS#
WE#
CAS#
1
DDR_A_BS0
DDR_A_BS1
8 DDR_A_DQS[0..7]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
2
DDR_A_BS2
8 DDR_A_DM[0..7]
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
1
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
2
8 DDR_A_D[0..63]
D
1
A
& lt; Variant Name & gt;
SCD1U16V2ZY-2GP
Wistron Corporation
DDR2-200P-20-GP-U
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDRII-SODIMM SLOT1
Size
Custom
Date:
5
4
3
2
Document Number
Rev
ME3-Discrete
Wednesday, August 15, 2007
Sheet
13
1
of
51
5
4
3
2
1
8 DDR_B_DQS#[0..7]
8 DDR_B_D[0..63]
DM1
8 DDR_B_DM[0..7]
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
C261
DDR_B_BS0
DDR_B_BS1
107
106
BA0
BA1
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
11
29
49
68
129
146
167
186
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
13
31
51
70
131
148
169
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
M_ODT2
M_ODT3
114
119
OTD0
OTD1
1
2
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
GND
201
MH1
MH2
MH2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
C
DDR_VREF_S0
1
C232
SCD1U16V2ZY-2GP
2
1
C203
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
C224
SCD1U16V2ZY-2GP
2
1
C241
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
C244
2
1
C240
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
C233
2
1
C262
2
1
C239
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
DY
C220
2
1
C204
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
C254
2
1
DY
C246
SCD1U16V2ZY-2GP
2
1
DY
B
Layout Note:
Place these resistors
closely DM2,all
trace length Max=1.5 "
DDR_VREF_S0
RN17
DDR_B_MA3
DDR_B_MA1
SRN56J-4-GP
1
4
2
3
4
3
1
2
RN20
DDR_B_MA10
DDR_B_BS0
SRN56J-4-GP
1
4
2
3
RN7
4
3
SRN56J-4-GP
DDR_CKE3_DIMMB
1
DDR_B_MA11
2
RN18
SRN56J-4-GP
1
4
2
3
RN14
DDR_B_MA0
DDR_B_BS1
4
3
SRN56J-4-GP
DDR_B_MA5
1
DDR_B_MA8
2
RN21
DDR_CS2_DIMMB#
DDR_B_RAS#
SRN56J-4-GP
1
4
2
3
RN12
4
3
SRN56J-4-GP
DDR_B_MA7
1
DDR_B_MA6
2
RN23
DDR_B_WE#
DDR_B_CAS#
SRN56J-4-GP
1
4
2
3
RN15
4
3
SRN56J-4-GP
DDR_B_MA4
1
DDR_B_MA2
2
RN26
DDR_CS3_DIMMB#
M_ODT3
RN24
1
2
SRN56J-4-GP
M_ODT2
1
DDR_B_MA13
2
RN6
SRN56J-4-GP
DDR_B_BS2
1
DDR_CKE2_DIMMB
2
RN9
DDR_B_MA14
SRN56J-4-GP
4
3
SRN56J-4-GP
1
4
2
3
RN10
4
3
4
3
DDR_B_MA12
DDR_B_MA9
DDR_VREF_S3
7
7
M_ODT2
M_ODT3
SC2D2U16V5ZY-2GP
DDR_VREF_S3
1
C85
2
C77
2
110
115
79
80
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
CK0
CK0#
30
32
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 7
M_CLK_DDR#2 7
CK1
CK1#
164
166
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 7
M_CLK_DDR#3 7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
10
26
52
67
130
147
170
185
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SDA
SCL
195
197
ICH_SMBDATA
ICH_SMBCLK
VDDSPD
199
SA0
SA1
198
200
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
50
69
83
120
163
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
D
ICH_SMBDATA 3,13,20
ICH_SMBCLK 3,13,20
SCD1U16V2ZY-2GP
R327 1
R330 1
2 10KR2J-3-GP
2 10KR2J-3-GP
3D3V_S0
C585
PM_EXTTS#1 7
3D3V_S0
C578
SC2D2U6D3V3KX-GP
C
1D8V_S3
B
A
1
SRN56J-4-GP
A
CS0#
CS1#
CKE0
CKE1
1
1
1
2
SCD1U16V2ZY-2GP
2
1
C230
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
C187
2
1
1
C491
SCD1U16V2ZY-2GP
2
1
C238
SC2D2U16V5ZY-2GP
2
1
C467
SC2D2U16V5ZY-2GP
2
1
C245
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
2
1
C480
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
2
C551
DDR_B_RAS# 8
DDR_B_WE# 8
DDR_B_CAS# 8
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
2
7 DDR_B_MA14
DY
RAS#
WE#
CAS#
1
1D8V_S3
DY
DDR_CS2_DIMMB# 7
DDR_CS3_DIMMB# 7
DDR_CKE2_DIMMB 7
DDR_CKE3_DIMMB 7
DDR_B_BS2
8 DDR_B_BS[0..2]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
2
Layout Note:
Place near DM2
DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#
DY
8 DDR_B_MA[0..13]
D
108
109
113
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
8 DDR_B_DQS[0..7]
202
MH1
& lt; Variant Name & gt;
Wistron Corporation
SCD1U16V2ZY-2GP
DDR2-200P-21-GP-U
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDRII-SODIMM SLOT2
Size
Custom
Document Number
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
5
4
3
2
Sheet
1
14
of
51
B
C
D
CRT I/F & CONNECTOR
5V_CRT_S0
5V_S0
F1
46
2
SB
C22
SCD01U16V2KX-3GP
6
1
1CRT_R
TPAD30 TP4
A
CH751H-40PT-1GP
RN3
SRN2K7J-3-GP
17
CRT_R
1
2
BLM18BB470SN1-GP
K
CRT1
DY
L7
VGA_RED
D1
5V_CRT_S0_D
1
POLYSW-1A6V-3-GP
4
11
4
3
4
1
2
Layout Note:
Place these resistors
close to the CRT-out
connector
E
1
2
A
L4
TPAD30 TP3
1CRT_G
TPAD30 TP2
CRT_G
1
2
BLM18BB470SN1-GP
1CRT_B
L1
JVGA_HS
14
JVGA_VS
15
DDC_CLK_CON
1
20.20424.015
DY
DY
1
1
SC22P50V2JN-4GP
C26
C75
SC33P50V2JN-3GP
SC22P50V2JN-4GP
C60
2
2
C24
SC33P50V2JN-3GP
1
VIDEO-15-57-GP-U1
2
2
C28
1
1
2
DDC_DATA_CON
13
16
SC2P50V2CN-GP
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
C33
SC2P50V2CN-GP
1
C43
SC2P50V2CN-GP
2
2
SC10P50V2JN-4GP
C29
SC10P50V2JN-4GP
2
1
1
1
C34
2
1
2
R17
150R2F-1-GP
1
2
R19
150R2F-1-GP
1
R25
150R2F-1-GP
2
3
C44
SC10P50V2JN-4GP
CRT_B
1
2
BLM18BB470SN1-GP
46 VGA_BLUE
12
2
46 VGA_GREEN
7
2
8
3
9
4
10
5
DY
DY
5V_CRT_S0
2
CRT_R
BAV99-7-F-GP
3
D8
3
DY
1
3D3V_S0
Hsync & Vsync level shift
5V_S0
4
3
2
3D3V_S0
1
CRT_G
D4
DY
1
2
U8
1
14
1
2
2
BAV99-7-F-GP
SRN2K7J-3-GP
RN4
C16
SCD1U16V2ZY-2GP
3
CRT_B
7
4
14
U5A
TSAHCT125PW-GP
1
2
VSYNC_5
6
4
3
JVGA_HS
JVGA_VS
BAV99-7-F-GP
D2
1
2N7002DW-1-GP
2
DDC_DATA_CON
46 VGA_DDCCLK
DDC_CLK_CON
SRN33J-5-GP-U
7
1
U5B
DY
2
6
46 VGA_DDCDATA
HSYNC_5
3
DDC_DATA_CON
RN2
5
46 GMCH_VSYNC
3
3
5
2
46 GMCH_HSYNC
4
BAV99-7-F-GP
3
D12
DY
1
TSAHCT125PW-GP
DDC_CLK & DATA level shift
2
2
2
DDC_CLK_CON
BAV99-7-F-GP
1
C442
1
2
L26
BLM18BB221SN1D-GP
C441
SC82P50V2JN-3GP
BAV99-7-F-GP
1
3
D5
TV_LUMA
TV_CRMA
TV_COMP
1
SB
1
C437
2
1
C425
SC82P50V2JN-3GP
C426
SC82P50V2JN-3GP
4
6
7
LUMA
CRMA
COMP
5
2
L23
BLM18BB221SN1D-GP
1
BAV99TPT-GP
JVGA_VS
NC#5
NC#2
1
3
8
9
BAV99-7-F-GP
D18
2
GND
GND
GND
GND
TV_LUMA
3
D3
1
BAV99TPT-GP
& lt; Variant Name & gt;
1
Wistron Corporation
22.10021.H31
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
D14
1
2
1
2
1
R256
150R2F-1-GP
2
SB
1
2
MINDIN7-18-GP
2
SC8P250V2CC-GP
2
L24
BLM18BB221SN1D-GP
C433
SC82P50V2JN-3GP
DY
3
1
46 VGA_TV_COMP
TV_CRMA
C434
SC82P50V2JN-3GP
2
Title
3
CRT/TV CONNECTOR
1
Size
A3
BAV99TPT-GP
Document Number
Rev
ME3-Discrete
Date: Thursday, September 13, 2007
A
DY
2
2
1
R250
150R2F-1-GP
JVGA_HS
TV1
2
SC8P250V2CC-GP
1
2
2
2
3
TV OUT CONN
1
2
1
2
1
R258
150R2F-1-GP
2
SB
1
C429
46 VGA_TV_CRMA
1
1
D16
2
SC8P250V2CC-GP
TV_COMP
C440
SC82P50V2JN-3GP
DY
3D3V_S0
Layout Note:
close to the TV-out connector
46 VGA_TV_LUMA
3
D13
B
C
D
Sheet
E
15
of
51
LCD/INVERTER CONN
3D3V_S0
SC
SC
DCBATOUT
5V_S5
5V_S0
CN1
13
4
3
2
1
2
1
LDDC_DATA
LDDC_CLK
C7
TP214
TP219
TP220
TP215
TP216
TP218
TP217
TP221
TP222
TP223
TP224
2
3
4
5
6
7
8
9
10
11
12
MEDIA_LED#_CN
STBY_LED#_CN
CHG_LED#_CN
CAP_LED#_CN
NUM_LED#_CN
POWER_LED#_CN
KBC_PWR_BTN#_CN
14
2
TP225 PAD30
T
I=3.57 mA
SCD1U16V2KX-3GP
3D3V_S0
CHG_LED#_CN
Q13
2CHG_LED#
1
C9
C
R1
E
255R2F-L-GP
BLON_OUT 31
BRIGHTNESS 31
SCD1U16V2KX-3GP
R245
CHG_LED 31
Q14
STBY_LED#_CN 1
VGA_TXACLK- 46
VGA_TXACLK+ 46
VGA_TXAOUT0- 46
VGA_TXAOUT0+ 46
VGA_TXAOUT1- 46
VGA_TXAOUT1+ 46
VGA_TXAOUT2- 46
VGA_TXAOUT2+ 46
B
R2
PDTC124EU-1-GP
2
1
LDDC_CLK 46
LDDC_DATA 46
ACES-CON12-4-GP
R244
STBY_LED#
2
C
R1
B
255R2F-L-GP
Place Top side and
close to connector
STBY_LED 31
E
R2
PDTC124EU-1-GP
5V_S0
I=3.57 mA
VGA_TXBCLK- 46
VGA_TXBCLK+ 46
VGA_TXBOUT0- 46
VGA_TXBOUT0+ 46
VGA_TXBOUT1- 46
VGA_TXBOUT1+ 46
VGA_TXBOUT2- 46
VGA_TXBOUT2+ 46
14
U7A
R23
SB
CAP_LED#_CN
1
1
CAP_LED#
2
3
2
CAPS_LED# 31
7
255R2F-L-GP
TSAHCT08PWR-1GP
1
10KR2J-3-GP
2
R537
1
1
BRIGHTNESS
2 C10
SCD1U16V2KX-3GP
5V_S0
BLON_OUT
2 C8
SC1000P50V3JN-GP
I=3.57 mA
U7B
14
1
2
C6
R22
20.F0713.044
4
MEDIA_LED#
2
CDROM_LED# 30
5
MEDIA_LED#_CN 1
IPEX-CON44-2-GP
SATA_LED# 19
6
7
255R2F-L-GP
TSAHCT08PWR-1GP
5V_S0
I=3.6 mA
14
U7C
R34
NUM_LED#_CN
1
2
NUM_LED#
9
8
10
40 mil
NUMLK_LED# 31
7
255R2F-L-GP
TSAHCT08PWR-1GP
3D3V_S0
40 mil
LCDVDD_S0
GND
IN#8
IN#7
IN#6
IN#5
5V_S0
9
8
7
6
5
U7D
14
LCDVDD_EN
IN#1
OUT
EN
GND
R32
POWER_LED#_CN
1
2
POWER_LED#
C12
100R2J-2-GP
2
C13
1
G5281RC1U-GP
12
11
13
EC1
TSAHCT08PWR-1GP
SCD1U16V2KX-3GP
PWR_LED# 31
7
R15
100KR2J-1-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
3D3V_AUX_S5
1
5V_S5
R400
10KR2J-3-GP
U1
R247
2
LCDVDD_EN
R9
1
2LCDVDD_S0_R
150R2F-1-GP
6
KBC_PWR_BTN#_CN 1
5
3
4
KBC_PWR_BTN#
31
1
2
100R2J-2-GP
EC30
LCDVDD_ON#
2
LCDVDD_S0
1
1
2
R14
10KR2J-3-GP
2
46
U4
1
2
3
4
2
54
TPAD30
1
53
TP1
1
52
LCD_5V 1
2
51
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
LCDVDD_S0
SCD1U16V2KX-3GP
1
TPAD30 TP212
LED CONN
RN1
SRN4K7J-8-GP
1
50
SC10U25V6KX-1GP
2
49
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NP2
55
C1
2
48
45
NP1
1
1
47
1
LCD1
46
TP213 PAD30
T
SCD1U16V2KX-3GP
C659
SC1000P50V3JN-GP
& lt; Variant Name & gt;
DY
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2N7002DW-7F-GP
Title
LCD CONN & LED
Size
Document Number
Rev
ME3-Discrete
Date:
Thursday, September 13, 2007
Sheet
16
of
51
A
B
C
D
E
4
4
5V_S0
HDMI1
22
20
47
47
47
HDMI_TXD1#
HDMI_TXD0
47
47
HDMI_TXD0#
HDMI_TXC
47
46
3
HDMI_TXD2#
HDMI_TXD1
47
47
1
HDMI_TXD2
HDMI_TXC#
HDMI_CEC
1
R329
DY
2 0R2J-2-GP
TPAD28 TP109
46
46
R326
46
HDMI_HDP
HDMI_HDP
1
2
HDMI_CEC_2
HDMI_CNC
HDMI_SCL
HDMI_SDA
L30
1
2 HDP
BLM15AG221SN-GP
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
3
2
21
R324
100KR3J-L-GP
23
1
10KR3F-L-GP
SKT-HDMI23P-GP-U3
2
2
Wistron Corporation
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HDMI
Size
Document Number
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
A
B
C
D
Sheet
17
E
of
51
1
5
4
3
2
1
3
U26C OF 6
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
3D3V_S0
RN60
D
1
2
3
4
PCI_FRAME#
PCI_GNT1#
PCI_REQ1#
PCI_REQ2#
8
7
6
5
SRN8K2J-4-GP
RN66
1
2
3
4
PCI_GNT3#
PCI_REQ3#
PCI_SERR#
PCI_PIRQG#
8
7
6
5
SRN8K2J-4-GP
RN69
1
2
3
4
PCI_GNT#0
PCI_PIRQA#
PCI_PLOCK#
PCI_PERR#
8
7
6
5
1
2
3
4
1
2
3
4
SRN8K2J-4-GP
RN68
PCI_IRDY#
8
7 PCI_TRDY#
6 PCI_PIRQE#
PCI_PIRQD#
5
1
2
3
4
C
SRN8K2J-4-GP
RN71
8 PCI_PIRQH#
PCI_PIRQC#
7
PCI_PIRQB#
6
5 PCI_REQ#0
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
F9
B5
C5
A10
PIRQA#
PIRQB#
PIRQC#
PIRQD#
SRN8K2J-4-GP
RN64
8 PCI_PIRQF#
7 PCI_GNT2#
6 PCI_DEVSEL#
5 PCI_STOP#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
GNT3#/GPIO55
REQ3#/GPIO54
A4
D7
E18
C18
B19
F18
C10
A11
PCI_REQ#0
PCI_GNT#0
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_GNT3#
PCI_REQ3#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
C17
E15
F16
E17
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
FRAME#
PLOCK#
SERR#
STOP#
TRDY#
C8
D9
G6
D16
A7
A17
B7
F10
C16
C9
PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_FRAME#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PLTRST#
PCICLK
PME#
AG24
B10
G7
PCI_PLTRST#
CLK_PCI_ICH
PCI
R385
1
Interrupt I/F
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
F8
G11
F12
B3
TP135
D
TP125
TP155
TP134
TP148
TP142
TP137
TP156
CLK_PCI_ICH
8K2R2J-3-GP
2
3
3D3V_S5
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
C
ICH8-M-1-GP-U-NF
3D3V_S5
U30A
14
SRN8K2J-4-GP
PCI_PCIRST#
1
3
PCIRST1# 24
1
2
SSLVC08APWR-GP
1
7
PCI_GNT3#
R433
100KR2J-1-GP
1KR2J-1-GP
1 R434
0R2J-2-GP
DY
2
2
Boot BIOS Strap
DY
B
PCI_GNT0#
SPI_CS#1
2
R178
B
Boot BIOS Location
3D3V_S5
SPI
1
0
PCI
1
A16 swap override Strap
1
U30B
4
6
Low= A16 swap override Enable
High= Default *
LPC *
3D3V_S5
PCI_GNT#0
2
R436
1
0R2J-2-GP
DY
1KR2J-1-GP
DY
1 1
1
DY
2
R353
10KR2J-3-GP
2
DY
PCI_PLTRST# 30
2
R179
R177
10R2J-2-GP
SC8P250V2CC-GP
SSLVC08APWR-GP
R437
100KR2J-1-GP
1
CLK_PCI_ICH
C359
PLT_RST1# 7,20,23,29,31,32,45
1
2
Place closely pin B10
A
PLT_RST1#
5
7
PCI_GNT3#
PCI_PLTRST#
2
1
14
0
20
SPI_CS1#
SPI_CS1#
A
& lt; Variant Name & gt;
DY
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ICH8(1/4)-PCI/INT
Size
A3
Document Number
Date: Wednesday, August 15, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
18
of
51
5
4
3
2
1
+RTCVCC
ICH_INTVRMEN
2
330KR2F-L-GP
KBGA20
KBRST#
1
U26A OF 6
RTCRST#
AD22
INTRUDER#
AF25
AD21
INTVRMEN
LAN100_SLP
B24
3
1
2
4
1
2
D21
E20
C20
TP119
LAN_TXD0
LAN_TXD1
LAN_TXD2
AH21
R343
1
1D5V_S0
28,34,35 HDA_BITCLK_CODEC
28,34,35 HDA_SYNC_CODEC
C
RN59
1
2
4
3
GLAN_COMP
2
24D9R2F-L-GP
SRN33J-5-GP-U
HDA_BIT_CLK
HDA_SYNC
SC3900P50V2KX-2GP
2
SC3900P50V2KX-2GP
2
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
3 CLK_PCIE_SATA#
3 CLK_PCIE_SATA
1 R407
2
24D9R2F-L-GP
KBGA20 31
H_A20M# 4
H_A20M#
2
1
56R2J-4-GP
H_DPRSTP#
H_DPRSTP#
TP110
H_DPRSTP# 5,7,38
AG29
H_PWRGOOD
H_PWRGOOD 5
IGNNE#
AF27
H_IGNNE#
H_IGNNE# 4
INIT#
INTR
RCIN#
AE24
AC20
AH14
H_INIT#
NMI
SMI#
AD23
AG28
H_NMI
H_SMI#
AA24
H_STPCLK#
AE27
THRMTRIP_ICH#
TP122
TP8
AA23
SATA_CLKN
SATA_CLKP
AG1
AG2
B
H_FERR#
AD24
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AB7
AC6
SATA_TXN0_C
SATA_TXP0_C
SATARBIAS#
SATARBIAS
H_DPSLP# 5
H_FERR# 4
H_DPSLP#
1D05V_S0
H_NMI
H_SMI#
4
R360
56R2J-4-GP
C
H_STPCLK# 4
1
R366
2
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
H_THERMTRIP# 4,7
24R2J-GP
IDE_PDD[0..15]
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
DA0
DA1
DA2
AA4
AA1
AB3
Y6
Y5
placed within 2 " from ICH8M
IDE_PDCS1# 30
IDE_PDCS3# 30
W4
W3
Y2
Y3
Y1
W5
30
IDE_PDA0 30
IDE_PDA1 30
IDE_PDA2 30
DCS1#
DCS3#
Within 500 mils
TP112
within 2 " from R184
H_INIT# 4,32
H_INTR 4
KBRST# 31
KBRST#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
SATA
C361 1
C360 1
FERR#
R348
TP154
TP161
CPUPWRGD/GPIO49
SATALED#
AF6
AF5
AH5
AH6
SATA_LED#
AF26
AE26
1D05V_S0
LPC_FRAME# 31,32
H_DPSLP#
H_FERR#
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AF2
AF1
AE4
AE3
30 SATA_RXN0_C
30 SATA_RXP0_C
30 SATA_TXN0
30 SATA_TXP0
AE10
AG14
AF10
2
GAP-OPEN TP146
16
HDA_SDOUT
G95
1
AF13
AG26
DPRSTP#
DPSLP#
IHDA
AE13
SRN33J-5-GP-U
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
AG3
AG4
AJ4
AJ3
RN67
4
3
LPC_DRQ0#
HDA_RST#
AJ17
AH17
AH15
AD13
1
2
G9
E6
SRN10KJ-5-GP
31,32
31,32
31,32
31,32
THRMTRIP#
GLAN_COMPI
GLAN_COMPO
AE14
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
28,34,35 HDA_SDOUT_CODEC
LDRQ0#
LDRQ1#/GPIO23
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
STPCLK#
GLAN_DOCK#/GPIO13
D25
C25
AJ16
AJ15
HDA_BITCLK
28,34,35 HDA_RST#_CODEC
34
28
35
LPC_FRAME#
A20GATE
A20M#
LAN_RXD0
LAN_RXD1
LAN_RXD2
2
C327
SC10P50V2JN-4GP
C4
LAN_RSTSYNC
C21
B21
C22
C325
SC10P50V2JN-4GP
FWH4/LFRAME#
GLAN_CLK
D22
RESO-32D768KHZ-GP
1
E5
F5
G8
F6
1
ICH_INTVRMEN
LAN100_SLP
1
SC1U10V3KX-3GP
2
C336
ICH_RTCX2
1
2
R162 10MR2J-L-GP
SC
4
3
2
2
G94
GAP-OPEN
AF23
SM_INTRUDER#
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
RTCX1
RTCX2
LPC
ICH_RTCX1
AG25
AF24
ICH_RTCRST#
2
20KR2J-L2-GP
1
1
R346
X3
1
2
D
ICH_RTCX1
ICH_RTCX2
CPU
1
R345
RN63
+RTCVCC
IDE
D
DY
SM_INTRUDER#
2
1MR2J-1-GP
RTC
1
R349
LAN100_SLP
2
330KR2F-L-GP
LAN/GLAN
1
R357
3D3V_S0
IDE_PDIOR# 30
IDE_PDIOW# 30
IDE_PDDACK# 30
INT_IRQ14 30
IDE_PDIORDY 30
IDE_PDDREQ 30
3D3V_S0
IDE_PDIORDY
1
R412
2
4K7R2J-2-GP
INT_IRQ14
1
R390
2
8K2R2J-3-GP
B
ICH8-M-1-GP-U-NF
3D3V_AUX_S5
RTC1
+RTCVCC
U22
BATT1.1
1
2
NP1
NP2
2
W=20mils
1
1
R344
A
W=20mils
3
W=20mils
1
CH715FPT-GP
1
R161
2
W=20mils
BAT-CON2-1-GP-U
1KR2J-1-GP
2
C333
SC1U10V3ZY-6GP
2
100R2J-2-GP
PWR
GND
NP1
NP2
XOR CHAIN ENTRANCE STRAP : RSVD
A
& lt; Variant Name & gt;
3D3V_S0
Wistron Corporation
R382
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1KR2J-1-GP
1
2
HDA_SDOUT_CODEC
Title
ICH8(2/4) LAN,HD,IDE,LPC
DY
Size
A3
Document Number
Rev
ME3-Discrete
Date: Wednesday, September 19, 2007
5
4
3
2
Sheet
1
19
of
51
5
4
3
3D3V_S0
2
1
3D3V_S5
Place closely pin G5
Place closely pin AG9
RN47
CLK_48M_ICH
AG12
AG22
AE20
AG18
STP_PCI#
STP_CPU#
AH11
CLKRUN#
AE17
AF12
AC13
WAKE#
SERIRQ
THRM#
AJ20
VRMPWRGD
DY
SRN10KJ-6-GP
23
31
SMB_LINK_ALERT#
OCP#
ECSMI#
8
7
6
5
EC_SWI#
GPIO17
TP157
NEWCARD_RST#
PEX_RSET#
GPIO22
TP117
TP150
SRN10KJ-6-GP
GPIO1
CPPE#1
ECSCI#
TP159
R173
1
2
0R0402-PAD
ECSMI#
NEW_CPPE#
ECSCI#
31
RN35
1
2
3
4
VRMPWRGD
2
0R2J-2-GP
SST_CTL
TP118
1
R362
7,38 VGATE_PWRGD
TP113
TP143
C
R377
R350
1
1
3
DPRSLPVR
100KR2J-1-GP
ICH_RSVD
1KR2J-1-GP
2
2
34
DY
CLKSATAREQ#
GPIO38
GPIO39
IDE_RESET#
CLKSATAREQ#
TP153
TP149
TP152
AJ22
TP7
AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
SB_SPKR
SB_SPKR
AD9
MCH_ICH_SYNC# AJ13
7 MCH_ICH_SYNC#
ICH_RSVD
32K suspend clock output
SYSGPIO
ICH_RI#
PM_BATLOW#_R
XDP_DBRESET#
GPIO26
8
7
6
5
AJ21
Low-- & gt; default
SPKR
MCH_SYNC#
TP3
AH27
AE23
PM_PWROK
DPRSLPVR/GPIO16
AJ14
DPRSLPVR
AE21
1
2
PM_BATLOW#_R
BATLOW#
PM_PWROK 7,22
C2
PWRBTN#
2 R373
10KR2J-3-GP
1
DPRSLPVR 7,38
3D3V_S5
SB_PWR_BTN# 31
LAN_RST#
AH20
RSMRST#
AG27
DY
R359
1
U21
PLT_RST1# 7,18,23,29,31,32,45
CK_PWRGD
E1
CLPWROK
E3
CK_PWRGD_R
1
R427
VGATE_PWRGD
SLP_M#
AJ25
SLP_M#
CL_CLK0
CL_CLK1
F23
AE18
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
F22
AF19
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
D24
AH23
CL_VREF0_ICH
CL_VREF1_ICH
CL_RST#
AJ23
CLGPIO0/GPIO24
CLGPIO1/GPIO10
CLGPIO2/GPIO14
CLGPIO3/GPIO9
AJ27
AJ24
AF22
AG19
2
CK_PWRGD
0R0402-PAD
CK_PWRGD
VCC
Y
1
2
3
A
B
GND
3
0416 SD
solve auto power on issue
CL_DATA0 7
TP126
R358
1
CL_RST# 7
GPIO24
GPIO10
GPIO14
GPIO9
C614
TP111
TP116
TP114
TP127
2
3D3V_S0
R351
453R2F-1-GP
R356
2
3D3V_S0
TPM_32K_CLK 32
4
3
23
23
C319
1
C320
1
PCIE_C_TXN1
PCIE_C_TXP1
2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
C317
1
C318
1
PCIE_C_TXN2
PCIE_C_TXP2
M27
M26
L29
L28
PERN2
PERP2
PETN2
PETP2
PCIE_C_TXN3
PCIE_C_TXP3
K27
K26
J29
J28
PERN3
PERP3
PETN3
PETP3
2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
C316
1
C315
1
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
PERN1
PERP1
PETN1
PETP1
SMB_CLK
23,24 SMB_CLK
SMB_DATA
6
2
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
23
23
2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
C309
1
C311
1
C310
1
C313
1
PCIE_C_TXN4
PCIE_C_TXP4
PCIE_C_TXN5
PCIE_C_TXP5
F27
F26
E29
E28
PERN5
PERP5
PETN5
PETP5
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
C23
B23
E22
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
5
3
4
SMB_DATA 23,24
18
SPI_CS1#
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
RN61
A
1
2
3
4
8
7
6
5
SRN10KJ-6-GP
RN42
USB_OC#0
1
USB_OC#9
2
USB_OC#8
3
USB_OC#7
4
3D3V_S5
RN38
8
7
6
5
SRN10KJ-6-GP
8
7
6
5
1
2
3
4
1
USB_OC#5
1
2
R374
2
R364
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
1
7
7
7
7
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
7
7
7
7
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
7
7
7
7
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
T26
T25
CLK_PCIE_ICH#
CLK_PCIE_ICH
Y23
Y24
DMI_IRCOMP
SMB_LINK_ALERT#
SMLINK0
SMLINK1
PCIE_WAKE#
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
USB
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
B
R361
330R2J-3-GP
R380 1
0R2J-2-GP
R363 1
0R2J-2-GP
2
2
DY
CK_PWRGD
VRMPWRGD
Q8
2N7002-11-GP
38
G
CLK_EN#
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
Within 500 mils
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
F2
F3
3D3V_S0
1
R352
2
24D9R2F-L-GP
USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
USB_PN5
USB_PP5
USB_PN6
USB_PP6
USB_PN7
USB_PP7
USB_PN8
USB_PP8
USB_PN9
USB_PP9
USBRBIAS
1
R183
28
28
28
28
23
23
27
27
26
26
23
23
26
26
26
26
28
28
28
28
1D5V_S0
USB1
USB2_1
New Card
Card Reader
RF or BT
MINICARD 2
CAMERA
Finger Printer
USB2_2.1Design & gt;
& lt; Core
USB2_2.2
A
Wistron Corporation
2
22D6R2F-L1-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SRN10KJ-6-GP
Within 500 mils
Title
ICH8(3/4) PM,USB,GPIO
10KR2F-2-GP
Size
Custom
10KR2F-2-GP
Date:
5
2
7
7
7
7
DMI_ZCOMP
DMI_IRCOMP
ICH8-M-1-GP-U-NF
USB_OC#3
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
USBRBIAS#
USBRBIAS
ICH_SMBCLK 3,13,14
2N7002DW-1-GP
USB_OC#4
USB_OC#2
USB_OC#1
USB_OC#6
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_CLKN
DMI_CLKP
SPI
1
2
New Card
1
23
23
23
23
PERN4
PERP4
PETN4
PETP4
D23
F21
Mini Card 2
U23
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
H27
H26
G29
G28
D27
D26
C29
C28
23
23
5V_S0
V27
V26
U29
U28
2
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP
P27
P26
N29
N28
1
23
23
24
24
Mini Card 1
for ROBSON
RN28
SRN2K2J-1-GP
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2
29
29
LAN
3D3V_S0
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
24
24
ESATA
B
U26B 2 OF 6
29
29
D
7
DY
3,13,14 ICH_SMBDATA
R355
453R2F-1-GP
S
1
2
R508 10R2J-2-GP
Direct Media Interface
32KHZ
DY
3K24R2F-GP
G792_CLK 22
5
TSLCX08MTCX-GP
10KR2J-3-GP
SB_SPKR
2
SCD1U16V2KX-3GP
2
1
14
1
2
R507 10R2J-2-GP
C
3K24R2F-GP
ICH8-M-1-GP-U-NF
PCI-Express
1
2
32KHZ
SB_RSMRST# 31
CL_CLK0 7
TP128
C620
6
ICH_SUSCLK
2
1KR2J-1-GP
TP115
3D3V_S5
1
R387
1
R148
NC7SZ08M5X-NL-GP
10KR2J-3-GP
VGATE_PWRGD 7,38
1
3D3V_S0
R147
0R2J-2-GP
R150
5
4
2
0R0402-PAD
EC_RMRST#
High-- & gt; No boot
4
1 2
1 2
2
D
3D3V_S0
R503
10KR2J-3-GP
U78B
DY
PM_SLP_S3# 22,23,31,37,41,42,44,47
PM_SLP_S4# 23,31,41,42
PWROK
S4_STATE#/GPIO26
POWER MGT
INT_SERIRQ
THERM_SCI#
C655
SC4D7P50V2CN-1GP
GPIO26
GPIO
H_STP_PCI#
H_STP_CPU#
H_STP_PCI#
H_STP_CPU#
MISC
1
2
OCP#
RN30
1
2
3
4
GPIO
SMBALERT#/GPIO11
23,24,31 PCIE_WAKE#
31,32 INT_SERIRQ
3
3
SATA
BMBUSY#/GPIO0
OCP#
DY
10KR2J-3-GP
DY
2
PM_BMBUSY#
AG23
AF21
AD18
CLK14
CLK48
CLK_14M_ICH 3
CLK_48M_ICH 3
1
7 PM_BMBUSY#
4
2
SUSCLK
SRN10KJ-6-GP
ICH_SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
SUS_STAT#/LPCPD#
SYS_RESET#
31,32 PM_CLKRUN#
1
3D3V_S5
GPIO22
XDP_DBRESET#
D3
DY
C674
SC4D7P50V2CN-1GP
2
32
LPC_PD#
4 XDP_DBRESET#
RN46
SRN2K2J-1-GP
RI#
Controller Link
R388
F4
AD15
CLK_14M_ICH
CLK_48M_ICH
1
2
3
4
1
AF17
AG9
G5
8
7
6
5
2
ICH_RI#
4
3
3D3V_S0
SATA0_R0
SATA0_R1
SATA0_R2
SATA0_R3
AJ12
AJ10
AF11
AG11
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
GPIO37
SCD1U16V2KX-3GP
2
1
3D3V_S0
D
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
SMB
TP151
AJ26
AD19
AG21
AC17
AE19
CLOCKS
SMB_CLK
SMB_DATA
SMB_LINK_ALERT#
SMLINK0
SMLINK1
R391
10R2J-2-GP
DY
RN70
1
2
NEWCARD_RST#
10KR2F-2-GP
2
R381
R420
10R2J-2-GP
3D3V_S0
U26D 4 OF 6
SRN10KJ-6-GP
1
CLK_14M_ICH
1
RN27
SRN2K2J-1-GP
1
INT_SERIRQ
PM_CLKRUN#
CLKSATAREQ#
THERM_SCI#
8
7
6
5
4
3
1
2
3
4
4
3
2
Document Number
Rev
ME3-Discrete
Sheet
Sunday, September 09, 2007
1
20
of
51
5
4
3
2
1
+RTCVCC
20 mils
6
U26F OF 6
C602
1D05V_S0
SC10U6D3V5MX-3GP
A
2
BLM18PG121SN-1GP
C329
SC4D7U10V5ZY-3GP
SC2D2U10V3KX-1GP
3D3V_S0
1
2
SCD1U16V2ZY-2GP
1
2
SCD1U16V2ZY-2GP
1
1
2
2
1
2
AC16
VCCSUS1_5_ICH_1
J7
VCCSUS1_5_ICH_2
C3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
AC18
AG20
AC21
AC22
AH28
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
P6
P7
N7
C1
P1
R1
P2
P3
R3
P4
P5
R5
R6
VCCCL1_05
G22
VCCCL1_5
VCCCL3_3
VCCCL3_3
F20
G21
3D3V_S5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
B25
VCCGLAN3_3
1
2
1
2
2
1
2
3D3V_S5
C624
3D3V_S5
1
VCCGLANPLL
A26
A27
B26
B27
B28
C595
2
VCCLAN3_3
VCCLAN3_3
TP158
1
VCCLAN1_05
VCCLAN1_05
TP139
3D3V_S0
C664
SCD1U16V2ZY-2GP
2
F17
G18
TP160
TP123
1
VCC1_5_A
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
A1
A2
A28
A29
AJ28
AH1
AH29
AJ1
AJ2
AJ29
B1
B29
D
C
A22
SCD1U16V2ZY-2GP
2
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
SCD1U16V2ZY-2GP
2
1
SC4D7U6D3V3KX-GP
1
2
1
J6
AF20
C641
SCD1U16V2ZY-2GP
C364
SC4D7U6D3V3KX-GP
2
2
1
C304
2
C299
1D5V_S0_GLANPLL
L17
1
1D5V_S0
2
1
2
1
1
BLM18PG121SN-1GP
SCD1U16V2ZY-2GP
AD11
1
1
1
2
1
2
1D5V_S0
VCCUSBPLL
A24
VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2
L32
C666
C623
SCD1U16V2ZY-2GP
AC12
VCCSUS3_3
VCC1_5_A
VCC1_5_A
F19
G20
1D5V_S0
TP144
TP129
C612
SCD1U16V2ZY-2GP
VCCSUS1_5
W23
C642
3D3V_S0
C306
VCCSUS1_5
VCC1_5_A
VCC1_5_A
VCC1_5_A
SCD1U16V2ZY-2GP
3D3V_S0
VCCSUS1_05
VCCSUS1_05
VCC1_5_A
VCC1_5_A
C636
SCD1U16V2ZY-2GP
VCCHDA
F1
L6
L7
M6
M7
1D5V_S0
SCD1U16V2ZY-2GP
C645
(SATA)
C638
C639
C667
SCD1U16V2ZY-2GP
VCCSUSHDA
D1
1D5V_S0
SCD1U16V2ZY-2GP
CORE
VCC1_5_A
VCC1_5_A
AA5
AA6
AC7
AD7
SCD1U16V2ZY-2GP
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
(DMI)
1
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
G12
G17
H7
C660
AA3
U7
V7
W1
W6
W7
Y7
3D3V_S0
3D3V_S0
3D3V_S0
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
VCCCL1_05_ICH
B
TP53
TP50
TP40
TP41
TP44
TP55
TP39
TP52
TP51
TP43
TP54
TP42
ICH8-M-1-GP-U-NF
TP120
3D3V_S0
C349
A
1
SC1U10V3ZY-6GP
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
2
C362
AC8
AD8
AE8
AF8
SCD1U16V2ZY-2GP 3D3V_S0
SCD1U16V2ZY-2GP
1
AC1
AC2
AC3
AC4
AC5
1D5V_S0
B
VCC3_3
VCC3_3
VCC3_3
VCC3_3
1D05V_S0
C350
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
& lt; Variant Name & gt;
ICH8-M-1-GP-U-NF
SC1U10V3ZY-6GP
2
SC1U10V3ZY-6GP
1
1
SC10U6D3V5MX-3GP
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
AC10
AC9
C363
AD2
VCCSATAPLL
AE7
AF7
AG7
AH7
AJ7
1D5V_S0
AF29
VCC3_3
2
2
C357
2
C356
BLM18PG121SN-1GP
AJ6
C307
SC22U6D3V5MX-2GP
2
1D5V_S0_SATAPLL
SC1U10V3ZY-6GP
1
2
1D25V_S0
AC23
AC24
VCC3_3
VCCPSUS
K
L19
1
1D5V_S0
SCD01U16V2KX-3GP
1D5V_S0
C314
SC10U6D3V5MX-3GP
2
C679
SCD1U16V2ZY-2GP
2
1
2
20 mils
ICH_V5REF_SUS
C594
AE28
AE29
V_CPU_IO
V_CPU_IO
VCCPUSB
100R2J-2-GP
L16
1
2
IND-1UH-36-GP
1D5V_DMIPLL_S0
1
D21
CH751H-40PT-1GP
VCC_DMI
VCC_DMI
USB CORE
R428
C640
2
A
1
C
R29
C604
1
3D3V_S5
VCCDMIPLL
VCCP CORE
0503 MV
PCI
1
2
5V_S5
C634
SC1U10V2KX-1GP
ARX
SC2D2U6D3V3MX-1-GP
20 mils
ICH_V5REF_RUN
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
ATX
1
C297
2
1
2
1
2
D20
CH751H-40PT-1GP
100R2J-2-GP
C305
SC10U6D3V5MX-3GP
A
K
R176
SC10U6D3V5MX-3GP
1
2
ST220U2VBM-3GP
1
3D3V_S0
2
5V_S0
C312
IDE
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25
BLM18PG121SN-1GP
C296
V5REF_SUS
GLAN POWER
1D5V_S0
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
2
G4
1D5V_A3GP_S0
2
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
V5REF
V5REF
1
T7
A16
ICH_V5REF_SUS
VCCA3GP
ICH_V5REF_RUN
L14
5 OF 6
VCCRTC
2
U26E
AD25
D
1
A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
1
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
1
C613
Wistron Corporation
DY
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ICH8(4/4) POWER & GND
Size
Custom
Document Number
Rev
ME3-Discrete
Date: Thursday, August 23, 2007
5
4
3
2
Sheet
1
21
of
51
FAN1_VCC
1
K
5V_S0
D17
1
C170
SC10U10V5ZY-1GP
2
C125
SCD1U16V2ZY-2GP
2
1
*Layout* 15 mil
1N4148W-1-GP
A
R51
10KR2J-3-GP
SC
EAN1
2
4
3
G792_SCL
G792_SDA
1
2
5
TPAD30 TP226
SC
RN5
3D3V_S0
FAN1_FG1
TPAD30 TP227
TPAD30 TP229
TPAD30 TP228
*Layout* 15 mil
C131
SC1000P50V3JN-GP
2
3
2
1
FAN1_VCC
1
SRN10KJ-5-GP
4
TPAD30 TP230
ACES-CON3-1-GP-U
5V_G792_S0
2
VCC
DVCC
7
9
11
FAN1
FG1
CLK
SDA
SCL
NC#19
DXP1
DXP2
DXP3
5
17
SGND1
SGND2
SGND3
8
10
12
G792_CLK 20
G792_SDA
G792_SCL
G792_DXP2
1
2
1
4
14
16
18
19
DGND
DGND
1
6
20
C186
SCD1U16V2ZY-2GP
2
1
Setting T8 as
100 Degree
ALERT#
THERM#
THERM_SET
RESET#
G792_DXN2
1
G792SFUF-GP
3D3V_S5
2
2
V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC
Q6
PMBS3904-1-GP
GTHERMDA 46
3
R93
100KR2F-L1-GP
1
C217
SC2200P50V2KX-2GP
2
15
13
3
2
2
TP84
THRM#
THERM#
V_DEGREE
1
C216
SC2200P50V2KX-2GP
Q5
PMBS3904-1-GP
2
1
R92
10KR2F-2-GP
C175
SC4D7U10V5ZY-3GP
2
C443
SC1U10V3ZY-6GP
1
2
200R2F-L-GP
1
1
U15
*Layout* 30 mil
R79
3
5V_S0
5V_S0
Place Top side and
close to connector
SSLVC08APWR-GP
7
1
DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree
R270
G22
H_THERMDA 4
1
G19
GAP-CLOSE GAP-CLOSE
C202
SC2200P50V2KX-2GP
H_THERMDC 4
1
G792_RST#
2
PM_SLP_S3# 20,23,31,37,41,42,44,47
13
1
12
11
7,20 PM_PWROK
2
2
14
GTHERMDC 46
U30D
2
100KR2J-1-GP
Place near chip as close
as possible
3D3V_AUX_S5
THERM#
G792_SDA
3
5
6
1
31
KBC_SDA1 31
KBC_SCL1
2N7002DW-1-GP
G792_SCL
2
31
2
EC_RST# 31
D32
U65
1
1
2
1
4
2
1
3D3V_S0
U47
2
3D3V_S0
D33
1N4148W-7-F-GP
R393
10KR2J-3-GP
1N4148W-7-F-GP
DY
S5_ENABLE
C648
1
2
3
A
B
GND
3D3V_AUX_S5
DY
VCC
5
Y
4
PWR_S5_EN 40
NC7S08M5X-NL-GP
SCD1U16V2KX-3GP
0R2J-2-GP
1
2 R402
& lt; Core Design & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thermal/Fan Controllor G792
Size
Custom
Document Number
Date: Thursday, September 13, 2007
Rev
ME3-Discrete
Sheet
22
of
51
A
B
C
D
Mini Card Connector for ROBSON
Mini Card Connector
3D3V_S0
3D3V_S5
3D3V_S0
31 WIRELESS_EN
7,18,20,29,31,32,45 PLT_RST1#
3D3V_S5
20,24 SMB_CLK
20,24 SMB_DATA
0R2J-2-GP2
2
0R2J-2-GP
20
20
3
DY
DY
R78
1
1
R77
SMB_CLK_MINI
SMB_DATA_MINI
USB_PN5
USB_PP5
TPAD30 TP81
TPAD30 TP7
TPAD30 TP6
1
C720
LED_WWAN#
WLAN_LED#
LED_WPAN#
MINI2_CLKREQ# 1
2
2
53
NP1
1
2
1D5V_S0
WL_PRIORITY1 26
BT_PRIORITY1 26
4
6
8
10
12
14
16
1
C725 C727
2
E51_RxD 31
E51_TxD 31
31 WWAN_EN
PCIE_RXN4 20
PCIE_RXP4 20
PCIE_TXN4 20
PCIE_TXP4 20
C711
C398
SC10U6D3V5KX-2GP SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
WWAN_EN_R
R477
1
2 0R2J-2-GP
OKMINI
7,18,20,29,31,32,45 PLT_RST1#
3D3V_S5_MINI
1
2
3D3V_S5
OKMINI 0R2J-2-GP R478
DY R474 SMB_CLK_MINI1
0R2J-2-GP2
1
20,24 SMB_CLK
2
1 SMB_DATA_MINI1
20,24 SMB_DATA
0R2J-2-GP
DY R475
1
3D3V_S0
2
OKMINI
G_MINI_40
LED_WWAN#_1
WLAN_LED#_1
LED_WPAN#_1
0R2J-2-GP
R476
TPAD30 TP70
TPAD30 TP68
TPAD30 TP69
5V_S5
SKT-MINI52P-13-GP
3
5
7
9
11
13
15
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
SCD1U16V2KX-3GP
TP85 TPAD30
CLK_PCIE_MINI2# 3
CLK_PCIE_MINI2 3
4
MINI2
SC22U10V6MX-1GP
TPAD30
1
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54
TP86
2
MINI_WAKE#
1
1
SC10U6D3V5KX-2GP SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3
5
7
9
11
13
15
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
C466
2
C174
2
2
1
1
C188 C432
C721 C728
2
1
4
6
8
10
12
14
16
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
53
NP1
1
2
1D5V_S0
1
1
C400
MINI1
SC22U10V6MX-1GP
2
1
1
C435
2
2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
C439 C475
2
SCD1U16V2KX-3GP
1
1
C786
2
4
2
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
3D3V_S5
E
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54
MINI1_WAKE#
1
TP169 TPAD30
OD
TP171 TPAD30
CLK_PCIE_MINI1# 3
CLK_PCIE_MINI1 3
OKMINI
E51_RxD_R 1
E51_TxD_R 1
R516
0R2J-2-GP
0R2J-2-GP
R517
2
2
OKMINI
E51_RxD 31
E51_TxD 31
PCIE_RXN3 20
PCIE_RXP3 20
PCIE_TXN3 20
PCIE_TXP3 20
3D3V_S0_MINI 1
0R2J-2-GP
R514
0R2J-2-GP
R515
2
OKMINI
G_MINI_43 1
2
OKMINI
5V_S5_MINI
1
3D3V_S0
3
0R2J-2-GP 5V_S5
R511
2
OKMINI
SKT-MINI52P-8-GP
62.10043.461
62.10043.391
TYCO-CON26-1-GP
NEWCARD Connector
NEW1
62.10024.681
28
20 PCIE_TXP5
20 PCIE_TXN5
1
2
21
18
17
15
16
1
SC1U10V2KX-1GP
TP173 PAD30
T
20
20
3D3V_S5
3D3V_NEW_LAN_S5
2
C782
3D3V_S0
1D5V_S0
1
USB_PP2
USB_PN2
1
C787
27
SC1U10V2KX-1GP
SC1U10V2KX-1GP
NEW_CPUSB#
1
2 NEW_CPPE#
DY
R397 0R2J-2-GP
SKT1
bom1
1
1
Wistron Corporation
SC1U10V2KX-1GP
SC1U10V2KX-1GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
C779
2
1
1
C771
2
2
C776
2
1
NP1
C784
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
CARDBUS2P-11-GP
21.H0118.011
Title
MINI CARD / NEW CARD
Size
Document Number
For Newcard socket
B
C
D
Rev
ME3-Discrete
Date: Thursday, August 23, 2007
A
2
1
NC#16
NEW_CLKEN
2
RCLKEN
AUXIN
AUXOUT
1
THERMAL_PAD
2
4
G577R9U-GP
PERST#
1
2 PCIE_WAKE#_R
DY
R419 0R2J-2-GP
SRN33J-5-GP-U
SMB_DATA_NEW
C675
2
3
20,24 SMB_DATA
SMB_CLK_NEW
4
DY 1
20,24 SMB_CLK
CONN_TP1
1
TPAD30 TP49
RN72
CONN_TP2
1
TPAD30 TP48
NEW_CPUSB#
SC1U10V2KX-1GP
20,24,31 PCIE_WAKE#
1D5V_NEW_S0
2
1.5VOUT
1.5VOUT
C767
7
GND
1.5VIN
1.5VIN
2
1
3.3VOUT
3.3VOUT
STBY#
SYSRST#
PERST#
CPUSB#
CPPE#
OC#
SHDN#
C764
SC22P50V2JN-4GP
3D3V_NEW_LAN_S5
12
14
TPAD30 TP172
20,31,41,42 PM_SLP_S4#
1
PCIE_RST#_NEW_R 6
2 33R2J-2-GP
PERST#
8
NEW_CPUSB#
9
NEW_CPPE#
10
NEW_OC#
19
1
20
3.3VIN
3.3VIN
1
R493
SC1U10V2KX-1GP
1
U80
PM_SLP_S3#
PLT_RST1#
C669
11
13
3
5
2
2
C770
3 CLK_PCIE_NEW
3 CLK_PCIE_NEW#
20 NEW_CPPE#
3 NEWCARD_CLKREQ#
3D3V_NEW_S0
1
1
C680
2
C682
20,22,31,37,41,42,44,47
7,18,20,29,31,32,45
SC1U10V2KX-1GP
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
20 PCIE_RXP5
20 PCIE_RXN5
1D5V_NEW_S0
3D3V_NEW_S0
2
2
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
Sheet
E
23
of
51
C
D
3D3V_LAN_S5
2
R505
0R3-0-U-GP
SB
1
D
3D3V_LAN_S5
20 mils
2
Q23
0R0603-PAD
G
60 ~ 100 mils
C732
SCD1U16V2ZY-2GP
C705
SCD1U16V2ZY-2GP
GAP-CLOSE-PWR
2
AO3403-GP
They are for U49 AVDD33
pin-2 and 59
G106
2
G
R492
10KR2J-3-GP
1
D
1
2
S
3D3V_S5
VDD33
RTL8111B /
RTL8101E
VDD33
DY
U77
2
3.3V
1
1
2
SCD1U16V2ZY-2GP
C750
SCD1U16V2ZY-2GP
1.2V
1.2V
1.2V
1
1
2 0R2J-2-GP
1 R453
2
C754
C745
C723
2
2
8111B STUFF
8111C REMOVE
CTRL15
1 R485
2 0R2J-2-GP
DVDD15
1
C697
C708
2 0R2J-2-GP
Wistron Corporation
DY
SCD1U16V2ZY-2GP
SC22U6D3V5MX-2GP
2
1
VDD33
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
8101E/8111B REMOVE
8111C STUFF
Title
DY
Size
Document Number
RTL8111C/8101E
ME3-Discrete
Date: Sunday, September 09, 2007
B
2
2
2
2
2
2
DY
& lt; Variant Name & gt;
1 R461
DY
A
C753
1
C752
1
C738
1
C740
1
C756
1
C755
1
1
C702
8101E/8111B STUFF
8111C REMOVE
DVDD15/CLKREQB
2 0R2J-2-GP
DVDD15
1
1
1
DY
FB12
DY
CTRL15/VDD33
1
1
2
1
2
AVDD18
1 R456
8101E/8111B STUFF
8111C REMOVE
2 0R2J-2-GP
C744
C694
2
1
2
1 R455
2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3
2
1
2
AVDD18/FB12
1
EVDD18
PCIE_RXP2_2
PCIE_RXN2_2
AGND
DVDD15
AGND
1
RTL8111C-GR-GP
C734
SCD1U16V2ZY-2GP
DVDD15
EVDD18
0R3-0-U-GP
R488
15KR2F-GP
40 mils
2
2
2
1
2
1
2
DVDD15
LINK1G
VDD33
DVDD15
GND
RSET
VDDSR
ENSR
CKTAL2
CKTAL1
AVDD33
AVDD12
LED0
LED1
LED2
LED3
VDD33
DVDD12
OGPIO
IGPIO
DVDD12
1
SCD1U16V2ZY-2GP
1
1
R443
Only For 8101E
SCD1U16V2ZY-2GP
DVDD15/CLKREQB
They are for U49 DVDD15
pin-15,21,32,33,38,41,43,49,52 and 58
DY
R489
1KR2J-1-GP
DVDD15
VDD33
ISOLATE#
2
Q20
BCP69T1-1-GP
SCD1U16V2ZY-2GP
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DVDD15
DY
C729
SCD1U16V2ZY-2GP
C736 2
C739 2
1
SCD1U16V2ZY-2GP
PCIE_TXP2
PCIE_TXN2
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_RXP2
PCIE_RXN2
3D3V_S0
EVDD18
C733
SCD1U16V2ZY-2GP
PCIE_WAKE#_LAN
CTRL15
SCD1U16V2ZY-2GP
SMBDAT_SB_R
Only For 8111B
SCD1U16V2ZY-2GP
SMBCLK_SB_R
LAN_EESK
LAN_EEDI
VDD33
LAN_EEDO
LAN_EECS
DVDD15
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SCD1U16V2ZY-2GP
DY
20 mils
2
R444
0R3-0-U-GP
Only For 8111C
VDD33
SCD1U16V2ZY-2GP
EESK
EEDI/AUX
VDD33
EEDO
EECS
DVDD12
NC#42
NC#41
NC#40
NC#39
DVDD12
VDD33
ISOLATE#
NC#35
NC#34
CLKREQB
71.08111.B03
R462 1
2
0R2J-2-GP
DY
R465 1
2
0R2J-2-GP
R470 1
0R2J-2-GP 2
PCIRST1#
They are for U49 EVDD18
pin-22 and 28
R445
0R3-0-U-GP
SCD1U16V2ZY-2GP
2
1
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
RTL_RSET_1
CTRL15/VDD33
GVDD
LAN_X2
LAN_X1
AVDD33
DVDD15
ACT_LED#
LINK100
Only For 8101E
C665
C670
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AGND
1 R479
0R0603-PAD
SROUT12
AVDD33
MDIP0
MDIN0
FB12
MDIP1
MDIN1
AVDD12
MDIP2
MDIN2
AVDD12
MDIP3
MDIN3
AVDD12
NC#15
VDD33
NC#17
NC#18
LANWAKE#
PERST#
DVDD12
EVDD12
HSIP
HSIN
EGND
REFCLK_P
REFCLK_N
EVDD12
HSOP
HSON
EGND
DVDD12
1
N/A
SC22U6D3V5MX-2GP
MDIP3
MDIN3
20,23,31 PCIE_WAKE#
18 PCIRST1#
20 PCIE_TXP2
20 PCIE_TXN2
3 CLK_PCIE_LAN
3 CLK_PCIE_LAN#
20 PCIE_RXP2
20 PCIE_RXN2
N/A
2
2
2
25
25
25
AVDD18
C700
SCD1U16V2ZY-2GP
ACT_LED#
LINK100
LINK1G
C677
C703
SCD1U16V2ZY-2GP
RTL8101E
1
2
R432
0R3-0-U-GP
C687
SC22U6D3V5MX-2GP
CTRL18
1
AVDD33
2
MDIP0
3
MDIN0
4
AVDD18/FB12 5
MDIP1
6
MDIN1
7
AVDD18
8
MDIP2
9
MDIN2
10
AVDD18
11
MDIP3
12
MDIN3
13
AVDD18
14
DVDD15
15
VDD33
16
MDIP2
MDIN2
20,23 SMB_DATA
N/A
AVDD18
3
C704
SCD1U16V2ZY-2GP
U74
MDIP1
MDIN1
1
N/A
2
SCD1U16V2ZY-2GP
DY
MDIP0
MDIN0
20,23 SMB_CLK
Need
1
40 mils
0R3-0-U-GP
SC22U6D3V5MX-2GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
R454
1
2
2KR2F-3-GP
8111B STUFF CAP
8111C REMOVE CAP
25
25
Need
1
C722
2
SC22U6D3V5MX-2GP
RTL8111B
R411
40 mils
IND-4D7UH-86-GP
RTL8111C
82.30020.851
R696 : GIGA 2.49K
25
25
Q5
DY
2
1
Q3
C28 Please
Close PIN63
SC15P50V2JN-2-GP
DY
They are for U49 AVDD18
pin-5,8,11 and 14
SCD1U16V2ZY-2GP
2
2
1
C715
C717
FB12
1
DY
Only For 8111C
2
SC15P50V2JN-2-GP
R466
0R2J-2-GP
Only For 8111B
Q19
BCP69T1-1-GP
1
2
1
1
1.5V
CTRL18
2
1.8V
1
EVDD18
VDD33
2
1.8V
1
X5
XTAL-25MHZ-102-GP
1
C751
1
3.3V
AVDD18
1
VDD33
2
SCD1U16V2ZY-2GP
2
AVDD33
EEPROM LED OPTION USE '01'
(DEFINED IN SPEC)
= & gt; LED0 : ACT
= & gt; LED1 : LINK
(BOTH 10/100 AND GIGA CHIP)
3
8
7
6
5
VCC
DU
ORG
GND
3
25
25
C701
They are for U49 VDD33
pin-16,37,46 and 53
L36
25
25
SCD1U16V2ZY-2GP
RTL8111C
DVDD15
S
C
D
Q
C726
2
2
C735
2
SCD1U16V2ZY-2GP
1
2
3
4
M93C46-WMN6TP-GP
8101E REMOVE
8111B REMOVE
8111C STUFF
1
1
SC22U6D3V5MX-2GP
C773
LAN_EECS
LAN_EESK
LAN_EEDI
LAN_EEDO
1
2
2
S
R499
10KR2J-3-GP
2
R506
3K6R3-GP
C781
4
Power domain chart
G
31,32 PM_LAN_ENABLE
1
1
Q24
2N7002-11-GP
2
VDD33
2
D
1
4
2
60 ~ 100 mils
AVDD33
R480
1
DY
1
E
2
B
1
A
C
D
Sheet
E
24
Rev
of
51
A
8101E : R195( 0 ohm ) XF1(NC)
8111B/8111C : R195 (NC)
C
1
XF1
8
7
MCT3
MCT4
RD+
RD-
1
2
MDIP3
MDIN3
CT
CT
CT
CT
RX+
RX-
12
11
RJ45_7
RJ45_8
0R2J-2-GP
1
R157
2
C629
XFORM-230-GP
MID0X
C630
MCT4
MCT3
MCT2
MCT1
1
2
3
4
8
7
6
5
LAN_TERMINAL
1
2
C590 SC1KP3KV8KX-GP
10
1
RJ45-131-GP-U1
R370
MID1X
C632
Green : Link up
Blinking : TX/RX activity
SCD01U50V2ZY-1GP
SCD01U50V2ZY-1GP
SCD01U50V2ZY-1GP
SCD01U50V2ZY-1GP
RN57
3
ACT_LED#
4
1
R368 R371
2
10/100/1000Mbps Lan Transformer
R369
2
RJ45_3
RJ45_6
24
1
2
3
4
5
6
7
8
B1
B2
DY
24
24
1
12
11
MDIP1
MDIN1
2
RX+
RX-
MDIP1
MDIN1
C482
SCD1U16V3KX-3GP
1
RD+
RD-
1
2
MDIN1
1
1
LINK1G
RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PWR_2
MDIP1
MDIN0
2
CT
CT
CT
CT
8
7
49D9R2F-GP
4
9
10
3
TX+
TX-
49D9R2F-GP
1
TD+
TD-
49D9R2F-GP
2
5
6
1
MDIP0
MDIN0
49D9R2F-GP
1
24
2
MDIP0
24
24
2
R158
RJ45_1
RJ45_2
9
A1
A2
A3
LINK1G
75R2J-1-GP
XFORM-230-GP
XF2
MDIP0
MDIN0
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
RJ1
LINK100
CONN_PWR_1
2
DY
MCT1
MCT2
C633
2 CONN_PWR_2
470R2J-2-GP
C631
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
C345
2
1
1
TCT1
75R2J-1-GP
24
R160
24
MDIP3
MDIN3
2
4
4
9
10
3
1
TX+
TX-
1
1.route on bottom as differential pairs.
R279
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
24
LINK100
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
C517
7.Must not cross ground moat,except
SCD1U16V3KX-3GP
RJ-45 moat.
DY
2
TD+
TD-
0R2J-2-GP
2
1
5
6
R159
1
2
MDIP2
MDIN2
RJ45_4
RJ45_5
2
24
24
MDIP2
MDIN2
E
Off : Link 10 Mbps
Green : Link 100 Mbps
Orange : Link 1000 Mbps
2 CONN_PWR_1
470R2J-2-GP
1
R294
3D3V_LAN_S5
R203,R733,R205,R734 STUFF
20mil
R170
0R0402-PAD
D
FOR 10/100 8101E
1GLan Transformer
1
AVDD18
B
PIN09 : GREEN
PIN11 : ORANGE
PIN13 : YELLOW
3
GIGA no need it at all , 10/100 keep
SRN75J-1-GP
2
2
1
1
& lt; Core Design & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN connector/NEW CARD/SIM
Size
Custom
Document Number
Rev
ME3-Discrete
Date: Sunday, September 09, 2007
A
B
C
D
Sheet
E
25
of
51
WebCam
RF
SC
5V_RF_S0
1
20
1
2
3
4
TPAD30 TP235
TPAD30 TP234
USB_PP4
USB_4+
0R0402-PAD
2
1
ETY-CON5-8-GP
20.D0196.105
6
USB4_P_RF
0R2J-2-GP
1
TPAD30 TP180
TPAD30 TP179
TP177
TR1
4
1
20
R498
SC
USB_PP6
SC
RF
Place Top side and
close to connector
DY
1
3D3V_CAM_S0
2
0R5J-6-GP
1
1
9
C737
1
C743
5V_S0
RF
2
2
U41
C410
SC10U25V6KX-1GP
G545B2RD1U-GP
RF
RF
3D3V_S0
R12
DY
R224
68KR2F-GP
SCD1U16V2KX-3GP
SC1U16V3ZY-GP
1
2
3
SHDN#
GND
IN
SET
5
OUT
WEBCAM_SET
4
G913CF-GP
1
SC1U16V3ZY-GP
OC#
GND
GND
1
5
C724
(OD)
EN/EN#
2
TPAD30 TP164
6
7
8
2
0R5J-6-GP
5V_S0
R223
R222
31K6R2F-GP
SC10U25V6KX-1GP
2
RF
C411
2
USB_OC5#
OUT#6
OUT#7
OUT#8
2
4
RF_EN#
IN#2
IN#3
1
2
3
31 RF_EN#
1
(3.93V)
50 mil
5V_RF_S0
U75
1
50 mil
400uS rise time
Supply 1.5~1.1A
1
5V_S5
TPAD30 TP238
TPAD30 TP237
Finger Printer
TPAD30 TP240
TPAD30 TP239
R218
USB_PP4
SC
2
USB_PN4
Place Top side and
close to connector
TP241 PAD30
T
CN2
BT
BT2
23 BT_PRIORITY1
1
11
USB4_P_BT
0R2J-2-GP
1 USB4_N_BT
0R2J-2-GP
BT_PRIORITY1
TPAD30 TP243
TPAD30 TP244
WL_PRIORITY1
23 WL_PRIORITY1
FP
BLUETOOTH_EN
1
2
3
SHDN#
GND
IN
SET
BT_LED
SC
12
TP252 PAD30
T
ACES-CON10-5-GP-U
R120
BT
Place Top side and
close to connector
bom1
3D3V_BT_S0
5
OUT
BT_ACT
BLUETOOTH_EN
4
G913CF-GP
C511
SC4D7U10V5ZY-3GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
31 BLUETOOTH_EN
2
SC
BT
1
U54
2
3
4
5
6
7
8
9
10
2
100KR2J-1-GP
1
C521
SC1U10V3ZY-6GP
2
C287
SC10U25V6KX-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
FP
C292
2
1
6
PTWO-CON4-1-GP-U
R118
BT
DY
100KR2J-1-GP
USB_PN7 20
USB_PP7 20
TP254 PAD30
T
2
2
3
4
DY
5V_S5
TP253 PAD30
T
1
1
1
TP248 PAD30
T
TP250 PAD30
T
CN3
5
1
3D3V_BT_S0
TPAD30 TP247
TPAD30 TP249
TPAD30 TP251
2
3D3V_S0
TP242 PAD30
T
1
R217
TP246PAD30
T
TP245PAD30
T
2
20
2
3
4
5
SC
R501
TP181 PAD30
T
1
USB_6USB_6+
TP178 PAD30
T
7
TPAD30 TP176
L-63UH-GP
RF
2
CAM1
6
1
SC
SC
USB_PN6
RF1
ACES-CON4-1-GP-U1
2
USB_4-
RF
Place Top side and
close to connector
2
R490
3
2
USB_PN4
2
2
20
0R0402-PAD
1 USB4_N_RF
0R2J-2-GP
SC
SCD1U16V2KX-3GP
C412
5
R491
3D3V_CAM_S0
TP232PAD30
T
TP233PAD30
T
TP236PAD30
T
2
RF
TP231PAD30
T
1
SCD1U16V2KX-3GP
C747
USB_6USB_6+
TPAD30 TP175
TPAD30 TP174
SC
FP
C505
SCD1U16V2ZY-2GP
Title
Size
BT
BT
FP / Camera / RF / BT
Document Number
Rev
ME3-Discrete
Date: Thursday, September 13, 2007
Sheet
26
of
51
5
4
2
1
1
A3V3
1
2
XD_CLE
XD_CE#
XD_ALE
SD_D2/XD_RE#
SD_D3/XD_WE#
XD_RDY
SD_D4/XD_WP#
R483
270KR2F-GP
2
CARD_XO
2
XD_CD#
CARD_VREF
6K2R2F-GP
38
37
XD_RDY/CF_D13
39
40
41
XD_ALE/CF_D4
43
42
RREF
AV33
SD_CMD
36
SD_CMD
SD_DAT5/XD_D0/CF_D14
35
SD_D5/XD_D0
34
SD/XD/MS_CLK
D3V3
D3V3
20
USB_PP3
5
DP
DGND
32
6
AG33
SD_DAT6/XD_D7/MS_D3/CF_D15
8
5V_IN
9
CARD_3V3
C710
TPAD30 TP168
TPAD30 TP165
SC10U6D3V5KX-2GP
SD_D0/XD_D6/MS_D0
SD_DAT1/XD_D3/MS_D1/CF_IORDY
26
SD_D1/XD_D3/MS_D1
XD_D5/MS_BS/CF_A2
25
XD_D5/MS_BS
SD_WP#
SD_CD#
NP2
38
MEMCARD-36P-GP
CF_A1/XD_D4
CF_DMARQ
24
23
CF_DMACK#
B
22
CF_D0/SM_WPM#/SD_WP
CF_A0/SD_CD#
21
CF_D8/SM_CD#
CF_D1/XD_CD#
19
18
17
16
GPIO0
14
C
C757
2
2
27
NP1
1
RTS5158-GP
CF_D2
DGND
CF_D9
D3V3_OUT
12
CF_CD#
11
D3V3
C759
SD_D7/XD_D2/MS_D2
SD_DAT0/XD_D6/MS_D0/CF_RST#
3D3V_CARD
CARD_LED#
SM_SD#
XD_D4
SD_CD#
SD_WP#
XD_CD#
R460
SC4D7U6D3V3KX-GP
1
R459
2
33R2F-3-GP
SD/XD/MS_CLK_SD
1
R458
2
33R2F-3-GP
SD/XD/MS_CLK_MS
SC10P50V2JN-4GP
2
DY
A
C706
1
XD_D1
1
2
0R2J-2-GP
1
SD/XD/MS_CLK
2
1
MS_INS#
28
VREG
20
10
SD_D6/XD_D7/MS_D3
29
SD_DAT7/XD_D2/MS_D2/CF_IOWR#
CF_D10
1
1
2
2
2
C746
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C763
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC4D7U6D3V3KX-GP
1
CARD_VREG
C758
30
MS_INS#/CF_IORD#
15
5V_S0
SCD1U16V2KX-3GP
CF_CS0#
13
2
A3V3
SD_D1/XD_D3/MS_D1
XD_D4
XD_D5/MS_BS
SD_D0/XD_D6/MS_D0
SD_D0/XD_D6/MS_D0
SD_D1/XD_D3/MS_D1
SD_D6/XD_D7/MS_D3
31
A3V3_OUT
SD_D1/XD_D3/MS_D1
SD/XD/MS_CLK_SD
XD_D5/MS_BS
XD_D1
SD_D7/XD_D2/MS_D2
1
DM
33
2
4
7
1
USB_PN3
SCD1U16V2KX-3GP
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
SD_D7/XD_D2/MS_D2
SD_D0/XD_D6/MS_D0
SD_CLK/XD_D1/MS_CLK/CF_D7
AV_PLL
1
XD_RDY
SD_D2/XD_RE#
XD_CE#
XD_CLE
XD_ALE
SD_D3/XD_WE#
SD_D4/XD_WP#
SD_D5/XD_D0
20
C748
CARD1
SD_D2/XD_RE#
SD/XD/MS_CLK_MS
SD_D3/XD_WE#
SD_D6/XD_D7/MS_D3
SD_CMD
MS_INS#
SD_DAT4/XD_WP#/CF_D6
2
2
3
1
R486
SD_DAT3/XD_WE#/CF_D5
1
A3V3
XD_CLE/CF_D3
SCD1U16V2KX-3GP
SD_DAT2/XD_RE#/CF_D12
SCD1U16V2KX-3GP
XD_CE#/CF_D11
45
44
RST#
MODE_SEL
47
46
2
2
C762
AG_PLL
XTLI
XTLO
1
1
CARD_AVPLL
0R2J-2-GP
C749
48
U73
R495
C
C686
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC20P50V2JN-1GP
1
2
1
C731
SC1U10V2KX-1GP
2
C741
2
C671
37
X6
XTAL-12MHZ-21GP
CARD_VREG
1
2
2
C652
1
1
SC20P50V2JN-1GP
1
1
1
2
CARD_XI
2
SCD1U16V2KX-3GP
CARD_RST#
C742
1
D
3D3V_CARD
R473
100KR2J-1-GP
R481
10KR2J-3-GP
2
CARD_MODE_SEL
D
B
3
C707
DY
SC10P50V2JN-4GP
A
& lt; Variant Name & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Card Reader RTS5158
Size
A3
Document Number
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
5
4
3
2
Sheet
1
27
of
51
C423
OC#
1
2
For 1 port USB
For 2 port USB
5V_USB3_S3
5V_USB1_S3
SC10U25V6KX-1GP
USB1
G545A2RD1U-GP
16
400uS rise time
Supply 1.5~1.1A
5V_S5
1
5
C438
OC#
1
2
1
9
EN/EN#
C150
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
SC10U25V6KX-1GP
G545B2RD1U-GP
TP255
TP258
TP257
TP259
TP261
TP260
TP263
TP262
TP256
TP264
20
20
USB_PN9
USB_PP9
USB_PN8
USB_PP8
USB_PN1
USB_PP1
TP265
TP267
TP266
TP268
TP270
TP269
USB_PN9
USB_PP9
20
20
USB_PN8
USB_PP8
20
20
14
13
12
11
10
9
8
7
6
5
4
3
2
USB_PN1
USB_PP1
1
TC16
ST100U10VDM-5GP
15
MLX-CON14-5-GP
2
SC1U16V3ZY-GP
GND
GND
C98
2
4
SCD1U16V2KX-3GP
6
7
8
1
USB_PWR_EN#
OUT#6
OUT#7
OUT#8
IN#2
IN#3
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
50 mil
5V_USB3_S3
U46
2
3
(OD)
Place Top side and
close to connector
C147
1
50 mil
1
9
C145
2
SC1U16V3ZY-GP
GND
GND
SCD1U16V2KX-3GP
6
7
8
2
EN/EN#
5
(OD)
OUT#6
OUT#7
OUT#8
1
4
USB_OC3#
1
IN#2
IN#3
USB_PWR_EN#
TPAD30 TP77
100 mil
5V_USB1_S3
U44
2
3
31 USB_PWR_EN#
USB PORT
400uS rise time
Supply 2~1.5A
5V_S5
2
100 mil
20.K0227.014
SC
400uS rise time
Supply 1.5~1.1A
50 mil
5
OC#
C528
(OD)
GND
GND
1
9
USB2
8
NP1
C531
1A
20
G545B2RD1U-GP
2A
20
SC10U25V6KX-1GP
USB_PN0
USB_PP0
3A
2
SC1U16V3ZY-GP
1
EN/EN#
USB_OC0#
C542
1
TPAD30 TP103
4
1
USB_PWR_EN#
6
7
8
1
OUT#6
OUT#7
OUT#8
2
IN#2
IN#3
SCD1U16V2KX-3GP
2
2
3
5V_USB2_S3
50 mil
5V_USB2_S3
U57
4A
2
5V_S5
NP2
9
TC20
SC
C805
1
2
3
4
5
6
7
ESATA_RXP1
ESATA_RXN1
ESATA_RXP1 29
ESATA_RXN1 29
ESATA_TXN1
ESATA_TXP1
ESATA_TXN1 29
ESATA_TXP1 29
11
SKT-SATA+USB11P-GP-U
5V_S5
2
5V_S5
2
2
5V_S5
ST100U10VDM-5GP
10
C806
C807
SC10U25V6KX-1GP
1
1
1
SC
SC10U25V6KX-1GP SC10U25V6KX-1GP
MDC 1.5 CONN
MDC1
1
EC29
R463
100KR2J-1-GP
SC22P50V3JN-GP
C688
C371
SC4D7U25V5KX-GP
bom1
HDA_BITCLK_CODEC
19,34,35
2
2
AMP-CONN12A-1GP
3D3V_S5
SCD1U16V2KX-3GP
1
2 HDA_SDIN1_1
22R2J-2-GP
1
1
R464
4
6
8
10
12
18
17
MH2
2
19,34,35 HDA_SYNC_CODEC
19 HDA_SDIN1
19,34,35 HDA_RST#_CODEC
3
5
7
9
11
16
1
19,34,35 HDA_SDOUT_CODEC
MH1
14
15
2
2
13
1
Wistron Corporation
20.F0677.012
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
USB / MDC / E-SATA CON
Document Number
Rev
ME3-Discrete
Date: Wednesday, September 19, 2007
Sheet
28
of
51
5
4
3
2
D
1D8V_S0_ESATA_D
D
3D3V_S0
R168
1D8V_S0_ESATA_A
1
2
3
4
5
6
7
8
9
10
11
12
R333
2
1D8V_S0_ESATA_A
ESATA_RXP
ESATA_RXN
1D8V_S0_ESATA_A
ESATA_TXN
ESATA_TXP
2
2
ESATA_TXN
SC3900P50V2KX-2GP
ESATA_TXP
SC3900P50V2KX-2GP
20
20
20
20
1
2
VSSD
NC#47
VDDD
NC#45
NC#44
NC#43
VDDO
NC#41
NC#40
NC#39
NC#38
VSSD
1
TP121 TPAD28
SIL3531_HPL_N
1
TP124 TPAD28
C
1D8V_S0_ESATA_D
R365
2
PLT_RST1# 7,18,20,23,31,32,45
1
2
C628
13
14
15
16
17
18
19
20
21
22
23
24
VDDP
VSSP
PRx+
PRxVDDP
VSSP
PTxPTx+
VSSP
VDDP
RefCLK+
RefCLK-
C627
1
33R2F-3-GP
1
1
1
C600
B
2
1
C276
1
C277
2
ESATA_TXP1
C592
SCD1U16V2KX-3GP
ESATA_TXN1
28
C334
SCD1U16V2KX-3GP
28
1
2
SCD1U16V2KX-3GP
ESATA_RXN1
SC10U6D3V5KX-2GP
SC10U6D3V5KX-2GP
ESATA_RXP1
28
ESATA_RXP
SC3900P50V2KX-2GP
2 ESATA_RXN
SC3900P50V2KX-2GP
2
2
C593
28
SIL3531_HPLE_N
1
1D8V_S0_ESATA_A
1
C269
1
C273
36
35
34
33
32
31
30
29
28
27
26
25
2
1
SIL3531ACNU-GP
HPLE_N
NC#35
NC#34
LED3
LED2
HPL_N
LED1
VSSO
VDDD
LED0
VSSD
PERST_N
SC68P50V2JN-1GP
SC68P50V2JN-1GP
2
VSSX
XtalO
XtalI
VDDX
VDDSPLL
VSSSPLL
SRx+
SRxVDDS
STxSTx+
VSSS
SCD1U16V2KX-3GP
2
C326
SCD1U16V2KX-3GP
1
C609
SCD1U16V2KX-3GP
2
C328
SC10U6D3V5KX-2GP
SCD1U16V2KX-3GP
1
C617
C342
1
75R2F-2-GP
49
EGND
1
1D8V_S0_ESATA_A
1
1
2
2
2
C323
1
0R3-0-U-GP
2
2
U25
2
1D8V_S0_ESATA_D
2
SC27P50V2JN-2-GP
SC10U6D3V5KX-2GP
1
1 R165
0R0603-PAD
C608
SC27P50V2JN-2-GP
1D8V_S0
1
1
XTAL-25MHZ-99GP
X1
C324
C338
48
47
46
45
44
43
42
41
40
39
38
37
R156
2
1
10MR2J-L-GP
C335
SC10U6D3V5KX-2GP
XTAL_O_ESATA
XTAL_I_ESATA
2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
1
2
SCD1U16V2KX-3GP
SC10U6D3V5KX-2GP
1
1 R164
0R0603-PAD
C621
2
1D8V_S0
C
B
3D3V_S0_ESATA_D
1
PCIE_TXP1
PCIE_TXN1
PCIE_RXN1
PCIE_RXP1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 C331
1 C332
2
2
PCIE_RXN4_C
PCIE_RXP4_C
3 CLK_PCIE_ESATA
3 CLK_PCIE_ESATA#
& lt; Core Design & gt;
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ESATA
Size
A3
Document Number
Date: Sunday, September 09, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
29
of
51
SATA HD Connector
HDD1
23
NP1
1
19
5V_S0
CDROM_LED# 1
R430
2
4K7R2J-2-GP
3D3V_S0
INT_IRQ14
2
8K2R2J-3-GP
1
R431
CDROM1
51
NP1
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
FOX-CON22-3-GP-U
62.10065.061
19 IDE_PDDREQ
19 IDE_PDIOR#
19 IDE_PDDACK#
19 IDE_PDA2
19 IDE_PDCS3#
5V_S0
C672
SC10U10V5ZY-1GP
52
RSTDRV#_5
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
3D3V_S0
1
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
IDE_PDA2
34
36
38
40
42
44
DY
46
C676
C678
48
50
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP NP2
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
R435
4K7R2J-2-GP
2
C375
CD-ROM CONNECTOR
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24
1
2
2
2
2
SSM24PT-GP
A
D23
IDE_PDD[0..15]
2
C376
1
C370
1
C368
1
1
K
5V_S0
SC10U25V6KX-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
3
4
5
6
7
1
SCD01U50V2KX-1GP
SATA_RXN0_HDD
SATA_RXP0_HDD
SCD01U50V2KX-1GP
2
19 SATA_RXN0_C
19 SATA_RXP0_C
2
2
1
C656 1
C658 1
2
19 SATA_TXP0
19 SATA_TXN0
IDE_PDIOW#
19
IDE_PDIORDY
IDE_PDA1
IDE_PDA0
19
INT_IRQ14 19
IDE_PDA1 19
IDE_PDA0 19
IDE_PDCS1# 19
CDROM_LED# 16
5V_S0
primary channel:low
FOX-CONN50-4R-1GP-U1
20.80682.050
5V_S0
5V_S0
U67
5
VCC
B
1
A
RSTDRV#_5
4
Y
2
GND
3
PCI_PLTRST# 18
74AHCT1G08GW-GP
& lt; Variant Name & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
HD/CDROM
Document Number
Rev
ME3-Discrete
Date: Wednesday, August 15, 2007
Sheet
30
of
51
A
LRESET#
LFRAME#
ECSCI#
2
2
2
1
1
1
1
1
2
2
7
3
29
75
83
110
111
112
GPO72
GPO76/SHBM
GPO82/HGPO00/TRIS#
GPO83/SOUT_CR/BADDR1
GPO84/HGPO01/BADDR0
106
107
GPI96
GPI97
101
105
GPI94/DA0
GPI95/DA1
97
98
99
100
LAD0
LAD1
LAD2
LAD3
GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
4
126
127
128
1
102
85
2
2
EC_SWI#
R415
2
ECSCI#
R379
2
KA20GATE
R417
1
10KR2J-3-GP
2
KBRST#
R416
DY
1
TP138 TPAD30
TP130 TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
2
E51_RxD
R405
2
E51_TxD
R406
1
10KR2J-3-GP
1
3
10KR2J-3-GP
1
10KR2J-3-GP
3D3V_S0
SB
SPIDI
SPIDO
SPICLK
SPICS#
1 51R2F-2-GP
1 51R2F-2-GP
50
50
32
32
32
32
& lt; ----- BATTERY
1
1
2
SC4D7P50V2CN-1GP
2
C657
C653
10KR2J-3-GP
DY
SC4D7P50V2CN-1GP
SC
1
R264
2 E51_TxD
4K7R2J-2-GP
2
1
10KR2J-3-GP
SB
2 S5_ENABLE
R392
1
10KR2J-3-GP
2 PM_LAN_ENABLE
R531
SB
KBC_XI
KBC_XO
3D3V_S0
KBCXO
KBCXO
1
SB
2
C347
SC5D6P50V2CN-1GP
1
C344
SC5D6P50V2CN-1GP
8
7
6
5
3
C646
SRN4K7J-10-GP
SB
SCD1U16V2KX-3GP
3D3V_AUX_S5
SC1U10V2KX-1GP
KBRST#
C647
3D3V_AUX_S5
10MR3F-GP
R171
RESO-32D768KHZ-GP
33KR2J-3-GP
X4
4
C625
E51_RxD
KA20GATE
SB
1
RN62
1
2
3
4
1
VBAT
1
PHY_RESET#_KBC
DY
R172
2
KBC_BEEP 34
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
20,23,41,42 PM_SLP_S4#
23
WWAN_EN
TPAD30 TP45
23 WIRELESS_EN
26 RF_EN#
36 AMP_SD#
23 E51_RxD
19
KBGA20
20,32 INT_SERIRQ
19
KBRST#
3
PCLK_KBC
SB_RSMRST#
R376
DY
1
TP145
TP140
TP133
TP131
1
1
ECSMI#_KBC
TPAD30 TP46
2
1
10KR2J-3-GP
TPDATA 33
TPCLK 33
2
KBC_SCL1
KBC_SDA1
EC_SWI#
PSDAT1
PSCLK1
71
72
1
22
22
20
BT_SDA
BT_SCL
1
1
1
1
F_SDO R389 2
F_SCK R394 2
2
THERMAL----- & gt;
CHG_I_PRE_SEL
R538
10KR2J-3-GP
KCOL18
KCOL17
TPAD30 TP136
TPAD30 TP132
2
1
WPC8763LDG-1-GP
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
2
2
10KR2J-3-GP
2
DY
CHG_ON#
2
1
69
70
AGND
R372
R403
10KR2J-3-GP
100KR2J-1-GP
3D3V_S5
103
1
TPAD30 TP141
R404
10KR2J-3-GP
R384
86
87
92
90
GND
GND
GND
GND
GND
GND
KBC_BLON
KBC_GPIO55
1
R410
10KR2J-3-GP
1
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
5
18
45
78
89
116
2
0R0402-PAD R375
DY
3D3V_AUX_S5
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
1
BLON_IN
32KX2
32KX1/32KCLKIN
BLON_OUT
46
R182
10KR2J-3-GP
SB
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
54
55
56
57
58
59
60
61
SDA1
SCL1
1
16
KBC_GPIO47
2
1
TPAD30 TP147
79
77
KBC_MUTE#
DY
R181
10KR2J-3-GP
4
SC
KCOL[1..17] 33
KROW[1..8] 33
F_SDI
F_SDO
F_SCK
F_CS0#
LCLK
VREF
VCORF
A_PWM0
RESERVED
36
SB_CHIP_ID#
CHG_LED
2
104
44
32
80
16
VCORF
22 S5_ENABLE
20 SB_RSMRST#
50
AD_OFF
2
43
16
16
16
16
MMB_SCL
MMB_SDA
CHG_ON#
NUMLK_LED#
CAPS_LED#
PWR_LED#
STBY_LED
D31
1
R180
10KR2J-3-GP
PCB_VER0
PCB_VER1
PCB_VER2
PLT_RST1# 7,18,20,23,29,32,45
LPC_FRAME# 19,32
ECSCI# 20
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GA20
SERIRQ
KBRST#
LDRQ0#_KBC
TPAD30 TP47
33
33
R386
1
3D3V_S0
10KR2J-3-GP
121
125
122
20 SB_PWR_BTN#
VDD
VCC
VCC
VCC
VCC
VCC
CHG_I_SEL
GPIO01
GPIO03
GPIO04
GPIO05
GPIO06/HGPIO06
GPIO07/HGPIO07
GPIO10/HGPIO00/LPCPD#
GPIO11/HGPIO02/CLKRUN#
GPIO12/PSDAT3
GPIO13/B_PWM0
GPIO14/HGPIO04/TB1
GPIO16/HGPIO04
GPIO20/TA2
GPIO21/A_PWM1
GPIO23
GPIO24/HGPIO01
GPIO26/PSCLK2
GPIO27/PSDAT2
GPIO25/PSCLK3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO36
GPIO40
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45
GPIO46/TRST#
GPO47/JEN0#
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO55/CLKOUT
GPIO56/TA1
GPIO57/HGPIO03/KBSOUT17
GPIO60/KBSOUT16
GPIO61/SCL2
GPIO62/SDA2
GPIO63/PWUREQ#
GPIO64/SMI#
GPIO66/SWD
GPIO70
GPIO71
GPIO75
GPIO77
GPIO81
GPIO87/SIN_CR
VGA_TYPE_DIS#
3
PLT_RST1#_1
2
0R0402-PAD
ECSCI#_KBC 2
1N4148W-7-F-GP
33
34
67
68
123
9
81
73
74
82
84
91
113
2
SC1U10V2KX-1GP
20,32 PM_CLKRUN#
43,50
BT_TH
16
BRIGHTNESS
64
95
96
108
93
94
124
8
13
62
63
114
117
118
119
6
10
11
12
109
120
65
66
14
15
16
17
20
21
22
23
24
25
26
27
28
30
31
EAPD#
34
BLUETOOTH_EN 26
PM_LAN_ENABLE 24,32
USB_PWR_EN# 28
E51_TxD 23
E51_TxD
2
U28
20,22,23,37,41,42,44,47 PM_SLP_S3#
16 KBC_PWR_BTN#
20,23,24 PCIE_WAKE#
43 CHG_I_PRE_SEL
43
AC_IN#
33,36 LID_CLOSE#
43
1
VBAT
AVCC
C661
2
C626
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
1
1
1
1
C644
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC22U10V6MX-1GP
SC22U10V6MX-1GP
2
C637
2
C616 C622
2
1
1
3D3V_AUX_S5
2
1
0R3-0-U-GP
C615
46
19
115
76
88
E
1
2
C
MMBT3906-3-GP
4
R401
VCC_POR#
2
Q18
B
EC_RST#
PCB_VER0
PCB_VER1
PCB_VER2
3D3V_AUX_S5
C643
SC22U10V6MX-1GP
22
ECRST#
2 10KR2J-3-GP
R383
2
1
1
3D3V_AUX_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V5KX-2GP
SC10U6D3V5KX-2GP
C650 C651
1
2
Planar
ID(2,1,0)
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
SD: 0,1,1
19,32
19,32
19,32
19,32
1
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
AD_IA 43
3D3V_S0
BT_SCL
BT_SDA
R532
KBC_SCL1
KBC_SDA1
1
1
10KR2J-3-GP
VGA_TYPE_DIS#
R378
DY
RN65
4
3
MMB_SCL
MMB_SDA
10KR2J-3-GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
10KR2J-3-GP
2
1
2
Wistron Corporation
R414
2
3D3V_S0
1
1
2
& lt; Variant Name & gt;
SB_CHIP_ID#
Size
A3
SRN10KJ-5-GP
KBC WPC8763
Document Number
Date: Wednesday, September 12, 2007
A
Rev
ME3-Discrete
Sheet
31
of
51
3D3V_AUX_S5
5
6
7
8
5V_S0
5V_S0
U40
SPI FLASH ROM
4
3
SPI_HOLD# 2
1
SRN10KJ-6-GP
RN48
31
31
SPICS#
SPIDI
1
2
7,18,20,23,29,31,45 PLT_RST1#
19,31 LPC_FRAME#
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
LPC_FRAME#
PCLK_FWH
3 PCLK_FWH
FWH_INIT#
SPICS#
SPIDI_R
SPI_WP#
1
2
3
4
51R2F-2-GP
R513
19,31
19,31
19,31
19,31
3D3V_AUX_S5
U79
CS#
DO
WP#
GND
VCC
HOLD#
CLK
DIO
8
7
6
5
SPI_HOLD#
SPICLK
SPIDO
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH#
TPAD30 TP74
31
31
3D3V_S0
1
8M Bits
2
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
PLT_RST1#
LPC_FRAME#
PCLK_FWH
FWH_INIT#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH#
3D3V_S0
FOX-GF30
ZZ.GF030.XXX
W25X80-VSSI-GP
DY
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
GOLDEN FINGER FOR DEBUG BOARD
C788
SC4D7P50V2CN-1GP
3D3V_AUX_S5
SB
TOP VIEW
2
R533
R534
100KR2J-1-GP
A15
Q27
2N7002-11-GP
S
G
....
EXT_FWH#
(B1)
A14
1
10KR2J-3-GP
(B2)
....
2
D
1
24,31 PM_LAN_ENABLE
A2
(B14)
A1
(B15)
SB
(BOTTOM VIEW)
TPM 1.2
RESO-32D768KHZ-GP
1
CLK_PCI_TCG
LPC_PD#
LPC_FRAME#
PLT_RST1#
21
28
22
16
LCLK
LPCPD#
LFRAME#
LRESET#
19,31
19,31
19,31
19,31
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
26
23
20
17
LAD0
LAD1
LAD2
LAD3
6
2
TESTBI/BADD
TESTI
9
8
PP
CLKRUN#
SERIRQ
7
15
27
NC#1
NC#3
NC#12
1
3
12
GND
GND
GND
GND
4
11
18
25
1
1
PP
DY
1
1
R535
10KR2J-3-GP
TP71 TPAD28
TP67 TPAD28
R213
2
4K7R2J-2-GP
2
TPM_GPIO1
TPM_GPIO2
R536
10KR2J-3-GP
2
XTALI/32K_IN
XTALO
GPIO
GPIO2
0: 2Eh/2Fh
1: 4Eh/4Fh
B
2
1
1
2
1
2
13
14
TPM
3
20
19,31
7,18,20,23,29,31,45
3D3V_S0
U36
VSB
VDD
VDD
VDD
TPM_XTALI
TPM_XTALO
3D3V_S0
SB
C766
SCD1U16V2KX-3GP
5
10
19
24
SC10P50V2JN-4GP
TPM
C768
1D05V_S0
TPM
Q28
PM_CLKRUN# 20,31 4,19
INT_SERIRQ 20,31
H_INIT#
H_INIT#
E
FWH_INIT#
C
MMBT3904-3-GP
2
1
R502
10MR2J-L-GP
SB
R210
0R2J-2-GP
1
TPM
X7
3
2
4
2
1
TPM
SCD1U16V2KX-3GP
SC10P50V2JN-4GP
1
C405 C765
SCD1U16V2KX-3GP
1
C769
1
2
2
2
2
DY
C778
SCD1U16V2KX-3GP
0R2J-2-GP
20 TPM_32K_CLK
R215
3D3V_S5
TPM
1
3D3V_S0
TPM TPM
TPM
& lt; Core Design & gt;
SLB9635TT1D1-GP
TPM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BIOS
Size
A3
Document Number
Date: Thursday, August 23, 2007
Rev
ME3-Discrete
Sheet
32
of
51
B
C
D
CAPACITY BUTTON
1
1
SC
3
LID1
9
DY
TP188 PAD30
T
1
1
EC3
EC2
2
2
CAP1
2
LID_CLOSE# 31,36
C2
4
SCD22U10V3KX-2GP
EU1
DY
SC100P50V2JN-3GP
5
3D3V_S0
2
TP_RIGHT#
SW4
SW-TACT-114-GP
1
2
3
4
Place Top side and
close to connector
3
1
TP_RIGHT#
SW3
SW-TACT-114-GP
1
FP
TP_RIGHT#
2
3
TPAD30 TP75
4
6
BAV99W-1-GP
TP_RIGHT#
6
MMB_SCL
DY
5
SC100P50V2JN-3GP
D11
1
2
100R2J-2-GP
1
COVER_SW#
2
1
TPAD30 TP187
R2
4
2
MMB_SDA
MMB_SCL
R1
10KR2J-3-GP
MLX-CON2-9-GP-U
2
1
2
TPAD30 TP182
TPAD30 TP186
TPAD30 TP185
TPAD30 TP183
2nd source:20.F00984.002
TP184 PAD30
T
8
7
6
5
4
3
2
MLVG0402220NV09BP-GP
31
31
4
2
SCD1U16V2KX-3GP
10
1
ACES-CON8-5-GP
20.K0228.008
SCD1U16V2KX-3GP
C42
3D3V_AUX_S5
Cover Up Switch
3D3V_S0
C40
E
1
A
NOFP
D10
3D3V_S0
3
3
62.40076.001
2
MMB_SDA
62.40076.001
3
1
TP_LEFT#
SW2
SW-TACT-114-GP
2
3
31 KCOL[1..17]
TP_LEFT#
2
4
6
1
3
TPAD30 TP73
FP
NOFP
Place Top side and
close to connector
31 KROW[1..8]
TP_LEFT#
4
EMI Bypass cap.
Internal KeyBoard CONN
TP_LEFT#
SW1
SW-TACT-114-GP
6
1
5
5
BAV99W-1-GP
62.40076.001
Place Top side and
close to connector
SC
62.40076.001
SC
1
1
2
1
3
4
1
2
TPDATA
TPCLK
DY
2
2
EC33
B
C
TP_LEFT#
TPAD30 TP301
DY
SC47P50V2JN-3GP
TPAD1
2
3
4
5
6
7
8
9
10
11
12
14
ACES-CON12-GP
20.K0174.012
bom1
1
1
EC28
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
BUTTONs / KB / TOUCHPAD
Document Number
Rev
ME3-Discrete
Date: Thursday, September 13, 2007
A
TP_RIGHT#
TPAD30 TP294
1
1
EC32
2
1
SC100P50V2JN-3GP
2
EC15
2
1
1
EC18
SC100P50V2JN-3GP
2
EC6
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
EC19
SC100P50V2JN-3GP
2
EC7
SC100P50V2JN-3GP
2
EC8
1
1
1
1
1
4
3
SRN100J-3-GP
EC21
D
2
13
1
2
31
31
SC100P50V2JN-3GP
2
EC16
2
1
1
C290
TP290PAD30
T
TP288PAD30
T
TP_DATA
TP_CLK
RN34
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
1
EC20
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
1
EC9
SC100P50V2JN-3GP
2
1
EC22
SC100P50V2JN-3GP
2
1
EC10
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
1
EC23
2
2
1
1
EC17
2
1
2
1
EC12
C291
RN58
SRN4K7J-8-GP
KCOL17
SC47P50V2JN-3GP
EC11
TP274 PAD30
T
TP275 PAD30
T
TP276 PAD30
T
TP277 PAD30
T
TP281 PAD30
T
TP282 PAD30
T
SCD1U16V2KX-3GP
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
EC24
5V_S0
SCD1U16V2KX-3GP
SC100P50V2JN-3GP
2
1
EC25
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
1
EC13
SC100P50V2JN-3GP
2
EC26
SC100P50V2JN-3GP
2
EC14
2
1
1
1
EC27
SC100P50V2JN-3GP
2
EC5
SC100P50V2JN-3GP
Place Top side and
close to connector
EC4
SC100P50V2JN-3GP
SC
ACES-CON25-3-GP
DY
SC100P50V2JN-3GP
SC100P50V2JN-3GP
27
TP278 PAD30
T
TP279 PAD30
T
TP280 PAD30
T
TP284 PAD30
T
TP283 PAD30
T
TP285 PAD30
T
TP287 PAD30
T
TP286 PAD30
T
TP292 PAD30
T
TP289 PAD30
T
TP291 PAD30
T
TP293 PAD30
T
TP298 PAD30
T
TP295 PAD30
T
TP297 PAD30
T
TP296 PAD30
T
TP300 PAD30
T
TP299 PAD30
T
TP302 PAD30
T
TP303 PAD30
T
TP305 PAD30
T
TP304 PAD30
T
TP307 PAD30
T
TP306 PAD30
T
SC100P50V2JN-3GP
1
DY
SC100P50V2JN-3GP
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1 KCOL1
R539
SC100P50V2JN-3GP
KCOL1A
2
0R2J-2-GP
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KROW1
KROW2
KCOL15
KROW3
KROW4
KROW5
KROW6
KCOL16
KCOL17
KROW7
KROW8
1
5V_S0
KCOL1A
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
SC
2
TP271PAD30
T
TP272PAD30
T
TP273PAD30
T
KB1
26
2
2
Sheet
E
33
of
51
A
B
C
D
E
5V_S0
U33
C380
SHDN#
GND
IN
SET
5V_AUDIO_S0
5
OUT
4
4
1
4
1
2
47KR2J-2-GP
19,28,35
SC10U25V6KX-1GP
SC100P50V2JN-3GP
AUD_VAUX
2
10KR2J-3-GP
5V_AUDIO_S0
5VA_OP_S0
DY
1
R211
1
R471
10KR2J-3-GP
D
1
TP162 TPAD30
1
TP163 TPAD30
1
R212
Q10
2N7002-11-GP
2
1
LOUR_JD#_R
2
AUD_LFE_OUT
AUD_CEN_OUT
1
SC10U6D3V5KX-2GP
MICIN_JD#
5V_AUDIO_S0
SCD1U16V2KX-3GP
2
2
2
HDA_BITCLK_CODEC
1
19,28,35
19,28,35
1
R467
KBC_BEEP_R
2
SC1U16V3ZY-GP
HDA_RST#_CODEC
HDA_SYNC_CODEC
SCD1U16V2KX-3GP
C712
1C379
C696
G923-475T1UF-GP
C402
C395
G
SCD1U16V2KX-3GP
SC10U25V6KX-1GP
3D3V_S0
2
39K2R2F-L-GP
LOUR_JD#
SCD1U16V2KX-3GP
5VA_OP_S0
2
1
1
2
SCD1U16V2KX-3GP
SC10U25V6KX-1GP
3
LINEIN_JD#
MICIN_JD#
2
20KR2F-L-GP
LINEIN_JD#
2
10KR2F-2-GP
R472
10KR2J-3-GP
Q9
2N7002-11-GP
2
1
2
R203
LINEIN_JD#_R 1
C714
D
1
R205
MICIN_JD#_R 1
C713
34
13
S
32
28
30
MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO
C390 1
TP66
1
MIC_INT_R
C392 1
R208
R209
2K2R2J-2-GP
MIC2VREFO
MICINT_R 1
2
2K2R2J-2-GP
AVSS1
AVSS2
DVSS
DVSS
MICINT_L 1
D25
1
SURR-L/PORT-A-L
SURR-R/PORT-A-R
ALC888DD-GR-GP
FRONT-L/PORT-D
FRONT-R/PORT-D
2
0R2J-2-GP
EAPD# 31
35
36
1 R204
0R0603-PAD
19,28,35
19
2
SPDIF_CN
C387
662
45
46
39
41
SPDIF
EAPD#_662
1
R206
HDA_SDOUT_CODEC
HDA_SDIN0
36
C389
SC470P50V2KX-3GP
DY
DY
SC470P50V2KX-3GP
DY
2
DY
MIC1VREFO_R
MIC1VREFO_L
TPAD30
TP72
SIDE-L/PORT-H-L
SIDE-R/PORT-H-R
VREF
2
DY
INT_MIC_L
2
SC1U16V3ZY-GP
INT_MIC_R
2
SC1U16V3ZY-GP
48
47
1 R201
1
MIC1-L/PORT-B-L
MIC1-R/PORT-B-R
MIC2-L/PORT-F-L
MIC2-R/PORT-F-R
1 MIC_INT_L
SPDIFO
SPDIFI/EAPD
2
22R2J-2-GP
2
21
22
16
17
DY
TP65
2
TPAD30
44
43
LINE1-VREFO
LINE2-VREFO
HDA_SDOUT_CODEC
HDA_SDATAIN0_CODEC
1
MICIN_L
2
SC2D2U10V3KX-1GP
MICIN_R
2
SC2D2U10V3KX-1GP
29
31
MIC_IN_R
C396 1
5
8
2
C394 1
SDATA-OUT
SDATA-IN
AUDLOL
AUDLOR
1
1
2
TP167 TPAD30
TP166 TPAD30
AUD_LOL 36
AUD_LOR 36
CD-L
CD-R
CD-GND
MIC_IN_L
27
36
TPAD30
36
SENSE_B
SENSE_A
LINE1-L/PORT-C-L
LINE1-R/PORT-C-R
LINE2-L/PORT-E-L
LINE2-R/PORT-E-R
2
36
LINEIN_JD
18
20
19
23
24
14
15
LFE/PORT-G-R
CENTER/PORT-G-L
LINEIN_R
2
SC4D7U6D3V3KX-GP
GPIO0/DMIC-CLK
GPIO1/DMIC-DATA
1
C401
2
3
LINE_IN_R
HP_OUT_L
HP_OUT_R
JDREF
PIN37-VREFO
LINEIN_L
2
SC4D7U6D3V3KX-GP
40
37
1
C399
PCBEEP
RESET#
SYNC
BCLK
NC#33
DVDD
DVDD-IO
AVDD1
AVDD2
LINE_IN_L
26
42
4
7
36
36
36
12
11
10
6
33
1
9
25
38
G
U35
36
36
LOUR_JD# 36
3
C377
MICIN_JD
S
C397
2
C719
1
KBC_BEEP
R457
4K7R2J-2-GP
31
C386
1
2AUD_PC_BEEP
AUD_BEEP
2
47KR2J-2-GP
2
1
1
MCP_SPKR_R
2
SC1U16V3ZY-GP
2
SB_SPKR
R469
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
20
C718
1
2
1
1
2
3
D26
1N4148W-7-F-GP
1N4148W-7-F-GP
1
DY
1
DY
EAPD#_883
1
R468
EAPD#
2
0R2J-2-GP
883
CODECVREF
AUD_JDEF
1
1
1
R207
20KR2F-L-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
SCD1U16V2KX-3GP
SC10U25V6KX-1GP
2
C403
2
1
1
& lt; Variant Name & gt;
C404
Title
ALC888
Size
A3
Document Number
Date: Sunday, September 09, 2007
A
B
C
D
Rev
ME3-Discrete
Sheet
E
34
of
51
A
B
C
D
E
4
4
3D3V_S0
2
2
C374
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
1
1
SC10U25V6KX-1GP
C373
ALC268_PCBEEP_IN
TP57 TPAD28
1
C716
SCD1U16V2KX-3GP
2
C388
1
1
5V_AUDIO_S0
HDA_RST#_CODEC
19,28,34
HDA_SYNC_CODEC
19,28,34
HDA_BITCLK_CODEC
19,28,34
ALC268_SENSEB
ALC268_SENSEA
1
1
TP60 TPAD28
TP58 TPAD28
34
13
SENSE_B
SENSE_A
12
11
10
6
33
44
43
NC#44
NC#43
45
46
HP-OUT-L_PORT-A
HP-OUT-R_PORT-A
DMIC-12/GPIO0
DMIC-34/GPIO3
2
3
26
42
4
7
ALC268-GR-GP
JDREF
MONO-OUT
MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO
VREF
32
28
30
40
37
1ALC268_MIC1VREFO_R
1ALC268_MIC1VREFO_L
1ALC268_MIC2VREFO
NC#45
DMIC-CLK
MIC1-L_PORT-B
MIC1-R_PORT-B
MIC2-L_PORT-F
MIC2-R_PORT-F
AVSS1
AVSS2
DVSS
DVSS
TPAD28 TP63
TPAD28 TP61
TPAD28 TP62
SPDIFO
EAPD
48
47
LINE-OUT-L_PORT-D
LINE-OUT-R_PORT-D
HDA_SDOUT_CODEC
HDA_SDATAIN2_CODEC
2
22R2J-2-GP
ALC268_SPDIF
ALC268_EAPD 1
1
R189
HDA_SDIN2
R193
1
2
0R0402-PAD
TP59 TPAD28
HDA_SDOUT_CODEC
19
19,28,34
3
39
41
35
36
LINE1-VREFO
GPIO1
21
22
16
17
5
8
DMIC_CLKOUT 1
R196
2
100R2J-2-GP
SPDIF_H
45
D_MIC_CLKOUT 36
CD-L
CD-R
CD-G
1ALC268_LINE1VREFO 29
31
SDATA-OUT
SDATA-IN
27
TPAD28 TP64
LINE1-L_PORT-C
LINE1-R_PORT-C
NC#14
NC#15
18
20
19
23
24
14
15
3
PCBEEP
RESET#
SYNC
BCLK
NC#33
DVDD
DVDD-IO
AVDD1
AVDD2
U34
1
9
25
38
SC10U25V6KX-1GP
ALC268_DMIC34
1
TP56 TPAD28
DMIC_DATAIN 36
2
2
ALC268_JDEF
1
1
R202
20KR2F-L-GP
2
2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U25V6KX-1GP
C391
2
1
ALC268_VREF
C393
& lt; Variant Name & gt;
1
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CODEC ALC268
Size
A3
Document Number
Date: Sunday, September 09, 2007
A
B
C
D
Rev
ME3-Discrete
Sheet
E
35
of
51
A
B
C
D
E
5VA_OP_S0
TPAD30 TP308
TPAD30 TP310
TPAD30 TP309
6
2
2
2
1
SPKR1
3D3V_S0
INTMIC1
5
2
1
0R0402-PAD
2
3
4
TPAD30 TP319
LINE In
EU3
DY
1
SB
EU2
DY
1
6
C4 MLX-CON4-25-GP-U
2
2
D_MIC_DATAIN
2
10R2J-2-GP
2
R3
1
1
R4
TPAD30 TP318
TPAD30 TP317
1
1
1
2
ACES-CON4-1-GP-U1
EU7
TPAD30 TP316
35 D_MIC_CLKOUT
35 DMIC_DATAIN
4
TPAD30 TP315
TPAD30 TP314
SC
SC1U16V3ZY-GP
C785
1
1
2
D
1
D
S
G1432Q5U-GP
KBC_MUTE
34
EU6
SCD1U16V2KX-3GP
C777
AUD_LOR
EU5
MLVG0402220NV09BP-GP
MLVG0402220NV09BP-GP
MUTE
R_BYPASS
2
IN1#/IN2
5
13
16
SC2D2U10V3KX-1GP
11
L_BYPASS
3
RBYPBASS
R216
C406
2
1 SOUND_R2 1
2
10KR3F-L-GP
SC1U16V3ZY-GP
R219 1
2
10KR3F-L-GP
C407
1
2
DY
SOUND_R_OP1
SPKR_R+
SPKR_R-
SC2D2U10V3KX-1GP
2
Place Top side and
close to connector
EU4
MLVG0402220NV09BP-GP
MLVG0402220NV09BP-GP
1
NC#6
NC#8
NC#23
R214
10KR2J-3-GP
3
18
17
19
12
RIN1
RIN2
ROUT+
ROUT-
LBYPASS
6
8
23
SC1U16V3ZY-GP
SHUTDOWN
LIN1
LIN2
LOUT+
LOUT-
GND
GND
DY
1
2
24
7
14
25
SPKR_L+
SPKR_L-
GND/HS
GND/HS
GND/HS
GND/HS
SOUND_L_OP1
1 R509
2
10KR3F-L-GP
C775
1
2
5VA_OP_S0
20
4
15
10KR2J-3-GP
R504
VOL
LVDD
RVDD
R220
1
2
10KR3F-L-GP
AMP_SD# 31
G1432_VOL
9
10
21
22
C774
1
2SOUND_L2
SC1U16V3ZY-GP
2
0R2J-2-GP
1
2
2
SC22U10V6MX-1GP
1
R497
MLVG0402220NV09BP-GP
MLVG0402220NV09BP-GP
G
U37
AUD_LOL
2
3
4
Q25
2N7002-11-GP
TPAD30 TP170
34
G1412_SHDN#
C761
MLVG0402220NV09BP-GP
MLVG0402220NV09BP-GP
2
AMP_SHUTDOWN
SCD1U16V2KX-3GP
C772
2
C780
1
1
1
MLVG0402220NV09BP-GP
4
SCD1U16V2KX-3GP
2
0R0805-PAD
C760
1
SPKR_L+
SPKR_RSPKR_R+
TPAD30 TP312
TPAD30 TP311
TPAD30 TP313
2
SPKR_L-
MLVG0402220NV09BP-GP
SC4D7U25V5KX-GP
1
1 R494
5
1
Speaker
R500
10KR2J-3-GP
5VA_OP_S0
2
5V_S0
3
Q11
2N7002-11-GP
R527 2
1
1KR2F-3-GP
1
2
1KR2F-3-GP
R512
C783
INL
INR
NC#9
2
SHDN#
5
G1412_SHDN#
C802
G5930_C1N 1
2
G5930_C1P
SC4D7U16V5ZY-GP
1
PGND
1
2
Place Top side and
close to connector
6
5
4
7
OUT
C1+
C1NC#7
G1412_SHDN#
LOUR_JD#
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
SC
C800
G5930RB1U-GP
SCD1U16V2KX-3GP
G1412RC1U-GP
EN
OUT
GND
NC#3
1
2
3
G5240B1T1U-GP
Q26
2N7002-11-GP
1
2
3
IN
SHDN#
GND
G5240_EN 4
IN
G
2
MICIN_JD
SPDIF_CN
HALL_SW#
LINEIN_JD
LOUR_JD#
TP190
TP189
TP191
TP192
TP193
S
7
6
3VA_S0_AU
U81
5
U39
1
HP_L
HP_R
OUTL
OUTR
C794
SC2D2U10V3KX-1GP
LINE_OUT_L
LINE_OUT_R
2
2
C409
PVDD
NVDD
2
4
2 SPDIF_PWR
0R2J-2-GP
R518
10KR2J-3-GP
D
1
1
1
8
3
9
C408
2
1
2
U38
SCD1U16V2KX-3GP
DY
1
R519
C797
SC100P50V2JN-3GP
3VA_S0_AU
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
2
1 R221
2
0R0603-PAD
C789
3D3V_S0
LINE_IN_CN_R
SC100P50V2JN-3GP
SC100P50V2JN-3GP
G1412_VSS
3D3V_S0
LINE_IN_CN_L
1
LINE_IN_R
1
LINE_IN_L
34
2
34
2
G
KBC_MUTE#
S
31
3D3V_AUX_S5
AUDIO1
R524
1
2
10KR3F-L-GP
SC
A
B
C791
C796
SC100P50V2JN-3GP
LINE_OUT_R
2
SC47P50V2JN-3GP
LINE_OUT_CN_R
2
SC100P50V2JN-3GP
HP_R
1
470R3D-GP
C801
C
MIC_IN_R_R
MIC_IN_L_L
0R0402-PAD
2
LID_CLOSE# 31,33
TP196PAD30
T
LINEIN_JD 34
TP198PAD30
T
TP202PAD30
T
TP201PAD30
T
LOUR_JD# 34
LINE_OUT_CN_R
TP204PAD30
T
SPD-CONN16A-2-GP
C795
SC
20.F1095.016
Place Top side and
close to connector
& lt; Core Design & gt;
1
Wistron Corporation
C790
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SC100P50V2JN-3GP
1
2
10KR3F-L-GP
C799
1
R520 2
1
1KR2F-3-GP
1
2
1KR2F-3-GP
R525
R529
SC100P50V2JN-3GP
HP_OUT_C_R 1
2
10KR3F-L-GP
SC4D7U6D3V3KX-GP
2
MIC_IN_L
1
R530
MIC_IN_R
2
HP_OUT_R
R528
1
34
C798
1
2
1
34
34
LINE_OUT_CN_L
2
R510
HALL_SW#
1
LINE_IN_CN_R
1
1
R523
1
470R3D-GP
2
R522
HP_OUT_C_L 1
2
10KR3F-L-GP
SC4D7U6D3V3KX-GP
2
4
6
8
10
12
14
16
1
2
2
C792
1
R526
2K2R2J-2-GP
2
HP_OUT_L
R521
2K2R2J-2-GP
LINE_OUT_L
2
SC47P50V2JN-3GP
1
34
C793
1
SPDIF_PWR
SC4D7U6D3V3KX-GP
HP_L
34
MIC1VREFO_L
MIC_IN_R_R
MIC_IN_L_L
LINE_OUT_CN_L
1
MIC1VREFO_R
LINE Out
2
SC
34
1
3
5
7
9
11
13
15
LINE_IN_CN_L
2
MIC In
TPAD30 TP195
TPAD30 TP194
MICIN_JD
TPAD30 TP197
TPAD30 TP200
TPAD30 TP199
SPDIF_CN
TPAD30 TP203
Title
AUDIO AMP/SPEAKER
Size
A3
Document Number
Rev
ME3-Discrete
Date: Monday, September 17, 2007
D
Sheet
E
36
of
51
5V_AUX_S5 TO 3D3V_AUX_S5
Aux Power
3D3V_AUX_S5
5V_AUX_S5
3D3V_AUX_S5
U68
G105
3D3V_AUX_S5_G909
5
VOUT
4
NC#4
G909-330T1U-GP
SB
2
C683
SC1U16V3ZY-GP
2
74.00909.03F
Run Power
Q22
TP0610T-T1-E3-GP
RUN_PWR_CTLR
1
R482
1KR2J-1-GP
D
D
D
D
8
7
6
5
1D8V_S0
PM_SLP_S3#_Z12V
E
1
1
2
U76
2N7002DW-1-GP
1D8V_S3
1
2
3
4
3D3V_S0
U16
S
S
S
G
D
D
D
D
8
7
6
5
AO4422-1-GP
R496
100R5J-3-GP
EC35
SC
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
6
1
EC34
2
C
5
R2
PDTC124EU-1-GP
3
R1
U29
S
S
S
G
AO4422-1-GP
PM_SLP_S3#_Z12V
4
B
2
Q21
8
7
6
5
3D3V_S5
1
2
3
4
2
1
2
330KR2J-L1-GP
1
G
G
1
R484
D
D
D
D
AO4422-1-GP
D24
RLZ12B-1-GP 3D3V_S0
DY
DY
R105
330KR2J-L1-GP
2
2
SCD22U25V3KX-GP
1
C730
2
D
3
1
S
2
47KR2J-2-GP
PM_SLP_S3#
1
2
3
4
0503 MV
Z_12V
2
U32
S
S
S
G
1
R487
1
20,22,23,31,41,42,44,47
5V_S5
5V_S0
0503 MV
DCBATOUT
2
2
C681
SC1U16V3ZY-GP
1
GAP-CLOSE-PWR
1
VIN
GND
SHDN#
1
1
2
3
& lt; Core Design & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PWRPLANE & RESETLOGIC
Size
A3
Document Number
Rev
ME3-Discrete
Date: Wednesday, September 19, 2007
Sheet
37
of
51
5
4
DCBATOUT_6262
DCBATOUT
G34
2
1
G41
2
GAP-CLOSE-PWR
G21
1
2
GAP-CLOSE-PWR
G20
1
2
GAP-CLOSE-PWR
2
VDD
6262_AGND
34
32
33
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON
6262_DPRSLP
6262_DPRSTP#
6262_CLKEN#
VDIFF
6262_FB2
12
FB2
11
FB
PHASE2
LGATE2
PGND2
ISEN2
2
SC1KP50V2KX-1GP
ISL6262ACRZ-T-GP-U
18
2
VO
DFB
VW
17
9
6262_VO
39
6262_ISENP2
39
6262_ISENN2
1
1 R82
39
2 3K65R3F-GP
2
R272
R83
2
10KR3J-L1-GP
10KR3J-L1-GP
2
C453
SCD22U16V3KX-1-GP
R71
1
1R3F-GP
1
2
R263
2K61R3F-GP
6262_ISEN1
R271
11KR2F-L-GP
1
R75
2
DY
B
10KR3J-L1-GP
R317
NTC-10K-9-GP
1
R90
1KR3F-GP
C195
SCD22U10V2KX-1GP
SB
2
C169
6262_AGND
C450
1
6262_DFB
6262_DROOP
2
1
6262_AGND
1
C180
6262_RTN
C173
SCD01U25V2KX-3GP
6262_VSEN
2
2
1
1 R59
0R0603-PAD
2
SCD01U25V2KX-3GP
VCC_SENSE
1 R67
0R0603-PAD
SCD01U25V2KX-3GP
5
VSS_SENSE
2
5
C451
6262_VSUM_2
C160 1
6262_VW
DROOP
2
6K81R2F-1-GP
16
1
1
6262_VSUM
SCD033U25V3KX-GP
SCD033U25V3KX-GP
R60
DY
1 2
VSUM
19
6262_ISENN1
1R3F-GP
2
6262_VSUM
R65
1
2
12K7R3F-GP
6262_OCSET
39
2
COMP
25
8
6262_ISENP1
1
1
NC#25
OCSET8
10
R268
1
6262_ISEN2
2
6262_FB
2
SC470P50V2KX
6262_COMP
2
R96
10KR3J-L1-GP
C199
SCD22U16V3KX-1-GP
6262_ISEN2
6262_PHASE2 39
6262_LGATE2 39
SCD22U10V3KX-2GP
C149
SC180P50V2JN-1GP
R117 2 6262_BOOT2_1
0R3-0-U-GP
C225
SCD22U16V3ZY-GP
28
30
29
23
1
6262_COMP_1
1
C148
2
1
2
1 R70
2
1KR2F-3-GP
6262_UGATE2 39
6262_BOOT2
1
13
26
2
2
DPRSLPVR
DPRSTP#
CLK_EN#
6262_VDIFF
2
SC1KP50V2KX-1GP
C167 1
45
46
47
27
BOOT2
2
SC4D7U10V5ZY-3GP
1
499R2F-2-GP
0R0402-PAD
0R0402-PAD
1KR2F-3-GP
PVCC
3K65R3F-GP
1
1
6262_ISEN1
5V_S0
1
C471
C
R275
6262_VSUM
31
UGATE2
6262_LGATE1 39
1
ISEN1
24
37
38
39
40
41
42
43
44
6262_PHASE1 39
2
PGND1
2 6262_BOOT1_1
0R3-0-U-GP
C226 SCD22U16V3ZY-GP
1
R119
1
LGATE1
VSEN
B
PHASE1
6262_UGATE1 39
6262_BOOT1
2
2
2
2
2
6262_FB2_1
1
1
1
1
1 R58
2
97K6R2F-GP
1
PSI#
PMON
RBIAS
VR_TT#
NTC
SOFT
1
1 R63
2
255R2F-L-GP
7,20 DPRSLPVR
5,7,19 H_DPRSTP#
20 CLK_EN#
2
3
4
5
6
7
1
R57
6262_AGND
R84
R76
R74
R64
36
RTN
40,41,42,44 CPUCORE_ON
35
BOOT1
14
6262_AGND
5 CPU_VID[0..6]
4K02R3F-GP
6262_NTC_1
2
2
SCD01U16V2KX-3GP
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
UGATE1
GND_T
15
R61
1
C156 1
PSI#
GND
49
2 0R0402-PAD 6262_PSI#
6262_PMON
6262_RBIAS
2
R62
147KR2F-GP
6262_NTC
1
2
6262_SOFT
R318
NTC-470K-1-GP 6262_AGND
1
2
C157
SCD015U25V3KX-GP
6262_VID0
R107 1
2 0R0402-PAD
6262_VID1
R106 1
2 0R0402-PAD
6262_VID2
R104 1
2 0R0402-PAD
6262_VID3
R101 1
2 0R0402-PAD
R95 1
0R0402-PAD
6262_VID4
2
6262_VID5
R94 1
2 0R0402-PAD
6262_VID6
R91 1
2 0R0402-PAD
CPUCORE_ON
R89 1
2 0R0402-PAD 6262_CORE_ON
5
4 CPU_PROCHOT#
C
VGATE_PWRGD 7,20
2
21
6262_AGND
0R0402-PAD
2
1
U13
2
C200
SC1U10V3ZY-6GP
DY
3V3
1
DY
C132
SC1U25V5KX-1GP
R72
1
6262_PWRGOOD
PGOOD
2
1
4K99R3F-GP
R68
1K91R3F-GP
6262_VIN
2 6262_PMON
R276
10R3J-3-GP
C452
6262_5VS0_VCC
R66
6262_PMON_1 1
1
1
1
SCD1U25V3ZY-1GP
R100
10R3J-3-GP
2
D
3D3V_S0
2
GAP-CLOSE-PWR
DCBATOUT_6262
5V_S0
48
GAP-CLOSE-PWR
G24
1
2
D
1
GAP-CLOSE-PWR
G23
1
2
SB
2
1
GAP-CLOSE-PWR
G40
1
2
22
2
GAP-CLOSE-PWR
G36
1
2
20
6262_AGND
1
3
DCBATOUT_6262
VIN
DCBATOUT
6262_AGND
R86
1
2
2K94R3F-GP
1
C185
2
SC180P-GP
6262_VO
A
A
& lt; Variant Name & gt;
G76
1
2
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
GAP-CLOSE-PWR
6262_AGND
Title
CPU CORE(1/2) ISL6262
Size
A3
Date:
5
4
3
2
Document Number
Rev
Sunday, September 09, 2007
ME3-Discrete
Sheet
1
38
SC
of
51
A
1
2
1
2
1
2
C235
SC10U25V6KX-1GP
5
6
7
8
C579
SC10U25V6KX-1GP
D
D
D
D
D
D
U60
AOL1426-GP
C580
SC10U25V6KX-1GP
2
1
DCBATOUT_6262
C229
SCD1U25V3KX-GP
4
3
2
1
S
S
S
S
S
G
Iomax=44A
OCP & gt; =54A
VCC_CORE_S0
L28
38 6262_UGATE1
1
38 6262_PHASE1
38 6262_LGATE1
2
1
2
1
2
1
2
TC7
C270
SCD1U25V3ZY-1GP
DY
4
3
2
1
S
S
S
S
G
S
S
S
S
S
G
4
3
2
1
DY
ST330U2D5VDM-17GP
DY
TC10
ST330U2D5VDM-17GP
2
1
G26
GAP-CLOSE-PWR
TC6
ST330U2D5VDM-17GP
2
2
G30
GAP-CLOSE-PWR
1
U19
AOL1412-GP
D
D
D
D
D
D
D
D
D
D
D
U59
AOL1412-GP
5
6
7
8
5
6
7
8
1
IND-D36UH-9-GP
6262_ISENN1
38
6262_ISENP1
38
nec
330uF / 2D5V / V size
ESR=6mohm / Iripple=3.7A
DCBATOUT_6262
1
C584
SCD1U25V3KX-GP
2
1
2
2
C485
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
5
6
7
8
C285
SC10U25V6KX-1GP
S
S
S
G
4
3
2
1
C236
SC10U25V6KX-1GP
D
D
D
D
U51
AOL1426-GP
1
1
1
1
L27
38 6262_UGATE2
1
38 6262_PHASE2
38 6262_LGATE2
2
S
S
S
S
S
G
S
S
S
G
ST330U2D5VDM-17GP
1
TC9
4
3
2
1
2
TC8
ST330U2D5VDM-17GP
1
G31
GAP-CLOSE-PWR
DY
4
3
2
1
2
2
2
G25
GAP-CLOSE-PWR
1
U17
AOL1412-GP
D
D
D
D
D
D
D
D
D
D
U52
AOL1412-GP
5
6
7
8
5
6
7
8
1
IND-D36UH-9-GP
When test without cpu,
R581 & R582 change to 0 ohms
38
6262_ISENP2
38
6262_ISENN2
If VCC_SENSE and VSS_SENSE pins have pulled
resistors to VCC_CORE_S0
== & gt; Remove R581/R582
& lt; Variant Name & gt;
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Title
CPU CORE(2/2) ISL6262
Size
A3
Date:
A
Document Number
Rev
Wednesday, August 15, 2007
ME3-Discrete
Sheet
39
SC
of
51
5
4
DCBATOUT
1
GAP-CLOSE-PWR
G64
1
2
PM6680_LX1
2
SCD1U16V3KX-3GP
D22
2
PM6680_BST1
1 R184
PM6680_BST2
3
2
D
5V_AUX_S5
10R3F-GP
C365
PM6680_LDO5
1
PM6680_LX2
2
COMP2
2
PM6680_FB
FB2
1
PM6680_FB1
7
PM6680_FB2
28
FB1
PGOOD1
SKIP
27
PGOOD2
PGND
SGND1
SGND2
GND
1
2
1
R192
R197
1
2
1
GAP-CLOSE-PWR
1
Vout=Vr*(1+Rh/Rl), Vr=0.9V
2
FSEL:
GND= & gt; 200KHz(CH1), 300KHz(CH2)
VREF= & gt; 300KHz(CH1), 400KHz(CH2)
Comp parts:
Vripple & gt; 30mV, = & gt; Dummy R,C
Vripple=10mV~30mV, = & gt; Mount R,C
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
2
A
& lt; Core Design & gt;
DY
PM6680_5V_3D3V
Document Number
Rev
ME3-Discrete
Date: Sunday, September 09, 2007
4
B
GAP-CLOSE-PWR
G55
1
2
C695
SC100P50V2JN-3GP
Size
Custom
5
GAP-CLOSE-PWR
G54
1
2
10KR3F-L-GP
R187
3
VREF
32
PM6680_REF
R451
100KR2J-1-GP
2
DY
C698
SCD1U10V2KX-5GP
R452
R194
100KR2J-1-GP
PM6680_LDO5
2
0R0402-PAD
2
1
0R0402-PAD
22 PWR_S5_EN
A
C693
SC2200P50V2KX-2GP
R446
0R0402-PAD
1
22 PWR_S5_EN
1
R447
DY 1 PM6680_REF
0R2J-2-GP
1
C372
SC10P50V2JN-4GP
PM6680_EN2
2
2
1
1
PM6680_EN1
2
R188
150KR2F-L-GP
2
GAP-CLOSE-PWR
G53
1
2
14
1
16
33
2
2
25
U31
4
R190
560KR2F-GP
EN1
NC
EN2
SHDN
1
1
5
DCBATOUT_6680
24
0R0402-PAD
GAP-CLOSE-PWR
G52
1
2
FSEL
26
2
PGOOD5
PM6680-GP
38,41,42,44 CPUCORE_ON
20070704
1
C382
SC100P50V2JN-3GP
ST220U6D3VDM-LGP
5V_PWR
GAP-CLOSE-PWR
G50
1
2
R186
26K7R3F-GP
R439
432R2F-GP
2
GAP-CLOSE-PWR
G46
1
2
GAP-CLOSE-PWR
G48
1
2
2
17
TC14
1
V5SW
2 0R0402-PAD
1
3D3V_PWR
COMP1
R438
1 2
8
1
2
OUT2
2
DUMMY-C3
Rdson=17.4~22mohm
1
2
3
4
OUT1
30
PM6680_COMP1
R450
100KR2J-1-GP
R449
2
29
6
1
1
1
1K74R3F-GP
PM6680_SHDN
2
12
CSENSE2
C690
2
CSENSE1
1
1
S
S
S
G
2
20
2
1
U70
AO4468-GP
R185
3D3V_PWR
2
IND-3D3UH-57GP
R440
DUMMY-R3
2
SB
PGOOD3
PM6680_LDO5
PM6680_DL2
13
LGATE2
C381
SC2200P50V2KX-2GP
2
2
LGATE1
R191
5V_PWR
1 2
1
15
1K6R3D-2-GP
GAP-CLOSE-PWR
0R0402-PAD
1
Rdson=17.4~22mohm
R199
432R2F-GP
GAP-CLOSE-PWR
G63
1
2
PM6680_LX2
11
PHASE2
5
6
7
8
2
SB
1
0R0402-PAD
1
1
DUMMY-C3
2
R441
12KR3F-GP
GAP-CLOSE-PWR
G62
1
2
PM6680_DL1
U71
AO4468-GP
2
2
2
ST220U6D3VDM-LGP
1
R442
R198
54K9R3F-GP
PHASE1
S
S
S
S
G
GAP-CLOSE-PWR
G60
1
2
C385
1
21
G45
4
3
2
1
8
7
6
5
TC15
D
D
D
D
1
PM6680_LX1
R200
DUMMY-R3
GAP-CLOSE-PWR
G59
1
2
GAP-CLOSE-PWR
G61
1
2
1
2
IND-4D7UH-88-GP
C
3D3V_S5
L37
D
D
D
D
D
GAP-CLOSE-PWR
G58
1
2
2
Iomax=5A
OCP & gt; 10A
1
5V_PWR
2
GAP-CLOSE-PWR
G57
1
2
1
PM6680_DH2
L38
G56
C685
SCD1U50V3ZY-GP
10
HGATE2
PM6680_BST2
SC10U25V6KX-1GP
9
BOOT2
2
1
AO4468-GP
VIN
HGATE1
2
1
5
6
7
8
U69
C367
4
3
2
1
22
2
1
2
BOOT1
C692
SCD1U50V3KX-GP
19
31
VCC
18
23
PM6680_DH1
1
2
3
4
PM6680_BST1
C
5V_S5
C369
SC4D7U25V5KX-GP
C366
SC10U25V6KX-1GP
2
8
7
6
5
D
D
D
D
U72
AO4468-GP
S
S
S
G
1
2
SC10U25V6KX-1GP
1
2
SC10U25V6KX-1GP
2
C383
DCBATOUT_6680
C699
SCD1U25V3KX-GP
S
S
S
S
G
Iomax=5A
OCP & gt; 10A
C384
DCBATOUT_6680
D
D
D
D
D
SCD1U50V3ZY-GP
1
DCBATOUT_6680
C709
R448
47R2F-GP
C691
1
C689
SCD1U16V3KX-3GP
SC4D7U10V5ZY-3GP
GAP-CLOSE-PWR
2
2
1
1
2
GAP-CLOSE-PWR
G47
1
2
LDO5
BAW56-7-F-GP
SC1U10V3KX-3GP
PM6680_LDO5
1 R195
2
10R3F-GP
1
GAP-CLOSE-PWR
G51
1
2
GAP-CLOSE-PWR
G49
1
2
B
1
C378
2
1
1
1
2
DCBATOUT_6680
G65
D
3
3
2
Sheet
1
40
of
51
A
B
C
D
E
1D8V_PWR
1D8V_S3
DCBATOUT_51124
DCBATOUT
DCBATOUT_51124
G37
1
2
5V_S5
1
2
2
51124_DRVL1
PGOOD1
PGOOD2
2
51124_V5FILT
DCBATOUT_51124
1
1
2
2
2
DY
DYC591
R423
29K4R2F-GP
51124_LL2
1 R408
0R0603-PAD
2
51124_LL2_1
1
2 C668
51124_VBST2
51124_DRVL2
51124_VFB2
TC11
SE220U2D5VDM-6GP
GAP-CLOSE-PWR
G93
1
2
Sanyo
220uF/ 2D5V
ESR=15mohm
GAP-CLOSE-PWR
1
SCD1U50V3ZY-GP
2
4
3
2
1
S
S
S
S
G
C684
SC33P50V3JN-GP
GAP-CLOSE-PWR
G92
1
2
1
1
5
6
7
8
COIL-1UH-34-GP
2
51124_VBST1
2
GAP-CLOSE-PWR
G91
1
2
2
1
C663
2
Id=9.6A
Qg=18~nC,
Rdson=13.5~16.5mohm
GAP-CLOSE-PWR
G90
1
2
1D05V_PWR
Voutsetting=1.055V
U61
AO4406-1-GP
2
GAP-CLOSE-PWR
G89
1
2
1D05V Iomax=8A
OCP & gt; 11A
Cyntec 7*7*3
DCR=9mohm,Irating=11A
Isat=22A
1
51124_DRVL1
1
1
51124_LL2
SCD1U50V3ZY-GP
1D05V_S0
GAP-CLOSE-PWR
G88
1
2
C635
SCD1U25V3ZY-1GP
2
1
SC10U25V6KX-1GP
1
51124_DRVH2
2
51124_LL1_1
SC10U25V6KX-1GP
5
6
7
8
51124_DRVL2
2
2
C346
SCD1U50V3ZY-GP
1 R399
0R0603-PAD
C339
U62
AO4468-GP
Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm
D
D
D
D
D
51124_LL1
1D05V_PWR
G87
L34
R396
15KR3F-GP
GAP-CLOSE-PWR
1
DY
1
R395
9K53R3F-2-GP
2
4
3
2
1
17
14
51124_TRIP1
51124_TRIP2
18
13
25
3
DY
R42410KR2J-3-GP
0R2J-2-GP
2
1
SB
PGND1
PGND2
GND
GND
51124_DRVH1
51124_DRVH2
1
S
S
S
S
G
TPS51124RGER-GPU1
2
1
6
LL1
LL2
21
10
51124_TONSEL
2
20
11
TRIP1
TRIP2
51124_LL1
51124_LL2
3
R425
4
DRVH1
DRVH2
EN1
EN2
GAP-CLOSE-PWR
G84
1
2
GAP-CLOSE-PWR
G86
1
2
D
D
D
D
D
23
8
GAP-CLOSE-PWR
G83
1
2
GAP-CLOSE-PWR
G85
1
2
Vout=0.758V*(R1+R2)/R2
TONSEL
DRVL1
DRVL2
51124_EN1_1
51124_EN2_1
2 0R0402-PAD
2 0R0402-PAD
V5FILT
V5IN
VBST1
VBST2
R409 1
R413 1
38,40,42,44
SANYO
330uF, 2.5V
ESR=9mohm, V size
GAP-CLOSE
19
12
20,23,31,42 PM_SLP_S4#
20,22,23,31,37,42,44,47 PM_SLP_S3#
15
16
22
9
51124_V5FILT
VO1
VO2
VFB1
VFB2
U66
2
5
1
2
C662
SC1U16V3ZY-GP
CPUCORE_ON
TC21
ST330U2D5VDM-9GP
GAP-CLOSE
G103
1
2
24
7
1D05V_PWR
1D8V_PWR
51124_VFB2
51124_VFB1
2
2
51124_PGD1
51124_PGD2
1
R398
3D3R3J-L-GP
1
C654
SC4D7U10V5ZY-3GP
C589
DY
R422
47KR3F-GP
P/H CPU CORE PAGE
G102
1
2
GAP-CLOSE-PWR
G82
1
2
1
1
5
6
7
8
4
3
2
1
51124_VFB1
1
1
1
2
S
S
S
G
2
R426
10KR2J-3-GP
DY
SCD1U50V3ZY-GP
R418
10KR2J-3-GP
C673
R421
64K9R2F-1-GP
SC33P50V3JN-GP
DY
GAP-CLOSE-PWR
G81
1
2
2
D
D
D
D
DY
U64
Id=13.2A
AO4706-GP
Qg=27nC,
Rdson=6.8~8.2mohm
GAP-CLOSE-PWR
G80
1
2
1D8V_PWR
COIL-1UH-34-GP
4
GAP-CLOSE-PWR
G79
1
2
Voutsetting=1.8V
1
3D3V_S5
1D8V Iomax=10A
OCP & gt; 15A
1
51124_LL1
3D3V_S5
GAP-CLOSE-PWR
3
1
L35
GAP-CLOSE-PWR
G101
1
2
GAP-CLOSE-PWR
G39
1
2
Cyntec 10*10*4
DCR=3mohm, Irating=15A
Isat=40A
51124_DRVH1
GAP-CLOSE-PWR
G100
1
2
C649
SCD1U25V3ZY-1GP
2
GAP-CLOSE-PWR
G99
1
2
AO4468-GP
4
3
2
1
Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm
S
S
S
G
GAP-CLOSE-PWR
G98
1
2
GAP-CLOSE-PWR
G38
1
2
2
4
2
D
D
D
D
U63
C354
SC10U25V6KX-1GP
5
6
7
8
C352
SC10U25V6KX-1GP
GAP-CLOSE-PWR
G97
1
2
2
1
2
2
1
1
G96
R429
75KR3F-GP
2
Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
GND
TONSEL
OPEN
V5FILT
240k/CH1
300k/CH2
300k/CH1
360k/CH2
360k/CH1
420k/CH2
1
ICS
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPS51124_1D8V_1D05V
Size
A3
Document Number
Date: Wednesday, September 12, 2007
A
B
C
D
Rev
ME3-Discrete
Sheet
E
SA
41
of
51
B
C
D
1
2
C295
SC10U10V5ZY-1GP
1D5V_S0
Iomax=3A
4
C294
SC10U10V5ZY-1GP
2
C340
SC1U10V3ZY-6GP
2
E
1D8V_S3
1
5V_S5
1
A
DY
G42
1
Vo(cal.)=1.512V
5
9
3
4
2
2
2
1
1
SO-8-P
2
R174
30KR3F-GP
SC33P50V2JN-3GP
APL5912-KAC-GP
74.05912.A71
1
GAP-CLOSE-PWR
C358
C355
2
R175
C353
26K7R3F-GP
5912_FB_1D5V
1D5V_S0
SC10U10V5ZY-1GP
FB
OCP=6A
GAP-CLOSE-PWR
G44
1
2
1D5V_LDO
1
VOUT
VOUT
EN
VIN
VIN
SC10U10V5ZY-1GP
8
2
0R0402-PAD
R166
POK
1
7
2
0R2J-2-GP
2
GAP-CLOSE-PWR
G43
1
2
1
1
1
GND
PM_SLP_S3#
DY
2
VCNTL
R167
38,40,41,44 CPUCORE_ON
6
U27
4
Vo=0.8*(1+(R1/R2))
3
1
C308
SC1U10V3ZY-6GP
1
2
2
1D8V_S3
1
5V_S5
C351
SC10U10V5ZY-1GP
2
3
C348
SC10U10V5ZY-1GP
DY
3
4
DDR_VREF_S0
1
1
1
20,23,31,41 PM_SLP_S4#
R312
R313
2
0R0402-PAD
2
0R0402-PAD
2
1
2
Vo=0.8*(1+(R1/R2))
Wistron Corporation
1
1
C560
SC10U10V5ZY-1GP
2
74.51100.079
SC10U10V5ZY-1GP
1
& lt; Core Design & gt;
TPS51100DGQR-GP
11
1
DY
C293
GAP-CLOSE-PWR
2
SCD1U16V2ZY-2GP
C536
2
C546
1
DDR_VREF_S3
2
1
1
PM_SLP_S3#
C298
GAP-CLOSE-PWR
G29
1
2
1
2
3
4
5
GND
20,22,23,31,37,41,44,47
VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS
2
GAP-CLOSE-PWR
G28
1
2
U58
10
9
8
7
6
R142
68KR3F-GP
G27
2
2
C556
SC1U10V3ZY-6GP
C564
SC10U10V5ZY-1GP
GAP-CLOSE-PWR
C286
2
SO-8-P
1
APL5913-KAC-1-GP
1
0D9V_PWR
2
1D8V_S3
5913_FB_1D25V
R134
39KR3F-GP
1D25V_S0
SC10U10V5ZY-1GP
FB
2
1
5V_S5
GND
0D9V
Iomax=1A
2
OCP=3.8A
GAP-CLOSE-PWR
G35
1
2
1D25V_LDO
SC10U10V5ZY-1GP
VOUT
VOUT
EN
5
9
1
0R2J-2-GP
8
2
0R0402-PAD
VIN
VIN
2
R151
POK
1
1
7
1
PM_SLP_S3#
1
Vo(cal.)=1.2588V
SC56P50V2JN-2GP
DY
2
38,40,41,44 CPUCORE_ON
2
GAP-CLOSE-PWR
G33
1
2
6
U20
R152
VCNTL
2
1D25V_S0
Iomax=2A
G32
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C561
SC10U10V5ZY-1GP
Title
0D9V_LDO/1D25V_LDO/1D5V
Size
A3
Document Number
Date: Thursday, August 23, 2007
A
B
C
D
Rev
ME3-Discrete
Sheet
E
42
of
51
A
B
C
D
E
DCBATOUT
AD+
P2003EVG-GP
D
D
D
D
1
8
7
6
5
R13
100KR2F-L1-GP
P2003EVG-GP
R5
S
S
S
G
AD+_TO_SYS
1
2
3
4
1
2
1
2
3
4
D01R2512F-4-GP
MAX1909_PDL
S
S
S
G
D
D
D
D
BT+
U48
1
U3
8
7
6
5
DY
C47
SCD1U25V3ZY-1GP
G2
2
2
2
2
G1
1
4
GAP-CLOSE-PWR
GAP-CLOSE-PWR
MAX1909_DHI
19
1
2
1
5
6
7
8
2
1
G14
GAP-CLOSE-PWR
1
1
2
2
1
D
D
D
D
G13
GAP-CLOSE-PWR
3
EC31
PKPRES
C110
2
5
2
13
12
14
MAX8725_CSIP
MAX8725_CSIN
DY
BT+SENSE 50
4
MAX8725ETI-GP-U
1
2
MAX1909_CLS
R293
470KR2F-GP
2
1
2
C500
SC1U10V3ZY-6GP
1
3D3V_AUX_S5
R286
49K9R2F-L-GP
1
1
2
1
C543
C523
SCD01U16V2KX-3GP
2
1
2
1
2
R304
10KR2F-2-GP
MAX1909_REF
SCD1U25V3ZY-1GP
2
C541
CCV
CCI
CCS
C109
SC10U25V0KX-3GP
REF
R307
10KR2J-3-GP
GAP-CLOSE-PWR
C522
SCD01U16V2KX-3GP
2
1
AD_IA
2
SCD1U25V3ZY-1GP
31
MAX1909_CCV
MAX1909_CCI
MAX1909_CCS
1
G77
1
1
2
U50
SI4800BDY-T1
ACOK
R289
49K9R2F-L-GP
BT_TH
1
IND-10UH-139-GP
4
3
2
1
6
R54
2 CHG_PWR-3
1
G
S
S
S
1
CLS
AC_OK
CHG_PWR-2
2
17
16
15
C206
SC10U25V0KX-3GP
18
CSIN
BATT
GND
1
29
IINP
MAX1909_IINP
R297
1
2
31K6R2F-GP
BT+
D015R2512F-5-GP
L25
C484
SC1U10V3ZY-6GP
ACIN
8
MAX1909_DLOV
1
PGND
2
MAX1909_DLO
CSIP
3
MAX1909_CLS 9
MAX1909_LDO
2
2
3
R296
49K9R2F-L-GP
DY
DY
VCTL
ICTL
MODE
SC10U25V0KX-3GP
20
PGND
MAX1909_ACIN
1
R306
0R2J-2-GP
11
10
7
SCD1U25V3ZY-1GP
2
23
DLO
MAX1909_VCTL
MAX1909_ICTL
MAX1909_MODE
C111
SC10U25V0KX-3GP
2
1
21
5
6
7
8
DLOV
PDS
SRC
DCIN
2
DHIV
PDL
LDO
C222
SC10U25V0KX-3GP
1
2
1
2
U49
SI4431BDY-E3-GP
C477
SCD1U25V3ZY-1GP
R280
33R2J-2-GP
22
28
2
DHI
2
4
3
2
1
SC1U10V3ZY-6GP
1
1
2
25
26
CSSP
1
2
SCD1U25V3ZY-1GP
1
1
2
MAX1909_PDS
27
AD+_TO_SYS 24
MAX1909_DC_IN
1
2
D
D
D
D
R302
100KR2F-L1-GP
DY
U53
C496
1
S
S
S
G
R310
0R2J-2-GP
C492
MAX1909_DHIV
MAX1909_LDO
C489
SCD1U25V3ZY-1GP
K
RB521S-30-2-GP
MAX1909_LDO
CSSN
A
DCBATOUT
AD+_TO_SYS
SCD1U25V3ZY-1GP
2
D28
AD+
C487
1
C486
C488
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
2
1
2
1
R10
13K7R2F-GP
1
4
R301
64K9R2F-1-GP
31,50
BT_TH
2
2
2
G78
1
2
GAP-CLOSE-PWR
3D3V_AUX_S5
1
MAX1909_REF
1
1
R299
100KR2J-1-GP
2
R282
39KR2F-GP
31
D
1
G
AC_OK
D
3
2
1
2
2
2
Q17
2N7002-11-GP
R285
43K2R2F-L-GP
S
R287
2K26R2F-1-GP
DY
CHG_ON#
1
R309
2K26R2F-1-GP
31
AC_IN#
MAX1909_ICTL
1
DY
2
2
R283
100KR2J-1-GP
U55
Q16
2N7002-11-GP
2N7002DW-1-GP
1
CHG_I_SEL
1
G
DY
& lt; Variant Name & gt;
4
5
6
S
31
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
31 CHG_I_PRE_SEL
Title
CHARGER MAX8725ETI
Size
C
Date:
A
B
C
D
Document Number
Rev
ME3-Discrete
Wednesday, September 19, 2007
Sheet
E
43
of
51
A
B
DCBATOUT_SC411
C
D
E
DCBATOUT
DCBATOUT_SC411
2
7
SC411MLTRT-GP
3
1
1
2
12KR3F-GP
Vout Setting:
0.5V/Rlow=(Vout-0.5V)/Rhigh
1
1
1
DY
2
GAP-CLOSE-PWR
C428
DY
1
SCD1U50V3ZY-GP
2
2
2
R43
41K2R2F-GP
R42
ST330U2D5VDM-13GP
GND
VSSA
DL
17
PGND
FB
6
3
TC2
G8
0105 SC
SC411_DL
13KR2F-GP
SC411_VFB
SC411_VFB
SC411_DL
2
TC1
1
8
SC411_LX
R249
15K4R3-GP
2
SC411_LX_L 1
G7
2
GAP-CLOSE-PWR
VGA_CORE_PWR
DY
Q4
1
R251
G
1
2
10KR2F-2-GP
GPIO_PWRCNTL
46
G11
1
S
1
1
R254
200KR2F-L-GP
DY
C431
G12
1
2
DY
2
GAP-CLOSE-PWR
2
SCD01U16V2KX-3GP
3
2
GAP-CLOSE-PWR
2N7002-11-GP
DY
Low(0V)= & gt; Vo=1.01V
High(3.3V)= & gt; Vo=1.11V
VGA_CORE_S0
G10
D
ILIM
VGA_CORE_PWR
1 VOUT
2
SC100P50V2JN-3GP
AO4430-1-GP
2
1
1
SC411_LX
10
2
C86
R44
1
GAP-CLOSE-PWR
IND-1D5UH-34-GP
ST330U2D5VDM-13GP
U11
C78
SC1U10V3ZY-6GP
2
11
TON
G6
1
LX
16
2
GAP-CLOSE-PWR
VGA_CORE_PWR
2
DH
NC#5
NC#14
SC411_DH
VGA_CORE_PWR
2
1
2
9
12
SC10U25V6KX-1GP
4
3
2
1
2
1
2
1MR2F-GP
SC1KP50V2KX-1GP
SC411_TON
VDDP
4
G5
Vosetting=1.1
1
S
S
S
G
2
C121
EN/PSV
2
1
D
D
D
D
DCBATOUT_SC411
R53
1
15
G4
1
GAP-CLOSE-PWR
L22
SC411_LX
5
6
7
8
SC411_PSV
C430
SCD1U25V3KX-GP 5
14
39KR2F-GP
BST
SC411_DH
4
3
2
1
2
1
1
PGD
C163
SC
1
R252
C108
2SC411_LX
SCD1U16V2KX-3GP
5V_S5
13
2
4
R52
SC411_BST_L
1
2SC411_BST 1
0R0402-PAD
VCCA
U9
0503 MV
SC10U25V6KX-1GP
2
AO4468-GP
2
GAP-CLOSE-PWR
2
2
C427
SC1U10V3ZY-6GP
C164
SCD1U25V3ZY-1GP
D15
CH521S-30-GP-U1
S
S
S
G
GAP-CLOSE-PWR
PM_SLP_S3#
U12
1
1 2
SC_VCC
GAP-CLOSE-PWR
G18
1
2
20,22,23,31,37,41,42,47
C162
D
D
D
D
GAP-CLOSE-PWR
G17
1
2
1
5V_S5
1
R248
10R2F-L-GP
5
6
7
8
GAP-CLOSE-PWR
G16
1
2
4
VGA_CORE_S0
G3
1
1
VGA_CORE_PWR
5V_S5
G15
2
GAP-CLOSE-PWR
G70
1
2
GAP-CLOSE-PWR
1D2V_S0
Iomax=3A
G71
1
1
2
GAP-CLOSE-PWR
G66
5V_S5
2
2
1
2
GAP-CLOSE-PWR
1D2V_S0
G74
1
2
GAP-CLOSE-PWR
C416
2
C417
2
G73
1
G75
2D5V_S0
Iomax=300mA
1
2
GAP-CLOSE-PWR
2D5V_S0
3D3V_S0
U43
VOUT
1
VIN
2
1
2
C422
SC1U10V3ZY-6GP
Vout=0.8*(1+R1/R2)
2
GND
3
1
R227
68KR2F-GP
SO-8-P
C415
2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SC10U10V5ZY-1GP
2
1
R228
39KR2F-GP
2
FB
1
APL5913-KAC-1-GP
3
4
GAP-CLOSE-PWR
G68
1
2
1
GAP-CLOSE-PWR
G69
1
2
SC10U10V5ZY-1GP
VOUT
VOUT
1D2V_PWR
1
6
EN
5
9
2
8
VIN
VIN
2
POK
SC56P50V2JN-2GP
1
2
R225 0R0402-PAD
7
Vo(cal.)=1.2588V
1
2
0R2J-2-GP
2
1
R226
GND
PM_SLP_S3#
C413
SC10U10V5ZY-1GP
1
38,40,41,42 CPUCORE_ON
VCNTL
U42
DY
2
2
C414
SC1U10V3ZY-6GP
1
1
G72
GAP-CLOSE-PWR
G67
1
2
1D8V_S0
C420
SC10U10V5ZY-1GP
G9131-25T73UF-GP
1
1
& lt; Core Design & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
VGA CORE 1V
Document Number
Rev
ME3-Discrete
Date: Monday, September 17, 2007
A
B
C
D
Sheet
E
44
of
51
9
9
9
9
PEG_TXP10
PEG_TXN10
PEG_RXP11
PEG_RXN11
9
9
9
9
PEG_TXN11
PEG_TXP11
PEG_RXP12
PEG_RXN12
9
9
PEG_RXP13
PEG_RXN13
9
9
9
9
PEG_TXN13
PEG_TXP13
PEG_RXP14
PEG_RXN14
9
9
9
9
PEG_TXP14
PEG_TXN14
PEG_RXP15
PEG_RXN15
9
9
PEG_TXP15
PEG_TXN15
C182
1
1
C181
C184
1
1
C183
C193
1
1
C192
C197
1
1
C196
C191
1
1
C190
PEX_RX9
PEX_RX9#
PEX_RX10
PEX_RX10#
NV_PLLAVDD
2
1
SC1U6D3V2ZY-GP
1
2
SCD1U10V2KX-5GP
1
2
SCD1U10V2KX-5GP
1
2
2
SCD1U10V2KX-5GP
SC1U6D3V2ZY-GP
1
1
2
48
48
48
48
C89
49
49
49
49
place near GPU
C72
PEX_TX12
PEX_TX12#
PEX_TX14
PEX_TX14#
PEX_PLLGND
D12
E12
F12
C13
C68
1
R56
G72M-V-GP-U
1
1
1
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
1
2
1
SCD1U16V2ZY-2GP
2
2
B
R69
1
M23
M24
TP8
TPAD30
TP80
1
TPAD30
1
A16
C116
FB_VREF
G72M-V-GP-U
1D2V_S0
L10
1
2
BLM15AG221SN-GP
FBA_PLLAVDD
place near balls
3D3V_S0
1D2V_S0
L11
SCD01U16V2KX-3GP
1
2
BLM15AG221SN-GP
C436
C134
SC4D7U6D3V3KX-GP
reserve for NB86
D13
C15
For NB86
D14
FBA_PLLAVDD
TP82
45D3R2F-L-GP
2 R253
24D9R2F-L-GP
2
40D2R2F-GP
C117
place near GPU
& lt; Core Design & gt;
PEX_RX14
PEX_RX14#
PEX_RX15
PEX_RX15#
2
1
1
2
C76
C421 COIL-10NH-GP
SC4D7U6D3V3KX-GP
TPAD30
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
AA6
NC#D12
NC#E12
NC#F12
NC#C13
C419
48
48
49
49
K22
FBA_PLLGND
PEX_PLLADVDD 1
SC1U10V3ZY-6GP
H22
FBA_PLLVDD
1D2V_S0
L21
Y6
AA5
SCD1U16V2ZY-2GP
2
2
FBA_RST 48,49
FBA_A7 48,49
FBA_A10 48,49
FBA_CKE 48,49
FBA_A0 48,49
FBA_A9 48,49
FBA_A6 48,49
FBA_A2 48
FBA_A8 48,49
FBA_A3 48
FBA_A1 48,49
E13
C97
SCD01U16V2KX-3GP
PEX_PLLAVDD
PEX_PLLDVDD
FBCAL_PU_GND
FBCAL_TERM_GND
FBA_REFCLK
FBA_REFCLK#
SCD1U10V2KX-5GP
PEX_RX12
PEX_RX12#
SCD1U16V2ZY-2GP
1
2
1
2
1
D15
FBA_DEBUG
VGA_CORE_S0
place near balls
PEX_RX11
PEX_RX11#
PEX_TX15
PEX_TX15#
SCD1U16V2ZY-2GP
2
2
1
SC1U6D3V2ZY-GP
FBCAL_PD_VDDQ
SCD1U16V2ZY-2GP
SC1U10V3KX-3GP
2
1
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
2
1
2
FBA_CLKP0
FBA_CLKN0
FBA_CLKP1
FBA_CLKN1
C
1D8V_S0
C87
N9
PEX_TX11
PEX_TX11#
PEX_RX13
PEX_RX13#
2
1
1
2
SC1U10V3KX-3GP
2
1
2
J12
F13
J13
F14
J15
J16
PEX_TX10
PEX_TX10#
PEX_TX13
PEX_TX13#
L24
K23
M22
N22
C129
FBA_A4 48
FBA_RAS# 48,49
FBA_A5 48
FBA_BA1 48,49
FBB_A2 49
FBB_A4 49
FBB_A3 49
FBA_CS1#/BA2 48,49
FBA_CS0# 48,49
FBA_A11 48,49
FBA_CAS# 48,49
FBA_WE# 48,49
FBA_BA0 48,49
FBB_A5 49
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
C158
SC10U10V5KX-2GP
9
9
PEG_TXP12
PEG_TXN12
C155
1
1
C161
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
G27
D25
F26
F25
G25
J25
J27
M26
C27
C25
D24
N27
G24
J26
M27
C26
M25
D26
D27
K26
K25
K24
F27
K27
G26
B27
N24
1
PEG_RXP10
PEG_RXN10
A22
E22
F21
B21
V26
W23
V23
W27
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
place near balls
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
C133
2
PEG_TXP9
PEG_TXN9
PEX_TX9
PEX_TX9#
FBADQSN0
FBADQSN1
FBADQSN2
FBADQSN3
FBADQSN4
FBADQSN5
FBADQSN6
FBADQSN7
C137
D
1
9
9
9
9
PEX_RX8
PEX_RX8#
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
C166 C143
2
PEG_RXP9
PEG_RXN9
C139
1
1
C152
SC1U10V2KX-1GP
9
9
PEG_TXP8
PEG_TXN8
PEX_TX8
PEX_TX8#
W9
W10
W11
W12
C165
C126
F17
F19
J19
M19
T19
J22
L22
P22
U22
Y22
1
9
9
C130
1
1
C135
VDD_LP
VDD_LP
VDD_LP
VDD_LP
C140
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
2
PEG_RXP8
PEG_RXN8
PEX_RX7
PEX_RX7#
B22
D22
E21
C21
V25
W24
U24
W26
1214
C154
SCD01U16V2KX-3GP
9
9
PEG_TXP7
PEG_TXN7
FBADQSP0
FBADQSP1
FBADQSP2
FBADQSP3
FBADQSP4
FBADQSP5
FBADQSP6
FBADQSP7
48
48
48
48
49
49
49
3D3V_S0 49
1D8V_S0
place below GPU
1
9
9
PEX_TX7
PEX_TX7#
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
E15
F15
F16
J17
J18
L19
N19
R19
U19
W19
2
PEG_RXP7
PEG_RXN7
PEX_RX6
PEX_RX6#
D21
F22
F20
A21
V27
W22
V22
V24
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
A
Wistron Corporation
HDMI_SPDIF
HDMI_SPDIF
2
C221
1
1
9
9
C120
1
1
C124
PEX_TX6
PEX_TX6#
C115 C96
48
48
48
48
49
49
49
49
R49
1
2
2KR2-GP
R88
36KR2J-GP
SPDIF_H
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SPDIF_H 35
Title
SCD01U16V2KX-3GP
2
PEG_RXP6
PEG_RXN6
PEX_RX5
PEX_RX5#
W13
M14
T14
L15
M15
T15
U15
W15
L16
M16
T16
U16
W16
M17
N17
R17
T17
1
PEG_TXP6
PEG_TXN6
PEX_TX5
PEX_TX5#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
2
9
9
9
9
C106
1
1
C113
PEX_RX4
PEX_RX4#
C122
1
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
1
PEG_TXP5
PEG_TXN5
1
1
C105
C114
2
9
9
C99
FBAD[48..63]
C112
C94
1
PEG_RXP5
PEG_RXN5
C92
PEX_TX4
PEX_TX4#
49
2
9
9
PEG_TXP4
PEG_TXN4
1
1
PEX_RX3
PEX_RX3#
C101
SC1U10V2KX-1GP
9
9
C80
C95
SC1U10V2KX-1GP
PEG_RXP4
PEG_RXN4
C82
PEX_TX3
PEX_TX3#
R9
T9
J10
J11
M11
N11
R11
T11
L12
M12
T12
U12
L13
M13
T13
U13
SC10U10V5KX-2GP
9
9
PEG_TXP3
PEG_TXN3
1
1
PEX_RX2
PEX_RX2#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
C93
1
9
9
C74
PEX_TX2
PEX_TX2#
C123
2
PEG_RXP3
PEG_RXN3
C70
PEX_RX1
PEX_RX1#
J9
M9
SCD1U10V2KX-5GP
9
9
PEG_TXP2
PEG_TXN2
1
1
FBAD[32..47]
C128
VDD
VDD
1
9
9
C63
PEX_TX1
PEX_TX1#
2
PEG_RXP2
PEG_RXN2
1
1
49
VGA_CORE_S0
SCD1U16V2ZY-2GP
9
9
C62
C102
place near balls
1
PEG_RXP1
PEG_RXN1
PEX_RX0
PEX_RX0#
2
PEG_TXP1
PEG_TXN1
C57
PEX_TX0
PEX_TX0#
1
9
9
9
9
C53
AB13
AB16
AC16
AB17
AC17
AB18
AB19
AC19
AC20
C107
SC1U10V2KX-1GP
PEG_TXP0
PEG_TXN0
1
1
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
C91
SC10U10V5KX-2GP
9
9
C51
PEX_REFCLK
PEX_REFCLK#
C142
2
PEG_RXP0
PEG_RXN0
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
1
9
9
AE3
AE4
SCD1U10V2KX-5GP
AD5
2 RXP0
AD6
2 RXN0
SCD1U10V2KX-5GP
AF1
AG2
SCD1U10V2KX-5GP
AE6
2 RXP1
AE7
2 RXN1
SCD1U10V2KX-5GP
AG3
AG4
SCD1U10V2KX-5GP
AD7
2 RXP2
AC7
2 RXN2
SCD1U10V2KX-5GP
AF4
AF5
SCD1U10V2KX-5GP
AE9
2 RXP3
AE10
2 RXN3
SCD1U10V2KX-5GP
AG6
AG7
SCD1U10V2KX-5GP
RXP4
AD10
2
RXN4
AC10
2
SCD1U10V2KX-5GP
AF7
AF8
SCD1U10V2KX-5GP
AE12
2 RXP5
AE13
2 RXN5
SCD1U10V2KX-5GP
AG9
AG10
SCD1U10V2KX-5GP
AD13
2 RXP6
AC13
2 RXN6
SCD1U10V2KX-5GP
AF10
AF11
SCD1U10V2KX-5GP
AC15
2 RXP7
AD15
2 RXN7
SCD1U10V2KX-5GP
AG12
AG13
SCD1U10V2KX-5GP
AE15
2 RXP8
AE16
2 RXN8
SCD1U10V2KX-5GP
AG15
AG16
SCD1U10V2KX-5GP
AC18
2 RXP9
AD18
2 RXN9
SCD1U10V2KX-5GP
AF16
AF17
SCD1U10V2KX-5GP
AE18
2 RXP10
AE19
2 RXN10
SCD1U10V2KX-5GP
AG18
AG19
SCD1U10V2KX-5GP
RXP11
AC21
2
AD21
2 RXN11
SCD1U10V2KX-5GP
AF19
AF20
SCD1U10V2KX-5GP
AE21
2 RXP12
AE22
2 RXN12
SCD1U10V2KX-5GP
AG21
AG22
SCD1U10V2KX-5GP
AD22
2 RXP13
AD23
2 RXN13
SCD1U10V2KX-5GP
AF22
AF23
SCD1U10V2KX-5GP
2 RXP14
AF25
RXN14
AE25
2
SCD1U10V2KX-5GP
AG24
AG25
SCD1U10V2KX-5GP
AE24
2 RXP15
AD24
2 RXN15
SCD1U10V2KX-5GP
AG26
AF27
2
3 PEG_REFCLKP
3 PEG_REFCLKN
PEX_RST#
1
AC6
AF13
AF14
2
1N4148W-1-GP
2
10KR2J-3-GP
C35
1
1
R246
K
1
A
PLT_RST1#
AA4
AB5
AB6
AB7
AB8
AB9
AC9
AC11
AB12
AC12
2
7,18,20,23,29,31,32
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
2
D27
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
1
FBAD[16..31]
A26
C24
B24
A24
C22
A25
B25
D23
G22
J23
E24
F23
J24
F24
G23
H24
D16
E16
D17
F18
E19
E18
D20
D19
A18
B18
A19
B19
D18
C19
C16
C18
N26
N25
R25
R26
R27
T25
T27
T26
AB23
Y24
AB24
AB22
AC24
AC22
AA23
AA22
T24
T23
R24
R23
R22
T22
N23
P24
AA24
AA27
AA26
AB25
AB26
AB27
AA25
W25
2
1
1
2
48
1D2V_S0
SC10U10V5KX-2GP
A
C30
place near balls
C
B
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
SC1U10V2KX-1GP
D
C141
2
1
2
2
C127
SCD1U10V2KX-5GP
1
C119 C144
SC1U10V2KX-1GP
AB10
AB11
AB14
AB15
W17
W18
AB20
AB21
SC10U10V5KX-2GP
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
2
U45B
2/12
FBAD[0..15]
place near GPU
SCD1U16V2ZY-2GP
3 48
1214
SC1U10V3KX-3GP
1D2V_S0
place near balls
SCD1U10V2KX-5GP
4
1
U45A
1/12
2
5
Size
Custom
NB8M-GS (1 of 3)
Document Number
Rev
ME3-Discrete
Date: Thursday, August 23, 2007
Sheet
45
of
51
5
4
3D3V_S0
3
U45C
3/12
L6
1
2
BLM15AG221SN-GP
GDACA_VDD
1D8V_S0
SCD01U16V2KX-3GP
2
1
1
SC4700P50V2KX-1GP
2
1
1
2
SC1U10V3ZY-6GP
2
D
GDACA_RSET
C66
AB4
VGA_DDCCLK 15
VGA_DDCDATA 15
DACA_HSYNC
DACA_VSYNC
AD4
AC4
GMCH_HSYNC 15
GMCH_VSYNC 15
DACA_VREF
DACA_RSET
D10
E10
R239
124R2F-U-GP
DACA_RED
AE1
DACA_GREEN
VGA_GREEN 15
DACA_BLUE
AD2
DACA_IDUMP
U9
U45E
5/12
1
2
BLM15AG221SN-GP
VGA_TXBOUT1- 16
VGA_TXBOUT1+ 16
2
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
VGA_TXBOUT0- 16
VGA_TXBOUT0+ 16
AA3
AA2
2
P6
R6
IFPB_TXD5#
IFPB_TXD5
2
VGA_TXAOUT2- 16
VGA_TXAOUT2+ 16
W2
W3
IFPAB_PLLVDD
IFPAB_RSET
A
G72M-V-GP-U
IFPB_TXC#
IFPB_TXC
U4
T4
W6
W5
1
1
1
C100
GDACB_RSET
DACB_RSET
DACB_HSYNC
DACB_VSYNC
R259
124R2F-U-GP
VGA_TXBCLK- 16
VGA_TXBCLK+ 16
2
2
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
B
1
LDDC_CLK 16
LDDC_DATA 16
R87
10KR2J-3-GP
C189 SCD01U16V2KX-3GP
U14
U45G
HDMI_HDP
A9
HDMI_HDP 17
D9
TP78 TPAD30
A10 LBKLT_CRTL 1
B10
LCDVDD_EN 16
C10
BLON_IN 31
C12
GPIO_PWRCNTL 44
B12
A12
GPU_THRM#
A13
GPU_ALERT# 1
TP79 TPAD30
B13
B15
MEM_VREF 49
A15
HDMI_CEC 17
B16
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
3D3V_S0
7/12
ROM_SI
ROM_SO
ROM_SCLK
F3
D3
D2
I2CH_SCL
I2CH_SDA
C7
B7
R255
10KR2J-3-GP
8
7
6
5
VCC
NC#7
SCL
SDA
NC#1
NC#2
NC#3
GND
1
2
3
4
A6
1
ROMCS#
D1
HDCP_SDA
HDCP_SCL
AT88SC0808C-SU-1-GP
HDCP_SCL
HDCP_SDA
R85
10KR2J-3-GP
2
2
2
2
E9
D8
I2CC_SCL
I2CC_SDA
G72M-V-GP-U
STEREO
A7
TESTMODE
D7
& lt; Core Design & gt;
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
A
F7
SWAPRDY
GND
R260
10KR2J-3-GP
AC8
Title
2
G72M-V-GP-U
Size
A3
NB8M-GS (2 of 3)
Document Number
Date: Thursday, August 23, 2007
5
2
2
1
1
2
R274
10KR2J-3-GP
VGA_TV_COMP 15
1
R37
1
R40
1
R38
3D3V_S0
BUFRST#
R273
10KR2J-3-GP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
L9
D11
THERMDP
AE27
AD26
AD27
AE26
AD25
VGA_TV_LUMA 15
D5
1
2
B9
VGA_TV_CRMA 15
3D3V_S0
1
THERMDN
F4
E4
DACB_BLUE
2
1
C9
HDMI_SDA 17
SC12P50V2JN-3GP
DACB_RED
G72M-V-GP-U
CLAMP
C424
SC2200P50V2KX-2GP
DY
GTHERMDA
C588
SC12P50V2JN-3GP
DACB_GREEN
U45F
6/12
GTHERMDC
E6
F5
HDMI_SCL 17
DACB_IDUMP
VGA_TXACLK- 16
VGA_TXACLK+ 16
G72M-V-GP-U
B
D6
BLM15AG221SN-GP L31
HDMI_SCL_1 1
2HDMI_SCL
BLM15AG221SN-GP L33
HDMI_SDA_1 1
2HDMI_SDA
C583
2
DACB_VREF
SCD01U16V2KX-3GP
2
1
SC4700P50V2KX-1GP
IFPA_TXC#
IFPA_TXC
SC4700P50V2KX-1GP
2
AB2
AB3
C83
F10
DACB_VDD
E7
F9
I2CB_SDA
F8
GDACB_VREF
C103
VGA_TXBOUT2- 16
VGA_TXBOUT2+ 16
1
2
1
2
SCD1U10V2KX-5GP
1
2
SC1U10V3ZY-6GP
AA1
AB1
IFPB_IOVDD
C64
C56
IFPB_TXD6#
IFPB_TXD6
IFPB_TXD7#
IFPB_TXD7
Y4
IFPA_IOVDD
2
W4
I2CB_SCL
GDACB_VDD
SC1U10V3ZY-6GP
2
IFPAB_IOVDD
U45D
4/12
L9
1
2
BLM15AG221SN-GP
1
3D3V_S0
L2
1
2
BLM15AG221SN-GP
C
RN56
SRN2K2J-1-GP
4
3
IFPAB_PLLGND
1
R45
1KR2F-3-GP
DY
1D8V_S0
C52
CH751H-40PT-1GP
D30
K
1
V5
IFPAB_RSET
U6
V6
22
SLOT_CLOCK_CFG 47
1
2
SC4700P50V2KX-1GP
C
22
D
MIOA_D8 47
MIOA_D9 47
2
1
1
T6
T5
MIOA_D6 47
VGA_TXAOUT1- 16
VGA_TXAOUT1+ 16
IFPA_TXD2#
IFPA_TXD2
C4
MIOA_D0 47
MIOA_D1 47
5V_S0
C50
SC1U10V3ZY-6GP
2
2
R4
R5
A2
B3
A3
D4
A4
B4
B6
P4
C6
G5
V4
VGA_BLUE 15
1
R240
1
R241
1
R242
VGA_TXAOUT0- 16
VGA_TXAOUT0+ 16
IFPA_TXD3#
IFPA_TXD3
IFPAB_VPROBE
N5
N4
IFPB_TXD4#
IFPB_TXD4
C36
N6
IFPA_TXD0#
IFPA_TXD0
IFPA_TXD1#
IFPA_TXD1
1
TPAD30 TP5
IFPAB_PLLVDD
NC#F6
NC#G6
NC#J6
VGA_RED 15
AD1
G72M-V-GP-U
L3
F6
G6
J6
NC#A2
NC#B3
NC#A3
NC#D4
NC#A4
NC#B4
NC#B6
NC#P4
NC#C6
NC#G5
NC#V4
NC#C4
I2CA_SCL
I2CA_SDA
DACA_VDD
AD3
1
U45H
8/12
3D3V_S0
AE2
GDACA_VREF
C67
C45
For NB86
2
4
3
2
Rev
ME3-Discrete
Sheet
1
46
of
51
1D2V_S0
U45I
9/12
2
H4
H5
C1
XTALSSIN
1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
10KR2J-3-GP
27MHZ_XIN B1
XTALIN
XTALOUT
C2
G72M-V-GP-U
2
MIOBCAL_PD_VDDQ
M3
MIOBCAL_PU_GND
MIOB_VSYNC
MIOB_HSYNC
MIOB_DE
MIOB_CTL3
MIOB_CLKOUT
MIOB_CLKOUT#
MIOB_CLKIN
K2
K3
R2
MIOB_VREF
NC
R234
2KR2-GP
DY
F1
G4
G1
F2
3
R243
1
2
0R0402-PAD
VGA_27MHZ
1
J4
MIOB_HSYNC
For NB86
MIOB_CTL3
64.25505.6DL
R21
1
2
10KR2J-3-GP
reserve for NB86
C
DY
1
M5
2
IFPC_TXD0#
IFPC_TXD0
R36
2
V3
V2
IFPCD_PLLVDD
IFPCD_RSET
1
R231
R28
DY
RAM_CFG_3
PCI_DEVID_0
MIOB_D5:
PCI_DEVID_1
MIOB_D3:
1
R233
PCI_DEVID_2
MIOB_D11
L4
IFPC_IOVDD
1
R262
G72M-V-GP-U
1
R267
C58
1
SUB_VENDOR
2
SLOT_CLOCK_CFG 46
DY 10KR2J-3-GP
46
2
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADDR[0]
MIOA_D8:
3GIO_PADCFG_LUT_ADDR[1]
1
R269
2
DY 2KR2-GP
MIOA_D6
MIOA_D6
1
R265
(DEFAULT)
MIOA_D8
MIOA_D8
1
R266 DY
MIOA_D9
1
DY
2
2KR2-GP
MIOB_HSYNC
1
R39
DY
3GIO_PADCFG_LUT_ADDR[2]
2
2KR2-GP
MIOA_D9
0 DESKTOP
1 MOBILE (DEFAULT)
2
2KR2-GP
46
2
Q3
TP0610T-T1-E3-GP
0 ENABLED
1 DISABLED
(DEFAULT)
2
2KR2-GP
MIOB_HSYNC:
3GIO_PADCFG_LUT_ADDR[3]
D
3
1 R27
0R0603-PAD
MIOA_D0
46
0410 SD
MIOA_D0
46
3D3V_S0
0 SYSTEM BIOS
1 ADAPTER BIOS
MIOA_D1 46
MIOA_D9:
SC4700P50V2KX-1GP
2
SC1U10V3ZY-6GP
MIOA_D1:
1
2
10KR2J-3-GP
GT
GS
2
2KR2-GP
2
DY 2KR2-GP
R30
MIOB_CTL3
1
2
R26
DY
2KR2-GP
HDMI_TXC# 17
HDMI_TXC 17
1000
0111
0110
MIOB_D11: PCI_DEVID_3
MIOB_CTL3: PCI_DEVID_4
MIOA_D6:
W1
V1
Infineon
Hynix
Samsung
1 -- & gt; 8M*32
0-- & gt; 16M*32
G72M
G72M-V
G72M-Z
MIOA_D0:
IFPC_TXC#
IFPC_TXC
1
0101
0110
0111
MIOB_D4:
2
2KR2-GP
1
R230
MIOB_D3
2
RAM_CFG_2
MIOB_D9:
2
2KR2-GP
IFPCD_PLLGND
RAM_CFG_1
2
10KR2J-3-GP
MIOB_D5
M6
GDDR3 8Mx32 64bit
MIOB_D8:
2
DY 10KR2J-3-GP
MIOB_D9
1
RAM_CFG_0
MIOB_D1:
2
10KR2J-3-GP
MIOB_D8
1
R29
Values
MIOB_D0:
MIOB_D1
1
R229
1KR2J-1-GP
L5
1
2
BLM15AG221SN-GP
1
1
2
S
R41
R24
0R2J-2-GP
G
DY
3D3V_HDMI_S0
R16
AD16
B17
E17
L17
P17
U17
AD17
AF18
K19
P19
V19
AD19
B20
E20
AD20
AF21
B23
E23
H23
L23
P23
U23
Y23
AC23
AF24
B26
E26
H26
L26
P26
U26
Y26
AC26
AF26
D
3D3V_S0
R47
2KR2-GP
C
B
R20
1
A
2
& lt; Core Design & gt;
D
Wistron Corporation
Q12
2N7002-11-GP
PM_SLP_S3#
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
G
Title
Size
A3
NB8M-GS (3 of 3)
Document Number
Date: Thursday, August 23, 2007
5
A
G72M-V-GP-U
10KR2F-2-GP
S
22,23,31,37,41,42,44
Bit Signal
MIOB_D4
3D3V_HDMI_S0
C46
R235
3D3V_S0
2
10KR2J-3-GP
HDMI_TXD2 17
1
2
SC4700P50V2KX-1GP
SC1U10V3ZY-6GP
2
1
C418
T2
T3
IFPC_TXD2#
IFPC_TXD2
M4
J3
1
C65
1
2
DY
HDMI_TXD0# 17
HDMI_TXD0 17 R232
10KR2J-3-GP
1
2
HDMI_TXD1# 17 R237
10KR2J-3-GP
HDMI_TXD1 17
1
2
R238
10KR2J-3-GP
HDMI_TXD2# 17
R1
T1
IFPC_TXD1#
IFPC_TXD1
IFPCD_VPROBE
SCD1U16V2ZY-2GP
1
2
L20 BLM15AG221SN-GP
MIOB_D0
1
1
2
R23610KR2J-3-GP
U45L
12/12
C81
For NB86
B
Vram : Samsung
G72M-V-GP-U
1D8V_S0
N13
P13
R13
B14
E14
J14
L14
N14
P14
R14
U14
W14
AC14
AD14
N15
P15
R15
AF15
N16
P16
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C3
B8
E8
AD8
K9
P9
V9
AD9
AF9
B11
E11
F11
L11
P11
U11
AD11
N12
P12
R12
AD12
AF12
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R261
XTALOUTBUFF
B2
E2
H2
L2
P2
U2
Y2
AC2
AF2
AF3
B5
E5
L5
P5
U5
Y5
AC5
H6
AF6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PLLGND
3 VGA_27MHZSS
J5
1
PLLVDD
C71
3D3V_S0
TPAD30 TP76
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
1
C59
SCD1U16V2ZY-2GP
MIOB_D11
C55
SC4700P50V2KX-1GP
2
MIOB_D8
MIOB_D9
C54
1
U45J
10/12
For NB86
PLL_VDD
1
MIOB_D3
MIOB_D4
MIOB_D5
11/12
2
reserve for NB86
MIOB_D0
MIOB_D1
G2
G3
J2
J1
K4
K1
M2
M1
N1
N2
N3
R3
SC1U10V3ZY-6GP
2
D
SCD1U16V2ZY-2GP
C118
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
2
1
K5
K6
L6
1
2
BLM15AG221SN-GP
L8
SC4D7U6D3V3KX-GP
2
1
3D3V_S0
3
2
4
1
5
4
3
2
Rev
ME3-Discrete
Sheet
1
47
of
51
5
4
3
2
1
1D8V_S0
45,49
F9
CS#
FBA_CKE
H9
WE#
H3
RAS#
45,49 FBA_CS1#/BA2
R18
45,49
243KR2F-GP
F4
CAS#
45,49
2
FBA_CS0#
FBA_WE#
H4
CKE
J10
J11
1
B
FBA_CAS#
45,49
45
45
FBA_A7
FBA_A8
FBA_A3
FBA_A10
FBA_A11
FBA_A2
FBA_A1
FBA_A0
FBA_A9
FBA_A6
FBA_A5
FBA_A4
CK#
CK
FBA_CLKN0
FBA_CLKP0
45
45
45
45
P2
P11
D11
D2
WDQS3
WDQS2
WDQS1
WDQS0
FBADQM3
FBADQM2
FBADQM1
FBADQM0
N3
N10
E10
E3
1
FBA_RST
DM3
DM2
DM1
DM0
1
R33
10KR2J-3-GP
FBA_RST
V4
SC1U6D3V2ZY-GP
D
1
1
2
2
1
2
2
1
2
SC4D7U10V5ZY-3GP
2
1
C69
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
1
C168
2
SC1U6D3V2ZY-GP
1
C31
2
SC1U6D3V2ZY-GP
1
C25
2
1
2
SC1U6D3V2ZY-GP
C177
1D8V_S0
C
1D8V_S0
B
C79
SCD1U16V2ZY-2GP
RES
R31
1
2
0R0402-PAD
2
45,49
J2
RFU
V9
C32
J3
RFU
C171
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C136
C18
C153
PAR
C73
2
VSSA
VSSA
SCD1U16V2ZY-2GP
J12
J1
1
K1
K12
1
VDDA
VDDA
1
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
C88
1D8V_S0
2
FBADQSP3
FBADQSP2
FBADQSP1
FBADQSP0
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RDQS3
RDQS2
RDQS1
RDQS0
45
45
45
45
R55
10KR2J-3-GP
2
P3
P10
D10
D3
45
45
45
45
FBA_CKE
FBADQSN3
FBADQSN2
FBADQSN1
FBADQSN0
A2
A11
F1
F12
M1
M12
V2
V11
2
A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0
45,49
45,49
45
45,49
45,49
45
45,49
45,49
45,49
45,49
45
45
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
C178
SCD1U16V2ZY-2GP
1
BA2
BA1
BA0
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
45,49 FBA_RAS#
45,49
FBA_BA0
45,49
FBA_BA1
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
1
C
FBAD[0..15]
C176
1D8V_S0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
2
45
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
H10
G9
G4
D
T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2
SC1U6D3V2ZY-GP
FBAD31
FBAD30
FBAD29
FBAD28
FBAD27
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD21
FBAD20
FBAD19
FBAD18
FBAD17
FBAD16
FBAD15
FBAD14
FBAD13
FBAD12
FBAD11
FBAD10
FBAD9
FBAD8
FBAD7
FBAD6
FBAD5
FBAD4
FBAD3
FBAD2
FBAD1
FBAD0
1
FBAD[16..31]
2
45
SC1U6D3V2ZY-GP
U6
2
A
VREF
VREF
1D8V_S0
MF
A9
HY5RS123235BFP-14-GP
C138
SCD01U16V2KX-3GP
VRAM_VREF
ZQ
2
240R2F-1-GP
VRAM_VREF
1
49
A4
H1
H12
1
R16
& lt; Core Design & gt;
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
0416 SD
Size
A3
VRAM1
Document Number
Date: Thursday, August 23, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
48
of
51
4
3
U10
45,48
45
45
B
WE#
FBA_RAS#
H3
RAS#
45,48
FBA_CAS#
F4
CAS#
45,48
243KR2F-GP
CS#
H9
45,48
2
F9
FBA_WE#
FBA_CKE
H4
CKE
J10
J11
1
FBA_CS0#
45,48
R50
FBA_A11
FBA_A10
FBA_A9
FBA_A8
FBA_A7
FBA_A6
FBB_A5
FBB_A4
FBB_A3
FBB_A2
FBA_A1
FBA_A0
CK#
CK
FBA_CLKN1
FBA_CLKP1
FBADQSN7
FBADQSN6
FBADQSN5
FBADQSN4
P3
P10
D10
D3
FBADQSP7
FBADQSP6
FBADQSP5
FBADQSP4
P2
P11
D11
D2
WDQS3
WDQS2
WDQS1
WDQS0
45
45
45
45
FBADQM7
FBADQM6
FBADQM5
FBADQM4
N3
N10
E10
E3
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
VDDA
VDDA
K1
K12
VSSA
VSSA
SCD1U16V2ZY-2GP
J12
J1
RDQS3
RDQS2
RDQS1
RDQS0
45
45
45
45
A2
A11
F1
F12
M1
M12
V2
V11
DM3
DM2
DM1
DM0
1D8V_S0
V9
FBA_RST
1
1
SC1U6D3V2ZY-GP
2
2
2
1
1
1
1
2
1
2
2
1
SC1U6D3V2ZY-GP
C146
SC1U6D3V2ZY-GP
1
2
1
2
SC1U6D3V2ZY-GP
1
2
SC1U6D3V2ZY-GP
1
2
SC1U6D3V2ZY-GP
1
C39
C
C21
SCD1U16V2ZY-2GP
V4
ZQ
0R0402-PAD
R35
VREF
VREF
2
H1
C61
B
RES
H12
MF
A9
2
R257
C151
1
0105 SC
A4
2
240R2F-1-GP
VRAM_VREF
C17
1D8V_S0
R73
R46
510R2F-L-GP
1
C41
C37
1
45,48
1D8V_S0
C159
J2
RFU
C19
J3
RFU
C172
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S0
C23
PAR
C38
2
1
2
1D8V_S0
C179
SC1U6D3V2ZY-GP
C20
2
45
45
45
45
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D
2
A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0
45,48
45,48
45,48
45,48
45,48
45,48
45
45
45
45
45,48
45,48
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
SC4D7U10V5ZY-3GP
45,48 FBA_CS1#/BA2
45,48
FBA_BA1
45,48
FBA_BA0
1D8V_S0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
1
C
BA2
BA1
BA0
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
45 FBAD[32..47]
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
H10
G9
G4
D
T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2
SC1U6D3V2ZY-GP
FBAD63
FBAD62
FBAD61
FBAD60
FBAD59
FBAD58
FBAD57
FBAD56
FBAD55
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD48
FBAD47
FBAD46
FBAD45
FBAD44
FBAD43
FBAD42
FBAD41
FBAD40
FBAD39
FBAD38
FBAD37
FBAD36
FBAD35
FBAD34
FBAD33
FBAD32
1
1
45 FBAD[48..63]
2
2
5
S
VRAM_VREF
0410 SD
C104
0R0402-PAD
R80
HY5RS123235BFP-14-GP
& lt; Core Design & gt;
A
2
48
2
1
1
2
G
MEM_VREF
C27
SCD01U16V2KX-3GP
1K2R2F-1-GP
Q15
2N7002-11-GP
2
D
R48
SCD01U16V2KX-3GP
470R2F-GP
A
46
2
1
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
0416 SD
VRAM2
Document Number
Date: Thursday, August 23, 2007
5
4
3
2
Rev
ME3-Discrete
Sheet
1
49
of
51
5
4
3
2
1
Adaptor in to generate DCBATOUT
AD+
AD_JK
DCIN1
AD_JK
1
2
1
R2
31
R1
B
AD_OFF
R2
PDTC124EU-1-GP
R1
Q2
B
8
7
6
5
D
1
1
1
2
Q1
AD_OFF#
D
D
D
D
C14
SCD1U50V3ZY-GP
1
DC-JACK108-GP
22.10037.B71
SC
U2
S
S
S
G
P2003EVG-GP
R8
2
NP1
C3
SC1KP50V2KX-1GP
200KR2J-L1-GP
5
2
2
SCD1U50V3ZY-GP
EC36
SCD1U50V3ZY-GP
C5
4
2
1
3
1
AD+_2
1
2
3
4
E
2
D
C15
SCD1U50V3ZY-GP
2 C11
SCD1U50V3ZY-GP
1
R11
100KR2J-1-GP
C
2
PDTA124EU-1-GP
C
E
C
C
Place Top side and
close to connector
3D3V_AUX_S5
3D3V_AUX_S5
BATTERY CONNECTOR
3D3V_AUX_S5
SC
D6
BT_SCL
D7
2
3
1
BAV99TPT-GP
BT_SDA
SC
D9
2
3
BT_TH
2
3
1
1
BAV99TPT-GP
BAV99TPT-GP
BT+
TPAD30
TPAD30
TPAD30
TPAD30
TP205
TP207
TP206
TP208
BAT1
7
1
TPAD30 TP209
TPAD30 TP210
2
3
4
5
6
8
31
BT_SCL
31
BT_SDA
31,43 BT_TH
C49
SC1KP50V2KX-1GP
FOX-CON6-2-GP-U1
1
C803
B
C804
2
C48
SCD1U25V3ZY-1GP
2
GAP-CLOSE
1
1
2
2
1
2
B
BT+SENSE
1
TPAD30 TP211
G9
43
SC
SC220P50V2KX-3GP
A
SC220P50V2KX-3GP
A
& lt; Variant Name & gt;
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AD/BATT CONN
Size
A3
Document Number
Rev
ME3-Discrete
Date: Wednesday, September 19, 2007
5
4
3
2
Sheet
1
50
of
51
A
B
C
D
E
4
4
3
3
H13 34.4B602.001
SC
H25,24 34.4Q102.001
H33
SPR8
SPRING-U3
SPR9
SPRING-U3
1
SB
1
H32
HOLE
H31
HOLE
H30
HOLE
HOLE
H29
HOLE
H28
SPR7 34.40V16.001
HOLE
H30 87.66383.231
1
1
1
1
1
1
SPR9 34.40V16.001
2
H8
5V_S0
3D3V_S5
U30C
14
10
14
1
1
HOLE
H7
HOLE
H6
1
1
1
HOLE
HOLE
H5
HOLE
H4
1
1
1
H3
HOLE
H2
HOLE
H1
HOLE
2
9
9
8
8
H22
U5D
7
H21
TSAHCT125PW-GP
SSLVC08APWR-GP
7
U5C
11
1
1
H20
1
1
H19
1
1
H18
1
1
12
7
14
13
H17
HOLE
H16
HOLE
H15
HOLE
H14
HOLE
H13
HOLE
H12
HOLE
HOLE
H11
HOLE
H10
1
HOLE
10
H9
TSAHCT125PW-GP
HOLE
H27
& lt; Variant Name & gt;
SPR2
SPRING-U3
SPR1
SPRING-U3
SPR3
SPRING-U3
SPR4
SPRING-U3
SPR5
SPRING-14
SPR6
SPRING-U3
07221
1
SPR7
SPRING-U3
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
1
1
1
1
1
1
1
1
1
1
HOLE
H26
HOLE
H25
HOLE
H24
HOLE
HOLE
1
HOLE
1
1
HOLE
1
1
1
HOLE
1
HOLE
SB
H23
Title
MISC
Size
A3
Document Number
Rev
ME3-Discrete
Date: Friday, September 14, 2007
A
B
C
D
Sheet
E
51
of
51