I need the power supply schematic with code EAY60968801 .Is equipped with IC-s :L6599AD, 3BR1565JF, OG4Y46S and F4316MSF17. R927~R929(typical defects) is OK.There are no components in shortcircuit. I found this: Thanks in advance!
Training Manual
50PK950 Plasma Display
Advanced Single Scan Troubleshooting
50 " Class Full HD 1080p Plasma TV
(50 " diagonally)
Wireless Ready
Published October 13th, 2010
OUTLINE
Overview of Topics to be Discussed
Preliminary:
Contact Information, Preliminary Matters, Specifications,
Plasma Overview, General Troubleshooting Steps,
Disassembly Instructions, Voltage and Signal Distribution
Troubleshooting:
Circuit Board Operation, Troubleshooting and Alignment of :
• Switch Mode Power Supply No “VS On” command input to SMPS from the Main Board.
• Y-SUS Board
• Y-Drive Boards (1 Upper and 1 Lower).
Either can run separately, but you must remove the other completely.
• Z-SUS Board
Uses a Z-SUB Board for panel drive connection.
• Control Board
• X Drive Boards (3)
• Main Board: Wireless capabilities, Internet via LAN or Wireless using Dongle through USB.
• Front IR/Intelligent Sensor, Center LOGO and Motion Remote Boards
Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet.
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Overview of Topics to be Discussed
50PK950 Plasma Display
Section 1
This Section will cover Contact Information and remind the Technician of Important
Safety Precautions for the Customer’s Safety as well as the Technician’s and the
Equipment.
Basic Troubleshooting Techniques which can save time and money sometimes can
be overlooked. These techniques will also be presented.
This Section will get the Technician familiar with the Disassembly, Identification and
Layout of the Plasma Display Panel.
At the end of this Section the Technician should be able to Identify the Circuit
Boards and have the ability and knowledge necessary to safely remove and
replace any Circuit Board or Assembly.
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LG Contact Information
Customer Service (and Part Sales)
(800) 243-0000
Technical Support (and Part Sales)
(800) 847-7597
USA Website (GSFS)
http://gsfs-america.lge.com
Customer Service Website
us.lgservice.com
Knowledgebase Website
lgtechassist.com
LG Web Training
lge.webex.com
LG CS Academy
lgcsacademy.com
New: Software Downloads
Technical Assistance
Presentations with Audio/Video
and Screen Marks
http://136.166.4.200
LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 42LH90, 42SL80,
47LG90, 47LH85, 47LE8500
PLASMA: 42PG20, 42PQ20, 42PQ30, 50PG20, 50PJ350, 50PK950, 50PK950, 50PS80, 50PS60,
60PK750, 60PS11, 60PS60, 60PS80
Also available on the Plasma Page:
PDP Panel Alignment Handbook, Schematics with Bookmarks
Plasma Control Board ROM Update (Jig required)
New Training Materials on
the Learning Academy site
Published October 2010 by LG Technical Support and Training
LG Electronics Alabama, Inc.
201 James Record Road, Huntsville, AL, 35813.
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Preliminary Matters (The Fine Print)
IMPORTANT SAFETY NOTICE
The information in this training manual is intended for use by persons possessing an adequate
background in electrical equipment, electronic devices, and mechanical systems. In any attempt
to repair a major Product, personal injury and property damage can result. The manufacturer or
seller maintains no liability for the interpretation of this information, nor can it assume any
liability in conjunction with its use. When servicing this product, under no circumstances should
the original design be modified or altered without permission from LG Electronics. Unauthorized
modifications will not only void the warranty, but may lead to property damage or user injury.
If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for
service, they must be returned to their original positions and properly fastened.
CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power
is required for diagnosis or test purposes, disconnect the power immediately after performing
the necessary checks. Also be aware that many household products present a weight hazard.
At least two people should be involved in the installation or servicing of such devices.
Failure to consider the weight of an product could result in physical injury.
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ESD Notice
(Electrostatic Static Discharge)
Today’s sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti-static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.
Regulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.
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Safety and Handling, Checking Points
Safety & Handling Regulations
1.
Approximately 10 minute pre-run time is required before any adjustments are performed.
2.
Refer to the Voltage Sticker on the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
3.
Always adjust to the specified voltage level (+/- ½ volt) unless otherwise specified.
4.
Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
5.
C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
6.
The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
7.
The Plasma television should be transported vertically NOT horizontally.
8.
Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
9.
Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
10. New Plasma Models have thinner Display Panels and Frames than previous models. Be careful when lifting
Plasma Display’s because flexing the panel may damage the frame mounts or panel.
Checking Points to be Considered
1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc.
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Basic Troubleshooting Steps
Define, Localize, Isolate and Correct
Look at the symptom carefully and determine what circuits could be causing the
• Define
failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check
for possible overheated components. Capacitors will sometimes leak dielectric material and
give off a distinct odor. Frequency of power supplies will change with the load, or listen for
relay closing etc. Observation of the front Power LEDs may give some clues.
• Localize After carefully checking the symptom and determining the circuits to be checked
and after giving a thorough examination using your senses the first check should always be
the DC Supply Voltages to those circuits under test. Always confirm the supplies are not
only the proper level but be sure they are noise free. If the supplies are missing check the
resistance for possible short circuits.
• Isolate
To further isolate the failure, check for the proper waveforms with the
Oscilloscope to make a final determination of the failure. Look for correct Amplitude
Phasing and Timing of the signals also check for the proper Duty Cycle of the signals.
Sometimes “glitches” or “road bumps” will be an indication of an imminent failure.
• Correct The final step is to correct the problem. Be careful of ESD and make sure to
check the DC Supplies for proper levels. Make all necessary adjustments and lastly always
perform a Safety AC Leakage Test before returning the product back to the Customer.
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50PK950 PRODUCT INFORMATION SECTION
This section of the manual will discuss the specifications of the
50PK950 Advanced Single Scan Plasma Display Television.
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WIRELESS SECTION (Wireless Media Box)
Wireless Media Box (Sold Separately)
The Wireless Media box communicates to the television via a wireless receiver
called a “Dongle”. The Dongle attaches to the Television via two connections:
1. HDMI Cable from the Dongle to the TV to transfer Audio and Video Signals.
2. Wired Remote cable between the TV and Dongle for Control Functions.
Media Box
Wired Remote to control the Media Box
TV A/V Inputs
Wireless Receiver/Transmitter
“Dongle”
Attaches via Velcro to
the back of the set
HDMI
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Wireless LAN (DLNA Adaptor)
Wireless LAN (Sold Separately)
Using the LG Wireless LAN for Broadband/DLNA Adaptor, (DLNA: Digital Living
Network Alliance) which is sold separately, allows the TV to connect to a wireless
LAN network. The DLNA adaptor attaches to the Television via either of the two USB
connections:
Side A/V Inputs
DLNA Adaptor
“Dongle”
Wireless Router
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50PK950 Specifications
1080P PLASMA HDTV
50 " Class (50 " diagonal)
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
For Full Specifications
See the Specification Sheet
INFINIA Series
• Wi-Fi Certified TM
Tru-Black Filter
(Adaptor Included)
THX Certified
• Wireless 1080p Ready
1080P Full HD Resolution
• Full 1080p Resolution
600 Hz sub field driving
• 5M:1 Contrast Ration
1,500 cd/m2 Brightness
• Seamless Design
Dual XD Engine™
• Magic Motion Remote
3,000,000:1 Dynamic Contrast Ratio
• Picture Wizard II
Smart Energy Saving
(Easy Picture Calibration)
4x HDMI™ V.1.3 with Deep Color (3 Rear, 1 side). • Intelligent Sensor
AV Mode II (Cinema, Sports, Game)
• Dual XD Engine
Clear Voice II
• ISFccc® Ready
LG SimpLink™ Connectivity
• 24P Real Cinema
Invisible Speaker System
• DivX® HD
100,000 Hours to Half Brightness (Typical)
• DNLA Certified® (JPEG Only)
PC Input
• SIMPLINK TM Connectivity
USB 2.0 (JPEG, MP3, MP4, Divx)
• Dolby® Digital 5.1 Decoder
NetCast™ Entertainment Access
• Infinite Sound
• Yahoo!® TV Widgets
Netflix® Instant Streaming Ready
• Vudu™ (Streaming)
YouTube™
• Picasa™ Web Albums AccuWeather®
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50PK950 Logo Familiarization Page 1 of 3
New definition television. LG’s INFINIA TVs are redefining home
entertainment. Even beyond their jaw-dropping design, they offer
access to virtually unlimited entertainment through broadband
connectivity and freedom with wireless HD capability.
The new black. Don’t let the lamp in the corner keep you from
seeing what’s going on in the movie. LG’s TruBlack Filter helps
block glare while boosting images on the screen to improve
picture quality and contrast ratio.
You don’t have to take our word for it that this is an amazing TV.
To earn THX certification, our TV’s passed more than 30
rigorous tests, ensuring you’re bringing an uncompromised HD
experience home - as the director wanted it.
Entertainment on tap. NetCast Entertainment Access brings the
best Internet services direct to your TV—no computer required.
Instantly access movies and TV shows, news and weather and
the world’s largest library of HD movies in 1080p.
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50PK950 Logo Familiarization Page 2 of 3
FULL HD RESOLUTION 1080P HD Resolution Pixels: 1920 (H) × 1080 (V)
Enjoy twice the picture quality of standard HDTV with almost double the pixel
resolution. See sharper details like never before. Just imagine a Blu-ray disc
or video game seen on your new LG Full HD 1080p TV.
HDMI (1.3 Deep Color) Digital multi-connectivity
HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,
10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors,
and also drastically improves the data-transmission speed.
Invisible Speaker
Personally tuned by Mr. Mark Levinson for LG
TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system,
guaranteeing first class audio quality personally tuned by Mr. Mark
Levinson, world renowned as an audio authority. It provides Full Sweet
Spot and realistic sound equal to that of theaters with its Invisible
Speaker.
Dual XD Engine
Realizing optimal quality for all images
One XD Engine optimizes the images from RF signals as another XD
Engine optimizes them from External inputs. Dual XD Engine presents
images with optimal quality two times higher than those of previous
models.
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50PK950 Logo Familiarization Page 3 of 3
AV Mode " One click " Cinema, THX Cinema, Sport, Game mode.
TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode
which allows you to choose from 4 different modes of Cinema, Sports
and Game by a single click of a remote control.
Clear Voice Clearer dialogue sound
Automatically enhances and amplifies the sound of the human voice
frequency range to provide high-quality dialogue when background
noise swells.
Save Energy, Save Money
It reduces the plasma display’s power consumption.
The default factory setting complies with the Energy Star requirements
and is adjusted to the comfortable level to be viewed at home.
(Turns on Intelligent Sensor).
Save Energy, Save Money
Home electronic products use energy when they're off to power features like clock
displays and remote controls. Those that have earned the ENERGY STAR use as much
as 60% less energy to perform these functions, while providing the same performance at
the same price as less-efficient models. Less energy means you pay less on your energy
bill. Draws less than 1 Watt in stand by.
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600Hz Sub Field Driving
(600 Hz Sub Field Driving)
•
600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)
•
No smeared images during fast motion scenes
Original Image
10 Sub Fields Per Frame
Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.
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50PK950 Remote Control
BOTTOM PORTION
p/n AKB729140002
TOP PORTION
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50PK950 Rear and Side Input Jacks
Either USB port for Software Upgrades,
Music, Videos and Photos and the
Wireless Dongle
USB 2
AC In
USB 1
SIDE
INPUTS
HDMI 4
Wireless
Media Box
Remote
Jack
Cat 5
LAN
REAR
INPUTS
Composite
Video/Audio
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Accessing the Service Menu
To access the Service Menu.
1) You must have either Service Remote.
p/n 105-201M or p/n MKJ39170828
2) Press “In-Start”
3) A Password screen appears.
4) Enter the Password.
Note: A Password is required to enter the
Service Menu. Enter; 0000
Note: If 0000 does not work use 0413.
MKJ39170828
105-201M
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Software Updates (New and Changed Functions)
A wireless Internet Connection will work for Automatic Software Downloads., however if there are
problems completing download, a Wired Internet Connection is preferred
For network setup assistance, press the
green button for the Simple Manual
Bring up the Customer’s
Menu then Press the Red
button on Remote
Scroll down to item 9 Network Connections
With Software Update
Highlighted, Press Select
on Remote
Continue on next page
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Plasma
Software Updates (New and Changed Functions) Continued
Automatic Internet Software Update
- Off : Automatic Software update does not work
- On : if new Software released, Software
download notice appears at turn on with two
choices, Yes and Remind Me Later.
Check Update version
- comparison current software version and
Released software version
Additional TV Checks can be made by
Scrolling down.
Picture, Sound and Network Test
After completion of the test, a Pop up menu is
displayed with preloaded back ground picture.
Select NO if everything is OK.
If you select Yes;
Service call number, Model name,
SW version and serial No. is displayed.
Note: Confirm the “Suffix” of the model
number.
If the Main board is replaced, the Model
and Serial number must be reinserted
into memory. See Model Number D/L.
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Generic Plasma USB Automatic Software Download Instructions
1) Download the Software File.
Currently Installed Version
Software Version found on
the USB Flash Drive
File found on the USB
Flash Drive
2) Copy new software (xxx.bin) into the root of the
Jump Drive. Make sure you have the correct
software file.
3) With TV turned on, insert USB flash drive.
4) You can see the message
“TV Software Upgrade” (See figure on right)
5) Cursor left and highlight " START " Button and
push “Enter” button using the remote control.
6) You can see the download progress Bar.
7) Do not unplug until unit has automatically
restarted.
8) When download is completed, you will see
“COMPLETE”.
9) Your TV will be restarted automatically.
Highlight Start Press Select
* CAUTION:
Do not remove AC power or the USB Flash Drive.
Do not turn off Power, during the upgrade
process.
Software Files are now available from
LGTechassist.com
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Manual Software Download:
Prepare the Jump Drive as described in the “USB Automatic Download” section and insert it into either of the USB ports.
Bring up the Customer’s Menu and scroll to “OPTIONS”.
Press the “FAV” key 7 times to bring up the first screen for Manual Download Screen (Expert Mode).
Highlight TV Software
Update and press
“SELECT” to bring up
the next screen.
Example of files found
On the Jump Drive
When Touch Sensor Update files
become available
Highlight the Software update file and
press “SELECT” to begin the download
process.
When Control Board ROM Update files
become available
WARNING:
Use extreme Caution when using the Manual “Forced” Download Menu. Any file can be
downloaded when selected and may cause the Main board to become inoperative if the
incorrect file was selected.
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Service Menu: Adding the Model and Serial Number
Bring up the Service Menu using the Service Remote.
Scroll down to item 6. Model Number D/L to highlight.
Press “Select” or “Cursor Right”.
Change the Model and Serial Number to match.
To Change the Model Number
Use the cursor right or left to select the area to
change. Use the cursor up or down to change.
Cursor right until there is no text cursor blinking.
Scroll down to highlight “Serial Number” and change.
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Plasma
Service Menu: Panel Control Shows Control Board Information
At the bottom right you can see the Panel Model Number, Control board Software Version
and the Panel Temperature
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Plasma
Service Menu: Downloading EDID Data Pg 1 of 2
1) Press “ADJ” key.
2) Select menu,
Either “PCM EDID D/L” or AC3 EDID D/L
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Service Menu: Downloading EDID Data Pg 2 of 2
3) Highlight “Start”
then Press “Select” key.
4) When Writing appears
Downloading in progress
5) Downloading Complete
When PCM EDID D/L was selected
When AC3 EDID D/L was selected
Note: When PCM is downloaded, AC3 will be N/G and when AC3 is downloaded PCM will be N/G.
This means that when PCM is OK, PCM audio is priority and when AC3 is OK, AC3 audio is
priority.
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50PK950 Dimensions
Power Consumption:
504 Watts (Typical)
0.1 Watts (Stand-By)
There must be at least 4 inches of Clearance on all sides
2-1/8 "
53.98mm
46-7/8 "
1191.26mm
5-1/2 "
140mm
15-9/16 "
396mm
15-3/4 "
400mm
31-1/2 "
800.1mm
15-3/4 "
400mm
29 "
736.6mm
Model No.
Serial No.
Label
Remove 4 screws
to remove stand
for wall mount
2-1/2 "
63.5mm
Weight:
76.7 lbs with Stand
66.6 lbs without Stand
20-7/8 "
530mm
28
7-13/16 "
198mm
4-7/16 "
113m
11-5/8 "
294.64mm
October 2010
50PK950
Plasma
DISASSEMBLY SECTION
This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 50PK950 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a better
understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.
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Plasma
Removing the Back Cover
Caution: The Back may have very sharp edges
To remove the back cover, remove the 29 screws
Indicated by the arrows.
(The Stand does not need to be removed).
PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH
Of the screws when replacing the back cover.
Improper type can damage the front.
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Plasma
Circuit Board Layout
Identifying the Circuit Boards
FPC
Panel Voltage and Panel ID Label
FPC
Y-Drive Upper
FPC
FPC
Z-SUS
FPC
Power Supply
(SMPS)
FPC
FPC
Y-Drive Lower
FPC
Y-SUS
FPC
Z-SUB
Control
FPC
TCP
Heat Sink
AC In
Left “X”
Right “X”
Center “X”
FPC
Main Board
Side
Input
(part of
main)
Conductive Tape
Conductive Tape
IR/LED
Board
Soft Touch
Keypad
Invisible
Speaker
Center
LOGO Board
31
Motion Remote
Board
October 2010
Invisible
Speaker
50PK950
Plasma
P104
Z-SUS
Board
p/n: EBR62294201
P105
P103
SC101
L
N
P118
P106
P813
p/n: EBR63526901
P209
P22
n/c
P2
P702
P1
CONTROL
P31
Board
P101
P114
P902
P700 n/c
P703
Y-DRIVE
LOWER
Board
P102
P104
P300
P400
P900
n/c
MAIN
Board
P204
AC
In
P1001
LEFT X
Board
P110 P120
P220
p/n: EBR63522201
CENTER X
Board
p/n: EBR63522101
P210
P221 P320 P310
RIGHT X
Board
p/n: EBR63520701
p/n: EBR65007705
P100
P101
FRONT IR
Speakers (Front Right)
p/n: EAB60962801
J1
Motion Remote Board
LOGO Board
p/n: EBR64966601
p/n: EBT61069102
Speakers (Front Left)
p/n: EAB60962801
Front “Soft Touch” Key Pad The Key Pad is a thin strip of static sensitive material attached to the front glass. It is not removable.
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P203
P101
P121
P202
P107
p/n: EBR62294101
P201
Y-SUS
Board
P201
Z-SUB
Board
SMPS
POWER SUPPLY
Board
P117
p/n: EBR62294001
P202
p/n: EBR63035301
P102
P811
p/n: EAY60968801
P109
P203
p/n: EBT60955910 50PK950-UA AUSALHR
p/n: EBR68027905 50PK950-UA AUSALJR
p/n: EBT60955914 50PK950-UA AUSALUR
p/n: EBT60955914 50PK950-UA AUSLLUR
P812
P113
P103
P102
MAIN
Board
Y-DRIVE
UPPER
Board
p/n: EBR62293901
P101
50PK950 Connector Identification Diagram
Disassembly Procedure for Circuit Board Removal
Note:
Remove AC Power before doing any circuit board removal procedures.
Switch Mode Power Supply Board Removal
Disconnect the following connectors: P811, P812, P813 and SC101.
Remove the 7 screws holding the SMPS in place.
Remove the board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Also, re-confirm VSC, -Vy and Z-Bias as well.
Note: The Y-SUS does not come with the
connectors between the Y-SUS and Y-Drive
Y-SUS Board Removal
Disconnect the following connectors: P113, P114 and Ribbon Cable P101.
Remove the connectors P117 and P118 by pressing in on the locking mechanism and lifting upward.
Remove the 15 screws holding the Y-SUS in place. Do not run the set with P117 or P118 removed.
Remove the Y-SUS board. When replacing, be sure to readjust the Va/Vs voltages in accordance with the
Panel Label.
Confirm VSC, -Vy and Z-bias as well.
Note: The Y-SUS does not come with the
Board Standoff
Y-Drive Boards Removal
connectors between the Y-SUS and Y-Drive
Disconnect the following Flexible Ribbon Connectors P101~P104 and/or P201~P204:
Disconnect the following Connectors P109 and/or P209 by pressing in on the locking
mechanism and lifting upward. Do not run the set with these connectors removed.
Remove the 6 screws holding either of the Y-Drive Boards in place.
Collar
Lift up slightly, then slide to the left. Remove the Y-Drive Board.
Note: Y-SUS, Z-SUS and Y-Drive Boards are mounted on board stand-offs that have a small collar.
The board must be lifted slightly to clear these collars. Behind each board are Rubber pieces that act as a
cushion. They may make the board stick when removing.
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Disassembly Procedure for Circuit Board Removal (2)
Z-SUS Board Removal
Disconnect the following connectors: P102 and P107.
Remove the 10 screws holding the board in place.
Lift up slightly to clear the screw stand-offs and pull the Z-SUS to the left to unseat P103, P105 and P106
from the Z-SUB board and remove the board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VS, -Vy and Z-bias as well.
Z-SUB Board Removal
Disconnect the following connector: P102 and remove P107 by pulling the locking mechanism upward
and remove the flexible ribbon cable.
Remove the 10 screws holding the board in place.
Remove the Z-SUB board.
Main Board Removal
Disconnect the following connectors: P902 LVDS (press inward on the locking tabs), P400, P703 and
P300. Remove the 4 screws holding the Main board in place and Remove the board.
Control Board Removal
Disconnect the following connectors: P31 LVDS, P1 Ribbon, P2, and P101, P102, P104 Ribbons by
lifting up the locking tab. Remove the 2 screws holding the Control board in place. Lift up the Control
board to unseat it from the two metal supports at the bottom and Remove the board.
Front IR and Key Pad Removal
FRONT IR/INTELLIGENT SENSOR and POWER BUTTON:
Remove the 2 screws. Remove the Board.
Disconnect P100 and P101. Note: P101 is a ribbon connector. Lift up the locking mechanism and
slide the ribbon cable out.
KEY PAD:
The Key Pad is a thin strip of static sensitive material attached to the front glass. It is not removable.
34
October 2010
50PK950
Plasma
X Drive Circuit Board Removal
Remove AC and Lay the Television down carefully on a padded surface.
Make sure to use at least two people for this process so as not to flex the panel glass.
Refer to next 3 pages for disassembly and precautions.
a)
b)
c)
d)
e)
Remove the Back Cover.
Remove the Stand (4 Stand Screws were removed during back removal).
Remove the Stand Metal Support Bracket (5 Screws) 2 Plastic tap thread and 3 Metal thread.
Remove the Vertical support Braces marked “E”.
Note: There is a Left and a Right brace. (5 Screws per/bracket) 2 Plastic tap thread and 3 Metal
thread.
(Note, the right brace has a Grounding wire from the AC input which must also be removed).
Remove the 13 screws holding the Heat Sink. (Warning: Never run the set with this heat sink
removed).
To remove the heat sink, lift up to release the tacky Chocolate (heat transfer material) and slide the
heat sink to the left to clear the connector wires on the right side.
Note: There are two large pieces of conductive tape on the right side of the Right X Board that must
be removed.
Also, note that there are several pieces of Chocolate heat transfer material attached all the way across
the underside of the heat sink.
X-DRIVE LEFT, CENTER AND RIGHT REMOVAL:
Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to
the board.
Remove the 5 screws holding the defective X-Drive board in place.
Remove the board. Reassemble in reverse order. Recheck VA / VS / VSC / -VY / Z-Bias.
35
October 2010
50PK950
Plasma
Getting to the X Circuit Boards
With Stand removed
D
Left
D
Right
C
Warning:
Never run the TV with the
TCP Heat Sink removed
E
Heat Sink
Ground
Wire
C
B
Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.
36
October 2010
50PK950
Plasma
Left and Right X Drive Connector Removal
See below to Remove the Connections on the X-Boards.
From the Control Board to the X-Boards.
There may be tape on these connectors.
P110
P210
P310
Are all the
same
Disconnect connector P121
Va from
the
Y-SUS to
Left X
Only
Example
Disconnect Va from Left to Center to
Center to Right X Boards
Example
Remove tape (if present) and Gently pry the
locking mechanism upward and remove the ribbon
cable from the connector.
P120 to P220
Left to Center X
P221 to P320
Center to Right X
Example
Carefully lift the TCP ribbon up and off.
It may stick, be careful not to crack TCP.
(See next page for precautions)
Removing Connectors to the TCPs.
TCP
Gently lift the locking mechanism
upward on all TCP connectors
Left X: P101~108
Center X: P201~207
Right X: P301~308
Cushion (Chocolate)
37
Example
Flexible ribbon cable connector
October 2010
50PK950
Plasma
TCP (Tape Carrier Package) Generic Removal Precautions
Tab
Lift up the locking mechanism as shown to
release the ribbon cable.
(The Lock can be easily damaged, and
needs to be handled carefully.)
Tab
Separate the TCP Ribbon Cable from
the connector as shown.
TCP Film can be easily damaged.
Handle with care.
Tab
The TCP Ribbon Cable has two
small tabs on each side which help
secure it into the connector. They
have to be lifted up slightly to pull
the Ribbon Cable out.
Note: TCP is usually stuck down
to the Chocolate heat transfer
material, be Very Careful when
lifting up on the TCP ribbon cable.
Tab
38
October 2010
50PK950
Plasma
Left and Right X Drive Removal
Remove the 5 screws in any X-Board. 15 total for all three.
The Left X Board passes drive signals to 8 TCP’s on the right side of the screen
The Center X Board passes drive signals to 7 TCP’s in the center of the screen
The Right X Board passes drive signals to 8 TCP’s on left side of the screen
39
October 2010
50PK950
Plasma
CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION
50PK950 Plasma Display
This Section will cover Circuit Operation, Troubleshooting of the Power
Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board,
Main Board and the X Drive Boards. Alignment of the Power Supply,
Y-SUS Board and the Z-SUS Board.
At the end of this Section the technician should understand the operation
of each circuit board and how to adjust the controls. The technician
should be able to troubleshoot a circuit board failure, replace the defective
circuit and perform all necessary adjustments.
40
October 2010
50PK950
Plasma
50PK950 Signal and Voltage Distribution Block
Y Drive
Upper
FPCs
5VFG (5V) measured
from Floating Ground
SMPS OUTPUT VOLTAGES IN STBY
STB +5V
SMPS TURN ON SEQUENCE
SMPS OUTPUT VOLTAGES IN RUN
AC Det, STB5V, +5V, 17V to Main Board
Vs, Va and M5V to Y-SUS,
Vs to Z-SUS Board
Step 1: RL ON 17V, AC Det)
Step 2: M5 On +5V, Error Det, M5V, Va, Vs
15VFG (15V) measured
from Floating Ground
P101
P102
P103
P109
P101
P103
P104
FG5V
Drive Data
Clock (i2c)
Y-Drive
FG
P811
P812
P113
M5V, Vs, Va
P117
Floating Gnd (FG)
Drive Signals, FG5V
and Y-Drive.
Note:
Va not used
by Y-SUS only
fused and routed
to the X-Board
SMPS
Board
P202
P209
P204
18V / M5V
Note: 18V not used
by Control
RL_ON +17V, AC Det
M5 On +5V, M5V,
17V, Va, Vs
P2
CONTROL
Board P31
P101
P104
P102
+3.3V
To Motion
Remote
+5V
To LOGO
3.3V
P210
X-Board-Left
P110
P120
P220
P211 P311 P331
X-Board-Center
P232
P202
P203
P204
P205
P102
P106
P103 P202
Z-SUB
Board
P400
P203
FPCs
Speakers
MAIN Board
3.3V
Key Board
Pull Up
P703
P300
IR,
Soft Touch Keys
Intelligent Sensor P101 And Power Button
P100
P310
P320
P221
Va
P201
5V STBY
3.3V
3.3V
P1001
P702
P902
3.3V
RGB Logic
Signals
RGB Logic
Signals
P121
P101
P103
Display Enable Set in Stand By:
STB +5
LVDS Video
3.3V
Display Panel Horizontal
Electrodes Reset, Sustain
P201
P105
18V / M5V
3.3V 3.3V
Va
FPCs
P107
P1
P101
Z-Drive
P102
Logic Signals
To Y-SUS and Y-Drive
P114
Y Drive
Lower
Vs
Z-SUS
Board
Z Drive Control
Signals
FG5V
FG15V
18V
VSC
-VY
P118
Floating Gnd (FG)
Drive Signals, FG5V
and Y-Drive.
P203
P814
AC
Input
Filter
FPCs
FG5V
Drive Data
Clock (i2c)
Y-Drive
FG
SMPS
Turn On
Commands
SK101
Y-SUS Board
P201
Display Panel
Horizontal
Electrodes
Sustain
X-Board-Right
Va
P206
P301
P302
P303
P304
P305
P306
Display Panel Vertical Address (Colored Cell Address)
41
October 2010
50PK950
Plasma
Panel Label Explanation
(1)
(2)
(11)
(3)
(4)
(5)
(6)
(10)
(9)
(8)
(12)
(13)
(14)
(15)
(7)
(1) Panel Model Name
(2) Bar Code
(3) Manufacture No.
(4) Adjusting Voltage DC, Va, Vs
(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb)
(6) Trade name of LG Electronics
(7) Manufactured date (Year & Month)
(8) Warning
42
(9) TUV Approval Mark (Not Used)
(10) UL Approval Mark
(11) UL Approval No.
(12) Panel Model Name
(13) Max. Watt (Full White)
(14) Max. Volts
(15) Max. Amps
October 2010
50PK950
Plasma
Adjustment Notice
All adjustments (DC or Waveform) are adjusted in WHITE WASH.
Customer’s Menu, Select “Options”, select “ISM” select “WHITE WASH”.
It is critical that the DC Voltage adjustments be checked when;
1) SMPS, Y-SUS or Z-SUS board is replaced.
2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel
3) A Picture issue is encountered
4) As a general rule of thumb when ever the back is removed
ADJUSTMENT ORDER “IMPORTANT”
DC VOLTAGE ADJUSTMENTS
1) POWER SUPPLY: VS, VA (Always do first)
2) Y-SUS: Adjust –Vy, VSC
3) Z-SUS: Adjust Z-Bias (VZB)
WAVEFORM ADJUSTMENTS
1) Y-SUS: Set-Up, Set-Down
The Waveform adjustment is only necessary
1) When the Y-SUS board is replaced
2) When a “Mal-Discharge” problem is
encountered
3) When any abnormal picture issue is
encountered
Set-Up
Remember, the Voltage Label MUST be followed,
it is specific to the panel’s needs.
Power Supply
-Vy
Vsc
Ve
ZBias
Panel
“Rear View”
All label references are from a specific panel.
They are not the same for every panel encountered.
43
October 2010
50PK950
Plasma
SWITCH MODE POWER SUPPLY SECTION
This Section of the Presentation covers troubleshooting the Switch Mode Power Supply.
Upon completion of the section the technician will have a better understanding of
the operation of the Power Supply Circuit and will be able to locate test points needed for
troubleshooting and alignments.
• DC Voltages developed on the SMPS
• Adjustments VA and VS.
Always refer to the Voltage Sticker on the back of the panel, located at the upper Center,
for the correct voltage levels for the VA and VS supplies as these voltages will vary from
Panel to Panel even on the same Model.
SMPS P/N EAY60968801
Check the silk screen label on the top center of the Power Supply board to identify the correct part
number. (It may vary in your specific model number).
On the following pages, we will examine the Operation of this Power Supply.
44
October 2010
50PK950
Plasma
Switch Mode Power Supply Overview
SMPS p/n: EAY60968801
The Switch Mode Power Supply Board Outputs to the :
VS
Used to develop Bias Voltages on the Y-SUS, Z-SUS Boards.
VS
Drives the Display Panel’s Horizontal Electrodes.
Microprocessor Circuits
17V
Audio B+ Supply, Tuner B+ Circuits
5V
Main Board
To Y-SUS, fused then to the X-Boards. (Not used by Z-SUS).
Primarily responsible for Display Panel Vertical Electrodes.
STBY 5V
Z-SUS Board
VA
M5V
Y-SUS Board
Drives the Display Panel’s Horizontal Electrodes.
Signal Processing Circuits
AC_Det and Error_Det
Adjustments
There are 2 adjustments located on the Power Supply Board VA and VS. The
M5V is pre-adjusted and fixed. All adjustments are made referenced to Chassis
Ground. Use “Full White Raster” 100 IRE
VS
VR901
VA
VR501
45
October 2010
50PK950
Plasma
50PK950 SMPS Layout Drawing
POWER SUPPLY
p/n: EAY60968801
P812
T901
Va Vs
TP TP
F801
0.8V STBY
390V Run
D603
At Power Off
3sec 1st click
4sec 2nd click
Q802
IC301
Hot
Ground
F302
2.5A/250V
F302
158V
STBY
390V Run
D355
D351
D352
T301
L601
L602
P812
1-2) VS
3) n/c
4-5) Gnd
6-7) VA
8) Gnd
9-10) M5V
VR501
VA Adj
Q501
Q601
Q603
D501
T902
Hot
Ground
D602
D902
D901
Q801
F801
4A/250V
P811
VR901
VS Adj
Q356
a
Note: The RL_On command turns
on the 17V and AC_DET.
Note: The M-On command turns
on +5V, M5V, Va and Vs.
c
Note: The Error Det line is not
used in this model.
d
Note: If the AC Det line is
Missing, the TV will not turn on,
except the Relays, then no other
functions. LOGO On.
e
Note: Pin 18 is grounded on the
Main. If opened, the power
supply turn on automatically.
b
D102
RL101
D101
Example Panel Label:
Model : PDP 50R1###
Voltage Setting: 5V/ Va:60/ Vs:203
N.A. / -190 / 150 / N.A. / 115
Max Watt : 450 W (Full White)
VA
VS
RL103
F101
10A/250V
P813
AC In
SC101
Input: 100~240V 50/60Hz 5.8A
17V = 1.7A
5.1V = 3.0A
STBY5V (5V) = 1.0A
VS 195~204V = 1.9A
VA 60V = 2.5A
M5V (5.1V) = 3.5A
PDP Module MAX 450W
CURRENT LABEL
46
n/c
P811
1-2) VS
3) n/c
4-5) Gnd
6-7) VA
8) Gnd
9-10) M5V
Pin
Label
STBY
Run
Diode
0V
16.9V
3.186V
1, 2
a
3, 4
Gnd
Gnd
Gnd
Gnd
5, 7
b
5V
0.4V
5.19V
1.16V
3.09V
17V
c
Error Det
3.47V
4.11V
9-12
Gnd
Gnd
Gnd
Gnd
13-14
Stby 5V
3.49V
5.15V
2.55V
0V
3.26V
Open
0V
4.07V
3.06V
M_ON
0V
3.26V
Open
Auto_Gnd
Gnd
Gnd
Open
8
15
a
16
ad
RL_ON
AC_Det
b
17
18
October 2010
e
50PK950
Plasma
Power Supply Circuit Layout
SMPS p/n: EAY60968801
P811
P812
VS VR901
To Z-SUS
To Y-SUS
VS Source
Fuse F801
0.8V Stby
390V Run
4Amp/250V
VA Source
VA VR501
Fuse F302
158V Stby
390V Run
17V Source
PFC
Circuit
2.5Amp/250V
Bridge
Rectifiers
RL104
RL103
STBY 5V,
5V Source
N/C
To MAIN
P813
10Amp/250V
47
Main Fuse
F101
AC Input
SC 101
October 2010
50PK950
Plasma
Power Supply Basic Operation
AC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly, routed to the two Bridge
Rectifiers D101 and D102 which then route the primary voltage to the PFC circuit (Power Factor Controller). Standby 5V is
developed from 158V source supply (which during run measures 390V measured from the primary fuse F302).
This supply is also used to generate all other voltages on the SMPS.
The STBY5V (standby) is B+ for the Controller chip on the back of the board (IC701) on the SMPS and output at P813 pins
13 and 14 then sent to the Main board for Microprocessor (IC701) operation (STBY 3.49V RUN 5.15V).
When the Microprocessor (IC701) on the Main Board receives a “POWER ON“ Command from either the Power button
or the Remote IR Signal, it outputs a high (3.26V) called RL_ON at Pin 15 of P813. This command causes the Relay Circuit
to close both Relays RL101 and RL103 bringing the PFC circuit up to full power by increasing the 170V standby to 390V run
which can be read measuring voltage at Fuse F302 and F801 (390V) from “Hot” Ground. AC Detection (AC Det) is
generated on the SMPS, by rectifying a small sample of the A/C Line and routed to the Controller (IC701) where it outputs
at P813 pin 16 (4.07V) and sent to P400 to the Main Board where it is sensed and monitored by the Main Microprocessor
(IC701). If AC Det is missing the set will not come on, the relays will click when RL_ON arrives, but then no other functions
from that point.
When RL_ON arrives, the run voltage +5V source becomes active and is sent to the Main Board via P813 (+5V at pin
5, 6 and 7). The (Error Det) from the SMPS Board to the Main Board can be measured at pin 8 of P813 (3.47V STBY and
4.11V RUN), but it is not used. The RL-ON command also turns on the 17V (Audio B+) which is also sent to the Main
Board. The 17V (16.9V) Audio supply outputs to the Main board at P813 pins 1 and 2 and used for Audio processing and
amplification as well as Tuner B+ once its stepped down to TU-5V.
The next step is for the Microprocessor IC701 on the Main Board to output a high (3.28V) on M_ON Line to the SMPS at
P813 Pin 17 which is sensed by the Controller IC701, turning on the M5V line and outputs at P812 pins 1 and 2 to the
Y-SUS board.
The Controller (IC701) also uses the M_ON line to turn on the VA and the VS supplies. (Note there is no VS On Command
in this set). VS is output at P811 to the Z-SUS board and VS and Va are output on P812 to the Y-SUS board P113.
(VA pins 4 and 5 and VS pins 9 and 10). Note: The Va is fused on the Y-SUS then routed out P114 to the X-Board Left.
AUTO GND Pin 18 of P813: This pin is grounded on the Main board. When it is grounded, the Controller (IC701) works in
the normal mode, meaning it turns on the power supply via commands sent from the Main board. When AUTO GND is
floated (opened), it pulls up and places the Controller (IC701) into the Auto mode. In this state, the Controller turns on the
power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.
48
October 2010
50PK950
Plasma
50PK950 Television Turn On Sequence
F302 In Stand-By Primary side is 158V
In Run (Relay On) Primary side is 390V
F801
POWER SUPPLY
Stand-By 0.8V
(SMPS)
Run 390V
AC In
1
STBY
3.48V
RUN
5.15V
17V
Reg
2
8
M5V
Reg
Vs
Reg
Va
Reg
Vs
Va
5V
7
9
Vs
M5V
Vs
8
9
7
9
8
17V
6
6
6
9
Va
5
Stand By Error Det.
5V
6
9
+5V
Regulator
Stand
By 5V Reg
AC
Det.
7
RL On
M_On
5
7
Not
Used
Y-SUS
Va
Error Det.
7V
17V
Via Audio
IC404 IC300
AC Det.
If missing,
set will not
turn on.
3.3V Reg
IC400
Reset
IC707
+5V HDMI
EDID
And other
circuits
3.3VST
2
3
Tuner
5V
Via
IC405
5
Error Relay
Det. On
Microprocessor
IC701
M5V On
18V
8
At point 3
TV is in
Stand-By
state. It is
Energy Star
Compliant.
Less than 1
Watt
3.3V
7
7
Y DRIVE Upper
8
X PWB
Left
Va
8
STBY 5V
2
Power On
4
Front IR
Board
Remote Power Key
49
7
3.3V
7
MAIN
Board
7
18V / M5V
Y DRIVE Lower
8
M5V
7
18V / M5V
7
5V
Floating
Gnd
7
4
Z-SUS
5VFG
8
CONTROL
October 2010
X PWB
Center
Va
8
X PWB
Right
Soft
Touch
Key Pad
Power Key
50PK950
Plasma
Turn On Sequence Text
The text below is related to the previous page.
STBY 5V (Stepped down to 3.3V_ST by IC400) powers on the Microprocessor IC701 on the Main board. This also starts
the 10Mhz Oscillator (X700) however, the Microprocessor is not functional until after it is Reset. The Reset circuit (IC701)
is energized when 3.3V_ST arrives.
AC Det is 0V when the set is in Stand-By, but rises to 4.07V when the set turns on by the Relay-On Command. AC Det is
routed to the Microprocessor. If AC Det is missing, the TV will not turn on. The Relays will engage, but after that, no
other functions.
At power on the 1st output from the Microprocessor is, the Relay On command called (RL-ON) which turns on
the following SMPS supplies: +5V for Video Processing 17V for Audio Amplification and Tuner B+.
On the Main board, 17V is stepped down to 7V (IC404) then 5V (5V_TU by IC405). The 17V is also sent to the Audio Amp
(IC300). The SMPS (+5V) creates a signal called (ERROR DET) and is sent to the Main Board. ERROR DET is Not used by
the Main board.
The 2nd output from the Microprocessor is the (M_ON) command which turns on (3) supplies:
(1) M5V (Monitor 5V): For the Control Board, Y-SUS Board and Z-SUS Board. (The M5V is routed through the Y-SUS
to the Control Board then to the Z-SUS).
(2) Va: (Voltage for Address) For amplification voltage for the TCPs driving the vertical electrodes. (Voltage routed
through the Y-SUS then to the X-Drive boards.
(3) Vs: Voltage for Sustain sent to the Y-SUS and to the Z-SUS) used for amplification voltage driving the horizontal
electrodes.
On the Y-SUS, when M5V arrives, it develops 3 voltages: FG15V, FG5V (FG=Floating Ground) and 18V.
The 18V is routed through the Control board to the Z-SUS. The FG5V is routed to the Y-Drive boards for the low voltage
processing voltage. When Vs arrives on the Y-SUS, it develops 2 additional voltages; -Vy and VSC which are adjustable.
When the M5V from the SMPS through the Y-SUS arrives on the Control board, the control develops 3.3V and 1.8V for
internal use and 3.3V which is routed down to the each X-Board for each TCP’s low voltage processing voltage.
50
October 2010
50PK950
Plasma
Power Supply Va and Vs Adjustments
Example
Voltage Label
Important: Use the Panel Label
Not this book for all voltage adjustments.
Model : PDP 50R1###
Voltage Setting: 5V/ Va:60/ Vs:203
N.A. / -190 / 150 / N.A. / 115
Max Watt : 450 W (Full White)
VA
Voltage
Use Full White Raster “White Wash”
Va TP
P812
Pin 6 or 7
VS
Voltage
Vs TP
P812
Pin 1 or 2
Vs Adjust:
Place voltmeter on VS TP.
Adjust VR901 until the reading
matches your Panel’s label.
Va Adjust:
Place voltmeter on VA TP.
Adjust VR501 until the reading
matches your Panel’s label.
51
October 2010
50PK950
Plasma
Power Supply Static Test with Light Bulb Load
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs
turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If
this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk
screen on the SMPS and place each supply voltage under the appropriate load.
1
Pins
or
100W
VS
100W
Pins
P812
2
4
Va
TP
Gnd
or
5
or
P811
VR901
VS Adj
P811 or P812
T901
Vs
TP
Check Pins 1 or 2
for Vs voltage
P811 or P812
T902
F801
4A/250V
Check Pins 6 or 7
for Va voltage
VR501
VA Adj
8
F302
2.5A/250V
T301
L601
RL101
RL103
L602
AC In
SC101
Note:
To turn on the Power Supply;
1) With Main Board connected, press power.
2) Without Main Board connected SMPS will turn on automatically.
n/c
F101
10A/250V
Pin 1
(Front Left)
P813
Note:
Always test the SMPS under a
load using the 2 light bulbs.
Abnormal operational
conditions may result if not
loaded.
P813
Check Pins 13 or 14
for 5V SBY (5.13V)
Check Pin 8
for Error Det (4.1V)
Any time AC is applied to the SMPS, STBY 5V will be 3.49V and
will be 5.13V when the set turns on.
AC DET WILL NOT be present until set comes on.
If AC Det is missing, the TV will NOT come on.
Check Pins 1 or 2
For 17V (17.3V)
Check Pin 5,6 and 7
for (+5.17V)
Check Pin 16
for AC Det (4.06V)
52
October 2010
50PK950
Plasma
Power Supply Static Test (Forcing on the SMPS in stages)
WARNING: Remove AC when adding or removing any jumper, plug or resistor.
TEST CONDITIONS:
Connectors going to the Y-SUS P812 and Z-SUS P811 are disconnected.
P400 on the Main board disconnected (coming in on P813).
Use the holes on the connector P400 (Main Board side) to insert the resistors and jumper lead.
Connect (2) 100 Watt light bulbs in series between VS and Ground.
When the supply is operational in its normal state the Auto Ground line at Pin
18 of P813 is held at ground by the Main Board.
This Power Supply can be powered on sequentially to test the Controller
Chip IC701 operational capabilities and for troubleshooting purposes.
By disconnecting P400, pin 18 is opened. To return the SMPS to the normal
state for this test procedure, this pin must be grounded.
(See first step A below).
Note: Leave previous installed 100Ω resistor in place
when adding the next resistor.
(A) Ground the Auto Gnd Line (Pin 18) will allow the supply to be
powered up one section at a time.
(B) Add a 100Ω ¼ watt resistor from 5V Standby to RL_ON and the 17V
and 5V Run Lines on P813 will become active. Also AC-Det (4.06V)
and Error_Det (4.1V) become active.
(C) Add a 100Ω ¼ watt resistor from any 5V line to M_ON to make the
(Monitor) M5V, VS and VA lines operational.
P811, P812 (VS pins 1 and 2) and (VA pins 5 and 6).
53
October 2010
50PK950
Plasma
SMPS Connector P813 Identification, Voltages and Diode Check
P813 Connector “SMPS " to “Main " P400
Pin
Label
STBY
Run
1-2
a
17V
0V
17.3V
3.186V
3-4
Gnd
Gnd
Gnd
Gnd
5-7
a
5V
0V
5.17V
1.16V
Error Det
3.47V
4.1V
P813
Diode Mode
3.09V
8
ac
9-12
Gnd
Gnd
Gnd
Gnd
13-14
Stby 5V
3.49V
5.13V
2.55V
15
RL On
0V
3.26V
Open
AC Det
0V
4.06V
3.06V
M_ON
0V
3.28V
Open
Auto Gnd
Gnd
Gnd
1
Open
16
ad
17
b
18
e
Note: This connector has two
rows of pins.
Odd on bottom row.
a Note: The 17V, 5V, AC_Det and Error Det turn on when the RL_On command arrives.
b Note: The M5V, Va and Vs turn on when the M_On (Monitor On) command arrives.
c Note: The Error Det line is not used in this model.
d Note: If the AC Det line is Missing, the TV will not turn on. (Relays will click, then no functions).
e Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on
Automatically when AC is applied.
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
54
October 2010
50PK950
Plasma
SMPS Connector SC101 and P811/P812 Identification, Voltages and Diode Check
SC101 AC INPUT
Connector
SC101
Pin Number
L and N
Standby
Run
120VAC
120VAC
P812 " Power Supply“ to Y-SUS “P113”
P811 " Power Supply“ to Z-SUS “P102”
P812
Pin
1, 2
*Vs
*203V
n/c
n/c
Gnd
Gnd
Gnd
*Va
*60V
Open
8
Gnd
Gnd
Gnd
9, 10
M5V
5V
P811
Open
n/c
Open
Diode Mode
6, 7
Vs TP
Run
4, 5
Va TP
Label
3
1
Diode Mode
2.16V
1
* Note: This voltage will vary in accordance with Panel Label
P102 Z-SUS does not use Va or M5V from P811.
M5V routed through Y-SUS, Control board, in on P107.
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
55
October 2010
50PK950
Plasma
Y-SUS BOARD SECTION
(Overview)
Y-SUS Board develops the Y-Scan drive signal to the Y-Drive boards.
This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board.
Upon completion of the Section the technician will have a better understanding of the
operation of the circuit and will be able to locate test points needed for troubleshooting and
alignments.
• Adjustments
• DC Voltage and Waveform Checks
• Diode Mode Measurements
Operating Voltages
SMPS Supplied
VA
VS
M5V
VA supplies the Panel’s Vertical Electrodes (Routed to the Left X-Board)
VS Supplies the Panel’s Horizontal Electrodes.
M5V Supplies Bias to Y-SUS. (From Y-SUS routed to the Control Board then Z-SUS).
Y-SUS Developed
-VY VR302
VSC VR301
V SET UP VR402
V SET DN VR401
18V
Floating Ground
FG 5V
FG 15V
-VY Sets the Negative excursion of Reset in the Drive Waveform
VSC Sets the amplitude of the complex waveform.
SET UP sets amplitude of the Top Ramp of Reset in the Drive Waveform
SET DOWN sets the Pitch of the Bottom Ramp for Reset in the Waveform
Used internally to develop the Y-Scan signal. (Also routed to the Control Board
then routed to the Z-SUS board).
Used on the Y-Drive boards (Measured from Floating Gnd)
Used in the Development of the Drive Waveform (Measured from Floating Gnd)
-Vy and VSC generated when Vs arrives on the board. FG5V, FG15V and 18V generated when M5V arrives on the board.
56
October 2010
50PK950
Plasma
Y-SUS Block Diagram
Distributes Vs
Power Supply Board - SMPS
Simplified Block Diagram of
Y-Sustain Board
Y-SUS Board
Distributes
VA
Left X Board
Distributes Vs, Va and M5V
Distributes
18V / M5V
Receive M5V, Va, Vs
from SMPS
VA
Circuits generate
Y-Sustain Waveform
Z-SUS Board
Distributes 18V and M5V
Control Board
Generates Vsc and -Vy
from M5V by DC/DC Converters
Also controls Set Up/Down
Generates Floating Ground
5V/15V by DC/DC Converters
FETs amplify Y-Sustain
Waveform
Y-Drive Boards
Logic signals
needed to scan
the panel
Receive Y-Scan Waveform
Display Panel
Logic signals needed to generate drive waveform and Scan the Panel
57
October 2010
50PK950
Plasma
Y-SUS Board Layout
VSC
R324
FS102 (VS)
6.3A/250V
-Vy
R334
VS, VA and M5V
Input from the SMPS
P113
VR301
VSC
Screw is
Floating Gnd
To Y-Drive Upper
FS103 (VA)
4A/125V
FS101 (M5V)
10A/125V
P117
Pins 1-5
Screws are
Floating Gnd
Or use the
Right Side
of C325
C325
Pins 16-20
To Y-Drive Lower
WARNING: P117 and P118 use a
plug in wire type connector
between Y-SUS and Y-Drive.
These do not come with a new
board. Remove the Y-Drive
boards completely if these
connectors are removed or the
boards will fail.
Screw is
Floating Gnd
P118
IC303
FG15V
18V (pins 46~50)
to Control for Z-SUS
M5V (pins 44-40)
VR302
-Vy
VR401
Set Dn
D301
D313
18V
VR402
Set Up
Ribbon
P101
Logic Signals from
the Control Board
P114
IC304
FG5V
FS301 (18V)
2A/125V
58
October 2010
Va to Left X Board
Pins 5~7
50PK950
Plasma
Y-SUS Board
Component Layout
WARNING: The upper
Y-DRIVE Board has to be
Removed Completely if
P117 is pulled.
P117
To Y-Drive
Upper
P109
To
Release
Press in
and lift.
Note: These
connectors DO NOT
come with a new
board
P118
To Y-Drive
Lower
P209
WARNING: The lower
Y-DRIVE Board has to be
Removed Completely if
P118 is pulled.
FG
VSC
R324
-Vy
R334
VR301
VSC
P117
FS101
10A / 125V
(M5V)
FG
Right Leg C325
TP with no Y-Drive
127.7V RMS
428V p/p
FG
Note With No Y-Drives:
FG24V reads 24.5V
FG10V reads 11.1V
C325
FG
P118
FG24V FG15V
IC303
FG
FG5V
FG
VR302
-Vy
FG
FG10V
VR401
Set-Dn
D303
FG24V
FG11V
D302
18V
D301
D313
T301
59
FS301
2A / 125V
(18V)
RUN
5.06V
Open
0.68V
FGnd
4.25V
FGnd
1.95V
FGnd
2.99
FGnd
0.06V
FGnd
Open
150V
DIODE
1.787V
Open
1.74V
FGnd
1.74V
FGnd
1.74V
FGnd
1.74V
FGnd
1.74V
FGnd
Open
Open
FS102 Vs or FS103 Va Diode Check reads Open
with Board Disconnected or Connected
FS101 M5V Diode Check reads 0.948V Board
Connected or 1.295 Disconnected
Model : PDP 50R1###
Voltage Setting: 5V/ Va:60/
Vs:203
N.A. / -190 / 150 / N.A. / 115
Max Watt : 450 W (Full White)
p/n: EBR62294101
FS301 Protects 18V
Creation
D301, D313 and
T301.
Diode Check 1.32V
With Board
Disconnected or
1.058V Connected
P117 to P109
1-2) FG5V
03 n/c
04) CLK
05) FGnd
06) STB
07) FGnd
08) OC2
09) FGnd
10) OC2
11) FGnd
12) Data
13) FGnd
14) n/c
15-20) Scan
Example:
Y-SUS BOARD
VSCAN
Pins 1-6
125V
RMS
P113
9-10) VS
8) n/c
6-7) Gnd
4-5) VA
3) Open
1-2) M5V
FS103
4A / 125V
(VA)
VSCAN
Pins
15-20
125V RMS
FG
P118 to P209
1-6) Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
FS102
6.3A / 250V
(VS)
T302
To
Release
Press in
and lift.
P117 to P109
1-2) FG5V
03 n/c
04) CLK
05) FGnd
06) STB
07) FGnd
08) OC2
09) FGnd
10) OC2
11) FGnd
12) Data
13) FGnd
14) n/c
15-20) Scan
P113
Pin 1 inverted
from the SMPS
-Vy VSC
P101
VR402
Set-Up
P114
P101
47-50) 18V
41-45) M5V
P114
1-4) VA
5) n/c
6-7) Gnd
October 2010
P118 to P209
1-6) Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
50PK950
RUN
150V
Open
FGnd
0.06V
FGnd
2.99V
FGnd
1.95V
FGnd
4.28V
FGnd
0.68V
Open
5.06V
DIODE
Open
Open
FGnd
1.74V
FGnd
1.74V
FGnd
1.74V
FGnd
1.74V
FGnd
1.74V
Open
1.787V
Plasma
VSC and -VY Adjustments
CAUTION: Use the actual panel label and not the book for exact voltage settings.
This is just for example
These are DC level Voltage Adjustments
Set should run for 10 minutes, this is the “Heat Run” mode.
Set screen to “White Wash”.
1) Adjust –Vy to Panel’s Label voltage (+/- 1/2V)
2) Adjust VSC to Panel’s Label voltage (+/- 1/2V)
Model : PDP 50R1###
Voltage Setting: 5V/ Va:60/ Vs:203
N.A. / -190 / 150 / N.A. / 115
Max Watt : 450 W (Full White)
-Vy
VSC
Location: Top Left of the board
R324
VSC TP
R334
-Vy TP
VR302
-Vy Adj
-
-
+
+
Location: Bottom Center of board
Just above Transformer
Both voltages
read positive
VR301
VSC Adj
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October 2010
50PK950
Plasma
Y-Scan Signal Overview
Y-Drive Lower Test Point
Just under 2nd Buffer from Top
Overall signal observed 2mS/div
67 to 81 VRMS
502V p/p
White to Black
Blanking
Blanking
NOTE: The Waveform Test Points are fragile. If by
accident the land is torn and the run lifted, make
sure there are no lines left to right in the screen
picture.
Adjustment Area
There is another test point on the Upper Y-Drive
board that can be used.
Basically any output pin to any of the FPC
to the panel are OK to use.
X10 Sub Field Firing
(600Hz)
Video
61
October 2010
50PK950
Plasma
Locking on to the Y-Scan Waveform Tip
Note, this TP (VS_DA) can be used as an
External Trigger for scope when locking onto
the Y-Scan (Scan) or the Z-Drive signal.
This signal can also be used
to help lock the scope when observing
the LVDS video signals.
62
October 2010
50PK950
Plasma
Observing (Capturing) the Y-Scan Signal for Set Up Adjustment
Adjustment
Area
Set must be in “WHITE WASH”
All other DC Voltage adjustments should have already been made.
Fig 1:
As an example of how to lock in to the Y-Scan Waveform.
Fig 1 shows the signal locked in at 4ms per/div.
Note the 3 blanking sections.
The area for adjustment is pointed out within the Waveform
Area to
expand
FIG1
4mS
Blanking
Adjustment
Area
Fig 2:
At 2mSec per/division, the area of the waveform to
use for SET-UP or SET-DN is now becoming clear.
Now only two blanking signals are present.
FIG2
2mS
Area to
expand
Blanking
Fig 3:
At 100us per/div the area for adjustment of SET-UP or SET-DN
is now easier to recognize. It is outlined within the Waveform.
Remember, this is the 2ND large signal to the right of blanking.
Expanded from above
Area to
be adjusted
FIG3
100uS
Blanking
Expanded from above
Fig 4:
At 40uSec per/division, the adjustment for
SET-UP can be made using VR402 and the
SET-DN can be made using VR401.
It will make this adjustment easier if you use the
“Expanded” mode of your scope.
Area for Set-Up
adjustment
320V
p/p
FIG4
40uS
Area for Set-Dn
adjustment
180 uSec
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October 2010
50PK950
Plasma
Set Up and Set Down Adjustments
Set must be in “WHITE WASH”
All other DC Voltage adjustments should have already been made.
VR402
Y-Scan Test Point
A
Lower Y-Drive
VR401
SET-UP ADJUST:
1) Adjust VR402 and set the (A) portion of the signal to
match the waveform above. (320V p/p ± 5V)
B
SET-DN ADJUST:
2) Adjust VR401 and set the (B) time of the signal to match
the waveform above. (180uSec ± 5uSec)
ADJUSTMENT LOCATIONS:
Bottom of the board.
64
October 2010
50PK950
Plasma
Set Up/Down Adjustments Too High or Low
Set Up swing is Minimum 250V p/p Max 350V p/p
Set Dn swing is Minimum 73uSec Max 196uSec
Normal
180uSec
This will cause
The bottom of
The picture to distort.
100V off
the Floor
Floor
Too Low
82uSec
This will cause
The black
Portions of the
Picture to
Lighten.
Black floor Up.
65
October 2010
NOTE: If
abnormal settings
cause excessive
brightness then
shutdown,
remove the LVDS
from Control
board and make
necessary
adjustments.
Then reconnect
LVDS cable,
select White
Wash and adjust
correctly.
50PK950
Plasma
Y-SUS Board Troubleshooting Y-Drive
Y-SUS Board develops the Y-Scan drive signal
to the Y-Drive boards.
This Section of the Presentation will cover troubleshooting
the Y-SUS Board.
Warning: Never run the Y-SUS with P118 or P117
removed unless the Y-Drive boards are removed
completely.
TIP: Use C325 Right leg to check the
Y-Scan signal if the Y-Drive boards are removed
P/N EBR62294101
TIP: Do not use C325 Right leg to
adjust the Y-Scan signal.
66
October 2010
50PK950
Plasma
Y-SUS Board P117 Connector to P109 Upper Y-Drive (Scan and FG5V)
TIP: The connectors between P117 to P109 and P118 to P209 do not come with a new Y-SUS or Y-Drive.
TIP: Use C325 Right leg to check the
Y-Scan signal if the Y-Drive boards are
removed
P109
P117
1-2) FG5V
03 n/c
04) CLK
05) FGnd
06) STB
07) FGnd
08) OC2
09) FGnd
10) OC2
11) FGnd
12) Data
13) FGnd
14) n/c
15-20) Y-Scan
FGnd
Y-Drive Upper
FG5V measured from Pins 1 or 2
To Floating Gnd
Use screw just below P117 on the Y-SUS
41.8VAC RMS “White”
52.5VAC RMS “Black”
Chassis Gnd
150VAC RMS
From Floating Gnd
P117 Pins 15~20
(4mSec per/div)
Y-Drive Connected 432~446V p/p
Y-Drive Removed 428V p/p
Y-SUS Board
67
October 2010
50PK950
Plasma
Y-SUS Board P117 to Upper Y-Drive P109 Logic Signals Explained
P117 Pins 4, 6, 8, 10, 12
P109
P117
1-2) FG5V
03 n/c
04) CLK
05) FGnd
06) STB
07) FGnd
08) OC2
09) FGnd
10) OC2
11) FGnd
12) Data
13) FGnd
14) n/c
15-20) Y-Scan
FGnd
Y-Drive Upper
(4mSec per/div)
The signal for these pins look very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP
without an Isolation Transformer.
All logic pins about (432V p/p)
with Y-Drives
All logic pins about (392V p/p)
without Y-Drives
Y-SUS Board
P117 Pins 4, 6, 8, 10, 12 are Logic (Drive) Signals to the Y-Drive Upper.
68
October 2010
50PK950
Plasma
Y-SUS P117 Connector to Y-Drive Upper P109 Diode Mode Testing
P109
P117
Checking the Y-SUS Board P117
NOTE: Y-SUS Disconnected from the Y-DRIVE
Readings from Floating Ground
Use screw just below P117 on the Y-SUS for FGnd
RED LEAD
Blk Lead FG
Y-Drive Upper
Y-SUS Board
Floating Gnd 1-2) FG5V
03 n/c
04) CLK
05) FGnd
06) STB
07) FGnd
08) OC2
09) FGnd
10) OC2
11) FGnd
12) Data
13) FGnd
14) n/c
15-20) Y-Scan
1.78V
n/c
1.73V
0V
1.73V
0V
1.73V
0V
1.73V
0V
1.73V
0V
n/c
Open
BLACK LEAD
Red Lead FG
0.544V
n/c
0.627V
0V
0.627V
0V
0.629V
0V
0.631V
0V
0.629V
0V
n/c
3.04
Meter in the
Diode Mode
Y-Drive Board should be
disconnected for this test.
69
October 2010
50PK950
Plasma
Y-SUS Board P118 Connector to P209 Lower Y-Drive (Y-Scan and FG5V)
TIP: The connectors between P117 to P109 and P118 to
P209 do not come with a new Y-SUS or Y-Drive.
Pins 1~6
TIP: Use C325 Right leg to check the
Y-Scan signal if the Y-Drive boards are removed
P209
P118
FGnd
Y-Drive Lower
1-6) Y-Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
Y-SUS Board
(4mSec per/div)
Y-Drive Connected 432~446V p/p
Y-Drive Removed 428V p/p
41.8VAC RMS “White”
52.5VAC RMS “Black”
Chassis Gnd
150VAC RMS
From Floating Gnd
FG5V measured from
Pins 19 or 20 to
Floating Gnd
Use screw just above
P118 on the Y-SUS
P118 Pins 1~6 is the Y-Scan Signal to the Y-Drive Lower.
70
October 2010
50PK950
Plasma
Y-SUS Board P118 to Lower Y-Drive P209 Logic Signals Explained
P118 Pins 9, 11, 13, 15, 17
P209
P118
1-6) Y-Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
FGnd
Y-Drive Lower
(4mSec per/div)
The signal for these pins look very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP
without an Isolation Transformer.
All logic pins about (432V p/p)
with Y-Drives
All logic pins about (392V p/p)
without Y-Drives
Y-SUS Board
P118 Pins 9, 11, 13, 15, 17 are Logic (Drive) Signals into the Y-Drive Upper.
71
October 2010
50PK950
Plasma
Y-SUS P118 Connector Diode Mode Testing
P209
P118
Checking the Y-SUS Board P118
NOTE: Y-SUS Disconnected from the Y-DRIVE
Readings from Floating Ground
Use screw just below P118 on the Y-SUS for FGnd
RED LEAD
Blk Lead FG
Y-Drive Lower
Y-SUS Board
Floating Gnd 1-6) Y-Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
Open
n/c
0V
1.73V
0V
1.73V
0V
1.73V
0V
1.73V
0V
1.73V
n/c
1.78V
Y-Drive Board should be
disconnected for this test.
BLACK LEAD
Red Lead FG
Open
n/c
0V
0.629V
0V
0.631V
0V
0.629V
0V
0.627V
0V
0.627V
n/c
0.544V
Meter in the
Diode Mode
72
October 2010
50PK950
Plasma
Y-SUS Floating Ground (FG 15V) and (FG 5V) Checks
Voltage Measurements for the Y-SUS Board
Tip: M5V turns on these supplies.
IC303
FG15V (Floating Ground 15V). Checked at IC303 Top Right Leg.
Floating Ground
checks must be made
from
Floating Ground.
Use any screw on the
far left hand side of
the Y-SUS.
Floating
Gnd
IC304
P118
IC303
FG 15V
Regulator
IC303
FG 5V
Regulator
IC304
T302
Use left leg to
check for source
Heat Sink
D303
FG24V
Location
IC304
Use right leg to
check for source
D302
FG11V
T301
FG5V (Floating Ground 5V). Checked at IC304 Left Leg.
Leaves the Y-SUS board on P118 pins 19 and 20 and P117 pins 1 and 2
73
October 2010
50PK950
Plasma
Y-SUS 18V Generation Checks
Location
Voltage Measurements for the Y-SUS Board
18V Test Point
Used in the Y-SUS for Waveform Creation and Leaves the
Y-SUS board on P101 pins 47~50 to the Control Board.
Checked at Cathode Side D301 and/or D313.
Standby: 0V
Run: 18V
Diode Check: 1.32V
T302
Tip: M5V
turns on
this supply.
D301, D313
18V Source
Cathode Top Side
Just above T301
D303 FG10V Source
D302 FG24V Source
Cathode left side
Tip: Use FS301 to check
this supply.
T301
74
October 2010
50PK950
Plasma
P101 Y-SUS to Control Board Fuse Information
P113
FS103 (VA)
4A / 125V
FS102 (VS)
6.3A / 250V
Locations
Diode Check Open
With Board Disconnected or Connected
Diode Check
Open
With Board
Disconnected
or Connected
FS101 (M5V)
10A / 125V
P101
Diode Check
1.295V
With Board
Disconnected.
0.948V with board
connected.
FS104
18V Pins 47 through 50
(18V)
2A / 125V
M5V Pins 42 through 46
Diode Check
1.32V
With Board
Disconnected.
1.06V with
board
connected.
75
October 2010
50PK950
Plasma
Y-SUS P113 and P114 Plug Information
Voltage and Diode Mode Measurement
P113 Connector " Y-SUS " to " Power Supply " P812
Pin
Label
Run
Diode Mode
9-10
M5V
5.1V
1.29V
8
Gnd
Gnd
Gnd
6-7
Va
*60V
Open
4-5
Gnd
Gnd
Gnd
3
n/c
n/c
n/c
1-2
Vs
*203V
Open
P113
P114 Connector " Y-SUS " to " X-Drive” Left P121
Pin
Label
Run
Diode Mode
1-4
VA
*60V
Open
5
n/c
n/c
n/c
6-7
Gnd
Gnd
Gnd
P114
* Note: This voltage will vary in accordance with Panel Label
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
76
October 2010
50PK950
Plasma
Y-SUS P101 to Control P1 Plug Voltage Checks
“Y-SUS " P101 Connector to “Control " P1
Pin
Label
Run
Diode
Pin
Label
Run
There are No Stand By
Voltages on this Connector
Diode
1
Error
13.57V
Open
23
Gnd
Gnd
Gnd
2
CTRL_EN
0.09V
3.17V
24
PASS
2.03V
2.84V
3
n/c
n/c
Open
25
SET_DN1
2.12V
2.84V
4
Gnd
Gnd
Gnd
26
SET_DN2
2.12V
2.84V
5
CLK
0.384V
2.83V
27
SET_DN3
2.36
2.83V
6
Gnd
Gnd
Gnd
28
Gnd
Gnd
Gnd
7
STB
2.87V
2.84V
29
SET_UP1
0.88V
2.82V
8
Gnd
Gnd
Gnd
30
SET_UP2
0V
2.82V
9
OC1_B
1.12V
2.82V
31
D_VY_EN
0.26V
3.0V
10
OC1_T
1.13V
2.83V
32
D_VY1
0V
2.83V
11
OC2_B
1.13V
2.83V
33
GND
Gnd
Gnd
12
OC2_T
1.13V
2.83V
34
D_VY2
0.28V
2.82V
13
DATA_B
0V
2.82V
35
NC1
0.6V
2.84V
14
DATA_T
0V
2.82V
36
NC2
0V
3.0V
15
Gnd
Gnd
Gnd
37
NC3
2.03V
2.82V
16
SUS_DN
2.46V
2.82V
38
GND
Gnd
Gnd
17
Gnd
Gnd
Gnd
39
GND
Gnd
Gnd
18
SUS_UP
0.12V
2.83V
40
n/c
n/c
Open
19
Gnd
Gnd
Gnd
M5V
4.92V
1.3V
20
ER_DN
0.12V
2.82V
46
n/c
n/c
n/c
21
Gnd
Gnd
Gnd
47-50
18V
18.3V
1.32V
22
ER_UP
1.14V
2.83V
41-45
77
October 2010
Diode Mode Readings
taken with all connectors
Disconnected.
DVM in Diode Mode.
50PK950
Plasma
Y-SUS How to Check the Output FETs
See the Y-SUS drawing (next page) for
FET Locations and Identification
Name is printed on the components.
Readings “In Circuit” with Board Removed.
30F124
Q405, Q408, Q409,
Q411, Q412, Q413,
Q414, Q415, Q416
Shown: 1.13V
Reverse: Open
Reverse: Open
Red
1K38BY
Q420, Q421, Q423
1A02BT
Q302
1K44AB
1K38AK
aQ304
Q422
Shown: 2.23V
Reverse: 1.9V
Blk
Shown: 0.35V
Blk Red
Red Blk
Shown: 0.7V
Reverse: 1.78V
aOpen
Blk
Reverse: Open
Red
Shown: 1.4V
a2.1V
Reverse: Open
Reverse: 1.37V
a1.9V
Red
Red Blk
Shown: 0.36V
a0.5V
Shown: 0.51V
RF2001
D406, D407, D408
D413, D420, D421,
D412
Reverse: Open
Blk Red
K3667
aQ404
Q407
Blk
Shown: 2.16V
aOpen
Shown: 0.5V
Reverse: Open
Blk Red
Red Blk
Shown: Shorted
Red
Shown: 0.35
Reverse: Shorted
Blk
Shown: 0.35V
Reverse: Open
Reverse: Open
0.3 Ohms
Blk Red
78
Red Blk
October 2010
50PK950
Plasma
Y-SUS FET
Identification and
Location
P113
FG
D412
Q415
D420
Q405
Q409
Q408
Q413
Q412
Q411
D408
D421
D406
Q304
Q414
D416
P117
D413
D407
FG
Q421
FG
Q420
FG
Q423
C325
Q422
FG
P118
P101
Q302
FG
T302
Q404
Q407
P114
79
October 2010
50PK950
Plasma
Y-DRIVE BOARD SECTION (Y-Drive Explained)
Y-DRIVE UPPER
(TOP)
Y-DRIVE LOWER
(BOTTOM)
Y-Drive Boards work as a path supplying
the Sustain and Reset waveforms
which are made in the Y-Sustain board
and sent to the Panel through Scan
Driver IC’s.
The Y-Drive Boards receive a waveform
(Y-Drive) developed on the Y-SUS
board then selects the horizontal
electrodes sequentially starting at the
top and scanning down the panel.
Scanning is synchronized by receiving
Logic scan signals from the Control
board.
The 50PK950 uses 12 Driver ICs on
2 Y-Drive Boards commonly called
“Y-Drive Buffers” but are actually Gate
Arrays.
80
October 2010
50PK950
Plasma
Y-Drive Upper Layout
p/n: EBR62293901
PANEL
SIDE
Y-SUS
SIDE
Y-Scan signal, FG5V from the Y-SUS board and
Logic Signals from the Control board through the
Y-SUS are supplied to the Upper Y-Drive Board on
Connector P109.
This connector does not
come with a new
Y-SUS or Y-Drive.
Y-Drive
Y-SUS
Warning: Never run the Y-SUS with just P109
disconnected. You must remove the Upper Y-Drive
board completely due to these FG lugs.
P109
Floating
Ground
Standoff
The Floating Ground
Standoff delivers FG
To the Y-Drive Boards.
There are 3 per/board.
81
October 2010
50PK950
Plasma
Y-Drive Lower Layout
Y-Drive
p/n: EBR63461101
Floating
Ground
Standoff
Y-SUS
The Floating Ground
Standoff delivers FG
To the Y-Drive Boards.
There are 3 per/board.
P209
Warning: Never run the Y-SUS with just P209
disconnected. You must remove the Lower
Y-Drive board completely due to these FG lugs.
Y-Scan signal, FG5V from the Y-SUS board and
Logic Signals from the Control board through the
Y-SUS are supplied to the Lower Y-Drive Board
on Connector P209.
This connector does not
come with a new
Y-SUS or Y-Drive.
PANEL
SIDE
Y-SUS
SIDE
82
October 2010
50PK950
Plasma
Y-Drive Upper Board P109 Connector to P117 Y-SUS (Scan and FG5V)
FG5V measured from Pins 1 or 2
To Floating Gnd
Use screw just below P117 on the Y-SUS
TIP: Use C325 Right leg to check the
Y-Scan signal if the Y-Drive boards are removed
41.8VAC RMS “White”
52.5VAC RMS “Black”
Chassis Gnd
P109
P117
150VAC RMS
From Floating Gnd
P109 Pins 15~20 is the Y-Scan Signal
into the Y-Drive Upper.
Y-Drive Upper
Y-SUS Board
19-20) FG5V
18) n/c
17) CLK
16) FGnd
15) STB
14) FGnd
13) OC2
12) FGnd
11) OC2
10) FGnd
09) Data
08) FGnd
07) n/c
01-06) Y-Scan
(4mSec per/div)
Y-Drive Connected 432~446V p/p
Y-Drive Removed 428V p/p
Floating Gnd
83
October 2010
50PK950
Plasma
Y-Drive Upper P109 to Y-SUS Board P117 Logic Signals Explained
Read from Floating Gnd
P109 Pins 9, 11, 13, 15, 17
(4mSec per/div)
The signal for these pins look very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP
without an Isolation Transformer.
PIN
19-20) FG5V
18) n/c
17) CLK
16) FGnd
15) STB
14) FGnd
13) OC2
12) FGnd
11) OC2
10) FGnd
09) Data
08) FGnd
07) n/c
01-06) Y-Scan
All logic pins about (432V p/p)
VOLTS
5.06V
n/c
0.68V
FGnd
4.28V
FGnd
1.95V
FGnd
2.99V
FGnd
0.06V
FGnd
n/c
150V
P109
P117
FGnd
Y-Drive Upper
Y-SUS Board
P109 Pins 9, 11, 13, 15, 17 are Logic (Drive) Signals to the Y-Drive Upper.
84
October 2010
50PK950
Plasma
Y-Drive Upper P109 Connector Diode Mode Testing
Checking the Y-Drive Board P109
NOTE: Y-SUS Disconnected from the Y-DRIVE
Readings from Floating Ground
Use the Screw just below P109 for Floating Gnd TP
RED LEAD
Blk Lead FG
P109
Floating
Gnd
Floating Gnd 19-20) FG5V
18) n/c
17) CLK
16) FGnd
15) STB
14) FGnd
13) OC2
12) FGnd
11) OC2
10) FGnd
09) Data
08) FGnd
07) Open
4-6) VPP
1-3) VSC
BLACK LEAD
Red Lead FG
Open
Open
2.83V
FGnd
Open
FGnd
2.83V
FGnd
2.83V
FGnd
2.83V
FGnd
Open
Open
Open
Y-Drive
Upper
0.39V
Open
0.77V
FGnd
0.77V
FGnd
0.77V
FGnd
0.77V
FGnd
0.77V
FGnd
Open
1.04V
1.58V
Meter in the
Diode Mode
85
October 2010
50PK950
Plasma
Y-Drive Lower Board P209 Connector to P118 Y-SUS (Scan and FG5V)
FG5V measured from Pins 19 or 20
To Floating Gnd
Use screw just above P209 on the Y-Drive
TIP: Use C325 Right leg to check the
Y-Scan signal if the Y-Drive boards are removed
41.8VAC RMS “White”
52.5VAC RMS “Black”
Chassis Gnd
P209
P118
FGnd
150VAC RMS
From Floating Gnd
1-6) Y-Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
P209 Pins 1~6 is the Y-Scan Signal
into the Y-Drive Lower.
(4mSec per/div)
Y-Drive Connected 432~446V p/p
Y-Drive Lower
86
Y-SUS Board
October 2010
50PK950
Plasma
Y-Drive Lower P209 to Y-SUS Board P118 Logic Signals Explained
P209 Pins 9, 11, 13, 15, 17
(4mSec per/div)
The signal for these pins look very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP
without an Isolation Transformer.
Read from Floating Gnd
PINS
1-6) Y-Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
P209
P118
VOLTS
150V
n/c
FGnd
0.06V
FGnd
2.99V
FGnd
1.95V
FGnd
4.28V
FGnd
0.68V
n/c
5.06V
FGnd
All logic pins about (432V p/p)
Y-Drive Lower
Y-SUS Board
P209 Pins 9, 11, 13, 15, 17 are Logic (Drive) Signals to the Y-Drive Lower.
87
October 2010
50PK950
Plasma
Y Drive Lower P209 Connector Diode Mode Testing
Floating
Gnd
Checking the Y-Drive Board P209
NOTE: Y-SUS Disconnected from the Y-DRIVE
Readings from Floating Ground
Use screw just above P209 on the Y-Drive Lower
RED LEAD
Blk Lead FG
P209
Y-Drive
Lower
Floating Gnd 1-3) VSC
4-6) VPP
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
Open
Open
Open
FGnd
2.83V
FGnd
2.83V
FGnd
2.83V
FGnd
Open
FGnd
2.83V
n/c
Open
BLACK LEAD
Red Lead FG
1.58V
1.04V
Open
FGnd
0.77V
FGnd
0.77V
FGnd
0.77V
FGnd
0.77V
FGnd
0.77V
n/c
0.39V
Meter in the
Diode Mode
88
October 2010
50PK950
Plasma
Removing (Panel) Flexible Ribbon Cables from Y-Drive Upper or Lower
Flexible Ribbon Cables shown are from a different model, but process is the same.
To remove the Ribbon Cable from the connector first carefully lift the Locking Tab from
the back and tilt it forward ( lift from under the tab as shown in Fig 1).
The locking tab must be standing straight up as shown in Fig 2.
Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)
Gently slide the Ribbon Cable free from the connector.
Be sure ribbon tab is released
By lifting the ribbon up slightly,
before removing ribbon.
Gently Pry
Up Here
Locking tab in
upright position
Fig 1
Fig 3
Fig 2
To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated
securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).
89
October 2010
50PK950
Plasma
Incorrectly Seated Y-Drive Flexible Ribbon Cables
The Ribbon Cable is clearly improperly seated
into the connector. You can tell by observing the
line of the connector compared to the FPC, they
should be parallel.
The Locking Tab will offer a greater resistance to
closing in the case.
Note the cable is crooked in this case because
the Tab on the Ribbon cable was improperly
seated at the top. This can cause bars, lines,
intermittent lines abnormalities in the picture.
Remove the ribbon cable and re-seat it correctly.
90
October 2010
50PK950
Plasma
Y-Drive Buffer Troubleshooting
HOW TO CHECK FOR A SHORTED BUFFER IC
BACK SIDE
FRONT SIDE
BUFFER IC FLOATING GROUND (FGnd)
Using the “Diode Test” on the DVM, check
the pins for shorts or abnormal loads.
RED LEAD On
BLACK LEAD On “ANY”
Floating Ground
Output Lug Reads 0.78V
Indicated by white outline
Reversing the leads reads Open
FRONT SIDE OF Y-DRIVE BOARD
8 Ribbon cables communicating with the Panel’s (Horizontal
Electrodes) totaling 1080 lines determining the Panel’s Vertical
resolution pixel count.
Any of these output lugs can be tested.
Look for shorts indicating a defective Buffer IC
91
October 2010
50PK950
Plasma
Z-SUS SECTION
This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly.
Upon completion of this section the Technician will have a better understanding of the circuit and be
able to locate test points needed for troubleshooting and all alignments.
Locations
•
•
•
DC Voltage and Waveform Test Points
Z BIAS Alignment
Diode Mode Test Points
Operating Voltages
Power Supply Supplied VS
M5V Routed through Control Board
Y-SUS Supplied
18V Routed through Control Board
Developed on Z-SUS
Z Bias
92
October 2010
50PK950
Plasma
Z-SUS Block Diagram
M5V and VS
Power Supply Board
Y-SUS Board
18V
M5V
Control Board
VS
M5V
18V
Z-SUS board receives VS from the
SMPS and M5V and 18V routed
through the Control board
Receives
Logic
Signals
Via 3 FPC
Circuits generate erase,
sustain waveforms
Generates Z Bias 100V
Flexible
Printed
Circuits
NO IPMs
Z-SUB
FET Makes Drive waveform
Simplified Block Diagram of Z-SUS (Sustain) Board
93
October 2010
PDP
Display
Panel
50PK950
Plasma
Z-SUS Board Component Identification
FS103
VS
6.3A/250V
Z-Bias TP
Across R275
P102
VS from
SMPS
Z-Bias
VR204
Z-SUS
Waveform
Development
FETs
Z-SUS
Waveform
Test Point
J24
P/N EBR62294201
No IPMs
M5V from SMPS to the
Y-SUS, +18V generated
on the Y-SUS are routed
through the Control board.
Logic Signals generated
on the Control board.
Z-SUS
Output
FETs
Z-SUS
Waveform
Development
FETs
Z-SUS
Waveform
Development
FETs
P105
P103
To Z-SUB
P106
P107
94
October 2010
50PK950
Plasma
50PK950 Z-SUS Board Drawing
Example:
Model : PDP 50R1###
Voltage Setting: 5V/ Va:60/ Vs:203
N.A. / -190 / 150 / N.A. / 115
Max Watt : 450 W (Full White)
ZBZ (Z Bias)
FS103
6.3A / 250V
(VS)
Q201
D213
D207
Z-SUS BOARD
p/n: EBR62294201
P102
VZB
R275
P102
PIN
1-2) VS
03) n/c
4-5) Gnd
6-7) n/c
08) Gnd
09-10) n/c
RUN
203V
(n/c)
Gnd
60V
Gnd
4.92V
DIODE
Open
(n/c)
Gnd
(n/c)
Gnd
(n/c)
D208
Q207
VR204
VZB
Q206
Q205
D221
D216
P107
1-2) 18V
03) n/c
4-5) M5V
6-7) Gnd
08) SUS_DN
09) CTRL_EN
10) SUS_UP
11) VZB2
12) ER_DN
13) VZB1
14) ER_UP
15) ZBIAS
(18.3V)
(n/c)
(4.92V)
(Gnd)
(0.80V)
(0.40V)
(0.15V)
(2.5V)
(0.13V)
(0V)
(0.87V)
(1.90V)
Z-Bias
50V
Waveform
RMS
J24
Q204
J24
P105
D215
Q211
D211
Q210
Q209
Q208
Q213
P103
Q214
P106
P107
95
October 2010
50PK950
Plasma
Z-SUS Waveform
The Z-SUS (in combination with the Y-SUS) generates a
SUSTAIN Signal and an ERASE PULSE for generating
SUSTAIN and DISCHARGE in the Panel.
This waveform is supplied to the panel through Z-SUB and
then to FPC (Flexible Printed Circuit) connections
P102, P104 and P103.
Reset
Y Drive
Waveform
Oscilloscope Connection Point.
J24 to check Z Output waveform.
Right Hand Side Center.
Z Drive
Waveform
Blanking
Z Bias VR204 manipulates the offset
of the Z-Drive waveform segment.
Vzb (Z-Bias) voltage 115V ± 1/2V
TIP: The Z-Bias (VZB) Adjustment is a
DC level adjustment.
This is only to show the effects
of Z-Bias on the waveform.
This Waveform is just for reference to observe the effects of Z Bias adjustment
96
October 2010
50PK950
Plasma
Z-Bias (VZB) VR204 Adjustment
Read the Voltage Label on the back top center
of the panel when adjusting VR204.
Example of a
voltage label:
Model : PDP 50R1###
Voltage Setting: 5V/ Va:60/
Vs:203
N.A. / -190 / 150 / N.A. / 115
Max Watt : 450 W (Full White)
VZB (Z-Bias)
VZB (Z Bias)
VR204
Negative
Lead
Positive
Lead
VZB (Z-Bias) TP
Across R275
Location Top Right of Z-SUS Board
Set should run for 10 minutes, this is the “Heat Run” mode.
Set screen to “White Wash” mode or 100 IRE White input.
Adjust VZ (Z-Bias) to Panel Label (± 1/2V)
97
October 2010
50PK950
Plasma
Connector P102 to SMPS P811 Voltages and Diode Checks
Voltage and Diode Mode Measurements
P102 Location: Top Left
Pin 1
P102 Connector “Z-SUS " to “SMPS " P811
Pin
Label
Run
Diode Mode
1-2
VS
*202V
Open
3
n/c
n/c
n/c
4-5
Gnd
Gnd
Gnd
6-7
n/c
*60V
n/c
8
Gnd
Gnd
Gnd
9-10
n/c
5V
n/c
* Note: This voltage will vary in accordance with Panel Label
There are no Stand-By voltages on this connector
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
98
October 2010
50PK950
Plasma
Connector P107 to Control P2 Voltages and Diode Checks
Voltage and Diode Mode Measurements
P107 Location:
Bottom Left hand side
P107 Connector “Z-SUS " to “Control " P2
Pin
Label
Run
Diode Mode
1, 2
18V
18.3V
1.64V
3
n/c
n/c
n/c
4, 5
M5V
4.92V
Open
6, 7
Gnd
Gnd
Gnd
8
SUS_DN
0.80V
2.83V
9
CTRL_ON
0.40V
Open
10
SUS_UP
0.15V
2.83V
11
VZB2
2.50V
2.83V
12
ER_DN
0.13V
2.83V
13
VZB1
0V
2.83V
14
ER_UP
0.09V
2.83V
15
ZBIAS
1.90V
2.83V
Pin 1
There are no Stand-By voltages on this connector
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
99
October 2010
50PK950
Plasma
Z-SUS How to Check the Output FETs
Name is printed on the components. Readings “In Circuit”.
See the Z-SUS drawing (5 pages back) for
FET Locations and Identification
30F124
Shown:
aQ201-Q203
Shown:
b
Reverse: 1.9V
b
Blk
Red
Shown: 0.79V
1K49AD
b
Q205-Q206
Reverse: Open
Blk
Red
RF2001
D208,~D210
D209~D211
D221~D216
D215
D207-D213
D220-D203
2.28V
Blk Red
1K38AD
a
Q207
Blk Red
Shown: Open
Shown:
Reverse: Open
Reverse: Short
Blk Red
Shown:
Shown:
0.36V
Reverse: Open
Open
Reverse:
b1.14V
aQ202-Q204
Q209-Q211
Q213-Q215
b
Q208
b
Q212,Q214
a0.6V
Short
b0.51V
Blk Red
Shown:
Reverse: Short
aShort
Shown:
Open
0.35V
Reverse: Open
Reverse: 0.35V
0.1 Ohms
Blk
Red
Blk Red
Blk Red
100
October 2010
50PK950
Plasma
Z-SUS How to Check Stand-Alone
The Power Supply should be producing VS or you can substitute voltage matching VS from an external
source to either pin 1 or 2 P102 on the Z-SUS board.
The Power Supply should be producing M5V or you can substitute voltage matching M5V from an
external source to either FL1, FL2 or FL5 on the Control board.
1) Disconnect
P812
Tip: If the DC to DC converters are running on the Y-SUS, you can
jump any 5V to the Y-SUS M5V input pin, leave P1 connected and there
will be no need to jump the 17V to the Control for the Z-SUS board or
M5V to the Control board.
5) Turn on the set and check
for 221V p/p waveform on
Z-SUS Board
3) Jump M5V to
FL1 or FL2 on
Control Board
2) Disconnect P1
4) Jump 17V to
pin 1 or 2 on P2
on Control Board
The Power Supply should be producing 17V or you can substitute voltage matching 17V from an
external source to either pins 1 or 2 on connector P2 on the Control board.
101
October 2010
50PK950
Plasma
CONTROL BOARD SECTION
This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon
completion of this section the Technician will have a better understanding of the circuit and be
able to locate test points needed for troubleshooting.
• DC Voltage and Waveform Test Points
• Diode Mode Test Points
Signals
Main Board Supplied Panel Control and LVDS (Video) Signals
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)
X Board Drive Signals (RGB Address)
Operating Voltages
Y-SUS Supplied
+5V (M5V) Developed on the SMPS
+18V (Routed to the Z-SUS)
(Not used by the Control Board)
Developed on the Control Board
+1.8V for internal use
+3.3V for internal use
+3.3V for the X-Boards (TCPs)
102
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50PK950
Plasma
Control Board Component Identification
p/n: EBR63526901
103
October 2010
50PK950
Plasma
50PK950 Control Board Layout Drawing
IC103
18V To Z-SUS (In P1 pins 1-4) (Out P2 pins 14-15)
Diode Check All Connectors
Connected 1.058V
04) 3.3V
05) Gnd
06) 3.3V
03) Gnd
02) Gnd
01) 3.3V
18V
Pins 1-4
M5V
Pins 6-10
Grayed Out Components are
on the Back of the Board
P22 N/C
IC103
P1 (M5V)
FL1
FL2
IC101
IC53
3.32V
1-4
(3.3V)
IC53
1.84V
5.1V
4.91V
3.3V
Gnd
IC23
05) 3.28V
06) 0V
07) 0V
08) 3.28V
FL5
M5V
3.29V
C86
4.91V
3.29V
Gnd
14-15) 18V
13) n/c
11-12) M5V
9-10) Gnd
08) SUS_DN
07) CTRL_EN
06) SUS_UP
05) VZB2
04) ER_DN
03) VZB1
02) ER_UP
01) ZBIAS
18.3V
(n/c)
4.92V
Gnd
0.80V
0.4V
0.15V
2.62V
0.13V
0V
0.87V
1.9V
VS-DA
D1
IC22
IC23
1.646V
25Mhz
P31
LVDS
IC1
1.15V
To
Main
Board
IC61
L1
IC22
04) Gnd
03) 3.28V
02) 0V
01) 3.28V
1.82V
IC51
X1
04) Gnd
03) 3.28V
02) 3.28V
01) 3.26V
C72
P2
1.82V
D1 Blinks
Indicating
Board is
Functioning
1.696V
05) 3.29V
06) 3.29V
07) 3.28V
08) 3.32V
To Z-SUS
IC52 4.91V Board
L2
3.32V
FL1/FL2
FL5
Diode Check
All Connectors
Connected
0.948V
IC102
P2
P101
To Left
X Board
1-4
(3.3V)
IC53
CONTROL BOARD
To Cent
X Board
p/n: EBR63526901
P102
1-4
(3.3V)
IC53
1.13V
C76
AUTO
GEN
P104
To Right
X Board
October 2010
01) 0.8V
02) Gnd
03) 5V
04) 6.59V
IC61
05) 4.86V
06) 1.15V
07) 1.08V
08) 3.32V
3.3V To X-Boards
Diode Check All
Connectors Connected
0.6769V
104
IC52
08) 3.3V
07) 1.8V
06) 1.8V
05) 5V
50PK750
04) 5.81V
03) 4.91V
02) Gnd
01) 0.789V
Plasma
Control Board Temperature Sensor Location (Chocolate)
BACK SIDE OF
THE BOARD
With Chocolate
(Heat Transfer Material)
CONTROL
BOARD
TEMPERATURE
SENSOR
LOCATION
IC103
04) 3.3V 03) Gnd
05) Gnd 02) Gnd
06) 3.3V 01) 3.3V
Pin 1
105
October 2010
50PK950
Plasma
Control Board TP Tips
EXTERNAL TRIGGER: (VS_DA) can be used as an
External Trigger for your scope when locking onto
the Y-Scan or the Z-Drive signal.
VS_DA
AUTO
GEN
Auto Gen (Internal Automatic Generator)
Short these two pins together to generate patterns on the
screen for a Panel Test.
If patterns do not appear, try removing the LVDS Cable.
106
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50PK950
Plasma
Checking the Crystal X1“Clock” on the Control Board
Check the output of the Oscillator (Crystal) X1.
The frequency of the sine wave is 25 MHZ.
Missing this clock signal will halt operation of the panel
drive signals.
Osc. Check: 25Mhz Top Leg
X1
Osc. Check: 25Mhz Bottom Leg
CONTROL
BOARD
CRYSTAL
LOCATION
107
October 2010
50PK950
Plasma
Control Board Signal (Simplified Block Diagram)
The Control Board supplies Video Signals to the TCP (Taped Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.
Control Board to X Board
Address Signal Flow
Basic Diagram of Control Board
IC201
This Picture shows Signal Flow Distribution to help determine the
failure depending on where the problem appears on the screen.
MCM
CONTROL BOARD
DRAM DRAM
Resistor Array
EEPROM
X-DRIVE BOARD
16 bit words
2 Buffer
Outputs
per TCP
MCM IC201
128 Lines per Buffer
To Left
X-Board
256 Lines output Total
To Center
X-Board
PANEL
There are 23 total TCPs.
5760 Vertical Electrodes
1920 Total Pixels (H)
To Right
X-Board
108
October 2010
50PK950
Plasma
Control Board Connector P1 to Y-SUS P101 Voltages and Diode Mode Checks
These pins are very close together. Use Caution when taking Voltage measurements.
Pin
P1 Label Silk Screen
Pins 1 through 4
Receive 18V from the Y-SUS.
Pins 6 through 10
Receive M5V from the Y-SUS.
All the rest are delivering
Y-SUS Waveform development and
Y-Drive logic signals to the Y-SUS
Board (Y-Drive logic signals are simply
routed right through the Y-SUS to the
Y-Drive boards).
Note: The +18V is not used by the
Control board, it is routed to the
Z-SUS leaving on P2 Pins 14~15.
109
Starting at pin 16 every pin
not identified is ground.
October 2010
50PK950
Plasma
Control P1 to Y-SUS P101 Plug Information
Pin 1 on Control is Pin 50 on Y-SUS.
Note: There are no voltages in Stand-By mode
P1 Connector " Control Board” to “Y-SUS” P101
Pin
Label
Run
Diode
Pin
Label
Run
Diode
1-4
18V
18V
1.3V
30
Gnd
Gnd
Gnd
5
n/c
n/c
n/c
31
ER_DN
0.12V
2.82V
6-10
M5V
5V
1.3V
32
Gnd
Gnd
Gnd
11
n/c
n/c
Open
33
SUS_UP
0.12V
2.83V
12
GND
Gnd
Gnd
34
Gnd
Gnd
Gnd
13
GND
Gnd
Gnd
35
SUS_DN
2.46V
2.82V
14
NC3
2.03V
2.82V
36
Gnd
Gnd
Gnd
15
NC2
0V
3.0V
37
DATA_T
0V
2.82V
16
NC1
0.6V
2.84V
38
DATA_B
0V
2.82V
17
D_VY2
0.28V
2.82V
39
OC2_T
1.128V
2.83V
18
GND
Gnd
Gnd
40
OC2_B
1.128V
2.83V
19
D_VY1
0V
2.83V
41
OC1_T
1.128V
2.83V
20
D_VY_EN
0.26V
3.0V
42
OC1_B
1.12V
2.82V
21
SET_UP2
0V
2.82V
43
Gnd
Gnd
Gnd
22
SET_UP1
0.88V
2.82V
44
STB
2.87V
2.84V
23
Gnd
Gnd
Gnd
45
Gnd
Gnd
Gnd
24
SET_DN3
2.36V
2.83V
46
CLK
0.384V
2.83V
25
SET_DN2
2.12V
2.84V
47
Gnd
Gnd
Gnd
26
SET_DN1
2.12V
2.84V
48
n/c
n/c
Open
27
PASS
2.03V
2.84V
49
CTRL_EN
0.09V
3.17V
28
Gnd
Gnd
Gnd
50
Error
0V
Open
29
ER_UP
1.14V
2.83V
110
October 2010
1
50PK950
Plasma
Control Board LVDS P31 Signals
LVDS Cable P31 on Control board shown.
Press two outside tabs inward to release.
Video Signals from the Main Board to the Control Board are referred
to as Low Voltage Differential Signals or LVDS. The video is
delivered in 24 bit LVDS format. Their presence can be confirmed
with the Oscilloscope by monitoring the LVDS signals with SMPTE
Color Bar input. Loss of these Signals would confirm the failure is on
the Main Board or the LVDS Cable itself.
Example of LVDS Video Signal
LVDS
Example of Normal Signals measured at 1V p/p at 10µSec
Pins are close together.
Pins 12~17, 19~20, 22~33, 35~36, 38~43.
Pins 19~20 and 35~36 are clock signals for the data.
111
October 2010
50PK950
Plasma
Control Board LVDS P31 Connector Voltages and Diode Check
P31 Connector " Control Board” to “Main “P902”
Pin
Label
Run
Diode
Pin
Label
Run
Diode
50-51
n/c
n/c
n/c
*23
TA3+
1.29V
1.0V
49
UART_TXD
3.29V
Open
*22
TA3-
1.22V
1.0V
48
UART_RXD
3.29V
Open
21
Gnd
Gnd
Gnd
47
n/c
n/c
n/c
20
TAC+
1.19V
1.0V
46-44
Gnd
Gnd
Gnd
19
TAC-
1.14V
1.0V
*41
TB4+
1V
1.0V
18
Gnd
Gnd
Gnd
*40
TB4-
1.3V
1.0V
*17
TA2+
1V
1.0V
*39
TB3+
1.3V
1.0V
*16
TA2-
1.1V
1.0V
*38
TB3-
1.2V
1.0V
*15
TA1+
1.3V
1.0V
37
Gnd
Gnd
Gnd
*14
TA1-
1.2V
1.0V
36
TBC+
1.19V
1.0V
*13
TA0+
1.1V
1.0V
35
TBC-
1.14V
1.0V
*12
TA0-
1.3V
1.0V
34
Gnd
Gnd
Gnd
11
Gnd
Gnd
Gnd
*33
TB2+
1V
1.0V
7-10
n/c
n/c
n/c
*32
TB2-
1.1V
1.0V
6
SDA
3.29V
Open
*31
TB1+
1.3V
1.0V
5
DISP_EN
3.3V
Open
*30
TB1-
1.2V
1.0V
4
SCL
3.28V
Open
*29
TB0+
1.1V
1.0V
3
PC_SER_DATA
3.29V
Open
*28
TB0-
1.3V
1.0V
2
PC_SER_CLK
3.3V
Open
26-27
n/c
n/c
n/c
1
Gnd
Gnd
Gnd
*25
TA4+
1.1V
1.0V
*24
TA4-
1.3V
Pins 7, 10, 47, 50, 51 are n/c
Pins 1, 11, 18, 21, 34, 37,
44~46 are Ground
1.0V
1
* Indicates video signal
Note: There are no voltages in Stand-By mode.
112
October 2010
50PK950
Plasma
Control Board P2 Connector Pin ID and Voltages
Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.
P2 Connector " Control Board” to “Z-SUS Board” P107
Pin
Label
Run
15V_DD
18.3V
Open
13
n/c
n/c
n/c
11-12
+5V
4.92V
1.25V
9-10
Gnd
Gnd
1.49V
8
SUS_DN
0.80V
Open
7
CTRL_EN
0.40V
Open
6
SUS_UP
0.15V
Open
5
VZB2
2.50V
Open
4
ER_DN
0.128V
Open
3
VZB1
0V
Open
2
ER_UP
0.087V
Open
1
ZBIAS
1.90V
18V
Diode Mode
14-15
P2 Label
Open
P2
5V
1
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
113
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Plasma
Control Board (EMI Filter) Explained
The two EMI Filters just to the top right of P1 and one just to the top left of P2 are surface
mount mini devices which shunt high frequencies to ground. These high frequencies are
generated on the SMPS, Y-SUS and Control Board.
Each EMI filter has 4 pins as shown in the example.
The left and right are the B+ route, the two side solder points are Chassis Gnd.
FL1, FL2 and FL5
(5V EMI filters)
Gnd
5V
5V
Gnd
114
October 2010
50PK950
Plasma
P101 Connector " Control Board” to “Left X Board” P110
P101 Connector to the Left X-Board P110
(Pins not shown are n/c or Gnd)
Pin
Run
Diode Mode
Pin
Run
Diode Mode
1~4
3.3V
0.67V
33
1.0V
0.97V
6
1.0V
0.97V
34
1.27V
0.97V
7
1.27V
0.97V
36
1.0V
0.97V
8
1.0V
0.97V
37
1.27V
0.97V
9
1.27V
0.97V
39
1.0V
0.97V
11
1.0V
0.97V
40
1.27V
0.97V
12
1.27V
0.97V
41
1.0V
0.97V
13
1.0V
0.97V
42
1.27V
0.97V
14
1.27V
0.97V
44
1.0V
0.97V
15
1.0V
0.97V
45
1.27V
0.97V
16
1.27V
0.97V
46
1.0V
0.97V
18
1.0V
0.97V
47
1.27V
0.97V
19
1.27V
0.97V
49
1.0V
0.97V
20
1.0V
0.97V
50
1.27V
0.97V
21
1.27V
0.97V
51
1.0V
0.97V
23
1.0V
0.97V
52
1.27V
0.97V
24
1.27V
0.97V
53
1.0V
0.97V
26
1.0V
0.97V
54
1.27V
0.97V
27
1.27V
0.97V
56
0.5V
1.2V
28
1.0V
0.97V
57
0.5V
1.2V
29
1.27V
0.97V
58
3.24V
1.2V
31
1.0V
0.97V
59
1.83V
1.2V
32
1.27V
0.97V
60
1.86V
1~4
3.3V
1.2V
115
White hash
marks count
as 5
October 2010
50PK950
Plasma
P102 Connector " Control Board” to “Center X Board” P210
White hash marks
count as 5
1~4
3.3V
(Pins not shown are n/c or Gnd)
P102 Connector to the Center X-Board P110
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
1~4
3.3V
0.67V
21
1.27V
0.97V
37
1.27V
0.97V
53
1.0V
0.97V
6
1.0V
0.97V
22
1.0V
0.97V
39
1.0V
0.97V
54
1.27V
0.97V
7
1.27V
0.97V
24
1.0V
0.97V
40
1.27V
0.97V
56
0.5V
1.2V
9
1.0V
0.97V
25
1.27V
0.97V
42
1.0V
0.97V
57
0.5V
1.2V
10
1.27V
0.97V
27
1.0V
0.97V
43
1.27V
0.97V
58
3.24V
1.2V
12
1.0V
0.97V
28
1.27V
0.97V
45
1.0V
0.97V
59
1.83V
1.2V
13
1.27V
0.97V
30
1.0V
0.97V
46
1.27V
0.97V
60
1.86V
1.2V
15
1.0V
0.97V
31
1.27V
0.97V
48
1.0V
0.97V
16
1.27V
0.97V
33
1.0V
0.97V
49
1.27V
0.97V
18
1.0V
0.97V
34
1.27V
0.97V
51
1.0V
0.97V
19
1.27V
0.97V
36
1.0V
0.97V
52
1.27V
0.97V
116
October 2010
Note:
There are no voltages in
Stand-By mode.
50PK950
Plasma
P104 Connector " Control Board” to “Right X Board” P310
White hash marks
count as 5
1~4
3.3V
(Pins not shown are n/c or Gnd)
P104 Connector to the Right X-Board P310
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
1~4
3.3V
0.67V
21
1.27V
0.97V
37
1.27V
0.97V
53
1.0V
0.97V
6
1.0V
0.97V
22
1.0V
0.97V
39
1.0V
0.97V
54
1.27V
0.97V
7
1.27V
0.97V
24
1.0V
0.97V
40
1.27V
0.97V
56
0.5V
1.2V
9
1.0V
0.97V
25
1.27V
0.97V
42
1.0V
0.97V
57
0.5V
1.2V
10
1.27V
0.97V
27
1.0V
0.97V
43
1.27V
0.97V
58
3.24V
1.2V
12
1.0V
0.97V
28
1.27V
0.97V
45
1.0V
0.97V
59
1.83V
1.2V
13
1.27V
0.97V
30
1.0V
0.97V
46
1.27V
0.97V
60
1.86V
1.2V
15
1.0V
0.97V
31
1.27V
0.97V
48
1.0V
0.97V
16
1.27V
0.97V
33
1.0V
0.97V
49
1.27V
0.97V
18
1.0V
0.97V
34
1.27V
0.97V
51
1.0V
0.97V
19
1.27V
0.97V
36
1.0V
0.97V
52
1.27V
0.97V
117
October 2010
Note:
There are no voltages in
Stand-By mode.
50PK950
Plasma
X BOARD (LEFT, RIGHT and CENTER) SECTION
The following section gives detailed information about the X boards.
These boards deliver the Color information signal developed on the
Control board to the TCPs, (Taped Carrier Packages). The TCPs are
attached to the vertical FPCs, (Flexible Printed Circuits) which are
attached directly to the panel. The X boards are the attachment
points for these FPCs.
These boards have no adjustment.
These boards receive their main B+ from the:
• Originally developed on the Switch Mode Power Supply
Va (Voltage for Address) is routed through the Y-SUS board
and then to the Left X board via P121 pins 1~4. Va also
leaves P120 and is sent to the Center X via P220 pins 1~2.
Then it leaves on P221 and goes to the Right X P320 pins 1~2.
• Control board develops 3.3V (IC53) and routes to each XBoard via ribbon connectors P110, P210 and P310.
118
October 2010
50PK950
Plasma
X Board Additional Information
There are three X boards, the Left, Center and the Right
(As viewed from the rear of the set).
The three X boards have very little circuitry. They are basically signal and
voltage routing boards.
• They route Va voltage to all of the Taped Carrier Packages (TCPs).
Va is introduced to the Left X board first, then the Left X sends
Va to the Center X and then the Center X sends Va to the Right X.
• They route the Logic (Color) signals from the Control board
to all of the Taped Carrier Packages (TCPs).
• The X boards have connectors to 23 TCPs, 8 on the left and right. The
Center X board has connections to 7 TCPs.
There are a total of 23 TCPs and each TCP has 2 buffers, so there are a total
of 46 buffers feeding the panel’s 5760 vertical electrodes.
119
October 2010
50PK950
Plasma
X Board TCP Heat Sink Warning
NEVER run the television with this heat sink removed.
Damage to the TCPs will occur and cause a defective panel.
The Vertical Address
buffers (TCPs) have
one heat sink
indicated by the arrow.
It protects all 23 TCPs.
120
October 2010
50PK950
Plasma
X Board Layout Primary Circuit Diode Check
The three X-Boards have similar circuit layouts for the connections going to the TCPs, as shown below.
Gnd
3.3V
Gnd
Data
Gnd
Data
Va
Gnd
3.3V
VA
3.3V
VA
EC
VA
Gnd
Gnd
VA
-
-
On Gnd
On the below:
On any Va (0.42V) TCPs connected.
On any Va (Open) TCPs disconnected.
On 3.3V (0.33V) TCPs connected.
On 3.3V (0.33V) TCPs disconnected.
On any EC (Open) TCPs connected.
On any EC (Open) TCPs disconnected.
VA source
disconnected
from Left X board
121
+
+
EC
On Gnd
On the below:
On any Va (Open) TCPs connected.
On any Va (Open) TCPs disconnected.
On 3.3V (0.66V) TCPs connected.
On 3.3V (0.66V) TCPs disconnected.
On any EC (Open) TCPs connected.
On any EC (Open) TCPs disconnected.
October 2010
50PK950
Plasma
TCP (Tape Carrier Package)
This shows the layout of the bottom ribbon cables connecting to the Panel’s Vertical electrodes,
(Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.
X Drive Board
Y-SUS Board
Logic
X_B/D
Frame
Rear panel Vertical Address
Front panel Horizontal Address
256 Vertical
Electrodes
Va
Control Board
3.3V
ctor
Conne
256 total lines
128 lines
TCP
Taped Carrier
Package
Chocolate
128 lines
Con
nect
or
Flex
ibl
Cabl e
e
TCP
Attached directly
to Flexible cable
Long Black
Heat Sink
Back side of TCP Ribbon
122
October 2010
50PK950
Plasma
TCP Testing
50PK950 X Board TCP Connector Distribution
Any X Board to Any TCP P101~P108 or P201~P207 or P301~P308
Va: Comes from Y-SUS P114 1~4
Va: Comes In on:
Left X : P121 pins 1~4
Leaves to Center X P120 pins 1~2
Center X : P220 pins 1~2
Leaves to Right X P221 pins 1~2
Right X : P320 pins 1~2
3.3V Origination
From Control board
IC53 center leg.
Arrives on X boards P110,
P210, P310
Pins 57, 58, 59, 60
Flexible Printed Ribbon Cable to TCP IC
+
Must be checked on flexible cable.
-
On any Gnd
EC Gnd
Reversed
On Va (0.51V)
On 3.3V (0.54V)
On EC (Open)
On Va (Open)
On 3.3V (2.8V)
On EC (Open)
Gnd
Va
On the below:
Gnd Va
3.3V
EC
n/c
n/c
1
5
10 15 20
123
25
30
35
40
45
Look for any TCPs
being discolored.
Ribbon Damage.
Cracks, folds
Pinches, scratches,
etc…
50
October 2010
50PK950
Plasma
TCP 3.3V B+ Check
For Connectors P101, P102
and P104 on the Control
board, see Control board
section.
Warning: DO NOT attempt to run the set with the
Heat Sink over the TCPs removed.
Checking IC53 for 3.3V, use center pin or Top of component.
With all connectors connected, place the Red
Lead On 3.3V Diode Check (0.66V)
Black Lead On 3.3V Diode Check (0.33V)
This also test IC100, IC200 and IC300
IC53
5V
3.3V for TCPs
IC53 on
Control Board
3.3V
Gnd
3.3V in on Pins 57 ~ 60 on any connector from the Control board
3.3V
Left X Board P110
3.3V
Center X Board P210
3.3V
Right X Board P310
All Connectors to All TCPs look very
similar for the 3.3V test point. The trace
at pins 33 and 34 of each connector.
There will be two small feed troughs',
(TP) you can use for Test Points.
Example here from P203. You can only
check for continuity back to IC53, you
can not run the set with heat sink
removed.
124
October 2010
50PK950
Plasma
TCP Visual Observation. Damaged TCP
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
After a very short time, these ICs will begin to self destruct due to overheating.
This damaged TCP can, (at the location of the TCP).
a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).
b) Generate abnormal vertical bars, (colored noise).
c) Cause the entire area driven by the TCP to be “All White” or “ALL BLACK”.
d) Cause a “Single Pixel Width Line” defect. The line can be Red, Green or Blue.
e) A dirty contact at the connector can cause b, c and d also.
“TCP”
Taped
Carrier
Package
Look for burns, pin
holes, damage, etc.
125
October 2010
50PK950
Plasma
Left X Drive P121 Connector from Y-SUS P114 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)
With Heat Sink
1
P121 Connector " X-Drive Left Board " from " Y-SUS” P114
Pin
Label
Run
Diode Mode
1-4
VA
*60V
Open
5
n/c
n/c
n/c
6-7
Gnd
Gnd
Gnd
* Note: This voltage will vary in accordance with Panel Label.
There are no Stand-By voltages on this connector.
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
126
October 2010
50PK950
Plasma
P110 Connector “Left X Board” to “Control” P101
White hash marks
count as 5
P110 Left Connector to the Control Board P101
Pin
Run
Diode Mode
Pin
Run
Diode Mode
1
1.86V
Open
23
1.0V
Open
2
1.83V
Open
24
1.27V
Open
3
3.24V
Open
25
1.0V
Open
4
0.5V
2.81V
26
1.27V
Open
5
0.5V
2.54V
27
Gnd
Gnd
6
Gnd
Gnd
28
1.0V
Open
7
1.27V
Open
29
1.27V
Open
8
1.0V
Open
30
1.0V
Open
9
1.27V
Open
31
1.27V
Open
Pin
Run
Diode Mode
10
1.0V
Open
32
Gnd
Gnd
45
1.0V
Open
11
Gnd
Gnd
33
1.0V
Open
46
1.27V
Open
12
1.0V
Open
34
1.27V
Open
47
Gnd
Gnd
13
1.27V
Open
35
Gnd
Gnd
48
1.0V
Open
14
Gnd
Gnd
36
1.0V
Open
49
1.27V
Open
15
1.0V
Open
37
1.27V
Open
50
Gnd
Gnd
16
1.27V
Open
38
Gnd
Gnd
51
1.0V
Open
17
1.0V
Open
39
1.0V
Open
52
1.27V
Open
18
1.27V
Open
40
1.27V
Open
3
Gnd
Gnd
19
Gnd
Gnd
41
Gnd
Gnd
54
1.0V
Open
20
1.0V
Open
42
1.0V
Open
56
n/c
Open
21
1.27V
Open
43
1.27V
Open
55
1.27V
Open
22
Gnd
Gnd
44
Gnd
Gnd
57~60
3.3V
Open
1
57~60 pins
3.3V TP
57~60
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
127
October 2010
50PK950
Plasma
P210 Connector " Center X Board“ to ”Control Board” P102
P210 Connected to the Control Board P102
White hash marks
count as 5
Pin
Run
Diode Mode
Pin
Run
Diode Mode
1
1.86V
Open
23
1.0V
Open
2
1.83V
Open
24
1.27V
Open
3
3.24V
Open
25
1.0V
Open
4
0.5V
2.81V
26
1.27V
Open
5
0.5V
2.54V
27
Gnd
Gnd
6
Gnd
Gnd
28
1.0V
Open
7
1.27V
Open
29
1.27V
Open
8
1.0V
Open
30
1.0V
Open
9
1.27V
Open
31
1.27V
Open
Pin
Run
Diode Mode
10
1.0V
Open
32
Gnd
Gnd
45
1.0V
Open
11
Gnd
Gnd
33
1.0V
Open
46
1.27V
Open
12
1.0V
Open
34
1.27V
Open
47
Gnd
Gnd
13
1.27V
Open
35
Gnd
Gnd
48
1.0V
Open
14
Gnd
Gnd
36
1.0V
Open
49
1.27V
Open
15
1.0V
Open
37
1.27V
Open
50
Gnd
Gnd
16
1.27V
Open
38
Gnd
Gnd
51
1.0V
Open
17
1.0V
Open
39
1.0V
Open
52
1.27V
Open
18
1.27V
Open
40
1.27V
Open
3
Gnd
Gnd
19
Gnd
Gnd
41
Gnd
Gnd
54
1.0V
Open
20
1.0V
Open
42
1.0V
Open
56
n/c
Open
21
1.27V
Open
43
1.27V
Open
55
1.27V
Open
22
Gnd
Gnd
44
Gnd
Gnd
57~60
3.3V
Open
1
57~60 pins
3.3V TP
57~60
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
128
October 2010
50PK950
Plasma
P310 Connector “Right X Board” to “Control” P104
White hash marks
count as 5
P310 Connected to the Control Board P104
Pin
Run
Diode Mode
Pin
Run
Diode Mode
1
1.86V
Open
23
1.0V
Open
2
1.83V
Open
24
1.27V
Open
3
3.24V
Open
25
1.0V
Open
4
0.5V
2.81V
26
1.27V
Open
5
0.5V
2.54V
27
Gnd
Gnd
6
Gnd
Gnd
28
1.0V
Open
7
1.27V
Open
29
1.27V
Open
8
1.0V
Open
30
1.0V
Open
9
1.27V
Open
31
1.27V
Open
Pin
Run
Diode Mode
10
1.0V
Open
32
Gnd
Gnd
45
1.0V
Open
11
Gnd
Gnd
33
1.0V
Open
46
1.27V
Open
12
1.0V
Open
34
1.27V
Open
47
Gnd
Gnd
13
1.27V
Open
35
Gnd
Gnd
48
1.0V
Open
14
Gnd
Gnd
36
1.0V
Open
49
1.27V
Open
15
1.0V
Open
37
1.27V
Open
50
Gnd
Gnd
16
1.27V
Open
38
Gnd
Gnd
51
1.0V
Open
17
1.0V
Open
39
1.0V
Open
52
1.27V
Open
18
1.27V
Open
40
1.27V
Open
3
Gnd
Gnd
19
Gnd
Gnd
41
Gnd
Gnd
54
1.0V
Open
20
1.0V
Open
42
1.0V
Open
56
n/c
Open
21
1.27V
Open
43
1.27V
Open
55
1.27V
Open
22
Gnd
Gnd
44
Gnd
Gnd
57~60
3.3V
Open
1
57~60 pins
3.3V TP
57~60
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
129
October 2010
50PK950
Plasma
P120, P220, P221 and P320 Connector Va from Left to Center to Right X
Voltage and Diode Mode Measurement (No Stand-By Voltages)
All Connectors are 4 Pin
Pin
Label
Run
Diode Mode
1-2
VA
*60V
Open
3-4
Gnd
Gnd
Gnd
* Note: This voltage will vary in accordance with Panel Label.
There are no Stand-By voltages on this connector.
P120 Left X
P220 Center X
P221 Center X
P320 Right X
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
130
October 2010
50PK950
Plasma
P120, P220, P221 and P320 X Board Connector (VA Diode Check)
P120 Left X
P220 Center X
P221 Center X
Va Right 2 pins
Both Connectors
Gnd Left 2 pins
+
On Chassis Gnd
Va Right 2 pins
Both Connectors
Gnd Left 2 pins
+
-
P320 Right X
On Va (3.276V) all connectors
connected.
On Va (Open) Y-SUS connector
removed, TCPs connected.
On Va (Open) all connectors removed,
TCPs disconnected.
131
On Chassis Gnd
On Va (0.42V) all connectors
connected.
On Va (0.42V) Y-SUS connector
removed, TCPs connected.
On Va (0.5V) all connectors removed,
TCPs disconnected.
October 2010
50PK950
Plasma
MAIN BOARD SECTION
The following section gives detailed information about the Main board. This board contains the
Microprocessor, Audio section, video section and all input, outputs. It also receives all input
signals and processes them to be delivered to the Control board via the LVDS cable.
The (VSB, 8VSB and QAM) tuner is located on the main board. This board is also where the
television’s software upgrades are accomplished through the USB input.
The Main board also has a LAN (CAT5) input to allow open Internet access. In addition, the Main
board has an output to the Wireless Media box (Dongle) for control and either one of the USB ports
can accept the Dongle wireless receiver.
This board has no mechanical adjustments.
The Main Board Receives its operational voltage from the SMPS:
DURING STAND-BY: From SMPS
• STBY 5V
DURING RUN From SMPS : (STBY 5V remains):
• +5V for Video processing
• 17V for Audio and Tuner B+ (Stepped down to 5V)
•
•
•
•
Distributes Key 1 and Key 2 to the Front IR Board then to the Front Key Pad.
Receives Intelligent Sensor data from the Front IR Board (via SCL/SDA).
Drives front Power LEDs.
Distributes +3.3V_ST to the Front IR Board.
132
October 2010
50PK950
Plasma
Main Board Layout and Identification
P1001
Motion
Remote
P702
LOGO
P902
LVDS
P703
to Ft IR
P700
N/C
P400 to
SMPS
P900
N/C
IC701
Microprocessor
SW700
Reset
IC501 Video Processor
USB 1
RS232
PC
P300
Audio
PC
Audio
Optical
Audio
Remote
Dongle
USB 2
HDMI
TU1400
Tuner
LAN
Cat5
Remote
HDMI
Rear
Inputs
133
October 2010
50PK950
Plasma
50PK950 Main Front Layout Drawing
P400 Main to P813 SMPS
Pin
1, 2
Label
a
17V
3, 4
Gnd
5V
c
Gnd
Gnd
Diode
Open
0.4V 5.17V
1.84V
Gnd
3.49V 5.13V
1.24V
9-12
Gnd
13-14
Stby 5V
Gnd
15
a
RL_ON
0V
3.26V
16
AC_Det
0V
4.06V
b
M5_ON
0V
3.28V
P700
n/c
P902
1.93V
Gnd
Gnd
1
L406
2
IC401
IC405
P400
IC404
X701
P900
n/c
32.768khz
IC603
IC605
IC402
3
2
IC700
1
1.93V
17
X700
1.93V
d
3
IC400
10MHz
1.21V
Gnd
P1001
P702
Gnd
Error Det 3.47V 4.1V
5, 7
8
STBY Run
0V
17.3V
e
Auto_Gnd Gnd
Q900
D
P703 (Main) to P100 (Ft IR)
STBY
2.82V
Gnd
3.14V
3.28V
3.15V
Gnd
Run
2.82V
Gnd
3.13V
3.28V
0V
Gnd
0.57V
0.8V
3.28V
3.28V
Gnd
3.28V
5.17V
0V
Gnd
1.24V
1.24V
1.7V
MAIN BOARD
p/n: EBT60955910
SW700
1.82V
1.82V
Gnd
3.28V
0.42V
0V
S
G
Q901
Diode
2.68V
Gnd
1.83V
1.83V
1.87V
Gnd
P703
X900
54MHz
IC1102
IC300
IC705
p/n: EBT60955910 50PK950-UA AUSALHR
Other
p/n: EBR68027905 50PK950-UA AUSALJR
Main
p/n: EBT60955914 50PK950-UA AUSALUR
IC200 p/n:
p/n: EBT60955914 50PK950-UA AUSLLUR
P300
Pin
Label
1
IR
Gnd
2
Key 1
3
Key 2
4
LED-R
5
Gnd
6
7
SCL
8
SDA
9
Gnd
10
3.3V_ST
11 3.3V_Multi
12
LED W
IC406
IC500
S
G
D
18
L408
To
Speakers
(All Pins
8.63V)
3
2
1
IC403
IC1101
TU1400
TDVJ-H001F
18. IF p
17. IF n
16. IF AGC
15. Reset
14. 3.3V
13. 1.26V
12. GND
Analog Video 11. CVBS
10. NC
9. SIF
Digital Video
C
Q1402
B
E
8. NC
7. SDA
6. SCL
5. NC
4. NC
3. 5V
Q?
2. NC
1. NC
134
October 2010
50PK950
Plasma
50PK950 Main Board Front Side Component Voltages
IC400
3.3V_NEC_ST
Pin
Regulator
[1] Gnd
[2] 3.3V
[3] 5V
IC401
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
DDR 1.8V
Regulator
6.75V
5.0V
1.85V
Gnd
Gnd
2.356V
0.9V
1.0V
2.4V
3.3V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
D3.3V / +3.3V
Regulator
5V
3.3V
3.3V
7.48V
3.3V
0.8V
5V
Gnd
IC402
IC403
A2.5V
Pin Regulator
[1] 1.26V
[2] 2.5V
[3] 5V
IC404
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
IC405
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
7V (to IC405)
Regulator
17.1V
7.11V
7.11V
11.95V
3.3V
0.8V
5.0V
Gnd
IC406
D1.2V / A1.2V
Regulator
Gnd
4.99V
Gnd
1.26V
0V
n/c
6.17V
5.0V
5.0V
5.0V
1.27V
Gnd
3.3V
0.83V
IC705
NVRAM
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
IC1101
USB1 5V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
5V (Tuner)
Pin
Reg
[1] 7.13V
[2] 5V
[3] 7V
IC1102
Q701
Pin
[B]
[E]
[C]
Q900
RS232 IR
Buffer
0.574V
Gnd
0V
SCL to LVDS
Pin
FET
[G] 3.28V
[S] 3.28V
[D] 3.28V
135
Q901
Pin
[G]
[S]
[D]
Q1402
SDA to LVDS
FET
3.276V
3.289V
3.28V
Video Buffer
Pin
[B] 2.05V
[E] 2.75V
[C] Gnd
Gnd
Gnd
Gnd
Gnd
3.28V
3.28V
Gnd
3.28V
5.0V
Gnd
3.2V
0V
0V
5.1V
0V
3.28V
USB2 5V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
October 2010
Gnd
5.14V
5.14V
0.04V
3.28V
4.94V
4.94V
n/c
50PK950
Plasma
50PK950 Main Back Layout Drawing
IC1001
IC700
IC602
IC606
IC604
Q500
B
E
Q200
C
B
S
D
A1
D200
G
A2
C
3
2
1
IC707
MAIN BOARD
p/n: EBT60955910
p/n: EBT60955910 50PK950-UA AUSALHR
p/n: EBR68027905 50PK950-UA AUSALJR
Other Main Boards Used:
p/n: EBT60955914 50PK950-UA AUSALUR
p/n: EBT60955914 50PK950-UA AUSLLUR
D212
A1 A2
Q207
C
C
C
E
B
E
B
TU1400
IC1400 TDVJ-H001F
3
1
2
Q208
C
E
B
Q1401
18. IF p
17. IF n
16. IF AGC
15. Reset
14. 3.3V
13. 1.26V
12. GND
11. CVBS
10. NC
9. SIF
8. NC
7. SDA
6. SCL
5. NC
4. NC
3. 5V
IC702
IC704
Q1301
Q206
B
D211
Q205
IC101
B
D210
B
E
A2
A1
CE
B
E
A2
A1
E
Q100
136
S
E
B
C
G
D
C
Q203
C
B
C
E
C
Q204
C
2. NC
1. NC
Q1300
IC100
B
E
A2
A1
CE
Q202
Q101
C
C
Q201
Q702
EE
B
B
C
E
C
B
D209
Q703
C
C
C
B
B
E
Q102
October 2010
50PK950
Plasma
50PK950 Main Board Back Side Component Voltages
IC100
RS232 Control
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
IC101
1.65V
1.65V
4.56V
1.65V
1.65V
4.66V
Gnd
n/c
1.657V
0V
4.5V
0V
1.657V
5.12V
IC700
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
DDR_VTT
Regulator
Gnd
3.3V
0.43V
0.94V
1.857
3.3V
1.86V
0.93V
IC602
3.34V
5.78V
0V
0V
0.2V
(-5.68V)
5.78V
Gnd
n/c
Gnd
3.3V
0V
0V
(-5.68V)
Gnd
3.3V
Pin
[A1]
[A2]
[C]
HDMI Hot Swap
Routing HDMI1
5.13V
0.15V
4.67V
D209
D210
HDMI Hot Swap
Pin Routing HDMI2
[A1] 5.13V
[A2] 0.15V
[C] 4.67V
RS232 Selector
Reset IC
Q100
Pin
[1] 3.3V
[2] Gnd
[3] 3.31V
IC1400
Reset IC
Motion Remote
IC
0V (3.3V M_Remote Used)
3.3V (0.3V M_Remote Used)
n/c
n/c
n/c
Gnd
Gnd
Gnd
n/c
0.02V
0V
3.3V
0V (3.3V M_Remote Used)
3.3V
3.3V
3.3V
Q101
Pin
[B] 0V
[C] 3.33V
[E] Gnd
HDMI Hot Swap
Pin Routing HDMI3
[A1] 5.13V
[A2] 0.15V
[C] 4.67V
HDMI Hot Swap
Routing HDMI4
5.13V
0.15V
4.67V
Pin
[B] 0.6V
[C] 0V
[E] Gnd
Q200
Pin
[A1]
[A2]
[C]
Hot Swap HDMI2
Pin
[B] 4.27V
[C] 0V
[E] Gnd
Q208
Hot Swap HDMI4
Pin
[B] 0V
[C] 5V
[E] Gnd
D200
HDMI CEC Limiter
Pin
[A1] 0V
[A2] 3.31V
[C] 3.18V
Q500
Flash WP
Pin
[B] 0V (Flash_WP)
[C] 3.36V
[E] Gnd
Hot Swap HDMI3
Pin
[B] 4.27V
[C] 0V
[E] Gnd
Q702
IR Out
Pin
2nd Buffer
[B] 0V
[C] 3.32V
[E] Gnd
Hot Swap HDMI1
Pin
[B] 0V
[C] 4.26V
[E] Gnd
Q703
IR Out
Pin
1st Buffer
[B] 0.62V
[C] 0V
[E] Gnd
Hot Swap HDMI2
Pin
[B] 0V
[C] 4.26V
[E] Gnd
Q1300
Wired IR
Pin
1st Buffer
[E] Gnd
[B] 0V
[C] 17V
Hot Swap HDMI3
Pin
[B] 0V
[C] 4.26V
[E] Gnd
Q1301
Wired IR
Pin
2nd Buffer
[G] 17V
[S] 17.1V
[D] 0V
Q1401
SIF Buffer
Pin
[B] 0.165V
[E] 0.83V
[C] Gnd
RGB W/P
Q102
D212
Q202
Pin
[B] 0V
[C] 5.12V
[E] Gnd
Pin
[1] 0V
[2] 1.29V
[3] 3.27V
D211
Hot Swap HDMI4
Pin
[B] 4.28V
[C] 0V
[E] Gnd
Q206
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
Q207
Q204
IC707
IC1001
3.26V
3.26V
n/c
n/c
n/c
Gnd
n/c
Gnd
Gnd
4.99V
4.99V
0.88V
3.3V
3.3V
3.3V
5V
Hot Swap HDMI1
Pin
[B] 4.27V
[C] 0V
[E] Gnd
Q203
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
RS232 Selector
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
Gnd
Gnd
Gnd
Gnd
4.325V
4.8V
5.12V
5.0V
IC704
Gnd
Gnd
Gnd
Gnd
3.3V
3.3V
Gnd
3.3V
Q201
Q205
IC702
RS232 EEPROM
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Micro EEPROM
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Pin
[B]
[G]
[S]
[D]
137
Wired IR
1st Buffer
Wired IR
2nd Buffer
CEC Remote
HDMI CEC
2.59V
3.3V
2.58V
3.25V
October 2010
50PK950
Plasma
Main Board Tuner Check (Shield Off) Pins Exposed TDVJ-H001F
The pins can not be accessed from the front with the cover removed. Use the back of the board.
Data Pin 7 Clock Pin 6 Only present during Channel Change
Dig Video Pins 17-18 Test Point
Pin 14 B+ (3.3V)
Pin 13 B+ (1.26V)
Analog Video Pins 11 Test Point
SIF Pin 9 Audio Test Point
Data Pin 7
Clock Pin 6
Pin 3 Tuner B+ (5V)
Pin 1
TU1400 (Back bottom left hand side)
TU1400 (Front bottom right hand side)
138
October 2010
50PK950
Plasma
Main Board Tuner Check (Shield Off) Pins Exposed TDVW-H103F
You must use the back of the board for Test Points.
Data Pin 7 Clock Pin 6
Only present during
Channel Change
To keep the Data and Clock lines running so they can
Main Board
be measured easily, place the unit into “Auto Tuning”.
139
October 2010
50PK950
Plasma
Main Board Tuner Video and SIF Output Check
You must use the back of the board for Test Points.
USING COLOR BAR SIGNAL INPUT
MAIN Board
Tuner Location
Pin 11 “Analog
Video” Signal
Note: NTSC Only
“Video Out” Signal only when
receiving an analog Channel.
2.24Vp/p
500mV / 10uSec
Pin 9 “SIF”
Signal
450mVp/p
700mVp/p
200mV / 2uSec
Note: Pin 17 and Pin 18
“Dig IF” Signal
8VSB or QAM
Only when receiving a
Digital Channel.
100mV / 1uSec
140
October 2010
50PK950
Plasma
Main Board Crystal X700, X701 and X900 Check
X700 10Mhz
Left Side 2.45V p/p
X700 Runs all the time (Micro Crystal)
Right Side 3.80V p/p
X700
1.79V
1.458V
1.43V
1.77V
X701
X701 32.768KHZ
Left Side 2.94V p/p
X700
Right Side 3.00V p/p
X701 Runs all the time (Micro Halt Crystal)
X701
X900
1.5V
X900
X900 54Mhz
Bottom Leg 328mV p/p
1.495V
MAIN Board
Crystal Location
Top Side 312mV p/p
Very Noisy
X900 Runs only during “On”
(Overtone Crystal)
141
October 2010
Reading this
Crystal may
cause video
lock up
50PK950
Plasma
Main Board P902 (Removing the LVDS Cable
(1) Using your fingernail, lift up
the locking mechanism.
Since the locking tab is very
thin and fragile, its best to lift
slightly one end, then work
across the locking tab
a little at a time, back and forth
until the tab is released.
(2) Pull the Cable from the
Connector
142
October 2010
50PK950
Plasma
Main Board Plug P400 to Power Supply Voltages and Diode Check
Pin
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
P400 Connector " Main " to " SMPS Board " P813
Pin
Label
front
P400
STBY
Run
Diode Mode
1-2
a
17V
0V
16.9V
Open
3-4
Gnd
Gnd
Gnd
Gnd
5V
0V
5.19V
1.22V
Error Det
3.47V
4.11V
1.84V
a
5-7
ac
8
9-12
Gnd
Gnd
Gnd
Gnd
13-14
Stby 5V
3.49V
5.15V
1.17V
15
RL On
0V
3.26V
1.85V
AC Det
0V
4.07V
1.78V
M_ON
0V
3.26V
1.84V
Auto Gnd
Gnd
Gnd
Front pins are odd
Back pins are even
Gnd
16
ad
17
b
18
e
a Note: The 17V, 5V, AC_Det and Error Det turn on when the RL_On command arrives.
b Note: The M5V, Va and Vs turn on when the M_ON (Monitor On) command arrives.
c Note: The Error Det line is not used in this model.
d Note: If the AC Det line is Missing, the TV will not turn on.
(Relays will click, then no functions. LOGO stays on).
e Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on
Automatically when AC is applied.
143
October 2010
50PK950
Plasma
Main Board Plug P703 to Ft Keys
Voltage and Diode Mode Measurements for the Main Board
P703 Connector " Main Board " to P100 " Front Keys "
Pin
Diode Check
IR
2.82V
2.83V
2.68V
Gnd
Gnd
Gnd
Gnd
3
Key1
3.14V
3.14V
1.83V
4
Key2
3.28V
3.28V
1.77V
5
LED-RED
3.15V
0V
1.77V
6
Gnd
Gnd
Gnd
Gnd
7
SCL
0.77V
3.28V
1.76V
8
SDA
0.77V
3.28V
1.76V
9
Gnd
Gnd
Gnd
Gnd
10
3.3V_ST
3.29V
3.28V
1.13V
11
3.3V_MULTI
0.41V
5.18V
1.22V
12
Stand-By
3.3V
Run
2
7 & 8
Intelligent
Sensor
STBY
1
To IR Board for
Soft Touch Key
Pad.
Label
LED-WHITE
0V
0V
1.65V
1
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
144
October 2010
50PK950
Plasma
Main Board Speaker Plug P300 Voltage and Diode Check
Voltage and Diode Mode Measurements for the Main Board Speaker Plug
P300 Connector " Main " to " Speakers "
Pin
Label
SBY
Run
Diode Mode
1
R-
0V
8.44V
Open
2
R+
0V
8.44V
Open
3
L-
0V
8.44V
Open
4
L+
0V
8.44V
Open
Main Board Location
IC300
Audio Amp
1
Right (-)
P300
Right (+)
Speaker
Connector Left (-)
Left (+)
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
145
October 2010
50PK950
Plasma
Main Board P902 LVDS Video Signal Test Points
1
Waveforms Taken from P902 pins 11 and 12, but there
are actually 24 pins carrying video.
Input Signal SMPT Color Bar
Main Board P902 Location
MAIN Board
146
October 2010
50PK950
Plasma
Main Board Plug P902 “LVDS” Voltages
Voltage and Diode Test for the Main Board
P902“Main Board” Connector to P31 " Control Board”
Pin
1-2
Label
Run
Diode
Pin
Label
Run
Diode
n/c
n/c
n/c
*29
TA3+
1.29V
1.0V
3
UART_TXD
3.29V
Open
*30
TA3-
1.22V
1.0V
4
UART_RXD
3.29V
Open
31
Gnd
Gnd
Gnd
5
n/c
n/c
n/c
32
TAC+
1.19V
1.0V
6-10
Gnd
Gnd
Gnd
33
TAC-
1.14V
1.0V
*11
TB4+
1V
1.0V
34
Gnd
Gnd
Gnd
*12
TB4-
1.3V
1.0V
*35
TA2+
1V
1.0V
*13
TB3+
1.3V
1.0V
*36
TA2-
1.1V
1.0V
*14
TB3-
1.2V
1.0V
*37
TA1+
1.3V
1.0V
15
Gnd
Gnd
Gnd
*38
TA1-
1.2V
1.0V
16
TBC+
1.19V
1.0V
*39
TA0+
1.1V
1.0V
17
TBC-
1.14V
1.0V
*40
TA0-
1.3V
1.0V
18
Gnd
Gnd
Gnd
41
Gnd
Gnd
Gnd
*19
TB2+
1V
1.0V
42-45
n/c
n/c
n/c
*20
TB2-
1.1V
1.0V
46
SDA
3.29V
Open
*21
TB1+
1.3V
1.0V
47
DISP_EN
3.3V
Open
*22
TB1-
1.2V
1.0V
48
SCL
3.28V
Open
*23
TB0+
1.1V
1.0V
49
PC_SER_DATA
3.29V
Open
*24
TB0-
1.3V
1.0V
50
PC_SER_CLK
3.3V
Open
n/c
n/c
n/c
51
Gnd
Gnd
Gnd
*27
TA4+
1.1V
1.0V
*28
TA4-
1.3V
1.0V
25-26
1
* Indicates video signal
Note:
There are no voltages in
Stand-By mode.
Diode Mode Check with the
Board Disconnected.
147
October 2010
50PK950
Plasma
Main Board P1001 and P702 Connector Voltage and Diode Check
P1001 “Main " to “Motion Remote Board“
P702 “Main " to “Center LOGO Board“ J1
Pin
Label
STBY
Run
Diode
Check
Pin
Label
STBY
Run
Diode
Check
1
+3.3V
0V
3.33V
0.5V
1
+5V
0V
5V
1.23V
2
Gnd
Gnd
Gnd
Gnd
2
*LED_Breathing
0V
*0V~3V
1.77V
3
M_REMOTE_RX
0V
3.3V
1.2V
3
Gnd
Gnd
Gnd
Gnd
4
M_REMOTE_TX
0V
3.3V
1.2V
5
RF_Reset
0V
2.99V
2.36V
6
DC
0V
3.1V
1.72V
7
DD
0V
3.1V
1.72V
8
Gnd
Gnd
Gnd
Gnd
* 3V When the LOGO LED is On.
This line gradually goes high to turn
on and down when going off.
Diode Mode values taken with all Connectors Removed
148
October 2010
50PK950
Plasma
FRONT IR, POWER LED and MOTION REMOTE RECEIVER SECTION
The following section gives detailed information about the Front IR and
Motion Remote Sensor. The IR board contains the Infrared Receiver,
Intelligent Sensor and Power LEDs section. The Motion Remote Receiver
receives signals from the Motion Remote to manipulate the pointer.
The Power LED Driver and Intelligent Sensor IC communicate with the Main
Board Microprocessor (IC701) via Clock and Data lines.
These boards have no adjustments.
The Front Control Board (IR and Intelligent Sensor) receives its operational
B+ from the Main Board:
• 3.3V_ST from the Main Board. This voltage is generated on the
Main Board (IC400)
• 3.3V_MULTI generated on the Main Board (IC402).
The Front Power LEDs are driven by 2 separate pins from the Main board
SCL/SDA pins 7 and 8.
The IR signal is routed back to the Main Board via pin 1.
Also, the Motion Remote routes it’s output signal back to the Main Board
P1001 pin 4.
149
October 2010
50PK950
Plasma
Front Control (IR and Intelligent Sensor) Board and Power LED Board Location
Front IR Board
P100
To Main
Lower Left Side (As viewed from rear).
P101
To Soft Touch
Key Pad
Soft Touch Key Pad
(Behind)
Thin strip adhered to
the protective front
glass.
To remove P101 ribbon, using your fingernail, lift up the locking
mechanism. Slide the board out to the left to release the ribbon
cable.
To facilitate reinstallation, slide the board to the right
just enough to place a slight bow in the ribbon cable,
then using a small object, press down gently on the ribbon. When
properly seated, the ribbon will be under the two plastic tabs in the
connector.
150
October 2010
50PK950
Plasma
Front IR and Intelligent Sensor Board Voltages
p/n: EBR65007705
P100
IC100
IC103
P101
IC101 Intelligent
Sensor
IC102 IR Receiver
Label
Readings
G: Ground
V: B+
O: Output
0V
3.24V
2.85V
IC102
Q101 Red
LED Driver
IC102 IR
Receiver
Q101 and Q102
On State
Off State
B: 0V
B: 0.8V
C: 3.24V
C: 0V
E: Gnd
E: Gnd
Q101 Red On in Stand-By
Q102 Green On in Run
151
Q102 Green
LED Driver
LD101
LD103
LD100
Power LEDs
Green on
Left
Red on
Center
Green on
Right
The Green LEDs come on during power on, but
turn off shortly after the set comes on.
October 2010
50PK950
Plasma
Front IR Board Connector P100 Voltage and Pin Identification
P100 Connector “IR Board " to P703 " Main Board "
Pin
Diode Check
1
IR
2.82V
2.82V
Open
2
Gnd
Gnd
Gnd
Gnd
Key1
3.14V
3.13V
1.83V
Key2
3.28V
3.3V
1.83V
5
LED-RED
3.16V
3.28V
Gnd
6
Gnd
Gnd
Gnd
Gnd
7
SCL
0.57V
3.28V
1.8V
8
SDA
0.8V
3.28V
1.8V
9
Gnd
Gnd
Gnd
Gnd
10
3.3V_ST
3.28V
3.28V
1.22V
11
Stand-By
3.3V
Run
4
7 & 8
Front LEDs
and
Intelligent
Sensor
STBY
3
For the Soft Touch
Key Pad section.
Label
3.3V_MULTI
0.42V
5.17V
1.21V
12
LED-WHITE
0V
0V
1.739V
For Readings when any Key is
touched, see Soft Key Pad Section
For Key 1 and Key 2.
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
152
October 2010
50PK950
Plasma
Front IR Board Plug P101 to Soft Touch Keys (Voltages and Pin Identification)
Voltage and Diode Mode Measurements for the Main Board
P101 CONNECTOR “Ft IR Board " to " Ft Key Pad”
Pin
STBY
Run
Diode Mode
1-4
0V
0V
Open
5-8
n/c
n/c
Open
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
153
October 2010
50PK950
Plasma
MOTION REMOTE SECTION
The first time the Motion Remote has it’s batteries installed and pointed
at the Television, the Motion Remote is synchronized with the TV.
After that, when pointing the remote at the TV and pressing the
Enter key, a pointer appears on screen, then by moving the Motion
Remote around, the pointer moves with the movement of the
remote. When the pointer is placed over a selectable button, you
can press the center “Enter” button and active the object. This
makes navigation much easier.
You can also adjust the volume, change channels and mute the audio
with the Motion Remote.
A convenient wrist band can be attached to the remote to avoid
dropping and damaging the remote.
The Motion Remote utilizes a specialized receiver to receive the IR
signal and this information is then routed to P1001 and on to the
IC1001 where the signal is then routed to the BCM IC for pointer
positioning and interpretation of the other functions.
Motion Remote “Magic Remote” AKB73035402
154
October 2010
50PK950
Plasma
Motion Remote Connector Voltage and Diode Check
“Motion Remote " to “Main Board“ P1001 Motion Remote
Pin
Label
STBY
Run
Diode
Check
1
+3.3V
0V
3.33V
1.17V
2
Gnd
Gnd
Gnd
Gnd
3
M_REMOTE_RX
0V
3.3V
1.95V
4
M_REMOTE_TX
0V
3.3V
1.95V
5
RF_Reset
0V
2.99V
Open
6
DC
0V
3.1V
1.96V
7
DD
0V
3.1V
1.96V
8
Gnd
Gnd
Gnd
Gnd
Diode Mode values taken with all Connectors Removed
155
October 2010
50PK950
Plasma
SOFT TOUCH KEY PAD SECTION (Board Layout and Identification)
The Soft Touch Key Pad is a thin “Static” sensitive pad that is adhered to the front protective shield.
The Soft Touch Key Pad requires a static sensitive key press decoder IC to change the key press
data into R2 Ladder (Resistive data) which the Microprocessor can understand. This IC is on the
Front IR board IC100 which receives key press data from P101. The output from this IC simply
selects the appropriate resistor to inject into the Key 1 or Key 2 line which is then interpreted by the
Microprocessor in the Main board IC701.
IC100
P101
static sensitive
key press
decoder
Front the static
sensitive key pad
Button Identification for the Front the static sensitive key pad
156
October 2010
50PK950
Plasma
Soft Touch Key Pad
The Soft Touch Key Pad is a thin “Static” sensitive pad
that is adhered to the inside of the front protective shield.
Plastic Frame
Lifted up slightly
P101
Ribbon Cable
Soft Touch
Key Pad
Front Glass
Shield
The bottom decorative plastic piece has been removed.
157
October 2010
50PK950
Plasma
Soft Touch Key
Pad Resistance
and Diode Mode
Checks
IC100 on the Front IR
Board is generating
these Resistance
changes when a Soft
Touch Key is touched.
This in turn pulls down
the Key 1 and Key 2
lines to be interpreted
by the Microprocessor.
P100 (Key 1, Key 2) Resistance Reading with Soft Touch Key pressed.
KEY
Pin 3 measured
from Gnd
KEY
Pin 4 measured
from Gnd
CH (Up)
2.08M Ohms
Volume (+)
8.81M Ohms
CH (Dn)
16.85M Ohms
Volume (-)
2.08M Ohms
Input
8.81M Ohms
Enter
37.3M Ohms
Power
23.24M Ohms
Menu
16.85M Ohms
P100 Voltage Measurements with Soft Touch Key pressed.
KEY
Pin 3 measured
from Gnd
KEY
Pin 4 measured
from Gnd
CH (Up)
0.21V
Volume (+)
0.88V
CH (Dn)
1.59V
Volume (-)
0.21V
Input
0.86V
Enter
2.4V
Power
2.3V
Menu
1.65V
P100 Connector “IR/LED Control Board“ to P703 “Main” (No Key Pressed)
Diode Mode
Readings taken with
all connectors
Disconnected. Black
lead on Gnd. DVM
in Diode Mode.
Pin
Label
STBY
Run
Diode Mode
3
KEY 1
3.14V
3.14V
1.83V
4
KEY 2
3.28V
3.28V
1.83V
158
October 2010
50PK950
Plasma
INVISIBLE SPEAKER SYSTEM SECTION
Invisible Speaker System Overview (Full Range Speakers)
p/n: EAB60962801
The 50PK950 contains the Invisible Speaker system.
The Full Range Speakers point downward, so there are no front viewable speaker grills or air ports.
Installed View
Remove two screws
from the bottom
Top View
Reading
across speaker
wires, 8.2 ohm.
Cone View
159
October 2010
50PK950
Plasma
INTERCONNECT DIAGRAM (11 X 17 Foldout) SECTION
This section shows the Interconnect Diagram called the 11X17
foldout that’s available in the Paper and Adobe version of the
Training Manual.
Use the Adobe version to zoom in for easier reading.
When Printing the Interconnect diagram, print from the Adobe
version and print onto 11X17 size paper for best results.
160
October 2010
50PK950
Plasma
VR402
Set-up
4mS
50PK950 (50R1 Panel) CIRCUIT INTERCONNECT DIAGRAM
67VAC rms “White”
81VAC rms “Black”
320V p/p ± 5V
NOTE: Diode tests are conducted with the board disconnected.
A
0V
B
100V
FPC
140 Pins on top
136 Pins on bottom
Per Connector
P101
FPC
WARNING:
Remove upper Y-DRIVE
Board completely if P117
is removed.
100uS
502V p/p
Connect Scope between Waveform
TP on Y-Drive and Gnd
FPC
P102
Y-Drive
Upper
P103
FPC
VSC
R324
Pin
1~2
3
4-5
6-7
8
9,10
Label
M5V
n/c
*Va
Gnd
n/c
Diode
1.29V
n/c
Open
Gnd
n/c
*Vs
Open
P117
VSCAN
Pins
15-20
125V RMS
P104
FG5V
1/2
Pin
3, 4
5, 7
FS101 M5V
Diode Check reads
0.948V Board Connected
or 1.295 Disconnected
17V
FG5V
19/20
P209
Gnd
Gnd
Gnd
0.4V 5.19V
IC303
Scan
1-6
Waveform
Error Det 3.47V 4.11V
Gnd
17
FPC
18V
D301
D313
D303
FG24V
FG11V
D302
P204
P117 to P109
1-2) FG5V
03 n/c
04) CLK
05) FGnd
06) STB
07) FGnd
08) OC2
09) FGnd
10) OC2
11) FGnd
12) Data
13) FGnd
14) n/c
15-20) Scan
Gnd
Gnd
9,10
M5V
FS301
2A / 125V
(18V)
Gnd
0V
3.26V
ad
AC_Det
0V
4.07V
M_ON
0V
3.26V
6-10
(5V)
Top 4 pins
(18V)
P1
To Check for Y-SUS Drive Waveform
With the Y-Drive boards Disconnected
Use the Right leg of C325.
Or Pins 15~20 of P117 Or
Pins 1~6 of P118
Gnd
FS301 Protects 18V Creation
D301, D313 and T301.
Diode Check 1.32V
With Board Disconnected or
1.058V Connected
Va
M5V
FL1, FL2, FL5
Note: IC53 (3.3V Regulator)
routed to all X Boards
P114 Y-SUS
Run
VA Voltage
nc
Gnd
Diode Check
Open
3.3V and X-Drive
Left RGB Signals
nc
Gnd
Diode
18.3V
Diode Check
Open
P102
nc
Gnd
P103
X-Board Left
p/n: EBR63522201
P104
P105
P106
P110
3.3V in
on Pins
57~60
P120
Va out
on Pins
1~2
P107
P108
AC In
n/c
n/c
M5V
4.92V
Open
Gnd
Gnd
Gnd
ZB1
0.80V
Open
ZBias
0.40V
Open
Pin
Diode
CN701
n/c
10
VZB2
0.15V
Open
9,10
2.50V
Open
8
Open
6,7
4,5
VZB
R275
Gnd
Gnd
n/c
12
P813
Z-SUS BOARD
p/n: EBR62294201
D208
n/c
13
CTRL OE 0.128V
ERDN
0V
Open
3
1,2
Q207
P102
D221
n/c
P11
IC23
25Mhz
If AC-Det is missing, as a work around test,
Jump the STBY-5V to the AC-Det line. If the set works
normally, then the SMPS is defective.
If the Main board is the problem, perform the normal
Panel Test to confirm the Main is the only problem.
Pin
1-2
3-4
5-7
8
9-12
13-14
15
16
17
18
IC61
1.15V
CONTROL BOARD
1-4
p/n: EBR63450301
(3.3V)
IC53
P102 To Cent X Board
L1
1.13V
1-4
(3.3V)
IC53
C76
AUTO
GEN
P104
To Right
X Board
* If the complaint is no video
and shorting the points
(AutoGen) causes video to
appear suspect the Main board
or LVDS cable.
Note: LVDS Cable must be
removed for Auto Gen to work.
P702
STBY Run
2.82V
Gnd
3.14V
3.28V
3.15V
Gnd
0.77V
0.77V
2.82V
Gnd
3.13V
3.28V
0V
Gnd
3.28V
3.28V
P202
P203
P204
P205
P206
P103
S
G
3 1
1-4
n/c
Open
0V
Open
IC605 IC606 IC602
IC603 IC604
B
S
IC404
P900
n/c
IC402
B
C
SW700
E
3
MAIN BOARD
p/n: EBT60955910
2
IC707
P203
X900
54MHz
IC1102
IC705
Diode Check
p/n: EBT60955910 50PK950-UA AUSALHR
p/n: EBR68027905 50PK950-UA AUSALJR
p/n: EBT60955914 50PK950-UA AUSALUR
p/n: EBT60955914 50PK950-UA AUSLLUR
Other
Main
IC200 p/n:
B E
C
D
To
Speakers
All Pins
8.44V
Diode:
(Open)
C
Q206
B
C
E
C
BEE
2
1
IC1101
IC1400
13
Digital Video
Q1301
Q203
C
3
IC403
TU1400
TDVJ-H001F
Q1300
G S
Q202
C
C
B
B
E
A2
B
E
E
A2
A1
Q101
B
C
C
C
Q201
B
EC
C
B
E
A2
A1
2
C
IC704
IC100
A1
C
C
B
Q703 Q702
IC702
D211
B
Analog Video
E
A2
A1
C
E
B
E
B
C
Q207
C
Q208
E
C
Q1402
B
Q205
Q1401
IC101
D212
18.
17.
16.
15.
14.
13.
12.
11.
10.
9.
IF p
IF n
IF AGC
Reset
3.3V
1.26V
GND
CVBS
NC
SIF
D210
Q204
Q100
8.
7.
6.
5.
4.
3.
C
E
B
STBY Run Diode
Diode Pin Label
D209
Q102
Gnd Gnd
2.68V 9 Gnd
Gnd
Gnd 10 3.3V_ST 3.29V 3.28V 1.13V
P702 Main to Cent LOGO
1.83V 11 3.3V_Multi 0.41V 5.18V 1.22V
Diode
Run
Pin Label Stby
0V
0V 1.65V
1.77V 12 LED W
5V
0V
+5V
Open
1
1.77V
2 LED
0V *0V~3V Open
* 3V When the LOGO LED is On.
Gnd
This line gradually goes high to turn
Gnd
Gnd
Gnd
Gnd
3
1.76V
on and down when going off.
1.76V
E B
P207
1
Q500
IC300
P101
IC406
IC500
D200
C
3
2
L408
Q200
D
A1
G
A2
P703
Stby/Run
P400
IC401
IC405
To SMPS
1
Pin
L406
2
IC700
P700
Q900
n/c
D
S
Q901
P101 (Ft IR) to Key Pad
P221
Va out on
Pins 1~2
P202
IC400
32.768khz
Ft Key Pad
P210
3.3V in on
Pins 57~60
X-Board Center
p/n: EBR63522101
Q214
X701
10MHz X700
P902
NC
SDA
SCL
NC
NC
5V
2. NC
1. NC
3.3V and X-Drive
Right RGB Signals
Va
P220
Va in on
Pins 1~2
P1001
To Motion
Remote
IC700
D
P703 (Main) to P100 (Ft IR)
Pin Label
1
IR
2
Gnd
3
Key 1
4
Key 2
5 LED-R
6
Gnd
SCL
7
8
SDA
Q208
P106
To
IC1001
LOGO
To Control
Ft IR
P100
Intelligent
Sensor
5-8
P103
To run the Z-SUS without the Y-SUS; Jump Audio 17V from SMPS
to pin 1 of P2 Control Board and M5V from P811 to FL1 or FL2 on
the Control Board. SMPS must be running OK including Vs.
IR Board
p/n: EBR65007705
PANEL TEST:
Remove LVDS
Cable. Short across
Auto Gen TPs to
generate a test
pattern.
Q209
P107
G
LVDS
P102
Q210
Q213
Diode
Open
Gnd
1.22V
1.84V
Gnd
1.17V
1.85V
1.78V
1.84V
Gnd
LVDS
P31
P101
P105
P400 Main to SMPS
Diode
0.5V
Gnd
1.2V
1.2V
2.36V
1.72V
1.72V
Gnd
Pin Label STBY Run
0V
3.3V
1
+3.3V
Gnd Gnd
2
Gnd
3 M_Remote_RX 0V
3.3V
4 M_Remote_TX 0V
3.3V
5 RF_Reset
0V 2.99V
DC
0V
3.1V
6
7
DD
0V
3.1V
8
Gnd
Gnd Gnd
To SMPS
Board
1.7V
X1
D211
Z-Drive Creation Signals
P1001 Main to Motion Remote
J24
D215
Q211
For Voltages See P813 table
IC1
P201
Z-Bias
Waveform
J24
50V
RMS
D216
Q205
Q204
Diode
Open
n/c
1.25V
1.49V
Gnd
Open
Open
Open
Open
Open
Open
Open
1.65V
IC22
Q206
VR204
VZB
Gnd
Open
CENTER LOGO Board
p/n: EBT61069102
236V p/p
225Vp/p
D213
D207
Q201
Open
ERUP
1.90V
Pin
14~15
13
11~12
9~10
8
7
6
5
4
3
2
1
100uS
400us
P102
9
0.09V
3.3V and X-Drive
Center RGB Signals
P201
54VAC rms “White”
50V (AC) 50V
56VAC rms “Black” rms
FS103
6.3A / 250V
(VS)
FS103 Diode
Check
Open with Board
Connected or
Disconnected
11
P2 Control to P107 Z-SUS
To Test Control board:
Disconnect all connectors.
Jump STBY 5V from SMPS P813 Pin 13.
Apply AC and turn on the Set. Observe
Control board LED, if it’s on, most likely
Control board is OK.
WARNING:
Remove Lower Y-DRIVE
Board completely if P118
is removed.
Run
15V
SUS UP
P101
To Left
X Board
Label
8
F101 (AC)
15A/250V
To Z-SUS
P22 N/C
4.91V Board
IC103
IC52
C72
IC101
IC102
1.84V
FL1
FL5
FL2
1.8V
L2
18V
(M5V)
3.32V 5.1V
1.82V
C86
4.91V
IC51
D1 Blinks
IC53
4.88V
3.3V Indicating Board
3.3V
3.3V
Gnd
is Functioning
3.32V
Gnd VS-DA
D1
1-4
(3.3V)
IC53
Z-SUS does not use Va or M5V from P102.
Note: M5V routed through Y-SUS, Control
board, in on P107.
Open
n/c
3
P2
Gnd
2.14V
SUS DN
Open
Auto_Gnd Gnd
Gnd
5V
15
Open
Gnd
e
Open
14
3.06V
b
60V
Gnd
6-7
F302
158V STBY
390V Run
Open
M5V
P114
T301
Pin
1,2,3,4
5
6,7
Pin
1-2
Va
Run
VA Voltage
nc
Gnd
P101
Gnd
*VA
Gnd
P107 Z-SUS to P2 Control
2.55V
Ribbon Cable
Y-SUS and Y Drive Signals
P101
P121
Pin
1,2,3,4
5
6,7
8
P300
P203
FPC
FG10V
P118 to P209
1-6) Scan
07) n/c
08) FGnd
09) Data
10) FGnd
11) OC2
12) FGnd
13) OC1
14) FGnd
15) STB
16) FGnd
17) CLK
18) n/c
19-20) FG5V
6,7
n/c
P811
With the unit on, if D1 is not on, check 5V supply. If present replace the Control Board. For Voltages
If missing, see (To Test Power Supply)
See P107 tabel
VR402
Set-Up
VR401
Set-Dn
Y-Drive
Lower
Note: Connectors
between
P117~P109 and
P118~P209
DO NOT come with a
new board
3.09V
Gnd
RL_ON
18
T302
FG5V
FG
FG
Y-DRIVE Lower
p/n: EBR62294001
Gnd
3.186V
3.49V 5.15V
a
16
VR302
-Vy
FG
FG
Open
n/c
4,5
Note: The RL_On command turns on the 17V and AC_DET.
Note: The M-On command turns on +5V, M5V, Va and Vs.
c
Note: The Error Det line is not used in this model.
d
Note: If the AC Det line is Missing, the TV will not turn on,
except the Relays, then no other functions. LOGO On.
e
Note: Pin 18 is grounded on the Main. If opened, the power
supply turn on automatically.
1.16V
5V
c
15
FS101
10A / 125V
(M5V)
FG15V
FG24V
203V
n/c
Connect Scope
between Waveform TP
J24 on Z board and
Gnd. Use RMS
information just to
check for board
activity.
Diode
b
Gnd
b
Stby 5V
41-45
(5V)
P202
FPC
P118
*VS
3
Run
Label
a
Diode
16.9V
9-12
Y-SUS BOARD
p/n: EBR62294101
VSCAN
Pins 1-6
125V
RMS
FG
P201
FPC
FG
Pin
SC101
Motion Remote Board
p/n: EBR64966601
C325
Diode
VR501
VA Adj
F302
2.5A/250V
At Power Off
3sec 1st Relay click
4sec 2nd Relay click
0V
FG
P206
Run
4-5
F801
0.8V STBY
390V Run
STBY Run
13-14
FS103
4A / 125V
(VA)
Right Leg C325
TP with no Y-Drive
127.7RMS
428V p/p
FG
a
8
FG
FG
Label
1, 2
FS102
6.3A / 250V
(VS)
VR301
VSC
POWER SUPPLY
p/n: EAY60968801
P813 SMPS to Main
FS102 Vs or FS103 Va
Diode Check reads Open
with Board Disconnected or
Connected
-Vy
R334
Waveform
P109
Scan
15-20
FPC
P113
P113
FG
Label
1,2
VS Adj
VR901
P812
F801
4A/250V
Step 1: RL_On command
turns on the 17V for Audio
P813 pins 1 and 2. Also
AC-Det (16) turns on. If
Missing, the set will not turn
on. RL_On also turns on
the Error Det (8) from
SMPS but it is not used by
the Main.
Step 2: M5 On command
Turns on 5V to the Main
(P813 pins 5~7) also the
M5V, then Va, then Vs.
180uSec ± 5uSec
Y-DRIVE UPPER BOARD
p/n: EBR62293901
FG
Pin
* Will Vary by Panel
VR401
Set-Dn
Z-SUS Signal
P811 to Z-SUS and P812 to Y-SUS
SMPS Test – Unplug P813 to Main board.
Use two (100W) light bulbs in series between Vs and Gnd to place a load on the SMPS.
Apply AC, all voltage should run.
See “Auto Gen” on the Control board to perform a Panel Test.
If all supplies do not run when A/C is applied, disconnect P811 and P812 to isolate the excessive load.
P320
Va in on
Pins 1~2
P301
P310
3.3V in on
Pins 57~60
P302
X-Board Right
p/n: EBR63520701
P303
P304
P305
P306
P307
P308
50PK750 Main Board Component Voltages
50PK950 Main Board (Front Side) Component Voltages
IC400
3.3V_NEC_ST
Pin
Regulator
[1] Gnd
[2] 3.3V
[3] 5V
IC401
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
DDR 1.8V
Regulator
6.75V
5.0V
1.85V
Gnd
Gnd
2.356V
0.9V
1.0V
2.4V
3.3V
IC402
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
IC403
D3.3V / +3.3V
Regulator
5V
3.3V
3.3V
7.48V
3.3V
0.8V
5V
Gnd
IC404
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
7V (to IC405)
Regulator
17.1V
7.11V
7.11V
11.95V
3.3V
0.8V
5.0V
Gnd
IC405
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
A2.5V
Pin
Regulator
[1] 1.26V
[2] 2.5V
[3] 5V
D1.2V / A1.2V
Regulator
Gnd
4.99V
Gnd
1.26V
0V
n/c
6.17V
5.0V
5.0V
5.0V
1.27V
Gnd
3.3V
0.83V
IC406
Pin
[1] 7.13V
[2] 5V
[3] 7V
IC705
NVRAM
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
USB1 5V
Regulator
5.0V
Gnd
3.2V
0V
0V
5.1V
0V
3.28V
IC1101
5V (Tuner)
Reg
USB2 5V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Gnd
5.14V
5.14V
0.04V
3.28V
4.94V
4.94V
n/c
Q701
SDA to LVDS
Pin
FET
[G] 3.276V
[S] 3.289V
[D] 3.28V
Q1402
Video Buffer
Pin
[B] 2.05V
[E] 2.75V
[C] Gnd
Q205
Hot Swap
Pin
HDMI2
[B] 0V
[C] 4.26V
[E] Gnd
Q702
IR Out
Pin
2nd Buffer
[B] 0V
[C] 3.32V
[E] Gnd
D200
HDMI CEC Limiter
Pin
[A1] 0V
[A2] 3.31V
[C] 3.18V
Hot Swap
Pin
HDMI3
[B] 0V
[C] 4.26V
[E] Gnd
Q703
IR Out
Pin
1st Buffer
[B] 0.62V
[C] 0V
[E] Gnd
D209
HDMI Hot Swap
Pin Routing HDMI1
[A1] 5.13V
[A2] 0.15V
[C] 4.67V
RS232 IR
Pin
Buffer
[B] 0.574V
[E] Gnd
[C] 0V
Q900
Q901
Q206
Gnd
Gnd
Gnd
Gnd
3.28V
3.28V
Gnd
3.28V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
IC1102
SCL to LVDS
Pin
FET
[G] 3.28V
[S] 3.28V
[D] 3.28V
50PK950 Main Board (Back Side) Component Voltages
IC100
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
RS232
Control
1.65V
1.65V
4.56V
1.65V
1.65V
4.66V
Gnd
n/c
1.657V
0V
4.5V
0V
1.657V
5.12V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
RS232
EEPROM
Gnd
Gnd
Gnd
Gnd
4.325V
4.8V
5.12V
5.0V
IC101
IC602
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
DDR_VTT
Regulator
Gnd
3.3V
0.43V
0.94V
1.857
3.3V
1.86V
0.93V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Micro
EEPROM
Gnd
Gnd
Gnd
Gnd
3.3V
3.3V
Gnd
3.3V
IC700
IC702
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
RS232
Selector
3.34V
5.78V
0V
0V
0.2V
(-5.68V)
5.78V
Gnd
n/c
Gnd
3.3V
0V
0V
(-5.68V)
Gnd
3.3V
IC704
RS232
Selector
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
3.26V
3.26V
n/c
n/c
n/c
Gnd
n/c
Gnd
Gnd
4.99V
4.99V
0.88V
3.3V
3.3V
3.3V
5V
Pin
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
Motion Remote
IC
0V (3.3V M_Remote Used)
3.3V (0.3V M_Remote Used)
n/c
n/c
n/c
Gnd
Gnd
Gnd
n/c
0.02V
0V
3.3V
0V (3.3V M_Remote Used)
3.3V
3.3V
3.3V
IC1001
IC707
IC1400
Reset IC
Pin
[1] 3.3V
[2] Gnd
[3] 3.31V
Reset IC
Pin
[1] 0V
[2] 1.29V
[3] 3.27V
Q200
Pin
[B]
[G]
[S]
[D]
CEC Remote
HDMI
2.59V
3.3V
2.58V
3.25V
Pin
[B]
[C]
[E]
Hot Swap
HDMI1
4.27V
0V
Gnd
Q201
Q100
RGB W/P
Pin
[B] 0V
[C] 5.12V
[E] Gnd
Q202
Hot Swap
Pin
HDMI2
[B] 4.27V
[C] 0V
[E] Gnd
Q207
Hot Swap
Pin
HDMI4
[B] 4.28V
[C] 0V
[E] Gnd
Q1300
Wired IR
Pin
1st Buffer
[E] Gnd
[B] 0V
[C] 17V
D210
HDMI Hot Swap
Pin Routing HDMI2
[A1] 5.13V
[A2] 0.15V
[C] 4.67V
Q101
Wired IR
Pin
1st Buffer
[B] 0V
[C] 3.33V
[E] Gnd
Q203
Hot Swap
Pin
HDMI3
[B] 4.27V
[C] 0V
[E] Gnd
Q208
Hot Swap
Pin
HDMI4
[B] 0V
[C] 5V
[E] Gnd
Q1301
Wired IR
Pin
2nd Buffer
[G] 17V
[S] 17.1V
[D] 0V
D211
HDMI Hot Swap
Pin Routing HDMI3
[A1] 5.13V
[A2] 0.15V
[C] 4.67V
Q102
Wired IR
Pin 2nd Buffer
[B] 0.6V
[C] 0V
[E] Gnd
Q204
Hot Swap
Pin
HDMI1
[B] 0V
[C] 4.26V
[E] Gnd
Q500
Flash WP
Pin
[B] 0V (Flash_WP)
[C] 3.36V
[E] Gnd
Q1401
SIF Buffer
Pin
[B] 0.165V
[E] 0.83V
[C] Gnd
D212
HDMI Hot Swap
Pin Routing HDMI4
[A1] 5.13V
[A2] 0.15V
[C] 4.67V
50PK950 LVDS Control Board P31 from P902 Main Board Waveforms
Main
P902
P31 LVDS (Pin 12) 5Msec / 728mV
Note: Pin 13 is Same but Inverted
Pin
P31 LVDS (Pin 14) 2uSec / 618mV
P31 LVDS (Pin 16) 2uSec / 738mV
P31 LVDS (Pin 19) 2uSec / 758mV
P31 LVDS (Pin 22) 5Msec / 683mV
Note: Pin 23 is Same but Inverted
P31 LVDS (Pin 24) 5Msec / 448mV
Note: Pin 25 is Same but Inverted
P31 LVDS (Pin 28) 5Msec / 768mV
Note: Pin 29 is Same but Inverted
P31 LVDS (Pin 30) 5Msec / 1.3V
Note: Pin 31 is Same but Inverted
P31 LVDS (Pin 226) 2uSec / 683mV
P31 LVDS (Pin 24) 2uSec / 448mV
P31 LVDS (Pin 32) 5Msec / 1.12V
Note: Pin 33 is Same but Inverted
P31 LVDS (Pin 35) 5Msec / 1V
Note: Pin 36 is Same but Inverted
49
4
P31 LVDS (Pin 19) 5Msec / 758mV
Note: Pin 20 is Same but Inverted
50-51
3
P31 LVDS (Pin 16) 5Msec / 738mV
Note: Pin 17 is Same but Inverted
Pin
1
P31 LVDS (Pin 14) 5Msec / 618mV
Note: Pin 15 is Same but Inverted
P31 LVDS (Pin 11) 2uSec / 728mV
Control
P31
48
5
47
6
46-44
*11
*41
*12
*40
*13
*39
*14
*38
15
37
16
36
Clock
17
35
Clock
18
34
*19
*33
*20
*32
*21
*31
*22
*30
*23
*29
*24
*28
25-26
26-27
*27
*25
*28
*24
*29
*23
*30
*22
31
21
32
20
Clock
33
19
Clock
34
18
*35
*17
*36
*16
*37
*15
*38
*14
*39
*13
*40
*12
41
11
42-45
7-10
46
6
47
5
48
4
49
3
50
2
51
1
P31 LVDS (Pin 28) 2uSec / 768mV
P31 LVDS (Pin 30) 2uSec / 1.3V
P31 LVDS (Pin 38) 5Msec / 1.15V
Note: Pin 39 is Same but Inverted
P31 LVDS (Pin 40) 5Msec / 910mV
Note: Pin 41 is Same but Inverted
P31 LVDS (Pin 38) 2uSec / 1.15V
P31 LVDS (Pin 41) 2uSec / 910mV
NOTE: LVDS P31
Information
There are actually 20
pins carrying Video 4
pins are carrying clock
signals to the Control
board. With 1080P, pins
35 and 36 would have
signals present.
WAVEFORMS:
Waveforms taken using
1080P SMTP Color Bar
input. All readings give
their Time Base related
to scope settings.
P31 LVDS (Pin 32) 2uSec / 1.12V
P31 LVDS (Pin 35) 2uSec / 1V
End of Presentation
This concludes the Presentation
Thank You
164
October 2010
50PK950
Plasma