ncp1396a_datasheet.pdf

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Pwr_on jest warto¶ć dobra (3,3V) GP42-08H, eay4050520. PFC UCC28060, pozostałe : NCP1207a (st-by +5V), NCP1396ag.*reszta napięć http://www.elektroda.pl/rtvforum/topic2375569.html p.s Dla mnie masz problem z syg. ON_Off z main Piszesz ,że gdy go wymuszasz sztucznie zasilacz chodzi ok. Sam PSU sprawdzisz na stole(bez udziału Main ,co nieco "wymuszaj±c)


NCP1396A, NCP1396B
Product Preview
High Performance Resonant
Mode Controller featuring
High-voltage Drivers
The NCP1396 A/B offers everything needed to build a reliable and
rugged resonant mode power supply. Its unique architecture includes
a 500 kHz Voltage Controller Oscillator whose control mode brings
flexibility when an ORing function is a necessity, e.g. in multiple
feedback paths implementations. Thanks to its proprietary
high-voltage technology, the controller welcomes a bootstrapped
MOSFET driver for half-bridge applications accepting bulk voltages
up to 600 V. Protections featuring various reaction times, e.g.
immediate shutdown or timer-based event, brown-out, broken
opto-coupler detection etc., contribute to a safer converter design,
without engendering additional circuitry complexity. An adjustable
deadtime also helps lowering the shoot-through current contribution
as the switching frequency increases.
Features

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o
o
o
o
o
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o
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MARKING
DIAGRAMS
16

16

NCP1396xP
AWLYYWWG

1
PDIP-16
P SUFFIX
CASE 648

1

16
1396xDR2G
AWLYWW

1

High-frequency Operation from 50 kHz up to 500 kHz
600 V High-voltage Floating Driver
Selectable Minimum Switching Frequency with ?3% Accuracy
Adjustable Deadtime from 100 ns to 2 ms.
Startup Sequence via an Adjustable Soft-start
Brown-out Protection for a Simpler PFC Association
Latched Input for Severe Fault Conditions, e.g. Over Temperature
or OVP
Timer-based Input with Auto-recovery Operation for Delayed
Event Reaction
Enable Input for Immediate Event Reaction or Simple ON/OFF
Control
VCC Operation up to 20 V
Low Startup Current of 300 mA
1 A / 0.5 A Peak Current Sink / Source Drive Capability
Common Collector Optocoupler Connection for Easier ORing
Internal Temperature Shutdown
B Version features 10 V VCC Startup Threshold
SO16 or DIP16 Package

SO-16
D SUFFIX
CASE 751B
x
A
WL
YY, Y
WW
G

= A or B
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package

PIN CONNECTIONS
Css 1

16 Vboot

Fmax 2

15 Mupper

Ctimer 3

14 HB

Rt 4

13 NC

BO 5

12 Vcc

FB 6

11 Mlower

DT 7

10 Gnd

Fast Fault 8

9

Slow Fault

(Top View)

Typical Applications

o
o
o
o

ORDERING INFORMATION

Flat Panel Display Power Converters
High Power AC/DC Adapters for Notebooks
Industrial and Medical Power Sources
Offline Battery Chargers

(C) Semiconductor Components Industries, LLC, 2007

February, 2007 - Rev. P0

See detailed ordering and shipping information in the package
dimensions section on page 24 of this data sheet.

*For additional information on our Pb-Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

1

Publication Order Number:
NCP1396/D

NCP1396A, NCP1396B
HV
FB

R17

OVP

R8

R24

U3A

U5

1

16

2

14

4

13

5

12

6

11

7

Rt

R10

15

3

10

L1

C12

D1

R21

M2

C9

R19
Soft-
start

R9 R14
Timer

R18

Skip
Selection

C2

9

D3

C13 T1

Slow Input

R13
BO

C11

U2B

R3

C1
U1

R22

R5

R1
OVP

C4

U3B
D6

C14

R6

R12

D2

D7

+
C7

R4

FB

D9

C10

C8

+

R11

Fast
Input

fmax

Vout

D8

R7
8

+
C6

M1

R20

U2A

D4

R23

R16

C3
R2

DT

Figure 1. Typical Application Example

Pin Function Description
Pin No.

Pin Name

Function

Pin Description

1

Css

Soft-start

2

Fmax

Frequency clamp

3

Ctimer

Timer duration

Sets the timer duration in presence of a fault

4

Rt

Timing resistor

Connecting a resistor to this pin, sets the minimum oscillator frequency
reached for VFB = 1 V

5

BO

Brown-Out

Detects low input voltage conditions. When brought above Vlatch, it fully
latches off the controller.

6

FB

Feedback

Injecting current in this pin increases the oscillation frequency up to Fmax.

7

DT

Dead-time

A simple resistor adjusts the dead-time width

8

Fast Fault

Quick fault detection

Fast shut-down pin. Upon release, a clean startup sequence occurs. Can be
used for skip cycle purposes.

9

Slow Fault

Slow fault detection

When asserted, the timer starts to countdown and shuts down the controller
at the end of its time duration.

10

Gnd

Analog ground

-

11

Mlower

Low side output

Drives the lower side MOSFET

12

Vcc

Supplies the controller

The controller accepts up to 20 V

13

NC

Not connected

Increases the creepage distance

14

HB

Half-bridge connection

15

Mupper

High side output

16

Vboot

Bootstrap pin

Select the soft-start duration
A resistor sets the maximum frequency excursion

Connects to the half-bridge output
Drives the higher side MOSFET
The floating VCC supply for the upper stage

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2

NCP1396A, NCP1396B
Vdd

Temperature
Shutdown
S

Imin
Vfb <= Vfb_off

D

+
-

Vref
Rt

Clk
R

+

IDT

Vref

Q

VCC
Management

C

VBOOT
Q

50% DC

DT Adj.

I = Imax for Vfb = 5.3 V
I = 0 for Vfb &amp; lt; Vfb_min
Vdd

FF

Mupper

BO
Reset

PON
Reset

Imax
Vfb = 5

SS

UVLO

Fault

Vdd

Fast
Fault

Timeout
Fault

Vref

HB

Itimer
Fmax
If FAULT Itimer else 0
Level
Shifter

+
-

Timer

NC

Timeout
Fault

+
Vref

PON
Reset
Fault

Vdd

VCC

ISS

Fault

SS

Mlower

+
-

FB

G=1

+
-

RFB

+
Vfb_fault

&amp; gt; 0 only
V = V(FB) - Vfb_min

Vdd

GND

+
Vfb_min
-
+

Vref

+

Deadtime
Adjustment

IDT

DT

Vref Fault

Vdd
20 ms Noise
Filter

IBO

BO

+
-

+
-

+
VBO

Slow
Fault

+
Vref Fault

Q
S

+
Vlatch

20 ms Noise
Filter

+
-

Figure 2. Internal Circuit Architecture
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3

Q
R

PON Reset

20 ns Noise
Filter

Fast
Fault

NCP1396A, NCP1396B
Maximum Ratings
Rating

Symbol

Value

Unit

High Voltage bridge pin, pin 14

VBRIDGE

-1 to 600

V

Floating supply voltage, ground referenced

VBOOT-
VBRIDGE

0 to 20

V

High side output voltage

VDRV_HI

VBRIDGE-0.3 to
VBOOT+0.3

V

Low side output voltage

VDRV_LO

-0.3 to VCC + 0.3

V

dVBRIDGE/dt

50

V/ns

Vcc

20

V

-

-0.3 to 10

V

Thermal Resistance - Junction-to-Air, PDIP version

R?JA

100

°C/W

Thermal Resistance - Junction-to-Air, SOIC version

Allowable output slew rate
Power Supply voltage, pin 12
Maximum voltage, all pins (except pin 11 and 10)

R?JA

130

°C/W

Storage Temperature Range

-

-60 to +150

°C

ESD Capability, HBM model (All pins except VCC and HV)

-

2

kV

ESD Capability, Machine Model (All pins except pin 11 - see Note 1)

-

200

V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per Mil-Std-883, Method 3015
Machine Model Method 200 V
ESD Capability, Machine Model for pin 11 is 180 V.
2. This device meets latch-up tests defined by JEDEC Standard JESD78.

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4

NCP1396A, NCP1396B
ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C, VCC = 12 V, unless otherwise noted.)
Characteristic

Pin

Symbol

Min

Typ

Max

Unit

Turn-on threshold level, Vcc going up - A version

12

VCCON

12.3

13.3

14.3

V

Turn-on threshold level, Vcc going up - B version

12

VCCON

9.5

10.5

11.5

V

Minimum operating voltage after turn-on

12

VCC(min)

8.5

9.5

10.5

V

Startup voltage on the floating section

16-14

VbootON

8

9

10

V

Cutoff voltage on the floating section

SUPPLY SECTION

16-14

Vboot(min)

7.4

8.4

9.4

V

Startup current, Vcc &amp; lt; VCCON

12

Istartup

-

-

300

mA

Vcc level at which the internal logic gets reset

12

VCCreset

-

6.5

-

V

Internal IC consumption, no output load on pin 15/14 - 11/10, Fsw =
300 kHz

12

ICC1

-

4

-

mA

Internal IC consumption, 1 nF output load on pin 15/14 - 11/10, Fsw =
300 kHz

12

ICC2

-

11

-

mA

Consumption in fault mode (All drivers disabled, VCC &amp; gt; VCC(min) )

12

ICC3

-

1.2

-

mA

Pin

Symbol

Min

Typ

Max

Unit

Minimum switching frequency, Rt = 18 kW on pin 4, Vpin 6 = 0.8 V, DT =
300 ns

4

Fsw min

58.2

60

61.8

kHz

Maximum switching frequency, Rfmax = 1.3 kW on pin 2, Vpin 6 &amp; gt; 5.3 V,
Rt = 18 kW, DT = 300 ns

2

Fsw max

425

500

575

kHz

Feedback pin swing above which ?f = 0

6

FBSW

-

5.3

-

V

11-15

DC

48

50

52

%

-

Tdel

-

20

-

ms

Pin

Symbol

Min

Typ

Max

Unit

Internal pull-down resistor

6

Rfb

-

20

-

kW

Voltage on pin 6 below which the FB level has no VCO action

6

Vfb_min

-

1.2

-

V

Voltage on pin 6 below which the controller considers a fault

6

Vfb_off

-

0.6

-

V

Pin

Symbol

Min

Typ

Max

Unit

Output voltage rise-time @ CL = 1 nF, 10-90% of output signal

15-14/1
1-10

Tr

-

40

-

ns

Output voltage fall-time @ CL = 1 nF, 10-90% of output signal

15-14/1
1-10

Tf

-

20

-

ns

Source resistance

15-14/1
1-10

ROH

-

13

-

W

Sink resistance

15-14/1
1-10

ROL

-

5.5

-

W

Dead time with RDT = 10 kW from pin 7 to GND

7

T_dead

250

300

340

ns

Maximum dead-time with RDT = 82 kW from pin 7 to GND

7

T_dead-max

-

2

-

ms

Minimum dead-time, RDT = 3 kW from pin 7 to GND

7

T_dead-min

-

100

-

ns

14,
15,16

IHV_LEAK

-

-

5

mA

VOLTAGE CONTROL OSCILLATOR (VCO)
Characteristic

Operating duty-cycle symetry
Delay before any driver re-start in fault mode
FEEDBACK SECTION
Characteristic

DRIVE OUTPUT
Characteristic

Leakage current on high voltage pins to GND

3. The A version does not activate soft-start (unless the feedback pin voltage is below 0.6 V) when the fast-fault is released, this is for skip
cycle implementation. The B version does activate the soft-start upon release of the fast-fault input for any feedback conditions.
4. Guaranteed by design

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5

NCP1396A, NCP1396B
ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C, VCC = 12 V, unless otherwise noted.)
TIMERS
Characteristic

Pin

Symbol

Min

Typ

Max

Unit

Timer charge current

3

Itimer

-

160

-

mA

Timer duration with a 1 mF capacitor and a 1 MW resistor

3

T-timer

-

25

-

ms

Timer recurrence in permanent fault, same values as above

3

T-timerR

-

1.4

-

s

Voltage at which pin 3 stops output pulses

3

VtimerON

3.5

4

4.4

V

Voltage at which pin 3 re-starts output pulses

3

VtimerOFF

0.9

1

1.1

V

Soft-start ending voltage

1

VSS

-

2

-

V

Soft-start charge current

1

ISS

80

105

125

mA

Soft-start duration with a 100 nF capacitor (Note 3)

1

T-SS

-

1.8

-

ms

PROTECTION
Pin

Symbol

Min

Typ

Max

Unit

Reference voltage for fast input (Note 4)

8- 9

VrefFaultF

1.00

1.05

1.10

V

Hysteresis for fast input (Note 4)

8- 9

HysteFaultF

-

80

-

mV

Reference voltage for slow input

8- 9

VrefFaultS

0.95

1.00

1.05

V

Hysteresis for slow input

8- 9

HysteFaultS

-

60

-

mV

Propagation delay for fast fault input drive shutdown

8

TpFault

-

55

90

ns

Brown-Out input bias current

5

IBObias

-

0.02

-

mA

Brown-Out level (Note 4)

5

VBO

0.99

1.04

1.09

V

Hysteresis current, Vpin5 &amp; gt; VBO - A version

5

IBO_A

21.5

26.5

31.5

mA

Hysteresis current, Vpin5 &amp; gt; VBO - B version

5

IBO_B

86

106

126

mA

Latching voltage

5

Vlatch

3.6

4

4.4

V

Temperature shutdown

-

TSD

140

-

-

°C

Hysteresis

-

TSDhyste

-

30

-

°C

Characteristic

3. The A version does not activate soft-start (unless the feedback pin voltage is below 0.6 V) when the fast-fault is released, this is for skip
cycle implementation. The B version does activate the soft-start upon release of the fast-fault input for any feedback conditions.
4. Guaranteed by design

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6

NCP1396A, NCP1396B
TYPICAL CHARACTERISTICS - A VERSION

13.5

9.56

13.45

9.54

13.4

9.52
9.5
VCCmin (V)

VCCON (V)

13.35
13.3
13.25
13.2
13.15

9.48
9.46
9.44
9.42
9.4

13.1

9.38

13.05

9.36

13

9.34
-40

-25

-10

5

20

35

50

65

80

95

110

125

-40

-25

-10

5

20

TEMPERATURE (oC)

Figure 3. VCCON

50

65

80

95

110

125

80

95

110

125

80

95

110

125

Figure 4. VCC(min)

501

60.1

500

60

499
FREQUENCY (kHz)

60.2

FREQUENCY (kHz)

35

TEMPERATURE (oC)

59.9
59.8
59.7

498
497
496
495

59.6

494

59.5

493

59.4
-40

-25

-10

5

20
35
50
65
TEMPERATURE (oC)

80

95

110

-40

125

-25

-10

20

35

50

65

TEMPERATURE (oC)

Figure 5. Fsw min

Figure 6. Fsw max

29

1.06

27

1.055
1.05
VrefFaultFF (V)

25
RFB (k?)

5

23
21
19

1.045
1.04
1.035
1.03

17

1.025

15

1.02
-40

-25

-10

5

20

35

50

65

80

95

110

125

-40

TEMPERATURE (oC)

-25

-10

5

20

35

50

65

TEMPERATURE (oC)

Figure 7. Pulldown Resistor (Rfb)

Figure 8. Fast Fault (VrefFaultF)

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7

NCP1396A, NCP1396B

20

8

19

7.5

6.5
ROL (?)

7

17
ROH (?)

18

16
15

6
5.5

14

5

13

4.5

12

4

11

3.5
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

-25

-10

5

20

50

65

80

95

110

125

80

95

110

125

80

95

110

125

Figure 10. Sink Resistance (ROL)

Figure 9. Source Resistance (ROH)

296

108

295

107

294

106

293
DT_nom (ns)

109

DT_min (ns)

35

TEMPERATURE (oC)

TEMPERATURE (oC)

105
104
103

292
291
290

102

289

101

288

100

287
286

99
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

-25

-10

5

20

35

50

65

TEMPERATURE (oC)

TEMPERATURE (oC)

Figure 12. T_dead_nom

Figure 11. T_dead_min

3.96

1.97

3.955
1.968

3.95
3.945
Vlatch (V)

DT_max (us)

1.966

1.964

1.962

3.94
3.935
3.93
3.925
3.92

1.96
3.915
3.91

1.958
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

-25

-10

5

20

35

50

65

TEMPERATURE (oC)

TEMPERATURE (oC)

Figure 14. Latch Level (Vlatch)

Figure 13. T_dead_max

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8

NCP1396A, NCP1396B
26.8

1.045

26.6
1.04

26.4

IBO (uA)

VBO (V)

26.2
1.035

1.03

26
25.8
25.6
25.4

1.025

25.2
1.02

25
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

o

-25

-10

5

20

35

50

65

80

95

110

TEMPERATURE (oC)

TEMPERATURE ( C)

Figure 15. Brown-Out Reference (VBO)

Figure 16. Brown-Out Hysteresis Current (IBO)

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9

125

NCP1396A, NCP1396B
TYPICAL CHARACTERISTICS - B VERSION

10.6

9.56
9.54

10.55

9.52
9.5
VCCmin (V)

VCCON (V)

10.5

10.45

10.4

9.48
9.46
9.44
9.42
9.4
9.38

10.35

9.36
10.3

9.34
-40

-25

-10

5

20

35

50

65

80

95

110

125

-40

-25

-10

5

20

TEMPERATURE (oC)

Figure 17. VCCON

50

65

80

95

110

125

80

95

110

125

80

95

110

125

Figure 18. VCC(min)

60.1

502

60

501

FREQUENCY (kHz)

59.9
FREQUENCY (kHz)

35

TEMPERATURE (oC)

59.8
59.7
59.6

500
499
498
497

59.5
496
59.4
495

59.3
-40

-25

-10

5

20
35
50
65
TEMPERATURE (oC)

80

95

110

-40

125

-25

-10

20

35

50

65

TEMPERATURE (oC)

Figure 19. Fsw min

Figure 20. Fsw max

1.06

27

1.055

25

1.05
VrefFaultFF (V)

29

RFB (k?)

5

23
21

1.045
1.04

19

1.035

17

1.03

15

1.025
-40

-25

-10

5

20

35

50

65

80

95

110

125

-40

TEMPERATURE (oC)

-25

-10

5

20

35

50

65

TEMPERATURE (oC)

Figure 21. Pulldown Resistor (Rfb)

Figure 22. Fast Fault (VrefFaultF)

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10

NCP1396A, NCP1396B

19

8

18

7.5

6.5
ROL (?)

7

16
ROH (?)

17

15
14

6
5.5

13

5

12

4.5

11

4

10

3.5
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

-25

-10

5

20

50

65

80

95

110

125

80

95

110

125

80

95

110

125

Figure 24. Sink Resistance (ROL)

Figure 23. Source Resistance (ROH)

294

107

293

106

292

105

291
DT_nom (ns)

108

DT_min (ns)

35

TEMPERATURE (oC)

TEMPERATURE (oC)

104
103
102

290
289
288

101

287

100

286

99

285
284

98
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

-25

-10

5

20

35

50

65

TEMPERATURE (oC)

TEMPERATURE (oC)

Figure 26. T_dead_nom

Figure 25. T_dead_min

3.98

1.97

3.975
1.968

3.97
3.965
Vlatch (V)

DT_max (us)

1.966

1.964

1.962

3.96
3.955
3.95
3.945
3.94

1.96
3.935
3.93

1.958
-40

-25

-10

5

20

35

50

65

80

95

110

-40

125

-25

-10

5

20

35

50

65

TEMPERATURE (oC)

TEMPERATURE (oC)

Figure 28. Latch Level (Vlatch)

Figure 27. T_dead_max

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11

NCP1396A, NCP1396B
1.05

107
106

1.045

104

1.04

IBO (uA)

VBO (V)

105

1.035

103
102
101

1.03
100
1.025

99
-40

-25

-10

5

20

35

50

65

80

95

110

125

-40

o

-25

-10

5

20

35

50

65

80

95

110

TEMPERATURE (oC)

TEMPERATURE ( C)

Figure 29. Brown-Out Reference (VBO)

Figure 30. Brown-Out Hysteresis Current (IBO)

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12

125

NCP1396A, NCP1396B

Application information
The NCP1396 A/B includes all necessary features to help
building a rugged and safe switch-mode power supply
featuring an extremely low standby power. The below
bullets detail the benefits brought by implementing the
NCP1396 controller:
o

o

o

o

o

o

o

Wide frequency range: A high-speed Voltage
Control Oscillator allows an output frequency
excursion from 50 kHz up to 500 kHz on Mlower and
Mupper outputs.
Adjustable dead-time: Thanks to a single resistor
wired to ground, the user has the ability to include
some dead-time, helping to fight cross-conduction
between the upper and the lower transistor.
Adjustable soft-start: Every time the controller starts
to operate (power on), the switching frequency is
pushed to the programmed maximum value and
slowly moves down toward the minimum frequency,
until the feedback loop closes. The soft-start
sequence is activated in the following cases: a)
normal startup b) back to operation from an off state:
during hiccup faulty mode, brown-out or temperature
shutdown (TSD). In the NCP1396A, the soft-start is
not activated back to operation from the fast fault
input, unless the feedback pin voltage is below 0.6 V.
To the opposite, in the B version, the soft-start is
always activated back from the fast fault input
whatever the feedback level is.
Adjustable minimum and maximum frequency
excursion: In resonant applications, it is important to
stay away from the resonating peak to keep operating
the converter in the right region. Thanks to a single
external resistor, the designer can program its lowest
frequency point, obtained in lack of feedback voltage
(during the startup sequence or in short-circuit
conditions). Internally trimmed capacitors offer a
?3% precision on the selection of the minimum
switching frequency. The adjustable upper stop being
less precise to ?15%.
Low startup current: When directly powered from
the high-voltage DC rail, the device only requires 300
uA to start-up. In case of an auxiliary supply, the B
version offers a lower start-up threshold to cope with
a 12 V dc rail.
Brown-Out detection: To avoid operation from a low
input voltage, it is interesting to prevent the controller
from switching if the high-voltage rail is not within
the right boundaries. Also, when teamed with a PFC
front-end circuitry, the brown-out detection can
ensure a clean start-up sequence with soft-start,
ensuring that the PFC is stabilized before energizing
the resonant tank. The A version features a 27 uA

o

o

o

o

o

hysteresis current for the lowest consumption and the
B version slightly increases this current to 100 uA in
order to improve the noise immunity.
Adjustable fault timer duration: When a fault is
detected on the slow fault input or when the FB path
is broken, a timer starts to charge an external
capacitor. If the fault is removed, the timer opens the
charging path and nothing happens. When the timer
reaches its selected duration (via a capacitor on pin
3), all pulses are stopped. The controller now waits
for the discharge via an external resistor of pin 3
capacitor to issue a new clean startup sequence with
soft-start.
Cumulative fault events: In the NCP1396A/B, the
timer capacitor is not reset when the fault disappears.
It actually integrates the information and cumulates
the occurrences. A resistor placed in parallel with the
capacitor will offer a simple way to adjust the
discharge rate and thus the auto-recovery retry rate.
Fast and slow fault detection: In some application,
subject to heavy load transients, it is interesting to
give a certain time to the fault circuit, before
activating the protection. On the other hands, some
critical faults cannot accept any delay before a
corrective action is taken. For this reason, the
NCP1396A/B includes a fast fault and a slow fault
input. Upon assertion, the fast fault immediately
stops all pulses and stays in the position as long as
the driving signal is high. When released low (the
fault has gone), the controller has several choices: in
the A version, pulses are back to a level imposed by
the feedback pin without soft-start, but in the B
version, pulses are back through a regular soft-start
sequence.
Skip cycle possibility: The absence of soft-start on
the NCP1396A fast fault input offers an easy way to
implement skip cycle when power saving features are
necessary. A simple resistive connection from the
feedback pin to the fast fault input, and skip can be
implemented.
Broken feedback loop detection: Upon start-up or
any time during operation, if the FB signal is missing,
the timer starts to charge a capacitor. If the loop is
really broken, the FB level does not grow-up before
the timer ends counting. The controller then stops all
pulses and waits that the timer pin voltage collapses
to 1V typically before a new attempt to re-start, via
the soft-start. If the optocoupler is permanently
broken, a hiccup takes place.
Finally, two circuit versions, A and B: The A and B
versions differ because of the following changes:

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13

NCP1396A, NCP1396B
1.

2.

upon the fast fault pin release via a soft-start
sequence.

The startup thresholds are different, the A starts
to pulse for Vcc = 13.3 V whereas the B pulses
for Vcc = 10.5 V. The turn off levels are the
same however. The A is recommended for
consumer products where the designer can use an
external startup resistor, whereas the B is more
recommended for industrial / medical
applications where a 12 V auxiliary supply
directly powers the chip.
The A version does not activate the soft-start
upon release of the fast fault input. This is to let
the designer implement skip cycle. To the
opposite, the B version goes back to operation

Voltage-Controlled Oscillator
The VCO section features a high-speed circuitry
allowing operation from 100 kHz up to 1 MHz. However,
as a division by two internally creates the two Q and Qbar
outputs, the final effective signal on output Mlower and
Mupper switches between 50 kHz and 500 kHz. The VCO
is configured in such a way that if the feedback pin goes
up, the switching frequency also goes up. Figure 31
shows the architecture of this oscillator.

FBinternal
vdd
max
Fsw

max
Imin
0 to I_Fmax

vref
Rt
Rt sets
Fmin for VFB = 0

S
D

Q

Clk

+

Q

R

Cint

vdd

IDT

Imin

A

B

vref
DT

RDT sets
the dead-time
vdd
Vcc

Fmax

FMAX sets
the maximum Fsw

FB
Vfb &amp; lt; Vb_off ?
Start fault timer

Rfb
20k
Vb_off

Figure 31. The simplified VCO architecture

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14

NCP1396A, NCP1396B
The designer needs to program the maximum switching
frequency and the minimum switching frequency. In LLC
configurations, for circuits working above the resonant
frequency, a high precision is required on the minimum
frequency, hence the ?3% specification. This minimum
switching frequency is actually reached when no feedback
closes the loop. It can happen during the startup sequence,
a strong output transient loading or in a short-circuit
condition. By installing a resistor from pin 4 to GND, the
minimum frequency is set. Using the same philosophy,
wiring a resistor from pin 2 to GND will set the maximum
frequency excursion. To improve the circuit protection
features, we have purposely created a dead zone, where
the feedback loop has no action. This is typically below
1.2 V. Figure 32 details the arrangement where the
internal voltage (that drives the VCO) varies between 0
and 2.3 V. However, to create this swing, the feedback
pin (to which the optocoupler emitter connects), will need
to swing typically between 1.2 V and 5.3 V.

Figure 33 and 34 portray the frequency evolution
depending on the feedback pin voltage level in a different
frequency clamp combination.

Figure 33. Maximal default excursion, Rt = 22 k? on pin
4 and Rfmax = 1.3 k? on pin 2.

Vcc

FB
R1
11.3 k
R3
100 k

+
-

R2
8.7 k
D1
2.3V

Vref
0.5 V

Fmax

Rfmax

Figure 34. Here a different minimum frequency was
programmed as well as a maximum frequency excursion.

Figure 32. The OPAMP Arrangement limits the VCO
modulation signal between 0.5 and 2.3V

Please note that the previous small-signal VCO slope has
now been reduced to 300k / 4.1 = 73 kHz / V on Mupper
and Mlower outputs. This offers a mean to magnify the
feedback excursion on systems where the load range does
not generate a wide switching frequency excursion.
Thanks to this option, we will see how it becomes
possible to observe the feedback level and implement skip
cycle at light loads. It is important to note that the
frequency evolution does not have a real linear
relationship with the feedback voltage. This is due to the
deadtime presence which stays constant as the switching
period changes.

This techniques allows us to detect a fault on the
converter in case the FB pin cannot rise above 0.6 V (to
actually close the loop) in less than a duration imposed by
the programmable timer. Please refer to the fault section
for detailed operation of this mode.
As shown on figure 32, the internal dynamics of
the VCO control voltage will be constrained between 0.5
V and 2.3 V, whereas the feedback loop will drive pin 6
(FB) between 1.2V and 5.3 V. If we take the default FB
pin excursion numbers, 1.2 V = 50 kHz, 5.3 V = 500 kHz,
then the VCO maximum slope will be

500k - 50k
=
4.1

109.7kHz / V.

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NCP1396A, NCP1396B

The selection of the three setting resistors (Fmax, Fmin
deadtime) requires the usage of the selection charts
displayed below:

ORing capability
If for any particular reason, there is a need for a
frequency variation linked to an event appearance (instead
of abruptly stopping pulses), then the FB pin lends itself
very well to the addition of other sweeping loops. Several
diodes can easily be used perform the job in case of
reaction to a fault event or to regulate on the output
current (CC operation). Figure 38 shows how to do it.

650
Vcc = 12 V
FB = 6.5 V
DT = 300 ns

550

Fmax (kHz)

450

350
Fmin = 200 kHz

250

Vcc

150

Fmin = 50

50
1.5

3.5

5.5

7.5

9.5

11.5

13.5

15.5

17.5

RFmax (k?)

Figure 35. Maximum switching frequency resistor
selection depending on the adopted minimum switching
frequency
420

In1
In2

Vcc = 12 V
FB = 1 V
DT = 300 ns

370

Fmin (kHz)

2 0k

Figure 38. Thanks to the FB configuration, loop ORing is
easy to implement

320
270

Dead-time control

220
170

Dead-time control is an absolute necessity when
the half-bridge configuration comes to play. The deadtime technique consists in inserting a period during which
both high and low side switches are off. Of course, the
dead-time amount differs depending on the switching
frequency, hence the ability to adjust it on this controller.
The option ranges between 100 ns and 2 us. The deadtime is actually made by controlling the oscillator
discharge current. Figure 39 portrays a simplified VCO
circuit based on figure 31.

120
70
20
2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

RFmin (k?)

Figure 36. Minimum switching frequency resistor
selection

DT (ns)

VCO

FB

2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100

Vcc = 12V
3.5

8.5 13.5 18.5 23.5 28.5 33.5 38.5 43.5 48.5 53.5 58.5 63.5 68.5 73.5 78.5 83.5
Rdt (k?)

Figure 37. Dead-Time Resistor Selection

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16

NCP1396A, NCP1396B

Vdd
Icharge :
Fsw min + Fsw max
S
D

Q

Clk

+

Q

-

Idis
Ct

R

3V - 1V

Vref

DT

RDT
A

B

Figure 39. Dead-time generation
During the discharge time, the clock comparator is high
and un-validates the AND gates: both outputs are low.
When the comparator goes back to the low level, during
the timing capacitor Ct recharge time, A and B outputs
are validated. By connecting a resistor RDT to ground, it
creates a current whose image serves to discharge the Ct
capacitor: we control the dead-time. The typical range
evolves between 100 ns (RDT = 3.5 k?) and 2 us (RDT =
83.5 k?). Figure 42 shows the typical waveforms.

resonating circuit. In this controller, a soft-start capacitor
connects to pin 1 and offers a smooth frequency variation
upon start-up: when the circuit starts to pulse, the VCO is
pushed to the maximum switching frequency imposed by
pin 2. Then, it linearly decreases its frequency toward the
minimum frequency selected by a resistor on pin 4. Of
course, practically, the feedback loop is suppose to take
over the VCO lead as soon as the output voltage has
reached the target. If not, then the minimum switching
frequency is reached and a fault is detected on the
feedback pin (typically below 600mV). Figure 40 depicts
a typical frequency evolution with soft-start.

Soft-start sequence
In resonant controllers, a soft-start is needed to
avoid suddenly applying the full current into the
20.0

Plot1
ires1 in amperes

10.0

0

-10.0

- 20.0

1

SS
action

Ires

177

Target is
reached

Plot2
vout in volts

175

2

Vout

173

171

169
200u

Figure 40. Soft-start behavior

600u

1.00m
time in seconds

1.40m

1.80m

Figure 41. A typical start-up sequence on a LLC converter
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17

NCP1396A, NCP1396B

released, no soft-start occurs to offer the best skip cycle
behavior. However, it is very possible to combine skip
cycle and true fast fault input, e.g. via ORing diodes
driving pin 6. In that case, if a signal maintains the fast
fault input high long enough to bring the feedback level
down (that is to say below 0.6 V) since the output voltage
starts to fall down, then the soft-start is activated after the
release of the pin. In the B version tailored to operate
from an auxiliary 12 V power supply, the soft-start is
always activated upon the fast fault input release,
whatever the feedback condition is.

Please note that the soft-start will be activated in the
following conditions:
- A startup sequence
- During auto-recovery burst mode
- A brown-out recovery
- A temperature shutdown recovery
The fast fault input undergoes a special treatment. Since
we want to implement skip cycle through the fast fault
input on the NCP1396A, we cannot activate the soft-start
every time the feedback pin stops the operations in low
power mode. Therefore, when the fast fault pin is

plot1
vct in volts

4.00
3.00
2.00
1.00

Ct voltage

0

plot2
clock in volts

16.0

DT

Clock pulses

12.0
8.00
4.00
0

DT

Plot3
difference in volts

8.00

DT

4.00
0
-4.00
-8.00

A-B
56.2u

65.9u
ti

75.7u
i

85.4u

95.1u

d

Figure 42. Typical oscillator waveforms
circuitry, depicted by figure 43, offers a way to observe
the high-voltage (HV) rail. A resistive divider made of
Rupper and Rlower, brings a portion of the HV rail on pin
5. Below the turn-on level, the 27uA current source IBO
is off. Therefore, the turn-on level solely depends on the
division ratio brought by the resistive divider.

Brown-Out protection
The Brown-Out circuitry (BO) offers a way to
protect the resonant converter from low DC input
voltages. Below a given level, the controller blocks the
output pulses, above it, it authorizes them. The internal

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18

NCP1396A, NCP1396B

16.0

450

351 volts

Vdd
12.0

350

ON/OFF

IBO

250 volts

+

BO

BO

250

vcmp in volts

Rupper

Plot1
vin in volts

Vbulk

Vin
8.00

150

4.00

50.0

Rlow er

0

VBO
2

BO
20.0u

Figure 43. The internal brown-out configuration with
an offset current source

60.0u

100u

140u

180u

1

Figure 44. Simulation results for 350 / 250 ON / OFF levels

To the contrary, when the internal BO signal is high
(Mlower and Mupper pulse), the IBO source is activated
and creates a hysteresis. As a result, it becomes possible

to select the turn-on and turn-off levels via a few lines of
algebra:

IBO is off

V (+ ) = Vbulk1×

Rlower
Rlower + Rupper

eq. 1

? Rlower × Rupper ?
Rlower
+ IBO × ?
?
Rlower + Rupper
? Rlower + Rupper ?

eq. 2

IBO is on

V (+ ) = Vbulk 2 ×

We can now extract Rlower from equation 1 and plug it into equation 2, then solve for Rupper:

Rupper = Rlower ×
Rlower = VBO ×

Vbulk1 - VBO
VBO

Vbulk1 - Vbulk 2
IBO × (Vbulk1 - VBO )

If we decide to turn-on our converter for Vbulk1 equals
350V and turn it off for Vbulk2 equals 250V, then we
obtain:
Rupper = 1M?
Rlower = 2.86k?
The bridge power dissipation is 400? / 1.00286M? =
160mW when front-end PFC stage delivers 400V.
Figure 44 simulation result confirms our calculations.

Latch-off protection
There are some situations where the converter
shall be fully turned-off and stay latched. This can happen
in presence of an over-voltage (the feedback loop is
drifting) or when an over temperature is detected. Thanks
to the addition of a comparator on the BO pin, a simple
external circuit can lift up this pin above VLATCH (4 V
typical) and permanently disable pulses. The Vcc needs to
be cycled down below 6.5 V typically to reset the
controller.

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19

NCP1396A, NCP1396B

Vcc

Vbulk
+

20us
RC

to permanent
latch

Q1

Vlatch
Rupper

Vout

IBO
Vdd
+

BO

BO
NTC

Rlower
VBO

Figure 45. Adding a comparator on the BO pin offers a way to latch-off the controller
On figure 45, Q1 is blocked and does not bother the BO
measurement as long as the NTC and the optocoupler are
not activated. As soon as the secondary optocoupler
senses an OVP condition, or the NTC reacts to a high
ambient temperature, Q1 base is brought to ground and
the BO pin goes up, permanently latching off the
controller.

the input level exceeds 1V typical, pulses are immediately
stopped. When the input is released, the controller
performs a clean startup sequence including a soft-start
period.
-Slow events input: this input serves as a delayed
shutdown, where an event like a transient overload does
not immediately stopped pulses but start a timer. If the
event duration lasts longer than what the timer imposes,
then all pulses are disabled. The voltage on the timer
capacitor (pin 3) starts to decrease until it reaches 1V. The
decrease rate is actually depending on the resistor the user
will put in parallel with the capacitor, giving another
flexibility during design.

Protection circuitry
This resonant controller differs from competitors
thanks to its protection features. The device can react to
various inputs like:
- Fast events input: like an over-current condition, a need
to shut down (sleep mode) or a way to force a controlled
burst mode (skip cycle at low output power): as soon as

Figure 46 depicts the architecture of the fault circuitry.

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20

NCP1396A, NCP1396B

Vdd
Itimer
Ctimer

UVLO

reset

Ctimer

Rtimer

1 = fault
0 = ok
ON/OFF

+

-

+

-

Slow Fault

VrefFault
VtimerON
VtimerOFF

1 = ok
0 = fault

av erage input current

Vcc

to primary current
sensing circuitry

+
FB
FB

VrefFault

1 = ok
0 = fault
Fast Fault

reset

DRIVING
LOGIC

skip

SS

A

A

B

B

Figure 46. This circuit combines a slow and fast input for improved protection features.

Slow input
On this circuit, the slow input goes to a
comparator. When this input exceeds 1V typical, the
current source Itimer turns on, charging the external
capacitor Ctimer. If the fault duration is long enough,
when Ctimer voltage reaches the VtimerON level (4V
typical), then all pulses are stopped. If the fault input
signal is still present, then the controller permanently
stays off and the voltage on the timer capacitor does not
move (Itimer is on and the voltage is clamped to 5V). If
the fault input signal is removed (because pulses are off
for instance), Itimer turns off and the capacitor slowly
discharges to ground via a resistor installed in parallel
with it. As a result, the designer can easily determine the
time during which the power supply stays locked by
playing on Rtimer. Now, when the timer capacitor voltage
reaches 1V typical (VtimerOFF), the comparator instructs
the internal logic to issues pulses as on a clean soft-start
sequence (soft-start is activated). Please note that the

discharge resistor can not be lower than 4V / Itimer
otherwise the voltage on Ctimer will not reach the turnoff voltage of 4V.
In both cases, when the fault is validated, both outputs
Mlower and Mupper are internally pulled down to
ground.
On figure 46 example, a voltage proportional to primary
current, once averaged, gives an image of the input power
in case Vin is kept constant via a PFC circuit. If the
output loading increases above a certain level, the voltage
on this pin will pass the 1V threshold and start the timer.
If the overload stays there, after a few tens of milliseconds, switching pulses will disappear and a protective
auto-recovery cycle will take place. Adjusting the resistor
R in parallel with the timer capacitor will give the
flexibility to adjust the fault burst mode.

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21

NCP1396A, NCP1396B

Vcc

2

3

Figure 47. A resistor can easily program the capacitor discharge time

FB

Fast fault

Figure 48. Skip cycle can be
implemented via two resistors on
the FB pin to the Fast fault input.

Fast input

Startup behaviour

The fast input is not affected by a delayed action.
As soon as its voltage exceeds 1V typical, all pulses are
off and maintained off as long as the fault is present.
When the pin is released, pulses come back and the softstart is activated.
Thanks to the low activation level of 1V, this pin
can observe the feedback pin via a resistive divided and
thus implement skip cycle operation. The resonant
converter can be designed to lose regulation in light load
conditions, forcing the FB level to increase. When it
reaches the programmed level, it triggers the fast fault
input and stops pulses. Then Vout slowly drops, the loop
reacts by decreasing the feedback level which, in turn,
unlocks the pulses, Vout goes up again and so on: we are
in skip cycle mode.

When the Vcc voltage grows-up, the internal
current consumption is kept to Istrup, allowing to crankup the converter via a resistor connected to the bulk
capacitor. When Vcc reaches the VccON level, output
Mlower goes high first and then output Mupper. This
sequence will always be the same whatever triggers the
pulse delivery: fault, OFF to ON etc... Pulsing the output
Mlower high first gives an immediate charge of the
bootstrap capacitor. Then, the rest of pulses follow,
delivered at the highest switching value, set by the resistor
on pin 2. The soft-start capacitor ensures a smooth
frequency decrease to either the programmed minimum
value (in case of fault) or to a value corresponding to the
operating point if the feedback loop closes first. Figure 49
shows typical signals evolution at power on.

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22

NCP1396A, NCP1396B

Figure 49. At power on, output A is first activated and the frequency slowly decreases via the soft-start capacitor
Figure 49 depicts an auto-recovery situation, where the
timer has triggered the end of output pulses. In that case,
the Vcc level was given by an auxiliary power supply,
hence its stability during the hiccup. A similar situation
can arise if the user selects a more traditional startup
method, with an auxiliary winding. In that case, the
VCC(min) comparator stops the output pulses whenever it

is activated, that is to say, when Vcc falls below 10V
typical. At this time, the Vcc pin still receives its bias
current from the startup resistor and heads toward VCCON
via the Vcc capacitor. When the voltage reaches VCCON,
a standard sequence takes place, involving a soft-start.
Figure 50 portrays this behavior.

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23

NCP1396A, NCP1396B

Figure 50. When the Vcc is too low, all pulses are stopped until Vcc goes back to the startup voltage
12V source. Thanks to this NCP1396B, simple ON/OFF
operation is therefore feasible.

As described in the data-sheet, two startup levels VCCON
are available, via two circuit versions. The NCP1396
features sufficient hysteresis (3V typically) to allow a
classical startup method with a resistor connected to the
bulk capacitor. Then, at the end of the startup sequence,
an auxiliary winding is supposed to take over the
controller supply voltage. To the opposite, for
applications where the resonant controller is powered
from a standby power supply, the startup level is 10V
typically and allows for the direct a connection from a

The high-voltage driver
The driver features a traditional bootstrap
circuitry, requiring an external high-voltage diode for the
capacitor refueling path. Figure 51 shows the internal
architecture of the high-voltage section.

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24

NCP1396A, NCP1396B

HV
B

Pulse
trigger

Level
shifter

Vboot

S

cboot

Q

Mupper

Q

R

HB

UVLO
dboot

Vcc

fault
A

Delay

aux
Vcc

Mlower

GND

Figure 51. The Internal High-voltage Section of the NCP1396
The device incorporates an upper UVLO circuitry that
makes sure enough Vgs is available for the upper side
MOSFET. The B and A outputs are delivered by the
internal logic, as figure 46 testifies. A delay is inserted in
the lower rail to ensure good matching between these
propagating signals.

As stated in the maximum rating section, the floating
portion can go up to 600VDC and makes the IC perfectly
suitable for offline applications featuring a 400V PFC
front-end stage.

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25

NCP1396A, NCP1396B
PACKAGE DIMENSIONS
PDIP-16
P SUFFIX
CASE 648-08
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.

- A-
16

9

1

8

B

F

C

L

DIM
A
B
C
D
F
G
H
J
K
L
M
S

S
SEATING
PLANE

-T-
K

H

G

D

M

J

16 PL

0.25 (0.010)

M

TA

M

INCHES
MIN
MAX
0.740 0.770
0.250 0.270
0.145 0.175
0.015 0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
0_
10 _
0.020 0.040

MILLIMETERS
MIN
MAX
18.80 19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01

SO-16
D SUFFIX
CASE 751B-05
ISSUE J
- A-
16

9

1

8

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

- B-

P

8 PL

0.25 (0.010)

M

B

S

G

R

K

F

X 45 _

C
-T-

SEATING
PLANE

J

M
D

16 PL

0.25 (0.010)

M

TB

S

A

S

http://onsemi.com
25

DIM
A
B
C
D
F
G
J
K
M
P
R

MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50

INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019

NCP1396A, NCP1396B

Note: The product described herein (NCP1396A/B), is covered by U.S. patent: 6,097, 075; 7176723; 6,362, 067. There may be some other patent pending.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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http://onsemi.com
26

ON Semiconductor Website: www.onsemi.com
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For additional information, please contact your local
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NCP1396/D


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