Masz instrukcję serwisową ze schematem. Chassis TCM2.0E LA Modele: 19PFL5403/60 19PFL5403D/10 19PFL5403S/60 20HFL3330D/10 20PFL3403D/10 22PFL5403/60 22PFL5403D/10 22PFL5403S/60 26PFL3403D/10 26PFL5403/60 26PFL5403D/10 26PFL5403S/60
Colour TV
Chassis
TCM2.0E
LA
MG8
ME8
H_17740_000.eps
240408
Contents
Page
1. Technical Specifications, Connections, and Chassis
Overview
2
2. Safety Instructions, Warnings, and Notes
5
3. Directions for Use
6
4. Mechanical Instructions
7
5. Service Modes, Error Codes, and Fault Finding 12
6. Block Diagrams, Test Point Overview, and
Waveforms
Wiring Diagram Of Connector 19 " , 20 " , and 22 " 19
Wiring Diagram Of Connector 26 "
19
Block Diagram MT5335
20
7. Circuit Diagrams and PWB Layouts
Diagram
Main Power Supply (20 " )
(A)21
Main Power Supply (26 " )
(A1)23
Standby Power Supply (26 " )
(A2)24
SSB: Tuner
(B01)27
SSB: MCU Standby
(B02)28
SSB: DC / DC
(B03)29
SSB: Digital Channel Decoder
(B04)30
SSB: DVBT/ CI Decoder
(B05)31
SSB: Audio Amplifier
(B06)32
SSB: MT5335 Video Processor
(B07)33
SSB: MT5335 Interface USB/HDMI
(B08)34
SSB: Interface LVDS TTL
(B09)35
SSB: Flash Memory
(B10)36
SSB: SDRAM
(B11)37
SSB: MT5335 Interface VGA
(B12)38
SSB: D/A Converter
(B13)39
SSB: HDMI Switch
(B14)40
SSB: I/O Scart
(B15)41
SSB: I/O Side AV, S-Video, Audio
(B16)42
SSB: MT5335 Interface YPbPr & VGA
(B17)43
SSB: I/O VGA
(B17)44
SSB: LVDS Receiver
(B18)45
Contents
8.
9.
10.
11.
Page
Keyboard Control Panel
(E)48
Inverter Panel
(I)49
IR LED Panel
(J)51
Alignments
53
Circuit Descriptions, Abbreviation List, and IC Data
Sheets
54
Abbreviation List
55
IC Data Sheets
58
Spare Parts List & CTN Overview
66
Revision List
66
48
50
51
PWB
22
25
26
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
46-47
©
Copyright 2008 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
Published by JY 0871 BU TV Consumer Care
Printed in the Netherlands
Subject to modification
EN 3122 785 17952
EN 2
1.
Technical Specifications, Connections, and Chassis Overview
TCM2.0E LA
1. Technical Specifications, Connections, and Chassis Overview
Index of this chapter:
1.1 Technical Specifications
1.2 Connection Overview
1.3 Chassis Overview
1.1.3
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
1.1
Power supply
- Mains voltage (VAC)
- Mains frequency (Hz)
Power consumption (W)
Stand-by (W)
Dimensions (W × H × D in mm)
Technical Specifications
1.1.1
Miscellaneous
Vision
Display type
Screen size
Tuning system
Colour systems
Video playback
Tuner bands
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
LCD
19 " (48 cm), 16:9
20 " (51 cm), 4:3
22 " (56 cm), 16:9
26 " (66 cm), 16:9
640×480 (20 " )
1366×768 (26 " )
1440×900 (19 " )
1680×1050 (22 " )
300 (19 " , 20 " , 22 " )
500 (26 " )
800:1 (20 " , 26 " )
1000:1 (19 " , 22 " )
12 (20 " )
8 (26 " )
5 (19 " , 22 " )
178×178 (20 " )
170×160 (19 " , 22 " )
160×160 (26 " )
PLL
PAL, SECAM
PAL, SECAM, NTSC
UHF, VHF, S, Hyper
Supported Computer Formats
60 Hz
60 Hz
60 Hz
60 Hz
60 Hz
60 Hz
50 Hz, 75 Hz
:
:
:
:
:
:
:
640×480(max.for 20 " )
800×600 (all exc.20 " )
1024×768(all exc.20 " )
1280×768 (26 " only)
1280×1024 (26 " only)
1366×768 (26 " only)
1440×900 (26 " , only)
Supported Video Formats
60 Hz
60 Hz
50 Hz
50 Hz
50 Hz, 60 Hz
50 Hz, 60 Hz
50 Hz, 60 Hz
: 480i
: 480p
: 576i
: 576p
: 720p
: 1080i
: 1080p (19 " , 22 " only)
Resolution (H × V pixels)
Light output (cd/m2)
Contrast ratio
Typ. response time (ms)
Viewing angle (H × V degrees)
1.1.2
Sound
Sound systems
Maximum power (W)
:
:
:
:
Mono
Stereo
2 × 3 (19 " , 20 " )
2 × 5 (22 " , 26 " )
Weight (kg)
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
100 to 240
50, 60
~50 (19 " )
~58 (20 " )
~53 (22 " )
~120 (26 " )
& lt; 0.3
475 × 334 × 71 (19 " )
470 × 406 × 71 (20 " )
538 × 375 × 71 (22 " )
671 × 458 × 90 (26 " )
? (19 " )
5.8 (20 " )
? (22 " )
7.7 (26 " )
Technical Specifications, Connections, and Chassis Overview
1.
EN 3
Connection Overview
Y
R
Pb
EXT 1
Pr
VGA
L
TV (75Ω)
AUDIO
SPDIF
CVBS S-VIDEO
EXT 3
VGA PC
EXT 2
HDMI 2
L
HDMI 1
AUDIO
R
COMMON INTERFACE
1.2
TCM2.0E LA
I_17950_001.eps
080508
Figure 1-1 Rear and side I/O connections
Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, and Ye= Yellow.
1.2.1
Side connections
EXT 2: Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS
1 VPP / 75 ohm
Wh - Audio L
0.5 VRMS / 10 kohm
Rd - Audio R
0.5 VRMS / 10 kohm
EXT 2: S-Video (Hosiden): Video Y/C - In
1 - Ground Y
Gnd
2 - Ground C
Gnd
3 - Video Y
1 VPP / 75 ohm
4 - Video C
0.3 VPPP / 75 ohm
EXT 2: Mini Jack: Audio Head phone - Out
Bk - Head phone
32 - 600 ohm / 10 mW
EXT 2: Common Interface
68p - See diagram B05
jq
jq
jq
H
H
j
j
ot
jk
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
- D2+
- Shield
- D2- D1+
- Shield
- D1- D0+
- Shield
- D0- CLK+
- Shield
- CLK- n.c.
- n.c.
- DDC_SCL
- DDC_SDA
- Ground
- +5V
- HPD
- Ground
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
DDC clock
DDC data
Gnd
Hot Plug Detect
Gnd
j
jk
H
j
j
H
VGA PC: Video RGB - In and Service UART
1
5
10
6
1.2.2
j
H
j
j
H
j
j
H
j
j
H
j
Rear Connections
15
11
E_06532_002.eps
050404
USB2.0
Figure 1-4 VGA Connector
1
2
3
4
E_06532_022.eps
300904
Figure 1-2 USB (type A)
1
2
3
4
- +5V
- Data (-)
- Data (+)
- Ground
k
jk
jk
H
Gnd
HDMI 1 & 2: Digital Video, Digital Audio - In
19
18
1
2
E_06532_017.eps
250505
Figure 1-3 HDMI (type A) connector
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
- Video Red
- Video Green
- Video Blue
- n.c.
- Ground
- Ground Red
- Ground Green
- Ground Blue
- +5V_dc
- Ground Sync
- n.c.
- DDC_SDA
- H-sync
- V-sync
- DDC_SCL
0.7 VPP / 75 ohm
0.7 VPP / 75 ohm
0.7 VPP / 75 ohm
j
j
j
Gnd
Gnd
Gnd
Gnd
+5 V
Gnd
H
H
H
H
j
H
DDC data
0-5V
0-5V
DDC clock
j
j
j
j
EN 4
1.
Technical Specifications, Connections, and Chassis Overview
TCM2.0E LA
EXT 3: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y
1 VPP / 75 ohm
Bu - Video Pb
0.7 VPP / 75 ohm
Rd - Video Pr
0.7 VPP / 75 ohm
Wh - Audio L
0.5 VRMS / 10 kohm
Rd - Audio R
0.5 VRMS / 10 kohm
jq
EXT 1: Video RGB/YC - In, CVBS - In/Out, Audio - In/Out
20
2
21
1
E_06532_001.eps
050404
5
6
7
8
- Ground Blue
- Audio L
- Video Blue/C-out
- Function Select
9
10
11
12
13
14
15
16
- Ground Green
- Easylink P50
- Video Green
- n.c.
- Ground Red
- Ground P50
- Video Red/C
- Status/FBL
17
18
19
20
21
EXT 3: Mini Jack: VGA Audio - In
Bk - Audio L/R
0.5 VRMS / 10 kohm
jq
jq
jq
jq
jq
- Ground Video
- Ground FBL
- Video CVBS
- Video CVBS/Y
- Shield
H
j
jk
Gnd
0.5 VRMS / 10 kohm
0.7 VPP / 75 ohm
0 - 2 V: INT
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3
Gnd
0 - 5 V / 4.7 kohm
0.7 VPP / 75 ohm
j
H
jk
j
H
H
j
Gnd
Gnd
0.7 VPP / 75 ohm
0 - 0.4 V: INT
1 - 3 V: EXT / 75 ohm
Gnd
Gnd
1 VPP / 75 ohm
1 VPP / 75 ohm
Gnd
j
H
H
k
j
H
Aerial - In
- - IEC-type (EU)
Coax, 75 ohm
D
Cinch: S/PDIF - Out
Bk - Coaxial
0.4 - 0.6VPP / 75 ohm
Figure 1-5 SCART connector
1
2
3
4
1.3
- Audio R
- Audio R
- Audio L
- Ground Audio
0.5 VRMS / 1 kohm
0.5 VRMS / 10 kohm
0.5 VRMS / 1 kohm
Gnd
k
j
k
H
kq
Chassis Overview
INVERTER PANEL
(OPTONAL)
B
KEYBOARD
CONTROL PANEL
A(1)
MAIN POWER SUPPLY
E
STANDBY POWER
SUPPLY UNIT
(OPTIONAL)
SMALL SIGNAL BOARD
I
A2
IR LED PANEL
J
I_17950_002.eps
080508
Figure 1-6 PWB/CBA locations (26 " model)
Safety Instructions, Warnings, and Notes
TCM2.0E LA
2.
EN 5
2. Safety Instructions, Warnings, and Notes
Index of this chapter:
2.1 Safety Instructions
2.2 Warnings
2.3 Notes
2.1
Safety Instructions
•
2.3.2
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
transformer ( & gt; 800 VA).
• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
• Route the wire trees correctly and fix them with the
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for
proper function.
• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
2.2
•
•
•
•
•
•
•
•
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Be careful during measurements in the high voltage
section.
Never replace modules or other components while the unit
is switched “on”.
When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
2.3
Notes
2.3.1
General
•
Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode (see chapter 5) with a colour bar
signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated
otherwise) and picture carrier at 475.25 MHz for PAL, or
61.25 MHz for NTSC (channel 3).
All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kΩ).
Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
All capacitor values are given in micro-farads (μ = × 10-6),
nano-farads (n = × 10-9), or pico-farads (p = × 10-12).
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
The correct component values are listed in the Spare Parts
List. Therefore, always check this list when there is any
doubt.
BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: www.atyourservice.ce.philips.com (needs subscription,
not available for all regions). After login, select “Magazine”,
then go to “Repair downloads”. Here you will find Information
on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile,
which is coupled to the 12NC. For an overview of these profiles,
visit the website www.atyourservice.ce.philips.com (needs
subscription, but is not available for all regions)
You will find this and more technical information within the
“Magazine”, chapter “Repair downloads”.
For additional questions please contact your local repair help
desk.
Warnings
•
Schematic Notes
•
2.3.3
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
2.3.4
Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
• Use only lead-free soldering tin Philips SAC305 with order
code 0622 149 00106. If lead-free solder paste is required,
please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
EN 6
2.3.5
3.
TCM2.0E LA
Directions for Use
Alternative BOM identification
MODEL
: 32PF9968/10
It should be noted that on the European Service website,
“Alternative BOM” is referred to as “Design variant”.
PROD.NO: AG 1A0617 000001
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.
3. Directions for Use
You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
MADE IN BELGIUM
220-240V ~ 50/60Hz
128W
VHF+S+H+UHF
S
BJ3.0E LA
E_06532_024.eps
260308
Figure 2-1 Serial number (example)
2.3.6
Board Level Repair (BLR) or Component Level Repair
(CLR)
If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
2.3.7
Practical Service Precautions
•
•
It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.
Mechanical Instructions
TCM2.0E LA
4.
EN 7
4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing
4.2 Service Positions
4.3 Assy/Panel Removal
4.4 Set Re-assembly
4.1
Notes:
• Figures below can deviate slightly from the actual situation,
due to the different set executions.
• Follow the disassemble instructions in described order.
They apply mostly to the 26 " model unless otherwise
specified, but the described method is comparable for the
other screen sizes.
Cable Dressing
I_17950_003.eps
080508
Figure 4-1 Cable dressing (20 " model)
EN 8
4.
Mechanical Instructions
TCM2.0E LA
I_17950_004.eps
080508
Figure 4-2 Cable dressing (26 " model)
4.2
Service Positions
For easy servicing of this set, there are a few possibilities
created:
• The buffers from the packaging.
• Foam bars (created for Service).
4.2.1
Foam Bars
1
1
Required for sets
42 "
E_06532_018.eps
171106
Figure 4-3 Foam bars
The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs. See figure “Foam
bars” for details. Sets with a display of 42” and larger, require
four foam bars [1]. Ensure that the foam bars are always
supporting the cabinet and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen.
Mechanical Instructions
4.3
4.
EN 9
Assy/Panel Removal
4.3.1
TCM2.0E LA
Stand
1. Refer to next figure.
2. Place the TV set upside down on a table top, using the
foam bars (see section “Service Position”).
3. Remove the screws that secure the stand and remove the
stand.
1
1
1
1
I_17951_010.eps
060808
Figure 4-5 Front cover latch location [1/2]
I_17950_005.eps
080508
Side
Figure 4-4 Stand
4.3.2
Rear Cover
Warning: Disconnect the mains power cord before you remove
the rear cover.
1. Refer to next figures.
2. Place the TV set upside down on a table top, using the
foam bars (see section “Service Positions”).
3. Remove the screws that secure the rear cover. The screws
are located at the sides.
Be careful: Some models (mainly the smaller screen
sizes) use latches for securing the rear and front cover
together (see figure “Front cover latch location”). These
must be unlocked first before you can open the TV-set!
To open them, use e.g. a (plastic) putty knife. Insert the tool
into the gap between the front and rear cover (be extremely
careful not to scratch or dent the cabinet when inserting the
tool).
Gently release the internal latches. Note: You will hear little
popping sounds as the latches release and the rear cover
moves away from the front cover.
4. Now the rear cover could be lifted but the SSB and power
supply panel(s) are mounted in the rear cover and still
connected to the LCD panel and other boards. Those
cables should be released first!
5. To release the LVDS cable lift the back cover a few
centimetres and move it downwards the set. Now unplug
the LVDS connector [2].
Caution: be careful, as this is a very fragile connector!
6. Remove the screw [3].
7. Now the rear cover can be lifted to gain access to the
speaker cables and the IR/LED panel cable. Release the
connectors [4].
Side
Top
I_17951_011.eps
060808
Figure 4-6 Front cover latch location [2/2]
3
2
I_17930_041.eps
240408
Figure 4-7 LVDS release
EN 10
4.
Mechanical Instructions
TCM2.0E LA
4
2
4
1
2
2
2
1
I_17930_043.eps
240408
4
Figure 4-10 IR/LED Board and Speakers
4.3.5
I_17930_042.eps
240408
Figure 4-8 Speaker and IR/LED panel cable release
4.3.3
Keyboard Control Board
1. Refer to next figure.
2. Unscrew two screws[1]
3. Unplug connector [2] and remove the board.
When defective, replace the whole unit
Power Supply Board
Due to different set executions this chassis is supplied with one
or two power supply boards and figures may differ.
Caution: it is absolutely mandatory to remount all different
screws and cables at their original position during re-assembly.
Failure to do so may result in damaging the power supply.
1. Refer to next figure.
2. Unplug all the connectors [1].
3. Remove the fixation screws [2]
4. Remove the main power supply board.
5. Unplug all the connectors [3].
6. Remove the fixation screws [4]
7. Remove the stand-by power supply board.
1
2
2
1
2
4
1
4
I_17930_063.eps
240408
3
Figure 4-9 Keyboard control board
4.3.4
IR/LED Board and Speakers
1. Refer to next figure.
2. Remove the screws [1] and remove the IR/LED board.
3. Remove the screws [2] and remove the speakers.
When defective, replace the whole unit.
1
2
2
4
4
I_17950_006.eps
080508
Figure 4-11 Power Supply Unit(s)
Mechanical Instructions
4.3.6
TCM2.0E LA
4.
EN 11
Inverter Board (19 " , 20 " , and 22 " versions)
Due to different set executions this chassis some versions are
supplied with an inverter board. Figures may differ.
1. Refer to next figure.
2. Unplug all connectors [1].
3. Release the clips [2]
4. Take out the inverter board.
2
2
4
4
3
2
2
2
1
I_17950_008.eps
080508
Figure 4-14 SSB
4.4
1
To re-assemble the whole set, execute all processes in reverse
order.
1
2
2
I_17930_065.eps
240408
Figure 4-12 Inverter Board
4.3.7
Set Re-assembly
Small Signal Board (SSB)
Caution: it is absolutely mandatory to remount all different
screws at their original position during re-assembly. Failure to
do so may result in damaging the SSB.
Removing the SSB
1. See next figures.
2. Remove the screws [1] from the SSB connector plate.
3. Remove the screws [2] from the SSB.
4. On the outside of the set, lift the rear cover near the tuner
connector approximately 3 mm in the indicated direction
and keep it lifted, while
5. On the inside of the set, slide the metal plate in the
indicated direction.
6. Gently lift the board from the rear cover.
7. Now unplug the LVDS connector [3].
Caution: be careful, as this is a very fragile connector!
Unplug the rest of the cables [4].
1 1
I_17950_007.eps
080508
Figure 4-13 SSB connector plate
Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position. See figure “Cable
dressing”.
• Pay special attention not to damage the EMC foams at the
SB shields. Make sure, that EMC foams are put correctly
on their places.
EN 12
5.
TCM2.0E LA
Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding
Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Error Codes
5.5 Service Tools
5.1
Test Points
This chassis is NOT equipped with test points in the service
printing. No test points are mentioned in the service manual.
5.2
Service Modes
I_17950_015.eps
050808
The Service Mode feature is split into different parts:
• Service Alignment Mode (SAM).
• Service Default Mode (SDM).
• Customer Service Mode (CSM).
Figure 5-2 SAM menu, Clear
SDM and SAM offer features, which can be used by the Service
engineer to repair/align a TV set. Some features are:
• Activates the blinking LED procedure for error identification
when no picture is available (SDM).
• Make alignments (e.g. white tone), (de)select options,
enter options codes, reset the error buffer (SAM).
• Display information (“SAM” indication in upper right corner
of screen, error buffer, software version, options and option
codes, sub menus).
The CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
• Increase the home repair hit rate.
• Decrease the number of nuisance calls.
• Solved customers' problem without home visit.
5.2.1
I_17950_017.eps
050808
Figure 5-3 SAM menu, RGB Align
Service Alignment Mode (SAM)
How to Enter
To enter SAM, use the following method:
• Press on the remote control the code “062596” directly
followed by the “INFO” key.
After entering SAM, the following screen is visible, the values
can be adjusted according to the requested (see Chapter 8).
I_17950_018.eps
050808
Figure 5-4 SAM menu, NVM Editor
I_17950_014.eps
050808
Figure 5-1 SAM menu, System Information
I_17950_019.eps
050808
Figure 5-5 SAM menu, NVM Update
Service Modes, Error Codes, and Fault Finding
TCM2.0E LA
5.
EN 13
How to Activate CSM
Key in the code “123654” via the standard RC transmitter.
Contents of CSM
I_17950_020.eps
050808
Figure 5-6 SAM menu, Clear OAD
How to EXIT
Put set in & lt; stand-by & gt; by using the remote control.
5.2.2
Service Default Mode (SDM)
I_17950_044.eps
080508
Figure 5-8 CSM Menu -1-
Purpose
• To create a pre-defined setting, to get the same
measurements as given in this manual.
• To override SW protections.
• To start the blinking LED procedure.
How to enter
To enter SAM, use the following method:
• Press on the remote control the code “062596” directly
followed by the “MENU” key.
After entering SDM, the following screen is visible.
I_17950_045.eps
080508
Figure 5-9 CSM Menu -2-
I_17950_043.eps
080508
Figure 5-7 SDM menu
From top to bottom, it gives the following information:
• Operation hours
• Software version
• Error buffer display.
5.2.3
Customer Service Mode (CSM)
Purpose
When a customer is having problems with his TV-set, he can
call his dealer or the Customer Help desk. The service
technician can then ask the customer to activate the CSM, in
order to identify the status of the set. Now, the service
technician can judge the severity of the complaint. In many
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer. The
CSM is a read only mode; therefore, modifications in this mode
are not possible.
Menu Explanation
1. Model Number. Type number and region.
2. Production Serial Number. Product serial no.
3. SW Version. Software cluster and version is displayed (TC
= TCL, M2 = MTK2, E = Europe, 0.49 = software version).
4. Codes. Error buffer contents.
5. SSB. SSB serial number.
6. DISPLAY. Display type.
7. NVM Version. NVM version.
8. Key (HDCP) HDMI. Shows valid or invalid HDCP key when
HDMI connected. Else blank.
9. Digital Signal Quality. Quality of antenna signal in %.
10. Audio System. Audio system (Mono/Stereo/NICAM)
11. n.a.
12. Video Format. Video format.
13. Stand-by μP SW ID. SW version Stand-by
microprocessor.
How to exit
Press “MENU” on the RC-transmitter.
EN 14
5.2.4
5.
TCM2.0E LA
Service Modes, Error Codes, and Fault Finding
5.3
Blinking LED Procedure
Error Codes
The software is capable of identifying different kinds of errors.
Because it is possible that more than one error can occur over
time, an error buffer is available which is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.
Errors can also be displayed by the blinking LED procedure.
The method is to repeatedly let the front LED pulse with as
many pulses as the error code number, followed by a period of
1.5 seconds in which the LED is “off”. Then this sequence is
repeated.
Any RC command terminates the sequence. Error code LED
blinking is in white colour.
Basically there are six kind of errors:
Example: the contents of the error buffer is “013 007 000 000
000”.
After entering SDM, the following occurs:
• 1 long blink of 5 seconds to start the sequence
• 1 medium blink of 3 seconds and then 3 short blinks
followed by a pause of 1.5 seconds
• 7 short blinks followed by a pause of 1.5 seconds
• 1 long blink of 1.5 seconds to finish the sequence.
The sequence starts again with 12 short blinks.
5.4
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
Code Description Detection method
Type
0
no error
3
μP Control
I2C-bus
Error log +
blinking in SDM
4
General I2C
bus Error
I2C-bus
Protection +
spontaneous
7
Tuner
I2C-bus
Error log +
blinking in SDM
8
Demodulator I2C-bus
Error log +
blinking in SDM
10
MT8295
I2C-bus
Error log +
blinking in SDM
13
HDMI switch I2C-bus
Error log +
blinking in SDM
Fault Finding
No Picture, no sound, no Black light, Fuse Broken
For P804 ,Pin 8~11
is 12V & Pin2~3 of
is 5v
, OK?
NO
Check PSU
YES
For Q800,pin5~6
of is 5V & pin7~8
is12V , OK?
NO
Check Pin 10 Of
U810. is it 3.3v?
YES
Is
U800~U808 & U2
01 OK?
YES
NO
Replace the bad
one of
u800~u808 & U201
Check
LQFP jointing of
U203
YES
Check
X200,C221,C222,C
23,L214 & IIC Bus
YES
Check jointing of
U204,R271~R288,R
248~R260.
I_17950_009.eps
080508
Figure 5-10 No picture, no sound, no backlight, fuse broken (19 " , 20 " , and 22 " sets)
Service Modes, Error Codes, and Fault Finding
TCM2.0E LA
5.
EN 15
No Picture, no sound, no Black light, Fuse Broken
YES
Pin 8~11 of P804 is
12V, OK?
pin4~5 is 5V &
pin7~8 is12V of
U505 OK?
NO
Check Main
PSU
Is
U800~U808 & U2
01 OK?
NO
Pin2~3 of P804 is
5v & Pin 1 is 5v,OK?
YES
YES
YES
Check
LQFP jointing of
U203
NO
Check Pin 4 Of
UM01 is 3.3v
YES
Check
X200,C221,C222,C
23,L214 & IIC Bus
Replace the
bad one of
u800~u808 & U2
01
NO
YES
Check sub PSU
for standby
Check jointing of
U204,R271~R288
,R248~R260.
I_17950_010.eps
080508
Figure 5-11 No Picture, no sound, no backlight, fuse broken (26 " sets)
No Picture, Black light & Sound OK
Check the
output voltage
of Q203. is it
OK?
No
Check the
voltage of
C of Q204.
Yes
Replace Q203
Yes
Check
waveform of
L200~L209 is
OK?
Yes
check the
cable to panel
No
Is
Pin220,229,238
of U203 shorted
to earth?
No
check Pin
221~228 & Pin
230~242 of U203
I_17950_011.eps
080508
Figure 5-12 No Picture, Backlight & Sound OK
EN 16
5.
TCM2.0E LA
Service Modes, Error Codes, and Fault Finding
Picture OK, No sound
Check the voltage of
Pin 3,13 of u600,is it 12v?
No
Check Q800
Yes
NO
Check stby
Pin 7 & Mute Pin6 of U600,is it OK?
Check C of Q602 is
5V,B of Q602 is Low
OK?
Yes
Check the wave of
pin186,185 of
U203,is it OK?
No
Yes
No
TV source
Yes
Yes
Check
Pin 7 of U600 is
6V
Check
R & L speaker
Check the wave
of Pin of source
input,such as
pin170~177.
Yes
No
No
Change the
damage
component
NO
Replace U600
Check
the input circuit
Check IF circuit
Replace
u203
or Replace
U100
I_17950_012.eps
080508
Figure 5-13 Picture OK, No sound
No colour
Colour system is
Right & another
channel colour is
right ?
No
Reset
To
Local system
Yes
Dose the TV
signal too weak?
NO
YES
Check
Tuner Input
cable & antenna
Check
Pin 17 of U100
OK?
NO
Check
U100
YES
Check E2PROM
U205
YES
Fine Frequency
I_17950_013.eps
080508
Figure 5-14 No colour
Service Modes, Error Codes, and Fault Finding
5.5
Service Tools
5.5.1
ComPair
Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. You do not
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.
4. ComPair features TV software upgrade possibilities.
Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box
and the TV communicate via a bi-directional cable via the
service connector(s).
How to Connect
This is described in the ComPair chassis fault finding database.
TO TV
TO
UART SERVICE
CONNECTOR
ComPair II
RC in
RC out
TO
I2C SERVICE
CONNECTOR
TO
UART SERVICE
CONNECTOR
Multi
function
Optional Power Link/ Mode
Switch
Activity
I2C
RS232 /UART
PC
ComPair II Developed by Philips Brugge
HDMI
I2C only
Optional power
5V DC
E_06532_036.eps
150208
Figure 5-15 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!
How to Order
ComPair II order codes:
• ComPair II interface: 312278591020.
• For latest software see Philips Service website.
• ComPair UART interface cable: 312278591070.
Note: If you encounter any problems, contact your local
support desk.
TCM2.0E LA
5.
EN 17
EN 18
5.
Service Modes, Error Codes, and Fault Finding
TCM2.0E LA
5.6
Software Upgrading
5.6.1
Introduction
5.6.2
Main Software Upgrade
In “normal” conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the “upgrade.pkg”. This
software can be downloaded (as ZIP file) from the Philips
Service website (an account is required). If named otherwise,
rename the unzipped file always to “upgrade.pkg“.
Software upgrading can be done by ComPair but this feature is
a back up solution in case the normal procedure via USB does
not work. Please use the USB upgrade method first.
When the software is programmed via USB, you need the
UPGRADE.PKG file on the USB stick. This file is available for
customers on the Consumer Care website.
When the software is programmed via ComPair, you need a
*.BIN file. This file is only available for service workshops on the
Servicer Network Support website.
How to upgrade:
1. Copy the “upgrade.pkg” file to the root of your USB stick.
2. Insert the USB stick in the USB connector on the TV while
the TV is in “on” mode. The set will restart, and the
upgrading will start automatically (see flowchart below).
As soon as the programming is finished, you will get the
message that you can remove your USB stick and restart
the TV-set.
The software upgrade feature does only work with the
ComPairII interface.
User software upgrade flow chart
Power off the set
A newer version of software is
detected.
Do you want to upgrade?
YES
NO
layout 1
Plug-in the USB
stick
An equal/older version of software is
detected.
Do you want to proceed?
Note: Should be done only if
necessary.
YES
Power-on the set
NO
layout 2
Detect USB
‘break-in’ and
check autorun file
Kindly remove the USB stick and
restart the set.
layout 3
Valid auto-run
file?
N
Y
Software update failed!
Would you like to try again?
YES
Is USB sw
version & gt; set
sw?
NO
Is USB sw
version = & lt; set
sw?
N
N
End
layout 4
Y
Y
Display USB
sw newer than
the TV sw.
Prompt user to
confirm
Display USB
sw equal/older
than TV sw.
Prompt user to
confirm
See layout 1
N
See layout 2
Proceed?
Y
Set re-start &
Proceed with sw
upgrade
Prompt user to
remove USB
and restart the
set
Y
See layout 3
End
Successful?
Display
upgrade
progress
N
Prompt user to
try again?
See layout 4
N
Retry?
Y
I_17920_046.eps
080508
Figure 5-16 SW upgrade flowchart
Block Diagrams, Test Point Overview, and Waveforms
TCM2.0E LA
6.
19
6. Block Diagrams, Test Point Overview, and Waveforms
Wiring Diagram Of Connector 26 "
INVERTER_PWR 12V
NU/SELECT
INVERTER_PWR 12V
INVERT-SW
DIMMING
1
GND
DIMMING
GND
GND
INVERTER_PWR 12V
GND
INVERTER_PWR 12V
SB-LCD
GND
DIIR
GND
IR
5V-SB
STANDBY
GND
KEY
5VSB
GND
5V_KEY
1
2
3
4
5VSB-OUT
5VSB-IN
+24V
GND
+24V
GND
+24V
GND
+24V
+24V
GND
+24V
1
+24V
+24V
+24V
GND
GND
GND
VDIM
BL ON/OFF
NU/SELECT
DIMMING
GND
GND
INVERTER_PWR 12V
INVERTER_PWR 12V
1
2
3
4
5
6
7
GND
VBLON
PDIM
GND
P1
ON-LCD
P805
1
2
3
4
5
6
7
8
9
5VSB
DIIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SB-LCD
GND
IR
5V-SB
1
2
3
4
5
GND
STANDBY
P601
POWER_ON
KEY
GND
5VSB
5V_KEY
KEY
GND
5VSB-OUT
5VSB-IN
1
2
3
4
5V-PW
5V-PW
GND
GND
GND
PS1
5V-PW
5V-PW
GND
GND
GND
GND
12V-IN
GND
12V-IN
12V-IN
12V-IN
12V-IN
12V-IN
12V-IN
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
11
NU
5V-PW
5V-PW
GND
GND
GND
GND
12V-IN
+12V
GND
GND
+12V
+12V
GND
+12V
GND
GND
12V-IN
12V-IN
12V-IN
P5
+5V
GND
ON/OFF
12V-IN
I_17951_001.eps
050808
1
2
3
4
5
6
7
8
9
10
1
2
3
40-PWL01B-STE1XG
STB POWER
1
2
3
4
5
6
7
8
9
10
11
NU
40-PWL20C-PWI1XG
POWER BOARD
P804
P804
40-1PL37C-PWF1XG
MAIN POWER
P4
+12V
40-L19PFL-KEC1XG
KEY BOARD
P601
40-L19PFL-KEC1XG
KEY BOARD
POWER_ON
KEY
+24V
GND
40-L20PFL-IRC1XG
IR BOARD
5VSB
1
2
3
4
5
6
7
8
9
1
2
3
4
5
GND
P800
40-LDMK35-MAE2XG
MAIN BOARD
P805
ON-LCD
40-L20PFL-IRC1XG
IR BOARD
40-LDMK35-MAE2XG
MAIN BOARD
P1
BOARD
1
2
3
4
5
6
INVERTER
1
2
3
4
5
6
7
CN1
BL ON/OFF
40-1PL37C-PWF1XG
MAIN POWER
P800
9
11
13
15
17
19
21
23
25
27
PANEL INVERTER CONNECTOR
P5
Wiring Diagram Of Connector 19 " , 20 " , and 22 "
I_17951_002.eps
050808
Block Diagrams, Test Point Overview, and Waveforms
TCM2.0E LA
6.
20
Block Diagram MT5335
MT5335
V0.1
+12V
DC-DC
12V to 5V RT8110
ON
VCC
OFF
POWER
SUPPLY CONNECTOR
+5V/
Standby+5v
SIF
8051 WT6702F
15 KEY 9 POWERON
11 STANDBY 14 IR
TUNER
TDQG4-601A
EEPROM
M24C16MN
SAW-D9453D
VIF
SAW-K7270M
TD
A98
86T
IF+/IF-
MT5133
PARALLEL TS
PARALLEL TS
I2C
CI
CARD
MT8295
PARALLEL TS
KEY BOARD
132
205 SCL
206 SDA
MT5335
TV_CVBS
SERIAL TS
LV
DS
FLASH
32Mbit
DDR
32Mb
x16
PANEL
152 KEY
93 IR
62 OSCL1 63OSDA1
73 HDMI_5V
79 RX0_CB 80 RX0_C
81 RX0_0B 82 RXO_0
83 RX0_1B 84RXO_1
85 RX0_2B 86 RX0_2
205 DDC_SCL
204 DDC_SDA
104 R
98 B
102 G
96 VSYNC
97 HSYNC
120 Y_IN
121 Pb_IN
123 Pr_IN
173 YPbPr_L
174 YPbPr_R
176 VGA_R
177 VGA_L
170 SCT_R_IN
171 SCT_L_IN
116 SCT_R
108 SCT_G
114 SCT_B
149 SCT_FS
107 SCT_FB
187 SCT_R_OUT
189 SCT_L_OUT
LVDS
To
TTL
386
TTL
LVDS
201
SPDIF
_OUT
129 CVBS
172 R_IN
173 L_IN
126 SY
125 SC
185
HP_R_OUT
186
HP_L_OUT
Broken line is option for TTL
interface panel!
R/L
PRE AUDIO
AMP
R
CEC
COMMAND
AUDIO
AMP
HDMI SWITCH
SI8195
O/P
L
EDID
EDID
HDMI1
EDID
HDM2
VGA
YPbPr
SCART
SPDIF
AV
HEAD PHONE
I_17950_042.eps
080508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
21
7. Circuit Diagrams and PWB Layouts
Main Power Supply (20 " )
A
MAIN POWER SUPPLY 20”
A
I_17930_024.eps
220408
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
22
Layout Main Power Supply (20 " ) (Top Side)
I_17930_025.eps
220408
Layout Main Power Supply (20 " ) (Bottom Side)
I_17930_026.eps
220408
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
23
Main Power Supply (26 " )
A1
MAIN POWER SUPPLY 26”
A1
I_17930_027.eps
220408
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
24
Standby Power Supply (26 " )
A2
STANDBY POWER SUPPLY 26”
A2
I_17930_028.eps
220408
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
25
Layout Main Power Supply (26 " ) (Top Side)
I_17930_029.eps
220408
Layout Main Power Supply (26 " ) (Bottom Side)
I_17930_030.eps
220408
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
26
Layout Standby Power Supply (26 " ) (Top Side)
Personal Notes:
I_17930_075.eps
250408
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
27
SSB: Tuner
8
7
6
5
4
3
2
1
TUNER
B01
B01
Z100
TUNER_5V
MT5133-GPIO-AD
L108
30R
C138
0.1U
4
C139
0.1U
3
2
Z
GND
E
4LVC1G66GV
VCC
U101
Y
1
5V-OUT
5V-OUT
RF-AGC
FAT_IN+
R149
NC\0R
R140
6K8
RF-AGC
R141
22K
R121
22K
D103
BA982
12K
R146
E
C123
0.01U
4
5
R147
100K
R114
22K
C115
0.1U
X100
C112
5V-OUT
L102
120R
D102
2
3
4
13
NC
R102
NC\180R
CVBS-OUT
TDA9886T
R106
NC\6K8
SIOMAD
12
TAGC
SCL
11
REF
VAGC
SDA
TOP
10
AUD
8
9
CVBS
AGND
VPLL
AFD
DGND
7
DEEM
5
6
VP
AFC
C113
0.01U
C120
1P5
C132
0.01U
TUNER_SCL0_5V
5
R105
NC
R93
NC\100R
TUNER_SDA0_5V
TUNER_SCL0
R138
220R
R104
NC\47R
R103
NC\1K5
C128
1000P
0.47U
5K6
C117
0.01U
C108
C116
0.01U
R117
NC
L101
0.56UH
R829
10K
Q103
C124ET
AV_5V
SIFN
OSCL0
TUNER_SDA0
OSDA0
B
R94
NC\100R
B
C106
1000P
R133
33R
A
I_17950_021.eps
070508
8
7
6
C
C
E
DV33
C131
SIFP
R116
100R
R119
TUNER_SCL0_5V
GND_TUNER
0.01U
R128
SIF 0R
C
OUT2
OUT1
GND
IN/GND
IN
C105
1000P
DV33
TUNER_SCL0
R131
0R
R115
100R
TUNER_SDA0_5V
Q104
2N7002
CVBS0
75R
R130
L107
120R
E Q101
NC\BC847C
5K6
C107
390P
TUNER_SDA0
2
B
D
B
X101
R111
2K2
R828
10K
Q105
2N7002
R129
75R
R108
1
B
TUNER_5V
E
C127
0.1U
R110
2K2
C118
1000P
D100
BA592
AV_5V
NC/100R
R109
2K2
C104
0.01U
L106
0
5V-TUNER-INPUT
BC847C
Q100
R107
0R
33R
R95
14
15
16
17
18
19
20
21
22
23
SIF1
OP2
OP1
FMPLL
4
1
NC
3
5V-OUT
VIF2
U100
R120
2
SIF2
CVBS_OUT
R113
6K8
R112
C
C
C121
47P
C103
NC/100U
6V3
C126
NC/0.1U
U206
8
1
GND
OUT3
R97
7
2
NC/4K7
OUT2
IN1
6
3
OUT1
IN2
5
4
R96
OC
EN
NC/100R
5V-TUNER-ON/OF
NC/TPS2049
L100
1UH
R118
NC
VIF1
L104
NC/120
NC
24
BA982
C101
100U
TUNER_5V
R99
A
20P
4M
C114
0.47U
3
6V3
C102
100U
6V3
C122
0.1U
D
TUNER_5V
2
C110
0.22U
IN
1
1500P
X102
D101
BA982
C100
1U
C124
22P
C125
22P
L103
120R
ATV-IF-AGC
OUT2
TUNER_SCL0_5V
IN/GND
100R
R100
680K
R101
330R
R123 0R
R126
Q102
BC847C
TUNER_SDA0_5V
C111
B
E
C109
0.01U
100R
OUT1
R127
E
R137
220K
C
IF_AGC
GND
4K7
0.01U
C119
R139
6K8
R135
F
0.01U
C3
IFOUT2
IFOUT1
21
XTALOUT
20
19
IFAGC
ANALOG_IF
18
17
AS
SDA
D110
LL4148
FAT_IN-
R125
100R
NC
R148
0R
R132
16
SCL
14
15
NC1
GND1
13
TU
11
12
NC
NC/GND2
NC/RFAGC
6
5
NC/GND1
4
B1
3
2
R124
100R
ATV-IF-AGC
C2
47U
1
F
AV_5V
R145
12K
6V3
ANTPWR
C137
0.1U
5
TUNER_5V
5
4
3
2
1
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
28
SSB: MCU Standby
6
MCU STANDBY
4
3
2
1
B02
5V_KEY
5V_KEY
10K
NC
NC
+3V3SB_UP
R142
R833
5VSB
STANDBY
1
600R
2
OIRI
POWER_ON
+3V3SB
3
600R
L821
4
600R
L822
X800
32K7
R816
33R
D801
LL4148
R817
OSCO
OSCI
F
C822
20P
5V_KEY
F
5
C821
20P
B02
7
R806
27K
8
DV33
R805
100R
CEC
CEC_IRQ
35KEY_5V
KEY_5335
6
R819
3K3
R842
NC
C819
100P
5
KEY
7
600R
L823
L811
600R
R22
0R
8
5V_KEY
R10
0R
9
E
E
+3V3SB_UP
2N7002/NC
Q817
Q809
P805
OSCL0
L820
600R
2N7002
Q810
C871
1U
C823
0.1U
OSDA0
2N7002
+3V3SB_UP
+3V3SB_UP
+3V3SB_UP
10K
C875
U810
OSCI
R815
4K7
1
2
3
4
33R
HDMI_INT
SHORT_PROTECT
C
R813
33R
R834
0R
SW_UPDATE_CTL1
6
R835
33R
HSYNC
5
CEC_IRQ
R812
7
8
OSCO
VDD
AD0
OSCI
VSS
AD3/IR
NRST
SCL1
PWMI
SDA1
RXD/IRQ3
SCL2
TXD/IRQ2
SDA2
VIN
HIN
1
OSCL0_SB
16
2
15
R822
14
R830
33R
33R
13
R824
3
OIRI_MCU
4
33R
12
R820
33R
11
R823
33R
STANDBY
10
R825
33R
3V3SB_EN
9
R814
33R
ISP PORT
OSDA0_SB
KEY
C820
0.1U
10K
10K
1000P
OSCO
10K
R827
R826
R810
R807
R809
+3V3SB_UP
D
C876
NC\1000P
10K
D
VSYNC
P802
C
+3V3SB
C802
1U
WT6702F
OPTION for CEC Stand by Function
+3V3SB_UP
Q4
OIRI
E
OIRI_MCU
B
RT9166 U811
2
IN
1
GND
3
5VSB
C872
100U
GND
6V3
C809
100U
6V3
C825
0.1U
OUT
C826
0.1U
L809
120R
C824
R143
10K
BT3904
+3V3SB
1U
B
R144
4K7
B
C
A
A
I_17950_022.eps
070508
8
7
6
5
4
3
2
1
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
29
SSB: DC / DC
7
6
5
DC-DC
3
2
R848
100R
AV33
5VSB
+5V
E
+5V
5VSB
5V/2A
BL_DIM
C
Q801
B
1
C
B
R8010
4K7
R46
10K
Q816
BT3904
POWER CINCH
ON/OFF
C827
BT3904
E
R865
0R
1U
2
3
12V_IN
4
C
B
5
1
S2
2
G2
3
S1
4
G1
1U
R854
0R
7
D2B
6
D1A
5
D1B
A04803
Q803
BT3904
12V
8
D2A
5V_OUTSIDE
C858
1U
C854
1U
E
7
P800
C810
100U
16V
E
C862
0.1U
E
C852
ON/OFF
R852
4K7
6
L819
200R
L818
200R
R856
4K7
SELECT
L814
600R
12V_IN
R855
4K7
R860
5V_KEY 0R
L813
30R
R857
1K
1K
R844
R843
4K7
R8003
0R
5V_PW
2
R8011
10K
3
1
R847
NC
LL4148 DIMMING
D804
0.1U
C829
Q800
3V3SB_EN
4
L815
600R
NC
R845
5VSB
R846
10K
C860
0.1U
5
R856 IS FOR 26 "
19 " 20 " 22 " NC
C863
NC
6
+3V3SB
BL ON/OFF
47K
Q802
BT3904
R8
C
B
8
7
F
5V_PW
R849
10K
BL_ON/OFF
NC R9
12V_IN
C859
0.1U
9
R8012
NC R8013
Back Light circuit
R8001
10K
R850
4K7
CONNECTOR
10
F
R851
10K
12V/4A
11
B03
+5V
AV33
NC
P804
1
C828
0.1U
B03
4
C853
0.1U
8
E
5VSB
12V
12V
L14
200R
R898
47K
R5
10K
R92
2K2
R802
120R
C848
0.1U
R894
100K
R897
680R
R858
2K7 CI_VCC
R891
4K7
0.1U
C837
DDRV
R862
6K8
R893
4K7
R861
3K
AV25
R864
6K8
C843
R863
3K
C844
0.1U
C845
0.1U
AV_5V
0.1U
R885
6K2
C851
B
6V3
R884
1K
12V
D807
LL4148
C815
100U
C850
0.1U
C814
47U
16V
C813
100U
8
6
GND
OUT 2
R804
6R8
GND/ADJ1
R879
0.1U
C842
0.1U
L816
120R
E
4 4
AV9V
16V
C865
0.1U
VIN 3
1K
D806
LL4148
D817
LL4148
U805
LD1117S50
GND/ADJ1
COMP
R882
15K
7
VIN 3
SS
FB
R803
5R1
OUT 2
5
L13
200R
EN
NC2
4 4
L801
15UH
C817
330U
10
DV10
16V
C874
4U7
3
C869
0.1U
U802
LD1117S
NC1
SW
C811
47U
9
BS
Q805
BT3904
E
C
CI_DV18
C864
0.01U
2
B
Q807
BT3904
SHORT_PROTECT
AV25
6V3
1
IN
GND/ADJ1
VIN 3
U806
MP1411
4
OUT 2
16V
C816
100U
0.1U
D805
LL4148
D812
LL4148
R892
2K7
4 4
R3
1K
R7
10K
12V
C867
D811
LL4148
R890
2K7
E
B
C
R859
4K7
C818
47U
6V3
C812
47U
6V3
C840
0.1U
U804
LD1117S25
R4
10K
R889
4K7
R872
NC
C833
VIN 3
AV33
AV33
R6
10K
B
LL4148
R2
510R
D810
LL4148
R888
DV33 2K7
GND
GND
R896
8K2
R887
2K2
R876
NC
1K2
NC
0.01U
R871
R832
2R7
C831
0.1U
R866
22K
R831
2R7
OUT 2
U801
LD1117S33
GND/ADJ1
NC
R868
C839
0.1U
C870
100U
6V3
R801
330R
C834
OUT
ADJ/GND
1
12V
C
B
D816
D
3K9
R886
DV33
L802
200R
DV33A
2
4 4
C805
1U
VIN
R870
220R
D814
3V9
0R R1
Q806
BT3904
C806
100U
6V3
L805
200R
GND
C
D809
LL4148
+3V3SB
+5V
C
C849
3
0.1U
4U7
GND
R869
10R
5VSB
C801
1000U
R867
10R
D1A
8
U808
R895
10K
+5V
U809
NC/KD1084-33
T Z805
L804
200R
C830
5
0.1U
C807
100U
6
GND
VCC
LGATE
RT8110
L800
15UH
D2B
5
D2A
6
D1B
7
16V
G2
4
S2
3
G1
2
S1
1
3K9
R91
+5V
C841
0.1U
FB
D13N03LT
7
C803
4
PHASE
DRIVE UGATE
D818
LL4148
AV_5V
6V3
3
BOOT
AV12
GND/ADJ1
2
8
VIN 3
D
U807
OUT 2
GND/ADJ1
VIN 3
about 1mm
OUT 2
U800
5V_OUTSIDE
GND
D808
LL4148
1
4 4
U803
4 4
C800
1000U
16V
C804
4U7
C832
0.1U
LD1117S12
LD1117S33
R8006
10K
C846
0.1U
L15
200R
C866
120P
NC
R874
4K7
C868
0.01U
C835
0.01U
D803
SK24
R883
51K
A
A
I_17950_023.eps
070508
8
7
6
5
4
3
2
1
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
30
SSB: Digital Channel Decoder
5
4
DIGITAL CHANNEL DECODER
B04
DV33
TUNER_SCL0
TUNER_SDA0
DVDD12
8
2
7
TS0INDATA5
3
4
1
MT5133
DVDD12
C500
1U
R151
NC/10K
TUNER_SCL
TUNER_SDA
2
6
TS0INDATA1
4
C522
0.1U
C520
0.1U
C523
0.1U
MT5133_RESET
R504 10K
DVDD33
DVDD12
SIF_SDA
SIF_SCL
D
R5010R
R502
OSDA0
OSCL0
AV33
Analog 3.3V Bypass Caps
AVDD33
0R
L502
600R
7
3
5
DVDD33
TS0INDATA3
C521
0.1U
R505
100R
C501
1U
NC
R503
36
35
34
33
32
31
30
29
28
27
26
25
C508
0.1U
RF_AGC
IF_AGC
VDD3.3_3
GPIO0
/RESET
XTAL_SEL1
XTAL_SEL0
DGND3.3_1
VDD3.3_2
VDD1.2_2
HOST_SDA
HOST_SCL
8
TS0INDATA2
E
DVDD33
L501
600R
TSDATA4
TSDATA3
TSDATA2
TSDATA1
TSDATA0
TSERR
TSVAL
TSSYNC
TSCLK
VDD3.3_1
DGND3.3
VDD1.2_1
TS0INDATA4
R535
33R
Digital 3.3V Bypass Caps
0.047U
48
47
46
45
44
43
42
41
40
39
38
37
ADVDD33_1
REFTOP
VCMEXT
REFBOT
5
DVDD33
C
AVSS33_3
AVSS33_2
XTALI
XTALO
AVDD33_2
ALC_IN
VDD1.2
DGND1.2
TSDATA7
TSDATA6
TSDATA5
VDD3.3
6
DV33
C509
C502
1U
TS0INDATA6
CLOSE TO MT5133
DVDD33
C526
0.1U
1
IF_AGC
DVDD12
TS0INDATA7
R506
MT5133-GPIO-AD
13
14
15
16
17
18
19
20
21
22
23
24
D
R536
33R
1K
F
L500
600R
DV33
MT5131_IF_AGC
DVDD12
AV12
C525
0.1U
AVDD33
0R
R150
NC/1K
AVDD33_3
REF_TOP
VCMEXT
REFBOT
IN+
INAVDD33_1
AVSS33_1
VDD1.2_3
DGND1.2_1
TUNER_SCL
TUNER_SDA
XTALO
1
2
3
4
5
6
7
8
9
10
11
12
AVDD33
C510
0.22U
C511
0.22U
C512
0.22U
C506
27P
U502
C507
27P
R500
1M
X500
27M
E
XTALI
R507
Digital 1.8V Bypass Caps
AV12
C515
0.1U
0R
C518
0.1U
R508
C516
0.1U
C569
NC/20P
1
C568
NC/20P
C514
1000P
C527
NC
L506
NC
FAT_IN+
2
C519
0.1U
C513
1000P
FAT_IN-
F
DV33
3
R134
10K
B04
6
C517
0.1U
7
R136
10K
8
C
AV33
ADVDD33_1
R542
R543
TS0INSYNC
33R
R544
TS0INCLK
33R
R545
B
L503
600R
L510
120R
C503
1U
33R
C524
0.1U
TS0INVALID
C505
120P/NC
33R
C504
120P/NC
TS0INDATA0
B
A
A
I_17950_024.eps
070508
8
7
6
5
4
3
2
1
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
31
SSB: DVBT/ CI Decoder
8
7
6
5
4
3
2
1
DVBT-CI-DECODER
B05
B05
CLOSE TO CI CONNECTOR
CI_VCC
C560
0.1U
G
R526
100K/NC
NC\0.1U
C558
Q502
CI_AV18
E
C545
0.1U
C544
0.1U
C552
1U
C541
0.1U
C536
0.1U
C554
1U
C540
0.1U
L505
600R
C537
0.1U
C534
0.1U
C535
0.1U
C538
0.1U
C539
0.1U
C532
0.1U
C531
0.1U
1U
C1
C533
0.1U
R527
47K/NC
C547
0.1U/NC
R524
10K
R523
10K
R520
10K
C559
0.1U
CI_DV18
CLOSE TO MT8295
L504
600R
D
S
R522
10K
R521
10K
R519
NC\10K
R517
NC\10K
R518
10K
CI_DV18
E
NC\C124ET
6V3
CI_AV33
B
NC\A03401A
TS_CKO
R513
R547
B
HDMI_SEL
YPBPR_SW_IN
PWRDN_EN
U501
R514
CI_VCC
CI_VPP
CI_WEB
CI_DATA2
CI_CEB
GPIO9
GPIO8
GPIO7
GND18_1
WP
CD2#
D2
D10
D1
D9
D0
VCC18_1
D8
A0
BVD1
A1
BVD2
GND33_2
A2
REG#
A3
INPACK#
A4
WAIT#
A5
VCC33_3
RESET
A6
VS2#
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
CI_PDD2
CI_PDD6
CI_PDD7
CI_VCC_EN
CI_VPP33_EN
CI_VPP5_EN
GND
CI_IOIS16#
CI_CD2#
CI_D2
CI_OUTDATA2
CI_D1
CI_OUTDATA1
CI_D0
CI_DV18
CI_OUTDATA0
CI_A0
CI_OUTSYNC
CI_A1
CI_OUTVALID
GND
CI_A2
CI_REG#
CI_A3
CI_INPACK#
CI_A4
CI_WAIT#
CI_A5
CI_DV33
CI_RESET
CI_A6
CI_OUTCLK
CI_INVALID
CI_INCLK
CI_A12
CI_A7
CI_A6
CI_A5
CI_A4
CI_A3
CI_A2
CI_A1
CI_A0
CI_D0
CI_D1
CI_D2
CI_IOIS16#
NC/0R
R531
CI_CD1#
CI_OUTDATA3
CI_OUTDATA4
CI_OUTDATA5
CI_OUTDATA6
CI_OUTDATA7
CI_CE2#
CI_VS1#
CI_IORD#
CI_IOWR#
CI_INSYNC
CI_INDATA0
CI_INDATA1
CI_INDATA2
CI_INDATA3
CI_INDATA4
CI_INDATA5
CI_INDATA6
CI_INDATA7
CI_IORD##
R552
100R
CI_IORD#
C565
10P
OPWM1
OPWM2
CI_DV33
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
C
CI_IOWR##
R553
100R
CI_VS2#
CI_VCC
CI_VPP
R533
100R
CI_VS2#
CI_RESET
CI_WAIT#
CI_REG#
CI_OUTVALID
CI_OUTSYNC
CI_OUTDATA0
CI_OUTDATA1
CI_OUTDATA2
CI_CD2#
NC\0R
CI_IOWR#
C566
10P
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
CI_CE1#
CI_A10
CI_OE#
CI_A11
CI_A9
CI_A8
CI_A13
CI_A14
CI_WE#
CI_IREQ#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
CI_INPACK#
R532
CI_OUTCLK
CLOSE TO MT8295
B
A
GND
CI_INDATA6
CI_A12
CI_INDATA7
CI_A7
MT8295
CI_DV33
CI_OUTDATA7
CI_CE1##
CI_CE2#
CI_A10
CI_VS1#
CI_OE##
CI_IORD##
CI_A11
CI_IOWR##
GND
CI_A9
CI_INSYNC
CI_A8
CI_INDATA0
CI_A13
CI_INDATA1
CI_A14
CI_INDATA2
CI_DV33
CI_WE##
CI_INDATA3
CI_IREQ#
CI_INDATA4
CI_INVALID
CI_INDATA5
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
GND
CI_CD1#
CI_D3
CI_OUTDATA3
CI_D4
CI_OUTDATA4
CI_D5
CI_OUTDATA5
CI_D6
CI_OUTDATA6
CI_D7
GPIO0
GPIO1
GPIO2
GPIO3
VCC33
T0CLK_I_
T0SYNC_I_
T0VALID_I_
T0DATA0_I_
GND33
T0DATA1_I_
T0DATA2_I_
T0DATA3_I_
T0DATA4_I_
VCC18
T0DATA5_I_
T0DATA6_I_
T0DATA7_I_
GPIO4
GPIO5
GPIO6
GND18
CD1#
D3
D11
D4
D12
D5
D13
D6
D14
D7
P500
C561
10P
CI_INT
CI_POCE1#
CI_RB
CI_DV33
CI_PDD3
CI_PDD4
CI_PDD5
CI_POWE#
GND
CI_AV18
GND
CI_XTALI
CI_XTALO
CI_AV33
CI_RESET#
CI_OEB
CI_ALE
GND
CI_CLE
4K7
CI_WE#
C567
10P
R546
4K7
GPIO14
GPIO13
GND33_5
TS_SYNCO
TS_DATAO
TS_CKO
TS_VALIDO
VCC33_5
GPIO12
GPIO11
GPIO10
CI_OEB
CI_DATA0
CI_DATA1
CI_INT
AVSS18_PLL
AVDD18_PLL
AVSS33_XTAL
XTALI
XTALO
AVDD33_XTAL
RESETB
CI_RB
CI_CLE
GND33_4
CI_ALE
CI_DATA3
CI_DATA4
CI_DATA5
CI_DATA6
CI_DATA7
VCC33_4
CI_DV33
TS0INCLK
TS0INSYNC
TS0INVALID
TS0INDATA0
GND
TS0INDATA1
TS0INDATA2
TS0INDATA3
TS0INDATA4
CI_DV18
TS0INDATA5
TS0INDATA6
TS0INDATA7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
MTK_IC_RESET
CLOSE TO MT8295
4K7
R541
33R
27M
R551
100R
D
C564
10P
1M
0R
X501
VCC33_1
D15
CE1#
CE2#
A10
VS1#
OE#
IORD#
A11
IOWR#
GND33_1
A9
A17
A8
A18
A13
A19
A14
A20
VCC33_2
WE#
A21
READY
A22
A16
A23
A15
GND33_3
A24
A12
A25
A7
CI_GPIO0
CI_GPIO1
HDMIED_WP
HPDIN
C562
10P
CI_WE##
10K
NC
C529
27P
R548
R540
33R
R509
L511
5V-TUNER-ON/OF
5V-TUNER-INPUT
120R
TS_VALIDO
C528
27P
CI_OE#
C563
10P
C530
10P
TS_DATAO
TS_SYNCO
R538
R539
33R
33R
DV33
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
Z502
T
CI_GPIO14
CI_GPIO0
CLOSE TO MT8295
CI_TS_SYNCO
CI_TS_DATAO
CI_TS_CKO
CI_TS_VALIDO
CI_DV33
RESET_N
T
Z501
R550
100R
CI_CE1#
R512
C542
0.1U
C543
0.1U
C551
1U
GND
C
R549
100R
R511
4K7
CI_GPIO1
R510
4K7
CI_CE1##
CI_OE##
CI_DV33
CLOSE TO MT8295
D
C550
100U
R516
10K
C557
47U
6V3
4 4
CI_DV33
CI_DV33
CI_VCC_EN
3.3V: 0.2W (60mA)
1.8V: 0.2W
(100mA)
CI_CD2#
L507
30R
Q501
C
CI_VS1#
F
CI_VPP
CI_VCC
L509
30R
1GND/ADJ
U500
2 OUT
+5V
3 VIN
+5V
CI_CD1#
E
CLOSE TO CI CONNECTOR
+5V
LD1117S18
C556
47U
CI_WAIT#
+5V
CI_DV18
L508
600R
CI_VS2#
CI_IREQ#
CI_IOIS16#
CI_DV33
6V3
CI_INPACK#
R525
NC
DV33
R528
10K/NC
CI_VCC
C546
0.1U
CI_VCC
CI_VCC
CI_VCC
F
100R
R515
A
CI_INCLK
I_17950_025.eps
070508
8
7
6
5
4
3
2
1
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
32
SSB: Audio Amplifier
B06
AUDIO AMPLIFIER
B06
1
2
Y600
P600
4
3
2
1
L+ R+
U600
TDA7266
14 OUT2-
15 OUT2+
13 VCC2
12 IN2
11 NC3
9 S_GND
10 NC2
8 PW_GND
7 STBY
6 MUTE
5 NC1
4 IN1
OUT1-
3 VCC1
R_OUT
SS
MUTE
C612 1U
GND
C611
C608
1U
R600
0R
PGND
R619
C609
4700P
R623
100K
R-
0.1U
GND
2K2
SPEAK-OUTR
R618
0R
2
L_OUT
R620
2K2
Near the P502
R603
2R7
GND
PGND
GND
12V
R648
2R7
R602
0R
L601
200R
C607
1000U
16V
L600
200R
R601
0R
C615
0.1U
AR1O
R617
NC
L-
C610
4700P
SPEAK-OUTL
R622
NC
R621
0R
R624
100K
AL1O
1 OUT1+
PGND
GND
Near the P502
PGND
PGND
Q607
R640
4K7
C
Q608 GND
BT3906
R625
AMP_MUTE 4K7
HW_MUTE
R644
10K
B
E
D601
GND
BT3904
Q602 C
R630
10K
R647
10K
16V
C606
22U
R642
1K
LL4148
D600
MUTE
EAR
R636
1
0R/NC
R637
GND
HP_R
GND
GND
16V
100U
C616
P601
2
3
R+
R_OUT
9
8
7
C613
4700P/NC
R656
100R
C601
3300P
E
C
0R/NC
C600
3300P
R632
10K
B
R631
NC
C602
100U
16V
R641
4K7
SS
R628
10K
HP_L
C614
4700P/NC
R627
10K
L603
600R
R626
100R
B
12V
R639
4K7
R659
100R
E
L602
600R
R629
100R
R643
220R
BT3906
12V
6
5
4
L+
GND
L_OUT
C617
16V 100U
LL4148
GND
GND
I_17950_026.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
33
SSB: MT5335 Video Processor
8
7
6
5
4
3
2
1
MT5335 VIDEO PROCESSOR
B07
B07
DV33
R200 180K
KEY_5335
PANEL_SLT
SCART_FS_IN
E
R44
10K
PWRDET
AVDD33_REG
C_XREG
ORESET#
152
151
150
149
148
88
87
71
72
SW_UPDATE_CTL
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
OPCTRL0
OPCTRL1
OPCTRL2
OPCTRL3
OPCTRL4
OPCTRL5
R203
10K
R209
1K
C223
1000P
E
C_XREG
R207
10R
HDMI_INT
D
B
R202
10K
Q202
BT3904
R205
10K
R204
10K
B
C
E
Q201
BT3904
C
Q200
BT3904
CEC
E
D
MT5335PKU
L214
0.82UH
Adjust the power on timing
LVDSVDD_EN
CI_INT
AMP_MUTE
BL_ON/OFF
EDID_PRT
R201
4K7
DV33
OXTALO
E
92
91
76
75
90
89
DV33
DV33
TXC
C203
4U7
AVDD33_REG
C_XREG
ORESET_
OPWRSB
PWRDET
C
B
F
C222
10P
AVDD33_XTAL
KEY
R208
220R
X200
60M
OXTALI
C221
10P
OXTALO
OXTALI
AVCC_SRV
ORESET#
R210
47K
MTK_IC_RESET
CI_PDD3
CI_PDD4
CI_PDD5
CI_PDD6
CI_PDD7
CI_POWE#
CI_OEB
CI_ALE
CI_CLE
MT5133_RESET
POWER_ON
207
208
209
59
60
210
211
212
214
215
216
R206
1K
OPWM2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
C201
220U
OPWM1
OSDA0
OSCL0
OSDA1
OSCL1
OPWM0
OPWM1
OPWM2
VCXO
XTALO
XTALI
AVDD33_SRV
AVDD33_XTAL
16V
204
205
63
62
191
202
203
146
143
144
147
145
OSDA0
OSCL0
OSDA1
OSCL1
BL_DIM
R211
NC
DV33
U203
D200
LL4148
F
DV33
DV33
Z959 T
L210
600R
DV33
Q206 OSDA0
C124ET
5
E
Q1
BT3904
WC
SCL
SDA
T Z957
Z956
C224
0.1U
C204
1U
E0/NC
C
DV33
2
E1/NC
3
E2/NC
4
VSS
L211
600R
Z960 T
M24C16MN
T
R40
NC\0R
R37
NC
VCC
1
AVDD33_XTAL
C225
0.1U
6
C247
0.1U
R36
10K
7
E
B
U205
8
C206
1U
R217
33R
R38
10K
B
4K7
EDID_PRT
B
C
4K7
R214
10K
R215
Z958 T
OSCL0
C
R39
4K7
R216
C
AVCC_SRV
IIC ADDRESS " A0 "
B
DV33
L212
600R
C226
0.1U
C205
1U
AVDD33_REG
A
A
I_17950_027.eps
070508
8
7
6
5
4
3
2
1
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
34
SSB: MT5335 Interface USB/HDMI
MT5335 INTERFACE - USB, HDMI
B08
AV12
AV12
U203
68
65
66
67
69
157
158
L215
600R
USB_VRT
USB_DM
USB_DP
AVDD33_USB
AVDD12_USB
TP0
TN0
AVDD12_KADCPLL
AVDD12_TVDPLL
AVDD12_KHDMIPLL
AVDD12_KAPLL
AVDD12_SYSPLL
AVDD12_KDMPLL
AVDD12_DTDPLL
AVDD12_PLL
AVDD12_PLL
AVDD12_PLL
AVDD12_PLL
AVDD12_PLL
AVDD12_PLL
AVDD12_PLL
160
155
153
161
159
156
154
C228
1U
AVDD12_PLL
C249
C207
1U
USB_VRT
USB_DUSB_D+
AVDD33_USB
AVDD12_USB
0.01U
C250
0.1U
AV33
MT5335PKU
R218
5K1
USB_VRT
L216
600R
AV33
C251
C208
1U
GND
GND
AVDD33_USB
AV12
L217
600R
0.1U
AVDD12_USB
C252
C210
1U
AV12
GND
0.1U
AV25
L218
600R
AV25
U203
TS_VALIDO
TS_CKO
164
166
167
195
194
SIFP
SIFN
AF
TUNER_DATA
TUNER_CLK
GND
AVDD25_SADC
AVSS25_SADC
RF_AGC
IF_AGC
163
165
AVDD25_SADC
C229
193
192
TS_DATAO
1U
GND
TS_SYNCO
0.01U
L219
600R
AV33
AVDD33_H
HDMI_5V
GND
79
80
81
82
83
84
85
86
RX0_CB
RX0_C
RX0_0B
RX0_0
RX0_1B
RX0_1
RX0_2B
RX0_2
MT5335PKU
C230
EXT_RES
OPWR0_5V
1U
77
73
C255
C212
1U
U203
RX0_CB
RX0_C
RX0_0B
RX0_0
RX0_1B
RX0_1
RX0_2B
RX0_2
C254
0.1U
AV33
HDMI_5V
MT5335PKU
C253
C211
1U
SIFP
SIFN
AVDD25_SADC
0.1U
AV12
AV12
AVDD33_HDMI
AVDD12_CVCC
78
74
AVDD33_H
AVDD12_CVCC
L220
600R
AVDD12_CVCC
C213
1U
B08
GND
C248
0.1U
GND
I_17950_028.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
35
SSB: Interface LVDS TTL
B09
INTERFACE LVDS TTL
U203
A0N
A0P
A1N
A1P
A2N
A2P
CK1N
CK1P
A3N
A3P
A4N
A4P
A5N
A5P
A6N
A6P
CK2N
CK2P
A7N
A7P
A0N
A0P
A2N
A2P
CK1N
CK1P
A3N
A3P
A4N
A4P
A5N
A5P
A6N
A6P
A7N
A7P
CK2N
CK2P
A8N
A8P
A9N
A9P
AVDD33_LVDSA
AVDD33_LVDSB
AVDD33_LVDSC
AVDD33_VPLL
TP2
TN2
220
229
238
AVDD33_LVDS
AVDD33_LVDS
AVDD33_LVDS
217
AVDD33_VPLL
218
219
CI_POCE1#
DV33
R224
1K
R230
6K8
2
4
3
6
PANEL_SLT
1
5
R232
NC
R225
390R
P204
R226
390R
R229
750R
R231
100K
R227
390R
CK1P
A3P
L202
EXC24C
1
4
2
3
L203
EXC24C
1
4
2
3
L204
EXC24C
1
4
AP11
C322
C323
AN22
C324
AP22
C325
12V
GND
P202
10P
10P
GND
37
38
AN00
AP11
GND
10P
35
36
AN11
AP22
33
34
AN22
10P
CLK11+
GND
10P
AV33
R222
0R
10P
31
32
AP33
CLK11+C327
29
30
0R R213
0R R212
PANEL_CTL1
PANEL_CTL2
AV33
27
A4P
A5N
A5P
A6N
A6P
CK2N
CK2P
A7N
A7P
L205
EXC24C
1
4
2
3
L206
EXC24C
1
4
2
AN44
C330 GND
10P
AP44
C331
AN55
C332
10P
R223
0R
10P
4
AN66
2
3
AP66
C335
L208
EXC24C
1
4
2
3
L209
EXC24C
CLK22-C336
19
20
4
AN77
C338
GND
10P
2
3
AP77
C339
10P
VDD_PANEL
AO4459
C259
0.1U
GND
C
AP55
17
18
AN55
15
16
AN66
13
14
Q204
C143ZT
E
CLK22+
AP77
11
12
8
5
6
4
1
GND
10
7
CLK22AN77
2
AV33
AV33
L221
600R
C231
10P
1
8
D1
7
D2
6
D3
5
D4
AN44
GND
10P
CLK22+C337
GND
LVDSVDD_EN
AP44
10P
1
2
R219
10K
22
GND
10P
C334
1
C258
0.1U
B
3
L207
EXC24C
C333
4
L233
NC/30R
21
GND
10P
AP55
6
R221
100K
24
9
3
Q203
1
S1
2
S2
3
S3
4
G
AN33
26
23
5
3
GND
T Z212
LVDS OUT
28
25
T Z210
P209
CLK11-
AP66
A4N
L232
NC/30R
35KEY_5V
AP00
GND
10P
AN33 C328
12V
40
39
CLK11-C326
C329
3 AP33
2
10P
R26 FOR 19 " 22 " PANEL
R25 FOR OTHER +5V SUPPLY PANEL
C209
1U
3
AN11
GND
GND
A3N
2
10P
C202
220U
CK1N
4
C321
16V
A2P
L201
EXC24C
1
10P
AP00
1U
AVDD33_LVDS
C256
C214
1U
A2N
3
C320
0.1U
AV33
GND
AV33
VDD_PANEL
L222
600R
AVDD33_VPLL
GND
C260
0.1U
GND
C220
1U
C232
1U
A1P
2
AN00
NC R26
A1N
4
+5V
NC R25
A0P
5V_OUTSIDE
MT5335PKU
L200
EXC24C
1
C261
0.1U
R228
120R
Footprint is ACM-2012
A0N
B09
DV33
244
243
242
241
240
239
237
236
235
234
233
232
231
230
228
227
226
225
224
223
222
221
C257
0.1U
GND
GND
I_17950_029.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
36
SSB: Flash Memory
5
B10
4
3
2
1
B10
FLASH MEMORY
DV33
DV33
4
GND
5
POCE0#
PDD0
MT5335PKU
6
7
R245
0R
8
SI
NC
PO6
PO2
PO5
PO1
PO4
PO0
PO3
CS#
SO
GND
WP#/ACC
15
PDD1
14
DV33
R235
1K
VCC
D
POOE#
6
3
16
5
2
SCLK
4
JTMS
JTRST#
JTCK
JTDO
JTDI
253
1
256
255
254
HOLD#
8
OIRI_MT5335
7
JTMS
JTRST_
JTCK
JTDO
JTDI
U202
1
3
PARB_
PDD2
93
L223
600R
U0RX
U0TX
2
OIRI
95
94
R270
10K
U0RX
U0TX
13
12
1
245
248
POCE0_
POOE_
PDD0
PDD1
R289
10K
CI_RB
CI_PDD2
D
252
251
250
249
C240
1U
POCE0#
POOE#
PDD0
PDD1
R246
4K7
U203
11
TVTREF#1
2
3
5
8
7
JTRST#
FRESET#
9
1
4
6
10
JTDI
JTMS
MX25L3205
+5V
JTCK
10
+5V
R90
10K
C
B
JTDO
OIRI
BT3904
0R
0R
USB_D+
17
R238
10K
P203
2
R2012
GND
C235
1U
C234
1U
GND
C264
0.1U
4
RS-232
C263
0.1U
2
2
3
DV33
P200
C262
0.1U
2
4
R88
EZJZ1V270RA
R87
EZJZ1V270RA
R234
10K
1
U0RX
1
1
R233
10K
3
U0TX
C
19
1
R2011
USB_D-
R237
10K
R236
10K
R89
4K7
GND
GND
AV33
15
18
JTAG_DBGACK
20
C007
0.1U
6V3
C
13
JTAG_DBGRQ
C006
100U
E
OIRI_MT5335
11
16
Q3
R239
33R
9
12
14
GND
P201
GND
GND
GND
B
B
DV10
VCC3IO_3_2
VCC3IO_3_1
VCC3IO_3
A
E-PAD
C268
0.1U
C272
0.1U
C274
0.1U
C273
0.1U
C271
0.1U
C269
0.1U
C275
0.1U
AOBLK
AOLRCK
DV33
NORMAL MODE
0
0
0
ICE MODE
64
197
247
C270
0.1U
OPWM2
C276
0.1U
DDRV_IC
GND
GND
Trap MODE
C267
0.1U
10
12
16
18
27
30
52
54
55
56
C277
0.1U
VCC2IO
VCC2IO1
VCC2IO2
VCC2IO3
VCC2IO4
VCC2IO5
VCC2IO6
VCC2IO7
VCC2IO8
VCC2IO9
C266
0.1U
VCCK
VCCK1
VCCK2
VCCK3
VCCK4
DVDD10
DVDD10_1
VCCK6
VCCK5
VCCK7
C238
1U
14
48
57
58
61
70
162
213
206
246
C278
0.1U
U203
AOBCK
AOLRCK
C265
0.1U
R244
4K7
C279
0.1U
DDRV_IC
C236
1U
DV10
R240
4K7
R241
4K7
R242
NC\4K7
C237
1U
OPWM2
C239
1U
DV33
0
0
1
A
GND
257
TRAP MODE
OPCTRL5
OPCTRL4
0
1
GND
CORE RESET 1 US
MT5335PKU
5
4
3
2
1
I_17950_030.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
37
SSB: SDRAM
SDRAM
B11
B11
U204
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
U203
11
13
9
8
7
6
5
4
3
2
17
15
19
20
21
22
23
24
25
26
MEM_VREF
RCS#
53
46
RDQS0
RDQM0
RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7
RDQS1
RDQM1
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
RA0
RA7
RWE_
RBA0
RA6
RBA1
RA5
RRAS_
RA8
RA10
RA4
RCAS_
RA12
RCKE
RA11
RA9
RA3
RA1
RA2
RCLK0_
RCLK0
RVREF0
RCS_
47
36
40
43
37
44
38
42
35
45
39
41
32
31
33
34
51
49
50
28
29
RA0
RA7
RWE#
RBA0
RA6
RBA1
RA5
RRAS#
RA8
RA10
RA4
RCAS#
RA12
RCKE
RA11
RA9
RA3
RA1
RA2
MEM_ADDR13
DDRV_IC
14
17
19
25
43
50
53
1
18
33
3
9
15
55
61
RCLK0#
RCLK0
MT5335PKU
R275
47R
8
MEM_ADDR12
1
MEM_ADDR11
2
7
MEM_ADDR9
3
6
MEM_ADDR8
34
48
66
6
12
52
58
64
RA12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
5
VDD
VDD1
VDD2
VDDQ
VDDQ1
VDDQ2
VDDQ3
VDDQ4
R276
47R
8
1
2
7
MEM_ADDR5
3
6
MEM_DQS0
MEM_DQS1
20
47
4
MEM_DQM0
MEM_DQM1
26
27
3
6
MEM_DQ2
3
6
4
5
MEM_DQ3
4
5
1
R272
47R
5
RCKE
RCLK0
RA4
R259
22R
2
7
MEM_DQ5
2
3
6
MEM_DQ6
3
6
4
5
MEM_DQ7
4
5
R248
47R
R249
47R
R250
47R
R251
47R
RDQM1
R273
47R
MEM_DQM0
MEM_DQM1
MEM_DQS1
8
7
0R
R264
MEM_CLK0
6
R261
100R
RRAS#
VIN
NC2
GND
VCNTL REFEN
NC1
VOUT
RT9199
5
R278
47R
RCLK0#
MEM_DQ10
2
3
6
4
5
RDQ15
1
1
RDQ14
MEM_DQ9
MEM_DQ8
8
7
3
6
4
5
L225
600R
3
L226
600R
4
R267
47U
MEM_CLK0#
R274
47R
R288
75R
100K
6V3
C217
8
MEM_DQ15
1
2
7
MEM_DQ14
2
7
RDQ13
2
C304
0.1U
6
4
0R
R266
NC3
C305
0.1U
3
R260
22R
7
MEM_VREF
R268
100K
U200
C306
0.1U
RCAS#
2
R285
75R
DDRV
R265
0R
L224
600R
C314
7
7
1
RDQ10
16V
220U
2
MEM_DQ11
1
8
R254
75R
R255
75R
R256
75R
R257
75R
MEM_DQS0
8
RDQ11
5
R277
47R
R286
75R
1
MEM_BA0
MEM_BA1
MEM_CLKEN
7
MEM_DQ4
RDQS0
+5V
R258
22R
8
8
RDQ9
RWE#
MEM_RAS#
2
RDQS1
BA0
BA1
RA7
8
MEM_CAS#
MEM_DQ1
RDQM0
LDM
UDM
VSS
VSS2
VSS1
VSSQ1
VSSQ2
VSSQ
VSSQ3
VSSQ4
RA5
1
7
RDQ7
GND
RA6
MEM_WE#
2
RDQ4
MEM_CS#
MEM_RAS#
MEM_CAS#
MEM_WE#
16
51
LDQS
UDQS
1
RDQ6
24
23
22
21
CS
RAS
CAS
WE
MEM_DQ0
RDQ2
32M*16DDR
RA8
R287
75R
8
RDQ5
NC4
NC5
NC6
RDQ1
MEM_CLK0
MEM_CLK0#
MEM_CLKEN
45
46
44
1
R271
47R
RDQ3
CLK
CLK
CKE
RDQ0
RDQ8
4
MEM_ADDR6
MEM_CS#
+1V3D
RA9
MEM_ADDR7
MEM_ADDR4
MEM_ADDR0
MEM_ADDR1
MEM_ADDR2
MEM_ADDR3
MEM_ADDR4
MEM_ADDR5
MEM_ADDR6
MEM_ADDR7
MEM_ADDR8
MEM_ADDR9
MEM_ADDR10
MEM_ADDR11
MEM_ADDR12
29
30
31
32
35
36
37
38
39
40
28
41
42
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
NC
NC1
NC2
NC3
RA11
MEM_VREF
49
VREF
R269
1K
RDQS0
RDQM0
RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7
RDQS1
RDQM1
RDQ8
RDQ9
RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15
2
4
5
7
8
10
11
13
54
56
57
59
60
62
63
65
3
6
MEM_DQ13
3
6
RDQ12
4
5
MEM_DQ12
4
5
8
GND
GND
GND
+1V3D
8
RCS#
MEM_BA0
2
7
RBA0
MEM_BA1
3
6
RBA1
4
5
RA10
MEM_ADDR10
1
R279
47R
+1V3D
MEM_ADDR0
1
8
RA0
MEM_ADDR1
2
7
RA1
MEM_CS#
1
MEM_ADDR2
3
6
RA2
MEM_RAS#
2
7
MEM_ADDR3
4
5
RA3
MEM_CAS#
3
6
MEM_WE#
4
DDRV_IC
DDRV
MEM_ADDR10
1
R280
75R
8
5
R281
75R
8
MEM_BA1
7
3
6
C286
0.1U
C287
0.1U
C285
0.1U
C284
0.1U
C283
0.1U
C281
0.1U
C282
0.1U
4
C280
0.1U
C315
100U
6V3
C349
220U
16V
C349 IS CLOSE TO PIN33 OF DDR
2
MEM_BA0
L213
600R
5
R282
75R
8
MEM_ADDR7
DDRV
GND/ADJ1
7
3
6
MEM_ADDR4
4
C301
0.1U
R283
75R
8
C298
0.1U
C299
0.1U
C297
0.1U
C296
0.1U
GND
MEM_ADDR12
1
MEM_ADDR11
2
7
MEM_ADDR9
3
6
MEM_ADDR8
C216
1U
C300
0.1U
5
R252
75R
MEM_CLKEN
C215
4U7
C302
0.1U
+1V3D
R263
120R
4
5
GND
+1V3D
GND
R253
75R
MEM_ADDR13
1.25 x (1+120/110) = 2.6V
R284
75R
C290
0.1U
C291
0.1U
C289
0.1U
C288
0.1U
C293
0.1U
C292
0.1U
C294
0.1U
1
MEM_ADDR2
C295
0.1U
MEM_ADDR3
C316
1U
C303
0.1U
2
MEM_ADDR5
MEM_VREF
R262
110R
VIN 3
6V3
C200
100U
GND
OUT 2
U201
LD1117S
1
MEM_ADDR6
GND
4 4
+5V
2
MEM_ADDR1
3
6
4
5
MEM_ADDR0
8
7
GND
I_17950_031.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
38
SSB: MT5335 Interface VGA
A
B12
MT5335 INTERFACE - VGA
B12
U203
VGA_L
VGA_R
YPBPR_L
YPBPR_R
AIN2_L
AIN2_R
SCT_L
SCT_R
AVDD33_AADC
GND
VIMD_AADC
REFP_AADC
GND
177
176
175
174
173
172
171
170
169
181
179
180
178
AIN0_L
AIN0_R
AIN1_L
AIN1_R
AIN2_L
AIN2_R
AIN3_L
AIN3_R
AVDD33_AADC
AVSS33_AADC
VMID_AADC
REFP_AADC
REFN_AADC
ASPDIF
AOMCLK
AOLRCK
AOBCK
AOSDATA0
AL1
AR1
AL2
AR2
AVDD33_KADAC0
AVDD33_KADAC1
AVSS33_KADAC0
AVSS33_KADAC1
ADAC_VCM
AVDD33_DIG
201
198
199
200
196
186
185
189
187
190
182
188
184
183
168
ASPDIF
AOMCLK
AOLRCK
L234
600R
AOBCK
A0SDATA0
AL1O
AR1O
AL2O
AR2O
AVDD33_ADAC0
AVDD33_ADAC1
GND
GND
ADAC_VCM
AVDD33_DIG
MT5335PKU
AV33
AV33
AV33
L227
600R
ADAC_VCM
L231
600R
AVDD33_AADC
AVDD33_ADAC1
C313
0.1U
C246
1U
A
GND
GND
GND
GND
GND
AV33
AV33
AV33
C311
0.1U
C245
1U
C307
0.1U
C241
1U
GND
GND
L228
600R
L230
600R
REFP_AADC
VIMD_AADC
AVDD33_DIG
C310
0.1U
GND
GND
L229
600R
GND
C218
4U7
GND
AV33
GND
C312
0.1U
GND
AVDD33_ADAC0
C309
0.1U
AV33
C244
1U
C308
0.1U
C242
1U
AV33
C243
1U
A
C219
4U7
AV33
GND
GND
A
I_17950_032.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
39
SSB: D/A Converter
A
B13 DIGITAL-ANALOG-CONVERTER
B13
C900
1U
AL1O
R904
10K
R901
470R
C928
100P
R906
33K
R907
5K1
C902
47U
R908
10R
SPEAK-OUTL
C929
NC
L16
600R
C912
1U
OPAVREF
R910
5K1
R909
33K
C903
47U GND
C927
100P
C930
NC
AV9V
8
7
C926
2200P
VCC+
U1
1OUT
R902
100K
1
GND
6
R903
470R
2OUT
5
C901
1U
AR1O
R905
10K
1IN-
GND
2
2IN+
2IN-
GND
1IN+
RC4558
GND
GND
VCC-
GND
3
C925
2200P
6V3
4
R900
100K
OPAVREF
R913
10R
SPEAK-OUTR
6V3
GND
A
A
DAC
C911
1U
C910
1U
5
C9012
GND
GND
6
C9013
0.1U
7
DIN
MCLK
FORMAT
BCLK DEEMPH
ENABLE DVDD
VMID
DGND
ROUT
LOUT
AGND
AVDD
C9018
0.1U
R9030
33R
AOMCLK
13
12
DACVL
11
10
C9014
0.1U
9
8
R9017
1U C9017
ADCVA
WM8501
14
R9022
LRCLK
DACVL
R9029 3
4
0.1U
GND
33R R9028 2
33R
C9015
1U
R915
10K
A0SDATA0
AOBCK
1
0
L900
600R
SCT1_AUL_OUT
C913
1000P
R9019
47K
OPAVREF
33R R9027
10K/NC
R914
10K
AOLRCK
R9025
NC/33K
OPAVREF
10K R9024
U907
AV9V
R9021
10K
R9020
10K
DV33
10K R9023
DV33DV33
GND
ADCVA
L930
30R
R9026
NC/33K
+5V
DACVL
DV33
L931
30R
ADCVA
R9018
0
L901
600R
SCT1_AUR_OUT
C914
1000P
C9016
1U
0.1U
C9009
1U
C9008
1U
GND
C9010
C9011
1U
A
I_17950_033.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
40
SSB: HDMI Switch
HDMI SWITCH
B14
B14
DV33
GND
L9
600R
R21
4K7
AV18-HDMI
2
GND
3
R59
6
7
GND1
RX1+
RX1RX0+
GND3
RX0RXC+
GND4
RXCNC1
NC2
DDCCLK
DDCDA
GND5
VCC
HPD
NC\100R
1
CI_DV18
AV18-HDMI
C136
10P
C135
10P
DV18-HDMI
OSDA0
L10
600R
L11
600R
DV33
C23
1U
OSCL0
C22
0.1U
GND
CI_DV18
NC\100R
R35
GND
2
R52
4K7
R54
4K7
4
5
Q2
BT3904
6
7
R55
4K7
GND2
RESET_N
R34
3
RX2-
100R
C
B
E
8
GND
9
100R
R53
10
HDMI_SEL
11
12
13
14
15
HDMI0_SCL
16
HDMI0_SDA
17
R58
+5V_HDMI0
18
19
+5V_HDMI1
+5V_HDMI0
4K7
T Z903
T Z908
GND
U906
U905
1
2
T Z907
GND
A0
R56
4K7
1
8
VCC
7
WP
3
6
A2
SCL
4
5
GND
SDA
AT24C02
2
C41
0.1U
C40
0.1U
1
3
4
5
D109
D3V3L4
8
VCC
7
A1
WP
3
6
A2
SCL
4
5
GND
SDA
AT24C02
2
HDMI0_SCL
HDMI0_SDA
T Z906
T Z904
T Z905
GND
A0
R57
4K7
R48
47K
RX2+
R33
4K7
R51
P903
C134
10P
GND
C21
0.1U
DV33
R30
NC\4K7
CEC
C133
10P
GND
R32
NC\4K7
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
EZJZ1V270RA
2
HPD
R72
DV33
D107
D5V0S1
+5V_HDMI1
19
C20
0.1U
18
R47
47K
VCC
DV33-HDMI
CEC
D106
D5V0S1
17
GND5
R31
750R
D105
D5V0S1
HDMI1_SDA
D104
D5V0S1
16
R45
0R
CEC-IN
RX0_C
RX0_CB
1
DDCDA
SII9185
GND
C19
1U
NC\0R
HDMI1_SCL
GND
RX0_1
RX0_1B
RX0_0
RX0_0B
C17
0.1U
R41
15
DDCCLK
U904
C16
0.1U
14
NC\0R
RX0_2
RX0_2B
C15
0.1U
R42
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
C14
0.1U
NC2
CEC-IN
TX2+
TX2AGND1
TX1+
TX1AVCC18A
TX0+
TX0AGND2
TXC+
TXCEXTSWING
RESET#
LSDA
LSCL
HPD0
AVCC18B
R0XCR0XC+
AGND3
C13
0.1U
13
NC1
AGND7
RXC2+
RXC2AVCC18D
HPD2
AVCC33C
CEC-A
CEC-D
RPWR1
DSCL1
DSDA1
AVDD18B
R1X2+
R1X2AGND6
R1X1+
R1X1AVCC33B
R1X0+
R1X0-
R11
4K7
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
12
R12
NC\4K7
RXC-
AGND9
TPWR/I2CADDR
TSCL
TSDA
HPDIN
RSVDL
DGND2
DVCC18B
RPWR2
DSCL2
DSDA2
AVDD18C
R2X2+
R2X2AGND8
R2X1+
R2X1AVCC33D
R2X0+
R2X0-
10
11
GND4
OSDA1
OSCL1
HDMI_5V
C12
0.1U
8
9
RXC+
HPDIN
100R
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
GND3
RX0-
100R
R20
100R
100R
C11
0.1U
RX0+
R18
R19
4K7
R50
47K
RX1-
R16
NC\4K7
R15
4K7
R17
5
GND2
R14
4K7
R13
4K7
4
AGND5
R1XC+
R1XCAVCC18C
HPD1
I2CSEL/INT
DGND1
DVCC18A
RPWR0
DSCL0
DSDA0
AVDD18A
R0X2+
R0X2AGND4
R0X1+
R0X1AVCC33A
R0X0+
R0X0-
RX1+
R49
47K
GND1
RX2-
C43
0.1U
C39
1U
DV33-HDMI
1
0.1U
P901
RX2+
C38
GND
C42
0.1U
5
4
3
1
D108
D3V3L4
2
DV18-HDMI
A1
HDMI1_SCL
HDMI1_SDA
T Z901
T Z902
GND
I_17950_034.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
41
SSB: I/O Scart
B15 IO - SCART
P1
1
SCT1_AUR_OUT
R970
100R
L903
30R
SCT1_AV_IN
R968
75R
SCT1_AUL_OUT
C969
1U
3
GND
SCT1_B_IN
R969
68R
GND_SV
R974
100R
R977
68R
C977
0.01U
C978
0.047U
1
C975
0.01U
Y0P
C970
16P
GND
EZJZ1V270RA
7
2
L905
30R
GND
SCT1_B_IN
18
Y0N
PB0P
SCT1_R_IN
R975
75R
1
STC1_FB_IN
9
SCT1_AV_IN
1
1
R976
75R
GND
SCT1_R_IN
C976
16P
L906
30R
1
R63
PBR0N
EZJZ1V270RA
T Z920
T Z928
T Z923
T Z919
T Z918
T Z922
T Z927
2
11
GND
10 SCT1_AV_OUT
C973
16P
R61
20
21
C974
0.01U
R978
100R
R60
SCT1_G_IN
17
19
C972
0.01U
R973
68R
R971
75R
16
8
C971
0.01U
R972
100R
L904
30R
SCT1_G_IN
SCT1_FS_IN
5
6
SY0
SCT1_AUL_IN
14
15
C968
0.047U
C967
47P
13
4
B15
Nearly 5335
Nearly Connector
SCT1_AUR_IN
12
2
T Z921
T Z925
T Z926
T Z924
R64
EZJZ1V270RA
PR0P
SC0
R62
2
2
EZJZ1V270RA
EZJZ1V270RA
2
GND
GND
GND
NEARLY MT5335
R963
SOY0
0R
L907
30R
STC1_FB_IN
1
C979
470P
R960
75R
C963
470P
EZJZ1V270RA
C964
C965
1U
R965
10K
L2
30R
SCT1_AUL_IN
R65
R964
10K
L1
30R
SCT1_AUR_IN
C966
1U
R966
10K
SCT_R
SCT_L
R967
10K
470P
2
GND R961
33K
L908
30R
SCT1_FS_IN
SCART_FS_IN
1
C980
470P
R962
10K
SCT1_AUR_OUT
SCT1_AUL_OUT
1
1
GND
R68
R67
2
EZJZ1V270RA
EZJZ1V270RA
R66
2
EZJZ1V270RA
GND
2
GND
I_17950_035.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
42
SSB: I/O Side AV, S-Video, Audio
B16
IO - SIDE AV, SVIDEO, AUDIO
B16
AV_5V
L925
10R
Close to MT5382p
R945
100R
CVBS0
C953
0.047U
T Z917
SY0
SC0
SY1
SC1
132
130
129
128
127
126
125
D2SA
136
CVBS1
CVBS_OUT
C001
47U
C003
1U
R9003
10K
R919
NC
D2SA
C004
0.01U
CVBS2
R918
0R
U203
R920 GND
1K
6V3
BC847C
Q815
C
D2SA
DVDD25_VADC
DVSS25_VADC
GND_TUNER
GD_CVBS
GND_SV
AVDD25_VADC
AVSS25_VADC
AVDD25_REF
AVSS25_REF
AVDD25_VFE
AVSS25_VFE
R9004
75R
DVDD25_VADC
GND
141
142
137
138
135
134
AVDD25_VADC
GND
AVDD25_REF
GND
AVDD25_VFE
GND
C920
1U
GND_TUNER
GND_CVBS
GND_SV
CI_GPIO14
R924
0R
SCT1_AV_OUT
MT5335PKU
C
R9001
470R
B
R921
4K7
E
R944
4K7
C002
47P
Q906
BC847C
GND
GND
AV25
9
Nearly 5335
Nearly Connector
T Z975
7
R946
100R
L915
30R
C959
0.047U
AV25
L911
600R
5
C916
R947
75R
R70
T
EZJZ1V270RA
1U
AV25
C958
AV25
47P
Z974
6
DVDD25_VADC
SY1
1
P902
139
140
133
131
124
B
E
R9002
10K
CVBS0
CVBS1
CVBS2
SY0
SC0
SY1
SC1
2
L912
600R
C954
0.1U
GND
AVDD25_VADC
8
C917
GND
R948
100R
L916
30R
C961
0.047U
GND
SC1
1U
AV25
AV25
1
L913
600R
R949
75R
R69
EZJZ1V270RA
GND
AVDD25_REF
C960
C918
47P
1U
2
GND
P902
L914
600R
GND
AVDD25_VFE
Z981
T
R9010
10K
4
L927
30R
3
C9001
1U
R9009
10K
L926
30R
WHITE
C9002
1U
C919
1U
AIN2_L
C957
0.1U
AIN2_R
RED
GND
2
C9004
GND
1
2
EZJZ1V270RA
1
R71
YELLOW
C956
0.1U
AV25
AV25
Z980
T
C955
0.1U
470P
R9012
10K
C9003
R9011
10K
470P
GND
R9013
100R
L928
30R
R9014
75R
T
Z976
T
Z978
CVBS2
C9007
47P
GND
C9006
0.047U
C915
1U GND_CVBS
I_17950_036.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
43
SSB: MT5335 Interface YPbPr & VGA
MT5335 INTERFACE - YPBPR, VGA
Nearly Connector
1
WHITE
2
GREEN
4
5
BLUE
Y_IN
C728
4700P
SOY1
R981
68R
L4
30R
Y_IN
C730
0.01U
Y1P
U203
YPBPR_R_IN
R982
75R
PB_IN
SOY0
Y0P
Y0N
PB0P
PBR0N
PR0P
SOY1
C731
16P
6
RED
R984
0R
YPBPR_L_IN
3
RED
B17
Nearly 5335
R983
100R
C729
0.01U
Y1N
PR_IN
7
GND
10
VGA_L_IN
9
P907
R986
68R
L5
30R
PB_IN
C726
0.01U
PB1P
T Z939
VGA_R_IN
8
R985
75R
Y1P
Y1N
PB1P
PBR1N
PR1P
107
108
109
114
115
116
118
119
120
121
122
123
T Z940
B17
112
111
SOY0
Y0P
Y0N
PB0P
PBR0N
PR0P
SOY1
Y1P
Y1N
PB1P
PBR1N
PR1P
DVDD12_VGA
AVSS12_RGBADC
AVDD12_RGBADC
AVSS12_RGBFE
AVDD12_RGBFE
RP
RN
BP
BN
GP
GN
VSYNC
HSYNC
SOG
TN1
TP1
117
113
110
105
101
104
106
98
99
102
103
96
97
100
DVDD12_VGA
GND
AVDD12_RGBADC
GND
AVDD12_RGBFE
RP
RN
BP
BN
GP
GN
VSYNC
HSYNC
SOG
MT5335PKU
C727
16P
1
1
1
1
R987
100R
C725
0.01U
PBR1N
AV12
R74
R77
EZJZ1V270RA
AV12
EZJZ1V270RA
GND
2
2
2
2
GNDR75
EZJZ1V270RA
PR_IN
R989
68R
L6
30R
C723
0.01U
L909
600R
DVDD12_VGA
PR1P
C988
C987
0.1U
1U
R76
EZJZ1V270RA
R988
75R
AV12
C724
AV12
16P
GND
L910
600R
AVDD12_RGBADC
C990
C989
0.1U
1U
GND
AV12
AV12
GND
AVDD12_RGBFE
L3
600R
C992
C991
0.1U
1U
GND
T Z929
P904
2
1
C732
0.1U
R979
100R
ASPDIF
YPBPR_L_IN
1
BLACK
SPDIF_OUT
YPBPR_R_IN
C993
R990
10K
L7
30R
R980
100R
C719
33P
2
470P
R73
EZJZ1V270RA
C722
C721
1U
R991
10K
L8
30R
C720
1U
R992
10K
YPBPR_L
YPBPR_R
R993
10K
470P
GND
GND
I_17950_037.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
44
SSB: I/O VGA
IO - VGA
B18
B18
Nearly 5335
T Z945
T Z941
T Z942
T Z943
T Z944
T Z946
T Z948
T Z947
T Z955
P908
16
R998
0R
GREEN
L918
30R
C712
4700P
R719
33R
Nearly Connector
C714
0.01U
SOG
GP
5
VGA_PLUGPWR
VGASCL_IN
15
R996
75R
R716
0R
W/P_CTR
4
W/P
3
9
1
BLUE
13
R997
100R
HSYNC_IN
+5V
2
BLUE
D913
BAV70
L919
30R
R720
33R
GND
C713
0.01U
C710
0.01U
GN
C996
U903
BP
1
8
A0
VCC
2
7
A1
WP
3
6
A2
SCL
4
5
GND
SDA
AT24C02
C005
ESD_0402
8
2
12
R999
75R
GREEN
VGASDA_IN
C711
16P
GND
R701
100R
RED
EZJZ1V270RA
R86
EZJZ1V270RA
2
2
2
R84
1
1
17
1
6
L920
30R
GND
R702
75R
C707
0.01U
RP
R703
100R
RED
1
11
C709
0.01U
R721
33R
7
R715
10K
0.1U
C706
0.01U
Z970 T
Z971 T
Z972 T
3
VGA_PLUGPWR
16P
VGA_PLUGPWR
VSYNC_IN
14
C715
Z973 T
10
W/P
VGASCL
VGASDA
RN
BN
GND
C708
16P
R85
EZJZ1V270RA
GND
GND
5VSB
5VSB
VGA_L
VGASCL_IN
R706
10K
R707
10K
470P
R80
U0TX
B
R718
22K
C
E
1
5VSB
GND
Q903
C143ZT
HSYNC
GND
R82
10P
U0RX
5VSB
R726
0R/NC
2
R710
10K
GND
VGASDA_IN
B
Q905
C143ZT
E
R725
10K
VGASDA
1
VSYNC
R711
100R
C
SW_UPDATE_CTL1
SW_UPDATE_CTL
VSYNC_IN
R713
100R
C705
EZJZ1V270RA
L922
30R
R714
10K
16P
2
L921
30R
5VSB
R712
100R
C998
EZJZ1V270RA
HSYNC_IN
5VSB
E
470P
C703
VGASCL
1
C999
R709
100R
Q904
C143ZT
C701
1U
C
R705
10K
R708
10K
VGA_R
B
C702
1U
L923
30R
VGA_L_IN
R704
10K
VGASCL_IN
L924
30R
VGA_R_IN
VGASDA_IN
T Z949
T Z950
GND
R83
R717
22K
1
C997
16P
C704
10P
EZJZ1V270RA
2
EZJZ1V270RA
R81
GND
2
GND
I_17950_038.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
45
SSB: LVDS Receiver
B19
LVDS RECEIVER
B19
DV33A
VDD_PANEL
L929
NC\TTL\600R
DV33A_LVDS_RECEIVER
T_R7
1
R293
NC\TTL\33R
GND
DV33A
T_R6
C2202
C2001
C2004
C2006
C2007
2
3
6 R5
T_R4
NC\TTL\0.1U
GND
T_R3
NC\TTL\0.1U
NC\TTL\0.1U
NC\TTL\0.1U
4
1
8 R3
T_R2
NC\TTL\0.1U
U207
T_B5
T_HSYNC
T_VSYNC
T_DE
T_R6
AN00
AP00
AN11
AP11
AN22
AP22
CLK11CLK11+
AN33
AP33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
RXOUT22
RXOUT23
RXOUT24
GND1
RXOUT25
RXOUT26
RXOUT27
LVDSGND1
RXIN0RXIN0+
RXIN1RXIN1+
LVDSVCC1
LVDSGND2
RXIN2RXIN2+
RXCLKINRXCLKIN+
RXIN3RXIN3+
LVDSGND3
PLLGND1
PLLVCC1
PLLGND2
PWRDWN
RXCLKOUT
RXOUT0
GND2
2
7 R2
T_R1
DV33A_LVDS_RECEIVER
NC\TTL\0.1U
3
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VCC4
RXOUT21
RXOUT20
RXOUT19
GND5
RXOUT18
RXOUT17
RXOUT16
VCC3
RXOUT15
RXOUT14
RXOUT13
GND4
RXOUT12
RXOUT11
RXOUT10
VCC2
RXOUT9
RXOUT8
RXOUT7
GND3
RXOUT6
RXOUT5
RXOUT4
RXOUT3
VCC1
RXOUT2
RXOUT1
T_B4
T_B3
T_B2
T_G7
1
5 R0
R295
NC\TTL\33R
8 G7
T_G6
7 G6
3
4
5 G4
T_G3
T_G3
T_G7
T_G6
R4
R7
30
29
R6
28
27
26
25
G0
23
G2
G3
G5
G7
1
R296
NC\TTL\33R
24
22
21
20
19
G4
G6
15
B0
14
13
B2
8 G3
B5
12
11
B4
B7
10
9
B6
8
7
6
5
4
3
2
1
2
7 G2
3
6 G1
4
5 G0
1
T_B6
2
7 B6
T_B5
3
6 B5
T_B4
4
5 B4
1
T_B2
2
7 B2
T_B1
3
6
B1
T_B0
4
5
B0
V386
1
DV33A
31
B3
T_B7
GND
32
17
T_G0
T_R2
T_R1
R2
R5
16
T_B3
PWRDN
T_CLK
T_R0
R0
33
18
T_G1
T_R5
T_R7
T_R4
T_R3
35
34
B1
T_G2
T_G2
T_G1
T_G0
37
36
6 G5
T_G4
T_B0
T_G5
T_G4
2
T_G5
T_B1
T_B7
T_B6
38
G1
4
NC\TTL\0.1U
R1
6 R1
T_R0
39
R3
R4
5
R294
NC\TTL\33R
C2010
40
7 R6
T_R5
C2015
P205
8 R7
R298
NC\TTL\33R
R299
NC\TTL\33R
R290
NC\TTL\33R
8 B7
D_HSYNC
DE
D_VSYNC
PANEL_CTL2
CLK
GND
8 B3
8
DE
2
7
T_VSYNC 3
6
D_VSYNC
5
D_HSYNC
T_DE
T_HSYNC 4
DV33A
R291
NC\TTL\10K
AN00
R23
100R
AN11
R24
100R
AP11
AN22
R2003
100R
AP22
R2004
100R
CLK11+
R2005
100R
T_CLK
L239
120R
R292
NC\TTL\33R CLK
AP33
CLK11AN33
AP00
PWRDN
C
PWRDN_EN
B
Q5
C143ZT
E
C2011
NC\TTL\16P
GND
GND
I_17950_039.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
46
Layout Small Signal Board (Top Side)
I_17950_040.eps
070508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
47
Layout Small Signal Board (Bottom Side)
I_17950_041.eps
080508
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
48
Keyboard Control Panel
KEYBOARD CONTROL
E
E
R601
390R
4
3
5VIN
KEY
C601
0.1U
1
menu
1
2
ch-
1
2
R605
4K3
2GND
1
2
R604
2K7
5VSB
vol+
R603
1K5
R701
0
1
2
R602
1K
P601
vol-
ch+
1
2
R606
7K5
POWER
1
2
K606
K605
K604
K603
K602
K601
Personal Notes:
3
4
3
4
3
4
3
4
3
4
3
4
I_17930_031.eps
250408
Layout Keyboard Control Panel (Top Side)
I_17930_032.eps
220408
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
49
Inverter Panel
2
1
I
4
3
5
7
6
8
INVERTER
CN1
I
F1
4
5A
1
2
3
4
5
6
C1
220uF/25V
CN2
7
1
2
C28
10pF
R17
100(1206)
C3
220uF/25V
T1
1
6
C35
C36
222
Q4
DTA143
NC
C37
471
D17 BAV99
O/S 1
R50
820
Q1
C4
104
FB
ZD1
8.2V
C14
105
DTC143
D
IC-Vcc
K
R24 R4
5.6K
NC
D9
C21
A
C20
225(1206)
R34
22K
C
225(1206)
4
T2
7
BAW56K
C16
U2
4
C5
10
105
G2
R31
NC
D7
R43
R35
150
2222
10
D10 1N4148
1
D2
G1
2
D2
S2
3
D1
S1
C22
105
D1
5
1
6
6
C39
C53
222
7
C38
NC
471
CN3
8
BAV99
O/S2
U1
1
16
R20
100K
C6
3
O/S
13
5
C7
R7
20K
NC
R9
16k
R30
560
7
Q7
2907
FB
D27
BAV99
7
C30
10pF
22K
22
10
4
T3
R36
R21
1
9
6
BAW56K
C17
C
223
R44
G2
R45 10
R37
150
22
D2
G1
C23
105
D1
S1
1
D12 1N4148
D2
S2
3
2
R22
C10
NC
10
C42
C40
U3
4
C9
331
D
CON5
820
D11
11
8
681
R8
33k
ZD2
4.3V
12
6
C8
103
14
4
105
R2 0
15
R54
A
2
R18
R19
100K 100K
C15
K
R6
270K
1
2
3
4
5
D21
A
47K
R42
223
D1
5
C41
NC
222
471
D18
BAV99
6
O/S 3
C
R51
820
7
8
FB
R5
D23
BAV99
C29
10pF
B
D
Q2
2N7002
4
R56
2K
R33
NC
1
6
C49
222
R23 0
FB
R25
1K
R57
C51
471
CN4
ZD3
4.3V
R32
560
4.7K
O/S 4
D19
R52
820
BAV99
U1B
LM393
R38
22K
D26
B
B
C24
C25
D13
4
C18
4
R46 10
223
G2
3
U1A C54
105
R62
3K
R39
150
VCC / 8.2V
D25
R47
A
10
S1
1
D1
R63
LM393
C55
105
FB
R601K
D5
1N4148
R59
30K
R48
223
Q5
DTA143
O/S 5
10
3
2
R49 10
R41
150
1N4148
1
G2
D2
S2
D2
G1
D1
S1
D1
C45
C44
222
5
NC
471
C
6
O/S 6
7
D22
BAV99
8
C27
105
R55
820
FB
Q6
2N7002
R1
300K
A
Q3
D6
O/S
2222
R3
100K
O/S 6
C43
U5
4
C56
104
1
2
6
BAW56K
C19
R14
1M
D3/NC
7
C33
10pF
D16
BAW56K
CN5
T6
1
Q11
2222
R27
100
4
R40
22K
O/S 3
O/S 4
R53
820
D14 1N4148
10K
A
O/S 5
D20
BAV99
DTA143
IC-Vcc
D2/NC
471
D
8
D15
BAW56K
C47
NC
Q10
R58
R15
100K
C46
222
7
1N4148
510K
O/S 2
C48
6
6
D1
B
C32
10pF
1
D2
G1
C26
105
R64 10K
O/S 1
7
5
D2
S2
2
R10
1M
T5
U4
R28
3K
D1/NC
FB
BAW56K
C52
105
CON5
225(1206)
225(1206)
1N4148
R61
510K
1
2
3
4
5
Q8
2907
A
BAV99
C50
NC
K
R11 3K
C12
104
7
C31
10pF
2222
D4
R13
NC
D24
BAV99
D8
R26 NC
C11 103
T4
B
R12
100
C13
BAW56K
C34
105
105
R16
1M\NC
R29
NC
1N4148
I_17930_035.eps
220408
1
2
3
4
5
6
7
8
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
50
Layout Inverter Panel (Top Side)
I_17930_036.eps
220408
Layout Inverter Panel (Bottom Side)
I_17930_037.eps
220408
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
51
IR LED Panel
J
IR & LED
J
IR
G1
VCC
C1
10U
R9
4K7
R5
100R
R6
100R
GND
P1
R7
4K7
2
R3
1K
GND
LED1
1
C2
3
C3
47U
IR
10U
4
6V3
+5V
5
Personal Notes:
LED2
R1
4K7
C
B
R4
3K3
E
Q1
Q2
BT3904 E
B
C
BT3906
D3
1
R2
4K7
R51
4K7
R52
4K7
3 D1
R
C
B
W
2
Q5
BT3904 E
I_17930_033.eps
220408
Layout IR LED Panel (Top Side)
I_17930_034.eps
220408
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts
TCM2.0E LA
7.
52
Personal Notes:
E_06532_013.eps
131004
Alignments
TCM2.0E LA
8.
EN 53
8. Alignments
Index of this chapter:
8.1 Electrical Alignments
8.2 Hardware Alignments
8.3 Software Alignments
Table 8-2 Alignment for 26 " with a colour analyser
Cool (11000K) Normal (9000K) Warm (6500K)
x (70 IRE) 0.278 +/- 0.003 0.289 +/- 0.003
Note:
The Service Modes are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or
RIGHT keys of the remote control transmitter.
8.1
Electrical Alignments
Perform all electrical adjustments under the following
conditions:
• Power supply voltage (depends on region):
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
– EU: 230 VAC / 50 Hz (± 10%).
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).
– US: 120 VAC / 60 Hz (± 10%).
• Connect the set to the mains via an isolation transformer
with low internal resistance.
• Allow the set to warm up for approximately 60 minutes.
• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground.
• Test probe: Ri & gt; 10 MΩ, Ci & lt; 20 pF.
• Use an isolated trimmer/screwdriver to perform
alignments.
8.3.2
0.314 +/- 0.003
y (70 IRE) 0.278 +/- 0.003 0.291 +/- 0.003
0.319 +/- 0.003
Display Code
When after an SSB or display exchange, the display option
code is not set properly; it will result in a TV with “no display” or
strange resolution.
Therefore, it is required to set this display option code after
such a repair.
To do so, press (slowly) the following key sequence on a
standard RC transmitter: “062598” directly followed by
“MENU” and “xxx”, where “xxx” is a 3 digit decimal value of
the panel type: see column “Display code” in table below.
When ready, the set will go to stand-by.
After this, perform a cold start.
LCD Panel:
AUO 19”
Display Code:
096
CMO 19” - M190Z1-L01
094
LG 20” - LC201V02-SDD1
093
AUO 22”
097
CMO 22” - M220Z1-L03
022
Hardware Alignments
Not applicable.
8.3
Software Alignments
8.3.1
White Balance Adjustment (VGA Mode)
Only VGA input requires colour temperature adjustment as all
other inputs or relative ones. Both WARM and COOL colour
coordinates are also relatives to NORMAL colour temperature
mode ones.
Equipment requirements: Colour analyser (e.g Minolta CA210).
Pre conditions:
• Picture Preset: Standard.
• Black Expand: Off.
• Tone: Normal.
• Dynamic Contrast: Off.
Colour Temp Alignment
Apply a 1366×768@50Hz signal with white pattern, set
“brightness” at 100%, and “contrast” at 50%. Adjust the R, G,
and B sub-gain for the screen centre.
The 1931 CIE chromaticity (x, y) co-ordinates shall be:
Table 8-1 Alignment for 19 " , 20 " , and 22 " with colour
analyser
Cool (9000K)
Normal (8000K) Warm (6500K)
x (70 IRE) 0.289 +/- 0.003 0.296 +/- 0.003
0.314 +/- 0.003
y (70 IRE) 0.291 +/- 0.003 0.299 +/- 0.003
0.319 +/- 0.003
030
AUO 26” VM
098
CMO 26”
8.2
AUO 26” - T260XW03 V3
095
EN 54
9.
TCM2.0E LA
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9. Circuit Descriptions, Abbreviation List, and IC Data Sheets
Index of this chapter:
9.1 Introduction
9.2 Block Diagram
9.3 Abbreviation List
9.4 IC Data Sheets
9.1
Notes:
• Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
Introduction
This chassis is a digital derivative from the TCM1.0E LA
chassis and supports DVB-T reception. It uses the Mediatek
MT5335 main chip. It processes the following input/output
signals:
• Analog and digital RF signals (PAL B/G, D/K, I, SECAM B/
G, D/K, L/L’, DVB-T)
• SCART input signals (CVBS & RGB)
• CMP input signals (YPbPr)
• VGA input signals
• HDMI input signals, v1.2 compliant, with HDCP, audio
included as EIA-861B standard
• S-Video input
• Headphone output
• SPDIF output.
9.2
The platform is also designed for the lowest power
consumption in off/stand-by mode ( & lt; 0.3W) to fulfil new Philips
CE environment policy requirement.
The MT5335 is surrounded by a tuner, a video demodulator, a
HDMI interface, SDR and flash memory, an audio amplifier,
and optionally a stand-by microprocessor (26 " ). For the smaller
set versions also the inverter board is serviceable.
For the block diagram, refer also to chapter 6 “Block diagrams,
Test Point Overviews, and Waveforms”.
Block Diagram
I_17951_012.eps
060808
Figure 9-1 Block diagram
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.3
Abbreviation List
0/6/12
1080i
1080p
2DNR
3DNR
AARA
ACI
ADC
AFC
AGC
AM
ANR
AP
AR
ASF
ATSC
ATV
Auto TV
AV
AVC
AVIP
B/G
BLR
BTSC
B-TXT
C
CEC
CL
CLR
COLUMBUS
ComPair
CP
CSM
CTI
CVBS
DAC
DBE
DDC
D/K
SCART switch control signal on A/V
board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
format
1080 visible lines, interlaced
1080 visible lines, progressive scan
Spatial (2D) Noise Reduction
Temporal (3D) Noise Reduction
Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio
Automatic Channel Installation:
algorithm that installs TV channels
directly from a cable network by
means of a predefined TXT page
Analogue to Digital Converter
Automatic Frequency Control: control
signal used to tune to the correct
frequency
Automatic Gain Control: algorithm that
controls the video input of the feature
box
Amplitude Modulation
Automatic Noise Reduction: one of the
algorithms of Auto TV
Asia Pacific
Aspect Ratio: 4 by 3 or 16 by 9
Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
Advanced Television Systems
Committee, the digital TV standard in
the USA
See Auto TV
A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
External Audio Video
Audio Video Controller
Audio Video Input Processor
Monochrome TV system. Sound
carrier distance is 5.5 MHz
Board-Level Repair
Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
Blue TeleteXT
Centre channel (audio)
Consumer Electronics Control bus:
remote control bus on HDMI
connections
Constant Level: audio output to
connect with an external amplifier
Component Level Repair
COlor LUMinance Baseband
Universal Sub-system
Computer aided rePair
Connected Planet / Copy Protection
Customer Service Mode
Color Transient Improvement:
manipulates steepness of chroma
transients
Composite Video Blanking and
Synchronization
Digital to Analogue Converter
Dynamic Bass Enhancement: extra
low frequency amplification
DFI
DFU
DMR
DMSD
DNM
DNR
DRAM
DRM
DSP
DST
DTCP
DVB-C
DVB-T
DVD
DVI(-d)
E-DDC
EDID
EEPROM
EMI
EPLD
EU
EXT
FBL
FDS
FDW
FLASH
FM
FPGA
FTV
Gb/s
G-TXT
H
HD
HDD
HDCP
HDMI
HP
I
I2 C
I2D
I2S
IF
Interlaced
TCM2.0E LA
9.
EN 55
See “E-DDC”
Monochrome TV system. Sound
carrier distance is 6.5 MHz
Dynamic Frame Insertion
Directions For Use: owner's manual
Digital Media Reader: card reader
Digital Multi Standard Decoding
Digital Natural Motion
Digital Noise Reduction: noise
reduction feature of the set
Dynamic RAM
Digital Rights Management
Digital Signal Processing
Dealer Service Tool: special remote
control designed for service
technicians
Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394
Digital Video Broadcast - Cable
Digital Video Broadcast - Terrestrial
Digital Versatile Disc
Digital Visual Interface (d= digital only)
Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display.
Extended Display Identification Data
(VESA standard)
Electrically Erasable and
Programmable Read Only Memory
Electro Magnetic Interference
Erasable Programmable Logic Device
Europe
EXTernal (source), entering the set by
SCART or by cinches (jacks)
Fast BLanking: DC signal
accompanying RGB signals
Full Dual Screen (same as FDW)
Full Dual Window (same as FDS)
FLASH memory
Field Memory or Frequency
Modulation
Field-Programmable Gate Array
Flat TeleVision
Giga bits per second
Green TeleteXT
H_sync to the module
High Definition
Hard Disk Drive
High-bandwidth Digital Content
Protection: A “key” encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a “snow vision” mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP “software key”
decoding.
High Definition Multimedia Interface
HeadPhone
Monochrome TV system. Sound
carrier distance is 6.0 MHz
Inter IC bus
Inter IC Data bus
Inter IC Sound bus
Intermediate Frequency
Scan mode where two fields are used
to form one frame. Each field contains
EN 56
9.
IR
IRQ
ITU-656
ITV
JOP
LS
LATAM
LCD
LED
L/L'
LORE
LPL
LS
LVDS
Mbps
M/N
MIPS
MOP
MOSFET
MPEG
MPIF
MUTE
NC
NICAM
NTC
NTSC
NVM
O/C
OSD
OTC
P50
PAL
TCM2.0E LA
Circuit Descriptions, Abbreviation List, and IC Data Sheets
half the number of the total amount of
lines. The fields are written in “pairs”,
causing line flicker.
Infra Red
Interrupt Request
The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.
The SDI signal is self-synchronizing,
uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.
Institutional TeleVision; TV sets for
hotels, hospitals etc.
Jaguar Output Processor
Last Status; The settings last chosen
by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's
preferences
Latin America
Liquid Crystal Display
Light Emitting Diode
Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LOcal REgression approximation
noise reduction
LG.Philips LCD (supplier)
Loudspeaker
Low Voltage Differential Signalling
Mega bits per second
Monochrome TV system. Sound
carrier distance is 4.5 MHz
Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor
Matrix Output Processor
Metal Oxide Silicon Field Effect
Transistor, switching device
Motion Pictures Experts Group
Multi Platform InterFace
MUTE Line
Not Connected
Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe.
Negative Temperature Coefficient,
non-linear resistor
National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air)
Non-Volatile Memory: IC containing
TV related data such as alignments
Open Circuit
On Screen Display
On screen display Teletext and
Control; also called Artistic (SAA5800)
Project 50: communication protocol
between TV and peripherals
Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=
PCB
PCM
PDP
PFC
PIP
PLL
POR
Progressive Scan
PTC
PWB
PWM
QRC
QTNR
QVCP
RAM
RGB
RC
RC5 / RC6
RESET
ROM
R-TXT
SAM
S/C
SCART
SCL
SCL-F
SD
SDA
SDA-F
SDI
SDRAM
SECAM
SIF
SMPS
SoC
SOG
SOPS
S/PDIF
SRAM
SRP
SSB
STBY
SVGA
SVHS
SW
SWAN
SXGA
TFT
THD
TMDS
TXT
TXT-DW
UI
uP
UXGA
3.575612 MHz and PAL N= 3.582056
MHz)
Printed Circuit Board (same as “PWB”)
Pulse Code Modulation
Plasma Display Panel
Power Factor Corrector (or Preconditioner)
Picture In Picture
Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
Power On Reset, signal to reset the uP
Scan mode where all scan lines are
displayed in one frame at the same
time, creating a double vertical
resolution.
Positive Temperature Coefficient,
non-linear resistor
Printed Wiring Board (same as “PCB”)
Pulse Width Modulation
Quasi Resonant Converter
Quality Temporal Noise Reduction
Quality Video Composition Processor
Random Access Memory
Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced.
Remote Control
Signal protocol from the remote
control receiver
RESET signal
Read Only Memory
Red TeleteXT
Service Alignment Mode
Short Circuit
Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
Serial Clock I2C
CLock Signal on Fast I2C bus
Standard Definition
Serial Data I2C
DAta Signal on Fast I2C bus
Serial Digital Interface, see “ITU-656”
Synchronous DRAM
SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
Sound Intermediate Frequency
Switched Mode Power Supply
System on Chip
Sync On Green
Self Oscillating Power Supply
Sony Philips Digital InterFace
Static RAM
Service Reference Protocol
Small Signal Board
STand-BY
800x600 (4:3)
Super Video Home System
Software
Spatial temporal Weighted Averaging
Noise reduction
1280x1024
Thin Film Transistor
Total Harmonic Distortion
Transmission Minimized Differential
Signalling
TeleteXT
Dual Window with TeleteXT
User Interface
Microprocessor
1600x1200 (4:3)
Circuit Descriptions, Abbreviation List, and IC Data Sheets
V
VCR
VESA
VGA
VL
VSB
WYSIWYR
WXGA
XTAL
XGA
Y
Y/C
YPbPr
YUV
V-sync to the module
Video Cassette Recorder
Video Electronics Standards
Association
640x480 (4:3)
Variable Level out: processed audio
output toward external amplifier
Vestigial Side Band; modulation
method
What You See Is What You Record:
record selection that follows main
picture and sound
1280x768 (15:9)
Quartz crystal
1024x768 (4:3)
Luminance signal
Luminance (Y) and Chrominance (C)
signal
Component video. Luminance and
scaled color difference signals (B-Y
and R-Y)
Component video
TCM2.0E LA
9.
EN 57
EN 58
9.4
9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
TCM2.0E LA
IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as " black boxes " in the electrical diagrams
(with the exception of " memory " and " logic " ICs).
9.4.1
Diagram B, MT5133
Block Diagram
Pin Configuration
I_17950_048.eps
080808
Figure 9-2 Block diagram & pin configuration
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.4.2
TCM2.0E LA
9.
EN 59
Diagram B, MT5335
Block Diagram
Component
TS
In
CVBS/ Analog
YC Input Input
HDMI
Rx
Tuner
In
Audio
Demod
HDMI In
I/F
VADCx4
Audio
Input
16-bit DDR
LVDS
Audio
ADC
TV
Decoder
DDR
DRAM
Controller
Mix and Post
Processing
Audio In
VDO-In
TS
Demux
ARM
JPEG,MPEG
De-interlace
BIM
Panel
2-D Graphic
OSD
scaler
Vplane
scaler
DRAM Bus
IO Bus
CKGEN
Audio DSP
Audio I/F
Audio DAC
JTAG
IrDA
BScan
PCR
Serial IF
RTC
USB2.0
UART
Watchdog
MS,SD,SM,xD
Serial Flash
PWM
Servo ADC
NAND Flash
I_17950_049.eps
090508
SPDIF, I2S
Figure 9-3 Block diagram
9.4.3
Diagram B, MT8295
Block Diagram
I_17950_050.eps
090508
Figure 9-4 Block diagram
EN 60
9.4.4
9.
TCM2.0E LA
Circuit Descriptions, Abbreviation List, and IC Data Sheets
Diagram B, SIL9185
Block Diagram
H_17370_074.eps
100807
Figure 9-5 Block diagram
9.4.5
Diagram B, TDA9886
CVAGC(pos)
external reference signal
or 4 MHz crystal
VIF-PLL
filter
TOP
TAGC
VAGC (1)
VPLL
REF
AFC
9 (8)
14 (15)
16 (17)
19 (21)
15 (16)
21 (23)
CAGC(neg)
TUNER AGC
VIF2
DIGITAL VCO CONTROL
RC VCO
2 (31)
VIF1
CBL
VIF-AGC
1 (30)
AFC DETECTOR
SOUND CARRIER
TRAPS
4.5 to 6.5 MHz
VIF-PLL
(18) 17
CVBS
video output: 2 V (p-p)
[1.1 V (p-p) without trap]
TDA9885
TDA9886
(7) 8
SIF2
SIF1
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER
AND AM DEMODULATOR
24 (27)
23 (26)
AUDIO PROCESSING
AND SWITCHES
AUD
(3) 5
DEEM
de-emphasis
network
MAD
(4) 6
SUPPLY
SIF-AGC
OUTPUT
PORTS
audio output
NARROW-BAND
FM-PLL DEMODULATOR
I 2C-BUS TRANSCEIVER
AFD
CAF
CAGC
20 (22)
18 (20)
(6, 12, 13, 14, 17,
19, 25, 28, 29, 32)
13
VP
AGND
n.c.
3 (1)
22 (24) 11 (10)
OP1
OP2
(1) Not connected for TDA9885.
Pin numbers for TDA9885HN and TDA9886HN in parenthesis.
SCL
10 (9)
7 (5)
12 (11)
4 (2)
SDA
DGND
SIOMAD
FMPLL
sound intercarrier output
and MAD select
Figure 9-6 Block diagram
FM-PLL
filter
I_17930_072.eps
250408
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.4.6
TCM2.0E LA
Diagram B, V386
Block Diagram
RxIN0+
8
RxIN0-
8
GREEN
RxIN1+
8
BLUE
LVDS to TTL
De-serializer
RxIN2+
HSYNC
RxIN2-
VSYNC
RxIN3+
DATA ENABLE
RxIN3-
RxOUT0..27
RxIN1-
RED
CONTROL
RxCLKIN+
PLL
RxCLKIN-
RxCLKOUT
PWRDWN
V386
Pin Configuration
RxOUT22
RxOUT23
RxOUT24
GND
RxOUT25
RxOUT26
RxOUT27
LVDS_GND
RxIN0RxIN0+
RxIN1RxIN1+
LVDS_VCC
LVDS_GND
RxIN2RxIN2+
RxCLKINRxCLKIN+
RxIN3RxIN3+
LVDS_GND
PLL_GND
PLL_VCC
PLL_GND
PWRDWN
RxCLKOUT
RxOUT0
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VCC
RxOUT21
RxOUT20
RxOUT19
GND
RxOUT18
RxOUT17
RxOUT16
VCC
RxOUT15
RxOUT14
RxOUT13
GND
RxOUT12
RxOUT11
RxOUT10
VCC
RxOUT9
RxOUT8
RxOUT7
GND
RxOUT6
RxOUT5
RxOUT4
RxOUT3
VCC
RxOUT2
RxOUT1
56-pin TSSOP
V386
I_17950_051.eps
090508
Figure 9-7 Block diagram & pin configuration
9.
EN 61
EN 62
9.4.7
9.
TCM2.0E LA
Circuit Descriptions, Abbreviation List, and IC Data Sheets
Diagram B, WM8501
I_17930_073.eps
250408
Figure 9-8 Block diagram
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
Diagram B, WT6702
Block Diagram
Turbo 8031 MCU
8K bytes code
flash
8051
UART,Timer0,
Timer1
Internal 256
bytes SRAM
1st SIIC
internal bus
9.4.8
TCM2.0E LA
32K Oscillator
RTC
2nd SIIC
3rd SIIC
RC
Oscillator
HV DPMS
Detector
Key Pad ADC
Interrupt
Processor
Reset
Processor
IR Detector
Clock
Processor
PWM
Clock off &
Wake Up
4 IRQ
Processor
Watchdog
timer
GPIO
Processor
Pin Configuration
32KOSCO
32KOSCI
VSS
NRST
PWM1/GPIOC1
RXD/IRQ3/GPIOB7
TXD/IRQ2/GPIOB6
HIN/GPIOB5
1
2
3
4
5
6
7
8
32KOSCO
32KOSCI
VSS
NRST
PWM1/GPIOC1
RXD/IRQ3/GPIOB7
TXD/IRQ2/GPIOB6
HIN/GPIOB5
VIN/GPIOB4
IRQ1/P1.3/GPIOB3
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
10
9
WT6702F_S161
WT6702F_S200
VDD
GPIOA0/AD0
GPIOA3/AD3/IR
GPIOA6/SCL1
GPIOA7/SDA1
GPIOB0/SCL2
GPIOB1/SDA2
GPIOB4/VIN
20
19
18
17
16
15
14
13
12
11
VDD_RTC
VDD
GPIOA0/AD0
GPIOA3/AD3/IR
GPIOA4/SCL3/P1.0
GPIOA5/SDA3/P1.1
GPIOA6/SCL1
GPIOA7/SDA1
GPIOB0/SCL2
GPIOB1/SDA2
Package Type
Package Outline
SOP 16 pin
SOP 20 pin
SSOP 20 pin
SOP 24 pin
150mil
300mil
150mil
300mil
32KOSCO
32KOSCI
VSS
NRST
PWM1/GPIOC1
PWM0/GPIOC0
RXD/IRQ3/GPIOB7
TXD/IRQ2/GPIOB6
HIN/GPIOB5
VIN/GPIOB4
IRQ1/P1.3/GPIOB3
IRQ0/P1.2/GPIOB2
1
2
3
4
5
6
7
8
9
10
11
12
WT6702F_S240
24
23
22
21
20
19
18
17
16
15
14
13
VDD_RTC
VDD
GPIOA0/AD0
GPIOA1/AD1
GPIOA2/AD2
GPIOA3/AD3/IR
GPIOA4/SCL3/P1.0
GPIOA5/SDA3/P1.1
GPIOA6/SCL1
GPIOA7/SDA1
GPIOB0/SCL2
GPIOB1/SDA2
I_17950_052.eps
090508
Figure 9-9 Block diagram & pin configuration
EN 63
EN 64
9.4.9
9.
Circuit Descriptions, Abbreviation List, and IC Data Sheets
TCM2.0E LA
Diagram B, MX25L3205
Block Diagram
Memory Array
additional 4Kb
SI
X-Decoder
Address
Generator
Data
Register
Y-Decoder
SRAM
Buffer
Mode
Logic
CS#, ACC,
WP#,HOLD#
State
Machine
Sense
Amplifier
Output
Buffer
HV
Generator
SO
SCLK
Clock Generator
Pin Configuration
HOLD#
VCC
NC
PO2
PO1
PO0
CS#
SO/PO7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SCLK
SI
PO6
PO5
PO4
PO3
GND
WP#/ACC
16-PIN SOP (300 mil)
I_17950_053.eps
090508
Figure 9-10 Block diagram & pin configuration
Circuit Descriptions, Abbreviation List, and IC Data Sheets
TCM2.0E LA
9.
9.4.10 Diagram B, TDA7266
Block Diagram
VCC
470μF
3
0.22μF
4
IN1
+
100nF
13
1
OUT1+
2
OUT1-
15
OUT2+
14
OUT2-
ST-BY
7
S-GND
0.22μF
IN2
9
-
Vref
+
12
+
-
MUTE
6
PW-GND
8
+
Pin Configuration
15
OUT2+
14
OUT2-
13
VCC
12
IN2
11
N.C.
10
N.C.
9
S-GND
8
PW-GND
7
ST-BY
6
MUTE
5
N.C.
4
IN1
3
VCC
2
OUT1-
1
OUT1+
I_17950_054.eps
090508
Figure 9-11 Block diagram & pin configuration
EN 65
EN 66
10.
TCM2.0E LA
Spare Parts List & CTN Overview
10. Spare Parts List & CTN Overview
For the latest spare part overview, please consult the Philips
Service website.
Table 10-1 Sets described in this manual: in:
CTN
Styling Published
19PFL5403/60
ME8
19PFL5403D/10
ME8
3122 785 17952
3122 785 17951
19PFL5403S/60
ME8
3122 785 17951
20HFL3330D/10
MG8
3122 785 17951
20PFL3403D/10
MG8
3122 785 17950
22PFL5403/60
ME8
3122 785 17952
22PFL5403D/10
ME8
3122 785 17951
22PFL5403S/60
ME8
3122 785 17952
26PFL3403D/10
MG8
3122 785 17951
26PFL5403/60
ME8
3122 785 17952
26PFL5403D/10
ME8
3122 785 17950
26PFL5403S/60
ME8
3122 785 17952
11. Revision List
Manual xxxx xxx xxxx.0
• First release.
Manual xxxx xxx xxxx.1
• All Chapters: Sets added (see table chapter 10).
• Frontpage: Styling ME8 added.
• Chapter 5: In SAM mode, item “Options” removed.
• Chapter 5: Error 11 removed from error code overview.
• Chapter 6: Wiring diagrams added.
• Chapter 8: Display option codes added.
• Chapter 9: Block diagram added.
• Chapter 10: CTN overview added.
Manual xxxx xxx xxxx.2
• All Chapters: Added Russian sets (xxPFLxxxx/60).
• Chapter 5: Some textual changes in ComPair section.
• Chapter 9: Abbreviation list updated.