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PAMS Technical Documentation
NSE–3 Series Transceivers
Tuning Instructions
Original 11/97
PAMS
NSE–3
Tuning Instructions
Technical Documentation
CONTENTS
Tuning Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Equipment Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Equipment Setup for Tuning a Phone without Removing Covers
Flash Concept for NSE–3 . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tuning With Covers Off – Using Test–frame JBS–19 . . . .
Tuning With Covers Off – using Light Jig JBT–1 . . . . . . . .
Warranty Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
5
6
7
8
9
Tuning Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1. RSSI Reference Signal Level Storage . . . . . . . . . . . . . .
2. AFC Diagram Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3. I/Q Modulator Amplitude Balance and Phase Shift Tuning
4. Tuning of Transmitter Power Levels . . . . . . . . . . . . . . . .
5. Charge Voltage Adjustment . . . . . . . . . . . . . . . . . . . . . . .
6. Battery Voltage Adjustment . . . . . . . . . . . . . . . . . . . . . . . .
7. LCD Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page 2
10
10
10
11
13
14
14
14
Original 11/97
PAMS
NSE–3
Technical Documentation
Tuning Instructions
Tuning Instructions
General
All tuning operations of the NSE–3 are carried out using the service software. The service software turns the phone into the locals mode, in which
the phone can be outwardly controlled via the MBUS interface.
Tuning is based on the software communicating with the D/A and A/D
converters of the phone. In some instances the phone processor will also
calculate the required correction parameter.
The tuning values of the phone reside on the EEPROM. The contents of
the EEPROM can be read by the service software and saved as a file.
This is advisable when there is need to retain that information, e.g. in
view of replacement of the circuit. The program also enables writing the
default parameters on the EEPROM, in which case all tuning steps should
be carried out.
During tuning, proceed as follows:
– Take care not to damage sensitive measuring instruments with excessive RF power.
– Carry out all tuning steps in the shortest possible time to avoid excessive heating of RF units.
– Perform all tuning steps in the order presented.
– Never try to mask a fault by tuning it out!
Original 11/97
Page 3
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Required Equipment
– PC/AT computer with service software; see separate section for
instructions on installation and use.
– Service accessories; see equipment setup pictures.
– Multimeter or DVM.
– GSM radio telephone test station or separate measuring equipment as
follows:
– RF generator
– pulse power meter
– spectrum analyzer
– attenuator and branching unit
Equipment Setup
Caution: Make sure that you have switched off the PC and the printer
before making connections !
Caution: Do not connect the PKD–1 key to the serial port. You may
damage your PKD–1 !
Attach the protection key PKD–1 to parallel port one (25–pin female
D–connector) of the PC. When connecting the PKD–1 to the parallel port
be sure that you insert the PC end of the PKD–1 to the PC (male side). If
you use a printer on parallel port one, place the PKD–1 between the PC
and your printer cable.
Next connect the M2BUS service cable, DAU–9P, to the serial port
(RS–232) of the computer. Attach one end of the service cable to the PC
serial port and the other end to the service box, JBA–4. For servicing the
phone with the covers in place the service box should always be used.
When the phone covers are removed the jigs should be used.
For audio measurements connect the audio cable, ADS–1, as follows:
– EAR line to AF INPUT of test equipment
– MIC line to MOD GEN OUTPUT of test equipment
Page 4
Original 11/97
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Equipment Setup for Tuning a Phone without Removing Covers
4.
5.
1.
2.
3.
Item:
Service accessory:
Product code:
1
Service Battery BBD–3
0775071
2
DC Cable SCB–3
0730114
3
Service MBUS Cable DAU–9P
0730109
4
Software protection key PKD–1
0750018
5
Service SW diskette 3.5”
0774080
Original 11/97
Page 5
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Flash Concept for NSE–3
10.
13.
12.
11.
6.
9A.
4.
7.
9B.
8.
5.
1.
2.
3.
Item:
Service accessory:
Product code:
1
2
3
4
5
6
7
Flash Loading Adapter FLA–5
Flash Security Box TDF–4
Prommer FPS–4S
Service Battery BBD–3
Service Cable SCH–5
DC Cable PCC–1B
D15 – D15 Cable AXS–5
(Included in FLA–5 sales pack)
Printer Cable (Included in FPS–4 sales pack)
D9 – D9 Cable AXS–4
(Included in FPS–4 sales pack)
D9 – D9 Cable AXS–4
Software protection key PKD–1
Service SW diskette 3.5”
Travel Charger ACH–6E (Euro)
Travel Charger ACH–6U (USA/Japan)
Travel Charger ACH–6X (UK)
AC Charger ACL–3E
(Included in FPS–4 sales pack)
0080178
0770106
0085095
0775071
0730098
0730053
0730091
8
9A
9B
10
11
12
13
Page 6
0730029
0730090
0730090
0750018
0774080
0270381
0270382
0270380
0680015
Original 11/97
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Tuning With Covers Off – Using Test–frame JBS–19
8.
3.
4.
9.
6.
1.
7.
5.
2.
Item:
Service accessory:
Product code:
1
Module Jig JBS–19 *
0770098
2
Service Audio Box JBA–4 **
0770094
3
DC Cable PCS–1
0730012
4
External Antenna Cable XRC–1B
0730128
5
Service Cable SCH–5 **
0730098
6
Service MBUS Cable DAU–9S **
0730108
7
Audio Cable ADS–1
0730011
8
Software Protection Key PKD–1
0750018
9
Service SW diskette 3.5”
0774080
*)
The nominal operating voltage for JBS–19 is 3.6 V.
The supply voltage for JBS–19 must never exceed 5.0 V
**)
SCH–5, JBA–4, and DAU–9S can be replaced with DAU–9P
Original 11/97
Page 7
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Tuning With Covers Off – using Light Jig JBT–1
8.
3.
4.
1.
1.
7.
6.
5.
2.
Item:
Product code:
1
Light Module Jig JBT–1 *
0770109
2
Service Audio Box JBA–4 **
0770094
3
DC Cable PCS–1
0730012
4
External Antenna Cable XRC–1B
0730128
5
Service Cable SCH–5 **
0730098
6
Audio Cable ADS–1
0730011
7
Service MBUS Cable DAU–9S **
0730108
8
Software Protection Key PKD–1
0750018
9
Service SW diskette 3.5”
0774080
*)
The nominal operating voltage for JBT–1 is 3.6 V.
The supply voltage for JBT–1 must never exceed 5.0 V
**)
Page 8
Service accessory:
SCH–5, JBA–4, and DAU–9S can be replaced with DAU–9P
Original 11/97
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Warranty Transfer
1.
Item:
Service accessory:
Product code:
1
Warranty Cable SCH–6
0730099
Original 11/97
Page 9
PAMS
NSE–3
Tuning Instructions
Technical Documentation
Tuning Steps
1. RX Calibration (AGC + AFC)
Reference values for the received signal strength meter are program
tuned.
RSSI reference signal level programming:
– Select Tuning – & gt; RX Calibration
– Connect RF generator to antenna connector at 947.067710 MHz.
– Adjust signal generator level to –55 dBm + cable attenuation.
– Press OK button
– Adjust signal generator level to –80 dBm + cable attenuation.
– Press OK button.
Service software reports:
A Table of AFC Parameters:
AFC INIT Value
AFC Slope
PSW Slope
A Table for AGC Calibration:
AGC in 3 db steps 0...57 dB
DAC and voltage reading for each gain value
– Press SAVE button
Page 10
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PAMS
NSE–3
Tuning Instructions
Technical Documentation
2. I/Q Modulator Amplitude Balance and Phase Shift Tuning
The purpose of this tuning operation is to adjust the I/Q modulator d.c. offsets and the I/Q modulator amplitude balance and phase shift.
I/Q modulator d.c. offsets, amplitude balance and phase shift tuning:
– Select Tuning – & gt; TX I/Q...
– Select I/Q tuning values from PC’s memory, phone’s EEPROM or factory default values.
– Connect spectrum analyzer (with attenuator if needed) to phone antenna connector.
– Check that TX power level is level 10, channel is 60 and TX data type
is 1.
– Adjust spectrum analyzer centre frequency to 902 MHz, Span 200
kHz,
Res BW 10 kHz, Video BW 1 kHz and Sweep time 0.5 s.
–67.71 kHz
CHF
D.C. offset
tunings:
Set this value
to minimum
+67.71 kHz
& gt; 30 dB
& gt; 35 dB
Amplitude &
phase difference:
Set this value
to minimum
– Select the ”TX I d.c. offset” option.
– Adjust the level of centre frequency (CHF signal) to minimum by varying D/A converter value with & lt; – and – & gt; buttons.
– The amplitude difference between CHF–67.7 kHz and CHF should be
& gt; 30 dB.
– Select option ”TX Q d.c. offset”.
– Adjust the level of signal CHF to minimum by varying D/A converter
value with & lt; – and – & gt; keys.
Original 11/97
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PAMS
NSE–3
Tuning Instructions
Technical Documentation
– Use the ”Amplitude Difference” option.
– Adjust the level of signal CHF+67.7 kHz (902.06777 MHz) to minimum
by varying D/A converter value with & lt; – and – & gt; keys.
– The amplitude difference between CHF+67.7 kHz and CHF–67 kHz
should be & gt; 35 dB.
– Select the ”Phase Difference” option.
– Adjust the level of signal CHF+67.7 kHz to minimum by varying D/A
converter value with & lt; – and – & gt; keys.
– When values are correct press SAVE button.
Page 12
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PAMS
NSE–3
Tuning Instructions
Technical Documentation
3. Tuning of Transmitter Power Levels
This adjustment loads the power levels of the phone transmitter into the
EEPROM. When doing this, a pulse power meter or spectrum analyzer
must be used.
Power levels programming:
– Select Tuning – & gt; TX Power...
– Select I/Q tuning values from PC’s memory, phone’s EEPROM or factory default values.
– Set power supply voltage 8.4 V to service battery (or 3.6 V to jig).
– Connect pulse power meter or spectrum analyzer to antenna connector.
– Check that channel is 60.
– Adjust the power level (levels 5, 15 and 19) by clicking the + and –
buttons, and change levels with ↑ and ↓ keys.
Power
level
Tuning POUT/dBm
(CH 60)
5
32.5
15
13.0
19
7.0
Base
–20.0
Note: If the base calculation feature is enabled, then the base level is
calculated automatically.
– Press Calculate button to calculate all other levels.
– Once all TX levels are correct, press SAVE button.
Original 11/97
Page 13
PAMS
NSE–3
Tuning Instructions
Technical Documentation
4. Energy Management Calibration
– Select Tuning – & gt; Energy Management Calibration
– Connect service battery to phone and dc cable
between phone and service battery
– Set supply voltage to 10.5 V
– Run calibrations separately or all at once
– Select calibrations:
Battery & charger default values
––––––––––––––––––––––––––––––––
– Select 1.Run Battery & charger default values
checkbox
Battery voltage
–––––––––––––––
– Select 2.Battery voltage checkbox
Charger voltage
–––––––––––––––
– Select 3.Charger voltage checkbox
Battery size
––––––––––––
– Select 4.Battery size checkbox
Battery temperature
–––––––––––––––––––
– Select 5.Battery temperature checkbox
Charge current
––––––––––––––
– Select 6.Charge current
– Select Save without confirmation, if you don’t want
confirm all the selected calibration values before saving
– Run calibrations by pressing Run button
– Set supply voltage back to 8.4 V
Page 14
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NSE–3
Tuning Instructions
Technical Documentation
This page intentionally left blank.
Original 11/97
Page 15
PAMS Technical Documentation
NSE–3 SeriesTransceivers
Chapter 1
Foreword
Original 11/97
PAMS
NSE–3
Foreword
Technical Documentation
IMPORTANT
This document is intended for use by qualified service personnel only.
Company Policy
Our policy is of continuous development; details of all technical modifications
will be included with service bulletins.
While every endeavour has been made to ensure the accuracy of this
document, some errors may exist. If any errors are found by the reader,
NOKIA MOBILE PHONES Ltd should be notified in writing.
Please state:
Title of the Document + Issue Number/Date of publication
Latest Amendment Number (if applicable)
Page(s) and/or Figure(s) in error
Please send to:
Page 1 – 2
Nokia Mobile Phones Ltd
PAMS Technical Documentation
PO Box 86
FIN–24101 SALO
Finland
Original 11/97
PAMS
NSE–3
Technical Documentation
Foreword
Warnings and Cautions
Please refer to the phone’s user guide for instructions relating to
operation, care and maintenance including important safety information.
Note also the following:
Warnings:
1.
CARE MUST BE TAKEN ON INSTALLATION IN VEHICLES
FITTED WITH ELECTRONIC ENGINE MANAGEMENT
SYSTEMS AND ANTI–SKID BRAKING SYSTEMS. UNDER
CERTAIN FAULT CONDITIONS, EMITTED RF ENERGY CAN
AFFECT THEIR OPERATION. IF NECESSARY, CONSULT
THE VEHICLE DEALER/MANUFACTURER TO DETERMINE
THE IMMUNITY OF VEHICLE ELECTRONIC SYSTEMS TO
RF ENERGY.
2.
THE HANDPORTABLE TELEPHONE MUST NOT BE
OPERATED IN AREAS LIKELY TO CONTAIN POTENTIALLY
EXPLOSIVE ATMOSPHERES EG PETROL STATIONS
(SERVICE STATIONS), BLASTING AREAS ETC.
3.
OPERATION OF ANY RADIO TRANSMITTING EQUIPMENT,
INCLUDING CELLULAR TELEPHONES, MAY INTERFERE
WITH THE FUNCTIONALITY OF INADEQUATELY
PROTECTED MEDICAL DEVICES. CONSULT A PHYSICIAN
OR THE MANUFACTURER OF THE MEDICAL DEVICE IF
YOU HAVE ANY QUESTIONS. OTHER ELECTRONIC
EQUIPMENT MAY ALSO BE SUBJECT TO INTERFERENCE.
Cautions:
1.
Servicing and alignment must be undertaken by qualified
personnel only.
2.
Ensure all work is carried out at an anti–static workstation and
that an anti–static wrist strap is worn.
3.
Ensure solder, wire, or foreign matter does not enter the
telephone as damage may result.
4.
Use only approved components as specified in the parts list.
5.
Ensure all components, modules screws and insulators are
correctly re–fitted after servicing and alignment. Ensure all
cables and wires are repositioned correctly.
Original 11/97
Page 1 – 3
PAMS
NSE–3
Foreword
Technical Documentation
[This page intentionally left blank]
Page 1 – 4
Original 11/97
PAMS Technical Documentation
Appendix 1
TRANSCEIVER NSE–3NX
Original 08/96
PAMS
NSE–3NX
Foreword
Technical Documentation
CONTENTS
Page No
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Service Manual Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Company Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Warnings and Cautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Warnings: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cautions: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page 4 – 2
1–3
1–3
1–4
1–4
1–4
1–5
Original 08/96
PAMS
NSE–3NX
Foreword
Technical Documentation
Appendix Structure
This section of the service manual (Appendix) contains specific details for
the NSE–3NX handportable telephone
The appendix comprises three chapters as follows: Chapter 1, Foreword
(this chapter); Chapter 2, Transceiver NSE–3NX, containing an exploded
view of the NSE–3NX variant (including a list of assembly parts) plus
component parts lists covering the system module and the display
module; and Chapter 3, Quick Guide, which aims to provide all user
information that service personnel are likely to require during servicing
and repair of equipment.
NOTE:
The Service Manual is intended for use by qualified
service personnel only.
Company Policy
Our policy is of continuous development; details of all technical
modifications will be included with service bulletins.
While every endeavour has been made to ensure the accuracy of this
document, some errors may exist. If any errors are found by the reader,
NOKIA MOBILE PHONES should be notified in writing.
Please state:
Title of the Document + Issue Number/Date of publication
Latest Amendment Number (if applicable)
Page(s) and/or Figure(s) in error
Please send to:
Original 08/96
Nokia Mobile Phones
PAMS Technical Documentation
PO Box 86
24101 SALO
Finland
Page 4 – 3
PAMS
NSE–3NX
Foreword
Technical Documentation
Warnings and Cautions
Please refer to the phone’s user guide for instructions relating to
operation, care and maintenance including important safety information.
Note also the following:
Warnings:
5.
CARE MUST BE TAKEN ON INSTALLATION IN VEHICLES
FITTED WITH ELECTRONIC ENGINE MANAGEMENT
SYSTEMS AND ANTI–SKID BRAKING SYSTEMS. UNDER
CERTAIN FAULT CONDITIONS, EMITTED RF ENERGY CAN
AFFECT THEIR OPERATION. IF NECESSARY, CONSULT
THE VEHICLE DEALER/MANUFACTURER TO DETERMINE
THE IMMUNITY OF VEHICLE ELECTRONIC SYSTEMS TO
RF ENERGY.
6.
THE HANDPORTABLE TELEPHONE MUST NOT BE
OPERATED IN AREAS LIKELY TO CONTAIN POTENTIALLY
EXPLOSIVE ATMOSPHERES EG PETROL STATIONS,
BLASTING AREAS ETC. PERMISSION MUST BE OBTAINED
TO USE THE PHONE IN AIRCRAFT.
7.
OPERATION OF ANY RADIO TRANSMITTING EQUIPMENT,
INCLUDING CELLULAR TELEPHONES, MAY INTERFERE
WITH THE FUNCTIONALITY OF INADEQUATELY
PROTECTED MEDICAL DEVICES. OTHER ELECTRONIC
EQUIPMENT MAY ALSO BE SUBJECT TO INTERFERENCE.
Cautions:
1.
Servicing and alignment must be undertaken by qualified
personnel only.
2.
Ensure all work is carried out at an anti–static workstation and
that an anti–static wrist strap is worn.
3.
Ensure solder, wire, or foreign matter does not enter the
telephone as damage may result.
4.
Use only approved components as specified in the parts list.
5.
Ensure all components, modules screws and insulators are
correctly re–fitted after servicing and alignment. Ensure all
cables and wires are repositioned correctly.
Page 4 – 4
Original 08/96
PAMS Technical Documentation
Chapter 4
UI Module UE4
Original 11/97
PAMS
UI Module UE4
Technical Documentation
CONTENTS
UIF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Baseband Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .
The Engine Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
The LCD Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . .
Display Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Keyboard Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Key . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Backlighting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buzzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Speaker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parts list of UE4 (EDMS Issue 8.0)
Code: 0200860
4–3
4–3
4–4
4–5
4–7
4–8
4–8
4–8
4–9
4 – 10
4 – 10
4 – 11
4 – 12
4 – 12
4 – 12
4 – 13
4 – 14
Schematic Diagrams A3
Circuit Diagram of UI Module (Version 7 Edit 40) for layout version 09
4/A3–1
Circuit Diagram of Speaker and LCD Modules for layout version 09
4/A3–2
Layout Diagram of UE4 (Version 09) . . . . . . . . . . . . . . . . . . . . . .
4/A3–3
Page 4 – 2
Original 11/97
PAMS
Technical Documentation
UI Module UE4
UIF Module
Introduction
The UI module UE4 is a four layer PCB, which is connected to the system/RF PCB with a 28–pin spring connector.
Original 11/97
Page 4 – 3
PAMS
UI Module UE4
Technical Documentation
Baseband Block Diagram
Page 4 – 4
Original 11/97
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UI Module UE4
Technical Documentation
The Engine Interface
Pin Line Symbol
Signal1
Keyboard matrix column 4
Flip interrupt, not used
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
VBB
0
0.3xVBB
0.7xVBB
11
COL4
Keyboard matrix column 3
0
0.7xVBB
10
COL3
Keyboard matrix column 2
VBB
0.7xVBB
9
COL2
Keyboard matrix column 1
0.3xVBB
0.7xVBB
8
COL1
Keyboard matrix column 0,
used for flip identification
0
0.7xVBB
7
COL0
Keyboard matrix row 4
VBB
0.7xVBB
6
ROW4
Keyboard matrix row 3
V
0.7xVBB
5
ROW3
Keyboard matrix row 2
0.3xVBB
0.7xVBB
4
ROW2
Keyboard matrix row 1
0
0.7xVBB
3
ROW1
Keyboard matrix row 0
Unit
0.7xVBB
2
ROW0
Max
0.7xVBB
1
Parameter
Min
Typ
Notes
VBB
Low
High
V
Low
High
V
Low
High
V
Low
High
V
Low
High
V
Flip Open
Flip Closed
V
Low
High
V
Low
High
V
Low
High
V
Low
High
V
12
VF_IN
Flash in
4.8
5.0
5.2
V
Connected #13
13
VF_OUT
Flash out
4.8
5.0
5.2
V
Connected #12
14
VBATT
Battery voltage
3.0
5.1
V
75
100
mA
For lights
110
300
mA
For buzzer
60
15
UAGND*
Analog ground
16
PWRON
Power on key
0
V
SCLK
Original 11/97
LCD driver serial clock
0
0.3xVBB
VBB
0
0.3xVBB
0.7xVBB
18
LCD driver code/data selection
VBB
0.7xVBB
LCDCDX
0.3xVBB
0.7xVBB
17
0
VBB
V
Low / Power on
High
V
Low
High
V
Low
High
Page 4 – 5
PAMS
UI Module UE4
Pin
MH
z
0
0.3xVBB
V
VBB
0
0.3xVBB
VBB
0
0.3xVBB
0.7xVBB
21
4.0
0.7xVBB
20
Unit
0.7xVBB
SDA
Max
0
19
Line Symbol
Technical Documentation
Parameter
Min
VBB
LCD driver serial data
LCDCSX
LCDRSTX
LCD driver chip select
LCD driver reset
22
UDGND*
Digital ground
23
BUZZER
Buzzer PWM control
24
VL
Supply voltage
Typ
0
Low
High
V
Low / Active
High
V
Low / Active
High
V
LIGHT
2.85
V
uA
0
0.3xVBB
V
Not used in UI
VBB
0
0.3xVBB
V
Low
0.7xVBB
26
V
0.7xVBB
SPARE
2.85
300
25
0
Notes
VBB
2.7
Call indicator LED
Illumination control
2.8
High / Active
27
EARN
Speaker neutral
0
1.78
Vpp
28
EARP
Speaker positive
0
1.78
Vpp
* Ground position is on connector NOT BATTERY.
LCD
15
28
14
1
UIM connector pads viewed from the GND side
Page 4 – 6
Original 11/97
PAMS
UI Module UE4
Technical Documentation
The LCD Module Interface
Pin
LCDCDX
LCDCSX
Chip select input
6
OSC**
External clock for LCD
7
UDGND*
VOUT
LCDRSTX
Reset
VBB
V
0.3xVBB
VBB
0
0.3xVBB
VBB
0.3xVBB
VBB
DC/DC voltage converter output
9
MHz
Ground
8
4.0
0
Control/display data flag input
uA
0
Serial data input
V
0.7xVBB
5
SDA
2.85
0
Serial clock input
2.8
0.7xVBB
4
SCLK
Unit
2.7
Supply voltage
Maximum
0.7xVBB
3
Parameter
Typical
/ Nominal
0
2
VL
Minimum
300
1
Line
Symbol
30.4
32.0
33.6
0
Notes
VBB = 2.7V
Control
Data
Active
kHz
Connected to
VBB on UI
V
9
0
0.3xVBB
0.7xVBB
Active
VBB
* Ground position is on connector NOT BATTERY.
** External oscillator is not used in UE4.
9
1
Display Driver
Viewing trought LCD cell
LCD Module Interface
Original 11/97
Page 4 – 7
PAMS
UI Module UE4
Technical Documentation
Functional Description
Power Distribution Diagram
PWRXON
VBB
VBATT
Buzzer
LEDs of
Display
LEDs of
Keybord
Display
PWR
key
UAGND
UDGND
Display Circuit
The display circuit includes LCD module GD40 and two capacitors. The
LCD module is COG (Chip on Glass) technology. The connection method
for chip on the glass is ACF, Adhesive Conductive Film. The LCD module
is connected to UI board with gold wired elastomer. Capacitors are placed
on UI PCB.
The display driver includes hw–reset, voltage tripler or quadrupler which
depends on temperature, temperature compensating circuit and low power control. Driver includes 84x48 RAM memory which is used when some
elements are create on display. Elements can be create with software.
Driver doesn’t include CG–ROM. One bit in RAM is same as one pixel on
display.
PWRXON
VBB
VBATT
Buzzer
LEDs of
Display
LEDs of
Keybord
Display
PWR
key
UAGND
UDGND
Page 4 – 8
Original 11/97
PAMS
UI Module UE4
Technical Documentation
Keyboard
[4V]
[2.8V]
AGND
Typical value for node is marked with black when circuit is not active
Typical value for node is marked with gray when circuit is active
Original 11/97
Page 4 – 9
PAMS
UI Module UE4
Technical Documentation
Keyboard Matrix
ROW/COL
0
1
2
3
4
0
FLIP
Side Key
Send
End/Mode
Side Key
1
NC
Soft left
Up
Down
Soft Right
2
NC
1
4
7
*
3
NC
2
5
8
0
4
PWR switch
3
6
9
#
NC = Not Connected
S Left
Up
S Right
Send
Down
End
1
2
3
4
5
6
7
8
9
*
0
#
Power Key
Micro switch is used as a power key on UI module. Circuitry includes micro
switch and two diodes which is needed for MAD interface. Power
key is connected to CCONT. Power switch is active in LOW state. The
power key circuit can be seen from the Display Circuit diagram on page
8.The power key is connected to ROW4.
Page 4 – 10
Original 11/97
PAMS
UI Module UE4
Technical Documentation
[0V]
[0.7V]
[2.6V]
[1.9V]
[0V]
[1.4V]
[4V]
[0V]
[1.2V]
[0V]
[0.5V]
[2.6V]
[2.0V]
[4V]
Backlighting
Typical value for node is marked with black when circuit is not active
Typical value for node is marked with gray when circuit is active
Original 11/97
Page 4 – 11
PAMS
UI Module UE4
Technical Documentation
Display
Backlighting is provided by LEDs, three LED on right and three on left
side of display. LEDs are compatible with CL270–YG and those are side
illuminating. Light is on when LIGHT–signal is in HIGH state.
Color of LED is for
Pin
14
Line
Symbol
VBAT
Parameter
Minimum
Battery voltage
Typical
/ Nominal
43.4
51.4
Unit
Notes
5.1
3.0
Maximum
V
Same supply for
Buzzer & Keyboard
59.6
mA
LEDs
Keyboard
In keyboard backlighting is made by 6 LEDs. LEDs are compatible with
CL190–YG. Backlighting is on when LIGHT–signal is on HIGH state.
Color of LED is for
– Keyboard
Pin
14
Line
Symbol
VBAT
: yellow–green, λ = 570nm
Parameter
Minimum
Battery voltage
Typical
/ Nominal
55.3
62.4
Unit
5.1
3.0
Maximum
V
69.9
mA
Notes
Same supply for
Buzzer & Display
LEDs
Buzzer
Buzzer for DCT3 generation phone is SMD type.
[4V]
[4V]
[4V]
[0V]
[0V]
Typical value for node is marked with black when circuit is not active
Typical value for node is marked with gray when circuit is active
Page 4 – 12
Original 11/97
PAMS
Technical Documentation
UI Module UE4
Speaker
The speaker is sealed to A–cover and UI PCB with silicon gasket. With
that the frequency response is more constant. Speaker needs 6pcs of
1.2mm holes under component for leaking sound pressure into RF–section through UI module and 7pcs of 0.9mm holes left corner of UIM to
leak from RF–section back to up cavity of phone. RF–section between UI
module and engine acts like sound cage which is known. This gives better sound quality for Ultra and Santra phone and it can be estimated in
several environments.
Silicon gasket and speaker itself acts like water proofing elements in that
area. Water can come in speaker space between speaker and A–cover
but not further from there into the phone. On A–cover is 3pcs of leaking
holes which are not located top of the speaker. This holes gives better
sound quality and less sensitive for how well phone is pressed against of
head.
Original 11/97
Page 4 – 13
PAMS
UI Module UE4
Technical Documentation
Parts list of UE4 (EDMS Issue 9.0)
Code: 0200860
ITEM
CODE
DESCRIPTION
R001
R002
R004
R006
R007
R008
R009
R010
R011
R014
R015
R016
R017
R018
C001
C002
C003
C004
C009
B001
Z001
Z002
H001
V001
V002
V003
V004
V005
V009
V010
V012
V013
V017
V020
V021
V022
V023
V025
V026
V027
1430043
1430155
1430047
1430043
1430043
1430155
1430167
1430087
1825009
1430035
1430087
1430159
1430159
1430144
2320043
2320043
2320043
2310784
2310784
5140087
3640035
3640035
0200921
4864388
4864388
4864388
4860005
4860005
4864388
4864388
4864388
4200836
4860005
4860005
4860005
4860005
4200836
4210100
4200875
4100278
Chip resistor
2.2 k
Chip resistor
15
Chip resistor
3.3 k
Chip resistor
2.2 k
Chip resistor
2.2 k
Chip resistor
15
Chip resistor
47
Chip resistor
100 k
Varistor network 4xvwm18v 1206
Chip resistor
1.0 k
Chip resistor
100 k
Chip resistor
22
Chip resistor
22
Chip jumper
Ceramic cap.
22 p
Ceramic cap.
22 p
Ceramic cap.
22 p
Ceramic cap.
100 n
Ceramic cap.
100 n
Buzzer 85db 2.6khz 3.6v 11x10x3.
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Gd40 lcd module
Led
Green
Led
Green
Led
Green
Led
Green
Led
Green
Led
Green
Led
Green
Led
Green
Transistor
BCX19
Led
Green
Led
Green
Led
Green
Led
Green
Transistor
BCX19
Transistor
BC848W
Transistor
BCX54–16
Diode x 2
BAV70
V028
4100278 Diode x 2
Page 4 – 14
VALUE
BAV70
TYPE
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1206
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
10 % 25 V 0805
11x10x3.5
0603
0603
0603
0603
0603
0603
0603
0603
0603
0603
npn 50 V 0.5 A SOT23
0603
0603
0603
0603
npn 50 V 0.5 A SOT23
npn 30 V SOT323
npn 45 V 1.5 A SOT89
70 V 200 mA
COMCAT.SOT23
70 V 200 mA
COMCAT.SOT23
Original 11/97
PAMS
Technical Documentation
S001
5200120 Push button switch 6.4x5.2 smd
9850046 PCB UE4 118.0X41.5X0.8 M4 4/PA
9850046 PC board
UE4
Original 11/97
UI Module UE4
118.0x41.5x0.8 m4 4/pa
Page 4 – 15
PAMS
UI Module UE4
Technical Documentation
This page intentionally left blank.
Page 4 – 16
Original 11/97
PAMS Technical Documentation
CARK–91
Installation Guide
Original 11/97
PAMS
CARK–91
Technical Documentation
Introduction
This installation guide has been prepared to provide the basic information
necessary to install this car kit. This guide is not intended to be definitive,
because different types and models of vehicles will require different installation work. The information given is for general guidance only.
The terms of warranty demand that this car kit be installed by an experienced installer and only genuine Nokia parts are used. An end user
should never attempt to install this car kit without professional assistance
as the installation requires special tools and knowledge.
Please refer to the telephone’s User’s Guide for instructions on the telephone’s operation, care and maintenance, including important safety information.
Note: Read the warnings below before beginning the installation procedure.
WARNINGS
1.
2.
3.
4.
5.
6.
7.
Page 2
ENSURE THAT THE VEHICLE’S BATTERY IS DISCONNECTED BEFORE
YOU START THE INSTALLATION PROCEDURE, AND THAT IT REMAINS
DISCONNECTED DURING THE PROCEDURE.
DO NOT SMOKE OR USE OPEN FLAMES WHEN WORKING NEAR THE
VEHICLE’S FUEL SYSTEM.
ENSURE THAT THE VEHICLE’S ELECTRICAL CABLES, HYDRAULIC
LINES, FUEL LINES, AND SAFETY EQUIPMENT ARE NOT DAMAGED
DURING INSTALLATION.
ENSURE THAT NORMAL CONTROL AND OPERATION OF THE VEHICLE IS NOT IMPAIRED BY THE INSTALLATION, PARTICULARLY THE
BRAKES AND STEERING. ENSURE THAT AIRBAG OPERATION IS NOT
OBSTRUCTED.
ELECTRONIC AND OTHER SOPHISTICATED SYSTEMS (e.g. SPEED
CONTROL, ABS ANTI–LOCK BRAKE, FUEL INJECTION–, NAVIGATION–, AND AIR–BAG SYSTEMS) ARE RELATIVELY IMMUNE TO MALFUNCTION CAUSED BY NEARBY RADIO TRANSMISSIONS. HOWEVER, SHOULD YOU EXPERIENCE FALSE OPERATION OF THESE
SYSTEMS OR ARE IN ANY DOUBT WHATSOEVER AS TO THEIR FUNCTIONALITY, PLEASE CONSULT THE VEHICLE’S DEALER.
THE CAR KIT IS SUITABLE FOR USE ONLY IN VEHICLES WITH A
11..32 V NEGATIVE GROUNDING. USE ON OTHER SUPPLY VOLTAGES
OR ALTERNATIVE POLARITY WILL DAMAGE THE EQUIPMENT.
THE PHONE SHOULD NOT BE LEFT SWITCHED ON FOR EXTENDED
PERIODS WITHOUT RUNNING THE VEHICLE’S ENGINE. FAILURE TO
COMPLY COULD DRAIN THE VEHICLE’S BATTERY.
Original 11/97
PAMS
CARK–91
Technical Documentation
Unpacking
Carefully unpack the equipment and ensure that the following items are
present.
Advanced Active Car Holder
Advanced HF Unit
Power Cable
Mounting Plate
Swivel Mount
HF Microphone
HF Speaker
MCC–1
HFU–2
PCH–4J
MKU–1
HHS–9
HFM–8
HFS–12
HHS–9
MKU–1
HFU–2
MCC–1
PCH–4J
HFS–12
HFM–8
Original 11/97
Page 3
PAMS
CARK–91
Technical Documentation
Component Parts
Advanced Active Holder MCC–1
The holder allows the phone to be firmly located in a convenient position.
The holder is attached to the vehicle’s interior using the swivel mount
HHS–9. The mounting must be secured with a screw (included with
HHS–9). The screw recess can then be covered with the NOKIA logo
plate.
Advanced HF Unit HFU–2
The handsfree unit enables the phone to operate in handsfree mode.
The unit is attached to the vehicle interior using the mounting plate
MKU–1. The mounting must be secured with a screw (included with
MKU–1). A temporary installation can be achieved using installation belts
(not supplied).
Power is supplied from the vehicle’s battery via the power cable PCH–4J.
The handsfree unit provides the power supply to the phone via the system connector.
The HF microphone HFM–8, connects to the MIC socket. And the HF
speaker HFS–12, connects to the socket.
Mounting Plate MKU–1 and Swivel Mount HHS–9
MKU–1 is a fixed position mounting plate; HHS–9 is a swivel mount which
allows for adjustable fixing. The two mounting plates are interchangeable.
HF Microphone HFM–8
The HF microphone connects directly to the handsfree unit ( MIC socket).
Insert the plug into the MIC socket and twist 90° to lock firmly in place.
HF Speaker HFS–12
The HF speaker connects directly to the handsfree unit ( socket).
socket and twist 90° to lock firmly in place.
Insert the plug into the
Page 4
Original 11/97
PAMS
Technical Documentation
CARK–91
Power Cable PCH–4J
The power cable connects the standard handsfree unit HFU–2 to the vehicle’s power supply. The red wire must be connected to the + voltage on
the vehicle’s power supply via the supplied fused connector. The black
wire must be attached to a good negative GND connection.
The blue ignition sense (IGNS) wire is connected to +12 V voltage controlled by the vehicle’s ignition key via the supplied fused connector.
See section ”Ignition Sense”.
The yellow wire is used for car radio muting (XCRM). The line goes down
to 0 volts during a call. See section ”Car Radio Muting”.
The green wire is used for motor antenna (AMC). The voltage in this output is +12 V whenever the phone is on. See section ”Antenna Motor Control”.
External Mobile Antenna (not supplied)
The cellular phone is designed to operate with a high quality external antenna. However, due to many different types of antennas being available,
an antenna is NOT included as part of this kit. Please, consult the dealer
to find out which is the most suitable antena type for your installation.
Original 11/97
Page 5
PAMS
CARK–91
Technical Documentation
Installation
There are some important aspects that require special attention in positioning car kit accessories.
The positioning of the phone holder is the most important factor when trying to achieve the most comfortable position for the user. The location of
the holder should be selected so that the visibility of the phone’s display is
good under all lighting conditions, but not so that the driver’s attention is
easily distracted. The holder should be located so that the driver can easily reach the keypad. Under no circumstances should the holder prevent
the driver from controlling or operating the vehicle in any way or observing traffic.
The HF microphone should be installed according to the directions in the
separate microphone installation guide. Ensure the microphone is as
close to the driver’s mouth as possible, and attached to a surface that is
mechanically quiet. The microphone should be mounted at least 3 ft/1 m
away from the handsfree unit speaker to avoid acoustic feedback.
Ensure cables are routed as far away as possible from the vehicle’s electronic systems (refer to WARNINGS)*. Also, ensure that cables are not
subjected to undue mechanical stress e.g. under seats or against sharp
edges.
* To prevent disturbance, cables should be routed as far away from the
interference source as possible
Page 6
Original 11/97
PAMS
CARK–91
Technical Documentation
Ignition Sense IGNS
The ignition sense feature prevents your car kit from draining the car battery by executing an auto power off in 20 seconds after the ignition key
has been turned off. The blue wire of the power cable is used for the ignition sense feature. The use of ignition sense is recommended to prevent
accidental draining of the car’s battery. The wire is connected via a 1 A
fuse to a 12/24 volt potential that is controlled by the ignition key. Do not
connect it directly to the high voltage sections of the ignition circuit.
Car Radio Muting CRM
The car kit offers a feature that can mute the car radio automatically during a conversation. This feature is convenient and provides for safer
handsfree operation. The car radio muting feature is based on a
grounded line, so it means that in standby, the yellow wire (XCRM) is not
grounded and car radio works normally, but during a call, line is grounded
and car radio is muted. Note that an auxiliary relay or muting unit must
be used when the car radio doesn’t have a mute feature available.
When a relay is used, connect of series with the car radio main supply. A
200 mA fuse should be used to protect the XCRM output in event of a
short circuit. Some radios have separate supplies for amplifiers and motors, and another for memory backup purposes. Very often these radios
also have a secret code system, which activates itself if a break in the
memory supply is detected. Be careful when installing the relay not to
break the memory supply (usually marked ACC or +MEM), but to install
the relay in the main supply feed.
GND
CAR
RADIO
87A
Bosch P/N 0–332–204–150
12 V, 30 A. SPDT
30
12 V d.c.
Supply for
car radio
86
12 V d.c.
87
To XCRM line
(yellow wire)
85
Fuse 200 mA
(not supplied)
Another possibility is to use a special muting unit, which mutes the radio
by connecting load resistors to the speaker lines of the car radio.
Original 11/97
Page 7
PAMS
CARK–91
Technical Documentation
Antenna Motor Control AMC
The antenna motor control offers a feature, green wire of the system
cable (AMC), that may be used to control different devices on and off.
The voltage in this output is +12 V whenever the phone is on. If the phone
is turned off, the voltage disappeares. The maximum output current is 200
mA, therefore for example motorized antenna must be controlled via a
relay, see picture below.
Bosch P/N 0–332–204–150
12 V, 30 A. SPDT
87A
12 V d.c.
30
Supply for
device
From AMC line
(green wire)
86
CONTROLLED
87 DEVICE e.g.
MOTOR ANTENNA
85
GND
GND
Fuse 1 A
All installations should take into account any special requirements of the
customer. However, should the customer require an installation that is
illegal or unsafe these facts must be pointed out to the customer and a
policy of non–compliance adopted.
Testing
Once installed, the equipment should be tested to ensure that it is operating satisfactorily and that the position of the units does not impair on the
driver’s ability to control and operate the vehicle in any way.
Use the phone to make a call when the vehicle is parked with the engine
running. During the call, switch off the engine. Ensure that the phone is
operational with the engine running and with the engine switched off. For
operating information refer to the User’s Guide supplied with the phone.
Page 8
Original 11/97
PAMS
CARK–91
Technical Documentation
[This page intentionally left blank]
Original 11/97
Page 9
PAMS Technical Documentation
CARK–64
Installation Guide
Original 11/97
PAMS
CARK–64
Technical Documentation
Introduction
This installation guide has been prepared to provide the basic information
necessary to install this car kit. This guide is not intended to be definitive,
because different types and models of vehicles will require different installation work. The information given is for general guidance only.
The terms of warranty demand that this car kit be installed by an experienced installer and only genuine Nokia parts are used. An end user
should never attempt to install this car kit without professional assistance
as the installation requires special tools and knowledge.
Please refer to the telephone’s User’s Guide for instructions on the telephone’s operation, care and maintenance, including important safety information.
Note: Read the warnings below before beginning the installation procedure.
WARNINGS
1.
2.
3.
4.
5.
6.
7.
Page 2
ENSURE THAT THE VEHICLE’S BATTERY IS DISCONNECTED BEFORE
YOU START THE INSTALLATION PROCEDURE, AND THAT IT REMAINS
DISCONNECTED DURING THE PROCEDURE.
DO NOT SMOKE OR USE OPEN FLAMES WHEN WORKING NEAR THE
VEHICLE’S FUEL SYSTEM.
ENSURE THAT THE VEHICLE’S ELECTRICAL CABLES, HYDRAULIC
LINES, FUEL LINES, AND SAFETY EQUIPMENT ARE NOT DAMAGED
DURING INSTALLATION.
ENSURE THAT NORMAL CONTROL AND OPERATION OF THE VEHICLE IS NOT IMPAIRED BY THE INSTALLATION, PARTICULARLY THE
BRAKES AND STEERING. ENSURE THAT AIRBAG OPERATION IS
NOT OBSTRUCTED.
ELECTRONIC AND OTHER SOPHISTICATED SYSTEMS (e.g. SPEED
CONTROL, ABS ANTI–LOCK BRAKE, FUEL INJECTION–, NAVIGATION–, AND AIR–BAG SYSTEMS) ARE RELATIVELY IMMUNE TO MALFUNCTION CAUSED BY NEARBY RADIO TRANSMISSIONS. HOWEVER, SHOULD YOU EXPERIENCE FALSE OPERATION OF THESE
SYSTEMS OR ARE IN ANY DOUBT WHATSOEVER AS TO THEIR FUNCTIONALITY, PLEASE CONSULT THE VEHICLE’S DEALER.
THE CAR KIT IS SUITABLE FOR USE ONLY IN VEHICLES WITH A
11..32 V NEGATIVE GROUNDING. USE ON OTHER SUPPLY VOLTAGES
OR ALTERNATIVE POLARITY WILL DAMAGE THE EQUIPMENT.
THE PHONE SHOULD NOT BE LEFT SWITCHED ON FOR EXTENDED
PERIODS WITHOUT RUNNING THE VEHICLE’S ENGINE. FAILURE TO
COMPLY COULD DRAIN THE VEHICLE’S BATTERY.
Original 11/97
PAMS
CARK–64
Technical Documentation
Unpacking
Carefully unpack the equipment and ensure that the following items are
present.
Phone Holder
Swivel Mount
Mobile Charger
Original 11/97
MBC–1
HHS–9
LCH–9
Page 3
PAMS
CARK–64
Technical Documentation
Component Parts
Phone Holder MBC–1
The holder allows the phone to be firmly located in a convenient position.
The holder is attached to the vehicle’s interior using the swivel mount
HHS–9, or the mounting plate MKU–1. The mounting must be secured
with a screw (included with HHS–9). The screw recess can then be covered with the NOKIA logo plate.
Mounting Plate MKU–1 and Swivel Mount HHS–9
MKU–1 is a fixed position mounting plate; HHS–9 is a swivel mount which
allows for adjustable fixing. The two mounting plates are interchangeable.
Mobile Charger LCH–9
The mobile charger enables the phone to be charged via the vehicle’s
cigarette lighter socket. The charger connects to the phone via a d.c. jack
socket located on the base of phone. The supply voltage may vary between 11 and 32 V.
Installation and Testing
There are some important aspects that require special attention when
positioning the phone holder.
The positioning of the phone holder is the most important factor when trying to achieve the most comfortable position for the user. The location of
the holder should be selected so that the visibility of the phone’s display is
good under all lighting conditions, but not so that the driver’s attention is
easily distracted. The phone holder can be installed so that only one of
the release buttons is visible, as only one of the buttons needs to be
pressed to release the phone. The holder should be located so that the
driver can easily reach the keypad. Under no circumstances should the
holder prevent the driver from controlling or operating the vehicle in any
way or observing traffic.
Once installed, the equipment should be tested to ensure that it is operating satisfactorily and that the position of the unit does not impair the driver’s ability to control and operate the vehicle in any way.
Use the phone to make a call when the vehicle is parked with the engine
running. During the call, switch off the engine. Ensure that the phone is
operational both with the engine running, and with the engine switched
off.
For operating information refer to the User’s Guide supplied with the
phone.
Page 4
Original 11/97
PAMS
CARK–64
Technical Documentation
[This page intentionally left blank]
Original 11/97
Page 5
PAMS Technical Documentation
NSE–3 Series Transceivers
Chapter 3
System Module
Original 11/97
NSE–3
System Module
PAMS
Technical Documentation
CONTENTS
Transceiver NSE–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External and Internal Connectors . . . . . . . . . . . . . . . . . . . . .
System Connector Contacts . . . . . . . . . . . . . . . . . . . . . . .
RF Connector Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltages and Power Consumtion . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Baseband Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bottom Connector External Contacts . . . . . . . . . . . . . . .
Bottom Connector Signals . . . . . . . . . . . . . . . . . . . . . . . .
Battery Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SIM Card Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Microphone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Infrared Module Connections . . . . . . . . . . . . . . . . . . . . . .
RTC Backup Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buzzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Startup Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Overvoltage Protection . . . . . . . . . . . . . . . . . . . .
Battery Removal During Charging . . . . . . . . . . . . . . . . . .
Different PWM Frequencies ( 1Hz and 32 Hz) . . . . . . .
Battery Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . .
Switched Mode Supply VSIM . . . . . . . . . . . . . . . . . . . . . .
Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power up with a charger . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Up With The Power Switch (PWRONX) . . . . . . .
Power Up by RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Up by IBI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acting Dead . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page 3 – 2
3–5
3–5
3–5
3–6
3–7
3–7
3–8
3–9
3–9
3–9
3 – 10
3 – 10
3 – 10
3 – 12
3 – 12
3 – 14
3 – 15
3 – 15
3 – 15
3 – 16
3 – 16
3 – 17
3 – 17
3 – 18
3 – 18
3 – 19
3 – 20
3 – 21
3 – 22
3 – 23
3 – 23
3 – 25
3 – 25
3 – 26
3 – 26
3 – 27
3 – 27
3 – 27
3 – 27
3 – 27
3 – 27
3 – 28
3 – 28
Original 11/97
PAMS
Technical Documentation
Audio control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Audio Connections . . . . . . . . . . . . . . . . . . . . . . .
Analog Audio Accessory Detection . . . . . . . . . . . . . . . . .
Headset Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Audio Connections . . . . . . . . . . . . . . . . . . . . . . . .
4–wire PCM Serial Interface . . . . . . . . . . . . . . . . . . . . . . .
Alert Signal Generation . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MAD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SRAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EEPROM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MCU Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COBBA–GJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Infrared Transceiver Module . . . . . . . . . . . . . . . . . . . . . . .
Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RTC backup battery charging . . . . . . . . . . . . . . . . . . . . . .
Vibra Alerting Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IBI Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phone Power–on by IBI . . . . . . . . . . . . . . . . . . . . . . . . . . .
IBI power–on by phone . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AGC strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AFC function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RX interstage filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1st mixer in CRFU_1a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1st IF–filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Original 11/97
NSE–3
System Module
3 – 29
3 – 30
3 – 31
3 – 31
3 – 32
3 – 32
3 – 33
3 – 33
3 – 33
3 – 43
3 – 43
3 – 43
3 – 43
3 – 44
3 – 44
3 – 44
3 – 45
3 – 45
3 – 46
3 – 46
3 – 47
3 – 47
3 – 47
3 – 48
3 – 48
3 – 48
3 – 49
3 – 50
3 – 50
3 – 50
3 – 50
3 – 50
3 – 52
3 – 53
3 – 55
3 – 56
3 – 56
3 – 56
3 – 56
3 – 56
Page 3 – 3
NSE–3
System Module
PAMS
Technical Documentation
Transmitter Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TX interstage filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power amplifier MMIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Synthesizer blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VHF VCO and low pass filter . . . . . . . . . . . . . . . . . . . . . . . .
UHF PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UHF PLL block in PLUSSA . . . . . . . . . . . . . . . . . . . . . . . . . .
UHF VCO module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UHF local signal input in CRFU_1a . . . . . . . . . . . . . . . . . . .
Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF connector and antenna switch . . . . . . . . . . . . . . . . . . . .
Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Synthesizer control timing . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter power switching timing diagram . . . . . . . . . . .
Synthesizer clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram of Baseband Blocks . . . . . . . . . . . . . . . . . . .
Parts list of UP8T (EDMS Issue 11.10)
3 – 57
3 – 57
3 – 57
3 – 57
3 – 57
3 – 57
3 – 57
3 – 58
3 – 58
3 – 58
3 – 58
3 – 61
3 – 61
3 – 63
3 – 63
3 – 64
3 – 65
Schematic Diagrams:
Block Diagram of System/RF Blocks . . . . . . . . . . . . . . . . . . . . . .
3/A3–1
Circuit Diagram of Baseband (Version 12 Edit 8) . . . . . . . . . .
3/A3–2
Circuit Diagram of Power Supply (Version 14 Edit 41)
......
3/A3–3
Circuit Diagram of SIM Connectors (Version 14 Edit 9) . . . . . .
3/A3–4
Circuit Diagram of CPU Block (Version 14 Edit 23) . . . . . . . . .
3/A3–5
Circuit Diagram of Audio (Version 14 Edit 27) . . . . . . . . . . . . .
3/A3–6
Circuit Diagram of IR Module (Version 14 Edit 21) . . . . . . . . . .
3/A3–7
Circuit Diagram of RF Block (Version 14 Edit 26) . . . . . . . . . . .
3/A3–8
Layout Diagram of UPT8T (Version 14) . . . . . . . . . . . . . . . . . . .
3/A3–9
Page 3 – 4
Original 11/97
PAMS
NSE–3
Technical Documentation
System Module
Transceiver NSE–3
Introduction
The NSE–3 is a radio transceiver unit designed for the GSM network. It is a
GSM phase 2 power class 4 transceiver providing 15 power levels with a
maximum output power of 2 W. The transceiver is a true 3 V transceiver.
The transceiver consists of System/RF module (UP8T), User interface
module (UE4) and assembly parts.
The transceiver has full graphic display and two soft key based user interface.
The antenna is a fixed helix. External antenna connection is provided by
rear RF connector
Functional Description
There are five different operation modes:
– power off mode
– idle mode
– active mode
– charge mode
– local mode
In the power off mode only the circuits needed for power up are supplied.
In the idle mode circuits are powered down and only sleep clock is running.
In the active mode all the circuits are supplied with power although some
parts might be in the idle state part of the time.
The charge mode is effective in parallel with all previous modes. The
charge mode itself consists of two different states, i.e. the charge and the
maintenance mode.
The local mode is used for alignment and testing.
Original 11/97
Page 3 – 5
NSE–3
PAMS
System Module
Technical Documentation
Interconnection Diagram
Keypad
10
9
User Interface
Module
UE4
Display
2
Earpiece
28
SIM
Antenna
6
4
System/RF
Module
UP8
1
2
6
Mic
3+3
2
2
System
Connector
Charger
RF
Connector
Page 3 – 6
Battery
IR Link
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
System Module
External and Internal Connectors
Rubber boot
Microphone
Solderable element,
2 pcs
Contact 1
DC–jack
Contact 2
Microphone port
Original 11/97
Contacts
3...8
Contact 9
Cable/Cradle connector,
guiding/fixing hole, 3 pcs
Page 3 – 7
NSE–3
PAMS
System Module
Technical Documentation
System Connector Contacts
Contact
Line
Symbol
Parameter
Minimum
1
VIN
Charger input volt- 7.1
age
720
Charger input cur- 7.24
rent
320
DC–
JACK
L_GND Charger ground
input
DC–
JACK
VIN
Charger input volt- 7.1
age
720
Charger input cur- 7.24
rent
320
DC–
JACK
CHRG
CTRL
Output high voltage
PWM frequency
output low voltage
2
0
Typical
/ Nominal
Maximum
Unit / Notes
8.4
800
7.6
370
9.3
850
16.0
420
V/ Unloaded ACP–9 Charger
mA/ Supply current
V/ Unloaded ACP–7 Charger
mA/ Supply current
0
0
V/ Supply ground
8.4
800
7.6
370
9.3
850
16.0
420
V/ Unloaded ACP–9 Charger
mA/ Supply current
V/ Unloaded ACP–7 Charger
mA/ Supply current
2.8
V/ Charger control (PWM)
high
Hz /PWM frequency for
charger
V
2.0
32
Mic
ports
0.5
Output high voltage
PWM frequency
2.0
2.8
V/ Charger control (PWM)
high
Hz /PWM frequency for
charger
Acoustic signal
CHRG
CTRL
0
N/A
N/A
N/A
Microphone sound ports
60
1 Vpp
mVrms
0
mVrms
1 Vpp
mVrms
32
3
XMIC
Input signal voltage
4
SGND
Signal ground
5
XEAR
Output signal voltage
6
MBUS
I/O low voltage
I/O high voltage
0
2.0
0.8
2.8
Serial bidirectional control
bus.
Baud rate 9600 Bit/s
7
FBUS_
RX
Input low voltage
Input high voltage
0
2.0
0.8
2.8
V/ Fbus receive.
V/ Serial Data, Baud rate
9.6k–230.4kBit/s
8
FBUS_
TX
Output low voltage 0
Output high volt2.0
age
0.8
2.8
V/ Fbus transmit.
V/ Serial Data, Baud rate
9.6k–230.4kBit/s
9
L_GND Charger ground
input
0
V/ Supply ground
Page 3 – 8
0
80
0
0
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
RF Connector Contacts
Contact
1
2
Line
Symbol
Parameter
Minimum
Typical
/ Nominal
EXT_ANT
Im edance
Impedance
GND
50ohm
Maximum
Unit / Notes
External antenna connector,
tor
0 V DC
Supply Voltages and Power Consumtion
Connector
Line Symbol
Minimum
Typical /
Nominal
Maximum/
Peak
Unit / Notes
Charging
VIN
7.1
8.4
9.3
V/ Travel charger,
ACP–9
Charging
VIN
7.25
7.6
16.0
V/ Travel charger.
ACP–7
Charging
I / VIN
720
800
850
mA/ Travel charger, ACP–9
Charging
I / VIN
320
370
420
mA/ Travel charger, ACP–7
Functional Description
The transceiver electronics consist of the Radio Module ie. RF + System
blocks, the UI PCB, the display module and audio components. The keypad and the display module are connected to the Radio Module with a
connectors. System blocks and RF blocks are interconnected with PCB
wiring. The Transceiver is connected to accessories via a bottom system
connector with charging and accessory control.
The System blocks provide the MCU, DSP and Logic control functions in
MAD ASIC, external memories, audio processing and RF control hardware in COBBA ASIC. Power supply circuitry CCONT ASIC delivers operating voltages both for the System and the RF blocks.
The RF block is designed for a handportable phone which operates in the
GSM system. The purpose of the RF block is to receive and demodulate
the radio frequency signal from the base station and to transmit a modulated RF signal to the base station. The PLUSSA ASIC is used for VHF
and PLL functions. The CRFU ASIC is used at the front end.
Original 11/97
Page 3 – 9
NSE–3
PAMS
System Module
Technical Documentation
Baseband Module
Block Diagram
TX/RX SIGNALS
RF SUPPLIES
PA SUPPLY
13MHz
SYSTEM CLOCK
CLK
COBBA SUPPLY
CCONT
COBBA
SIM
BB SUPPLY
32kHz
CLK
SLEEP CLOCK
UI
MAD
+
VBAT
MEMORIES
IR
BATTERY
CHAPS
AUDIOLINES
BASEBAND
SYSCON
Technical Summary
The baseband module consists of four asics, CHAPS, CCONT, COBBA–
GJ and MAD2, which take care of the baseband functions of NSE–3.
The baseband is running from a 2.8V power rail, which is supplied by a
power controlling asic. In the CCONT asic there are 6 individually controlled regulator outputs for RF–section and two outputs for the baseband. In addition there is one +5V power supply output (V5V) for flash
programming voltage and other purposes where a higher voltage is needed. The CCONT contains also a SIM interface, which supports both 3V
and 5V SIM–cards. A real time clock function is integrated into the
CCONT, which utilizes the same 32kHz clock supply as the sleep clock. A
backup power supply is provided for the RTC, which keeps the real time
clock running when the main battery is removed. The backup power supply is a rechargable polyacene battery. The backup time with this battery
is minimum of ten minutes.
Page 3 – 10
Original 11/97
PAMS
NSE–3
Technical Documentation
System Module
The interface between the baseband and the RF section is handled by a
specific asic. The COBBA asic provides A/D and D/A conversion of the
in–phase and quadrature receive and transmit signal paths and also A/D
and D/A conversions of received and transmitted audio signals to and
from the UI section. The COBBA supplies the analog TXC and AFC signals to rf section according to the MAD DSP digital control and converts
analog AGC into digital signal for the DSP. Data transmission between the
COBBA and the MAD is implemented using a parallel connection for high
speed signalling and a serial connection for PCM coded audio signals.
Digital speech processing is handled by the MAD asic. The COBBA asic
is a dual voltage circuit, the digital parts are running from the baseband
supply VBB and the analog parts are running from the analog supply
VCOBBA.
The baseband supports three external microphone inputs and two external earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an external microphone signal
source. The microphone signals from different sources are connected to
separate inputs at the COBBA asic.
The output for the internal earphone is a dual ended type output capable
of driving a dynamic type speaker. Input and output signal source selection and gain control is performed inside the COBBA asic according to
control messages from the MAD. Keypad tones, DTMF, and other audio
tones are generated and encoded by the MAD and transmitted to the
COBBA for decoding. A buzzer and an external vibra alert control signals
are generated by the MAD with separate PWM outputs.
EMC shieding is implemented using a metallized plastic B–cover with a
conductive rubber seal on the ribs. On the other side the engine is
shielded with a frame having a conductive rubber on the inner walls,
which makes a contact to a ground ring of the engine board and a
ground plane of the UI–board. Heat generated by the circuitry will be conducted out via the PCB ground planes.
Original 11/97
Page 3 – 11
NSE–3
PAMS
System Module
Technical Documentation
Bottom Connector External Contacts
Contact
Line Symbol
Function
1
VIN
Charger input voltage
DC–jack
side contact
(DC–plug ring)
L_GND
Charger ground
DC–jack
center pin
VIN
Charger input voltage
DC–jack
side contact
(DC–plug jacket)
CHRG_CTRL
Charger control output (from phone)
2
CHRG_CTRL
Charger control output (from phone)
Microphone
acoustic ports
Acoustic signal (to phone)
3
XMIC
Accessory microphone signal input (to phone)
4
SGND
Accessory signal ground
5
XEAR
Accessory earphone signal output (from phone)
6
MBUS
MBUS, bidirectional serial data i/o
7
FBUS_RX
FBUS, unidirectional serial data input (to phone)
8
FBUS_TX
FBUS, unidirectional serial data output (from phone)
9
L_GND
Charger ground
Bottom Connector Signals
Pin
Name
Min
Typ
Max
Unit
1,3
VIN
7.25
7.6
7.95
V
16.9
V
Unloaded ACP–7 Charger (5kohms
load)
Peak output voltage (5kohms load)
3.25
3.6
3.95
V
320
370
420
mA
Notes
Loaded output voltage (10ohms load)
Supply current
7.1
8.4
9.3
V
Unloaded ACP–9 Charger
3.25
3.6
3.95
V
Loaded output voltage (10ohms load)
720
800
850
mA
Supply current
2
L_GND
0
0
V
Supply ground
4,5
CHRG_
CTRL
0
0.5
V
Charger control PWM low
2.0
2.85
V
Charger control PWM high
Hz
PWM frequency for a fast charger
%
PWM duty cycle
32
1
99
6
MICP
N/A
see section Internal microphone
7
MICN
N/A
see section Internal microphone
Page 3 – 12
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Pin
Name
Min
8
XMIC
Typ
Max
Unit
2.0
2.2
kΩ
Input AC impedance
1
Vpp
Maximum signal level
1.47
1.55
V
Mute (output DC level)
2.5
2.85
V
Unmute (output DC level)
100
600
µA
Bias current
490
mV
Maximum signal level
29.3
mV
Microphone signal
58
HMIC
0
3.2
Notes
Connected to COBBA MIC3P input
µF
Series output capacitance
Ω
Resistance to phone ground
Ω
Output AC impedance (ref. GND)
10
µF
Series output capacitance
Ω
Load AC impedance to SGND (Headset)
10
kΩ
Load AC impedance to SGND (Accessory)
1.0
XEAR
Output AC impedance (ref. GND)
47
SGND
Ω
380
10
47
10
9
Vpp
Maximum output level (no load)
mV
Output signal level
kΩ
Load DC resistance to SGND (Accessory)
Ω
Load DC resistance to SGND (Headset)
V
DC voltage (47k pull–up to VBB)
16
4.7
300
22
626
10
16
1500
2.8
HEAR
28
626
mV
Earphone signal (HF– HFCM)
Connected to COBBA HF output
11
MBUS
0
2.0
logic low
logic high
l i hi h
0.8
2.85
V
Serial bidirectional control bus.
Baud rate 9600 Bit/s
Phone has a 4k7 pullup resistor
12
FBUS_RX
0
2.0
logic low
logic high
l i hi h
0.8
2.85
V
Fbus receive. Serial Data
Baud rate 9 6k 230 4kBit/s
9.6k–230.4kBit/s
Phone has a 220k pulldown resistor
13
FBUS_TX
0
2.0
logic low
logic high
l i hi h
0.5
2.85
V
Fbus transmit. Serial Data
Baud rate 9 6k 230 4kBit/s
9.6k–230.4kBit/s
Phone has a 47k pullup resistor
14
GND
0
0.3
V
Supply ground
Original 11/97
Page 3 – 13
NSE–3
PAMS
System Module
Technical Documentation
Battery Connector
Pin
Name
Min
Typ
Max
Unit
Notes
1
BVOLT
3.0
3.6
4.5
V
Battery voltage
50
5.0
5.3
2
BSI
0
Maximum voltage in call state with charger
Maximum voltage in idle state with charger
2.85
V
Battery size indication
Phone has 100kohm pull up resistor.
SIM Card removal detection
(Treshold is 2.4V@VBB=2.8V)
2.2
18
kohm
Battery indication resistor (Ni battery)
24
kohm
Battery indication resistor (service battery)
27
51
kohm
Battery indication resistor (4.1V Lithium
battery)
68
91
kohm
Battery indication resistor (4.2V Lithium battery)
0
1.4
V
Battery temperature indication
Phone has a 100k (+–5%) pullup resistor,
Battery package has a NTC pulldown resistor:
47k+–5%@+25C , B=4050+–3%
2.1
3
V
Phone power up by battery (input)
20
ms
Power up pulse width
2.85
V
Battery power up by phone (output)
200
ms
Power up pulse width
1
kohm
Local mode initialization (in production)
25
kHz
PWM control to VIBRA BATTERY
0
V
Battery ground
20
3
BTEMP
5
22
10
1.9
90
100
0
20
4
BGND
Page 3 – 14
0
22
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NSE–3
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Technical Documentation
SIM Card Connector
Pin
Name
Parameter
Min
4
GND
GND
0
3, 5
VSIM
5V SIM Card
4.8
3V SIM Card
5V Vin/Vout
Unit
Notes
0
V
Ground
5.0
5.2
V
Supply voltage
2.8
3.0
3.2
4.0
”1”
VSIM
V
SIM data
”0”
0.5
2.8
”1”
VSIM
0
”0”
0.5
5V SIM Card
4.0
”1”
VSIM
3V SIM Card
DATA
Max
0
6
2.8
”1”
VSIM
3V Vin/Vout
2
1
SIMRST
SIMCLK
Typ
Frequency
Trise/Tfall max 1us
V
MHz
3.25
SIM reset
SIM clock
25
Trise/Tfall
ns
Internal Microphone
Pin
Name
6
7
Min
Typ
Max
Unit
Notes
MICP
0.55
4.1
mV
Connected to COBBA MIC2N input. The
maximum value corresponds to1 kHz, 0
dBmO network level with input amplifier
gain set to 32 dB. typical value is maximum value – 16 dB.
MICN
0.55
4.1
mV
Connected to COBBA MIC2P input. The
maximum value corresponds to1 kHz, 0
dBmO network level with input amplifier
gain set to 32 dB. typical value is maximum value – 16 dB.
Infrared Module Connections
An infrared transceiver module is designed to substitute an electrical
cable between the phone and a PC. The infrared transceiver module is a
stand alone component capable to perform infrared transmitting and receiving functions by transforming signals transmitted in infrared light from
and to electrical data pulses running in two wire asyncronous databus. In
DCT3 the module is placed inside the phone at the top of the phone.
Signal
Parameter
Min
Typ
Max
Unit
IRON
IR–module on/off
2.0
2.85
V
FBUS_RX
IR receive pulse
0
0.8
V
IR receive no pulse
2.0
2.85
V
IR transmit pulse
2.0
2.85
V
IR transmit no pulse
0
0.5
Notes
V
FBUS_TX
Original 11/97
Iout@2mA
Iout@2mA
Page 3 – 15
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PAMS
System Module
Technical Documentation
RTC Backup Battery
The RTC block in CCONT needs a power backup to keep the clock running when the phone battery is disconnected. The backup power is supplied from a rechargable polyacene battery that can keep the clock running minimum of 10 minutes. The backup battery is charged from the
main battery through CHAPS.
Signal
Parameter
Min
Typ
Max
Unit
Notes
VBACK
Backup battery charging from CHAPS
3.02
3.15
3.28
V
Backup battery charging from CHAPS
VBACK
100
200
500
uA
Vout@VBAT–0.2V
Backup battery supply
to CCONT
2
3.28
V
Battery capacity
65uAh
Backup battery supply
to CCONT
80
uA
Buzzer
Signal
Maximum
output current
Input
high level
Input
low level
Level (PWM)
range, %
Frequency
range, Hz
BuzzPWM /
BUZZER
2mA
2.5V
0.2V
0...50 (128 linear steps)
440...4700
Page 3 – 16
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Technical Documentation
Functional Description
Power Distribution
In normal operation the baseband is powered from the phone‘s battery.
The battery consists of one Lithium–Ion cell. There is also a possibility to
use batteries consisting of three Nickel Metal Hydride cells. An external
charger can be used for recharging the battery and supplying power to
the phone. The charger can be either a standard charger that can deliver
around 400 mA or so called performance charger, which can deliver supply current up to 850 mA.
The baseband contains components that control power distribution to
whole phone excluding those parts that use continuous battery supply.
The battery feeds power directly to three parts of the system: CCONT,
power amplifier, and UI (buzzer and display and keyboard lights). Figure 4
shows a block diagram of the power distribution.
The power management circuit CHAPS provides protection agains overvoltages, charger failures and pirate chargers etc. that would otherwise
cause damage to the phone.
RF SUPPLIES
PA SUPPLY
VCOBBA
COBBA
VBB
VSIM
CCONT
PWRONX PWM
SIM
CNTVR
UI
VBAT
RTC
BACKUP
VBB
PURX
VBB
VBAT
MAD
+
MEMORIES
BASEBAND
LIM
CHAPS
BATTERY
VIN
BOTTOM CONNECTOR
Original 11/97
Page 3 – 17
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System Module
Technical Documentation
Battery charging
The electrical specifications give the idle voltages produced by the acceptable chargers at the DC connector input. The absolute maximum input voltage is 30V due to the transient suppressor that is protecting the
charger input. At phone end there is no difference between a plug–in
charger or a desktop charger. The DC–jack pins and bottom connector
charging pads are connected together inside the phone.
MAD
LIM
VOUT
0R22
RSENSE
2A
1u
30V
100k
ICHAR
VIN
VCH
GND
PWM
VBAT
CHARGER
TRANSCEIVER
CHAPS
22k
CHRG_CTRL
PWM_OUT
MAD
CCONTINT
NOT IN
ACP–7
VCHAR
CCONT
GND
1n
10k
L_GND
Startup Charging
When a charger is connected, the CHAPS is supplying a startup current
minimum of 130mA to the phone. The startup current provides initial
charging to a phone with an empty battery. Startup circuit charges the
battery until the battery voltage level is reaches 3.0V (+/– 0.1V) and the
CCONT releases the PURX reset signal and program execution starts.
Charging mode is changed from startup charging to PWM charging that is
controlled by the MCU software. If the battery voltage reaches 3.55V
(3.75V maximum) before the program has taken control over the charging, the startup current is switched off. The startup current is switched on
again when the battery voltage is sunken 100mV (nominal).
Parameter
Symbol
Min
Typ
Max
Unit
VOUT Start– up mode cutoff limit
Vstart
3.45
3.55
3.75
V
VOUT Start– up mode hysteresis
NOTE: Cout = 4.7 uF
Vstarthys
80
100
200
mV
Start–up regulator output current
VOUT = 0V ... Vstart
Istart
130
165
200
mA
Page 3 – 18
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NSE–3
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Technical Documentation
Battery Overvoltage Protection
Output overvoltage protection is used to protect phone from damage.
This function is also used to define the protection cutoff voltage for different battery types (Li or Ni). The power switch is immediately turned OFF if
the voltage in VOUT rises above the selected limit VLIM1 or VLIM2.
Parameter
Symbol
LIM input
Min
Typ
Max
Unit
Output voltage cutoff limit
(during transmission or Li–
battery)
VLIM1
LOW
4.4
4.6
4.8
V
Output voltage cutoff limit
(no transmission or Ni–battery)
VLIM2
HIGH
4.8
5.0
5.2
V
The voltage limit (VLIM1 or VLIM2) is selected by logic LOW or logic
HIGH on the CHAPS (N101) LIM– input pin. Default value is lower limit
VLIM1.
When the switch in output overvoltage situation has once turned OFF, it
stays OFF until the the battery voltage falls below VLIM1 (or VLIM2) and
PWM = LOW is detected. The switch can be turned on again by setting
PWM = HIGH.
VCH
VCH & lt; VOUT
t
VOUT
VLIM1 or VLIM2
t
SWITCH
ON
OFF
ON
PWM (32Hz)
Original 11/97
Page 3 – 19
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PAMS
System Module
Technical Documentation
Battery Removal During Charging
Output overvoltage protection is also needed in case the main battery is
removed when charger connected or charger is connected before the battery is connected to the phone.
With a charger connected, if VOUT exceeds VLIM1 (or VLIM2), CHAPS
turns switch OFF until the charger input has sunken below Vpor (nominal
3.0V, maximum 3.4V). MCU software will stop the charging (turn off
PWM) when it detects that battery has been removed. The CHAPS remains in protection state as long as PWM stays HIGH after the output
overvoltage situation has occured.
VCH
Vpor
(Standard
Charger)
Droop depends on load
& C in phone
VLIM
Istart off due to VCH & lt; Vpor
VOUT
Vstarthys
4V
Vstart
t
PWM
”1”
”0”
t
SWITCH
ON
OFF
1
2
3
4 5
6 7
t
1. Battery removed, (standard) charger connected, VOUT rises (follows charger voltage)
2. VOUT exceeds limit VLIM(X), switch is turned immediately OFF
3. VOUT falls (because no battery) , also VCH & lt; Vpor (standard chargers full–rectified
output). When VCH & gt; Vpor and VOUT & lt; VLIM(X) – & gt; switch turned on again (also PWM
is still HIGH) and VOUT again exceeds VLIM(X).
4. Software sets PWM = LOW – & gt; CHAPS does not enter PWM mode
5. PWM low – & gt; Startup mode, startup current flows until Vstart limit reached
6. VOUT exceeds limit Vstart, Istart is turned off
7. VCH falls below Vpor
Page 3 – 20
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Technical Documentation
Different PWM Frequencies ( 1Hz and 32 Hz)
When a travel charger (2– wire charger) is used, the power switch is
turned ON and OFF by the PWM input when the PWM rate is 1Hz. When
PWM is HIGH, the switch is ON and the output current Iout = charger current – CHAPS supply current. When PWM is LOW, the switch is OFF and
the output current Iout = 0. To prevent the switching transients inducing
noise in audio circuitry of the phone soft switching is used.
The performance travel charger (3– wire charger) is controlled with PWM
at a frequency of 32Hz. When the PWM rate is 32Hz CHAPS keeps the
power switch continuously in the ON state.
SWITCH
ON
OFF
ON
OFF
ON
PWM (1Hz)
SWITCH
ON
PWM (32Hz)
Original 11/97
Page 3 – 21
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System Module
Technical Documentation
Battery Identification
Different battery types are identified by a pulldown resistor inside the battery pack. The BSI line inside transceiver has a 100k pullup to VBB. The
MCU can identify the battery by reading the BSI line DC–voltage level
with a CCONT (N100) A/D–converter.
BVOLT
BATTERY
BTEMP
2.8V
TRANSCEIVER
100k
BSI
Rs
10k
CCONT
BSI
10n
BGND
SIMCardDetX
MAD
The battery identification line is used also for battery removal detection.
The BSI line is connected to a SIMCardDetX line of MAD2 (D200). SIMCardDetX is a threshold detector with a nominal input switching level
0.85xVcc for a rising edge and 0.55xVcc for a falling edge. The battery
removal detection is used as a trigger to power down the SIM card before
the power is lost. The BSI contact in the battery pack is made 0.7mm
shorter than the supply voltage contacts so that there is a delay between
battery removal detection and supply power off,
Vcc
0.850.05 Vcc
0.550.05 Vcc
SIMCARDDETX
GND
Page 3 – 22
SIGOUT
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Battery Temperature
The battery temperature is measured with a NTC inside the battery pack.
The BTEMP line inside transceiver has a 100k pullup to VREF. The MCU
can calculate the battery temperature by reading the BTEMP line DC–
voltage level with a CCONT (N100) A/D–converter.
BVOLT
BATTERY
TRANSCEIVER
VREF
BSI
100k
10k
BTEMP
RT
NTC
1k
BGND
CCONT
BTEMP
1k
10n
VibraPWM
MAD
MCUGenIO4
Supply Voltage Regulators
The heart of the power distrubution is the CCONT. It includes all the voltage regulators and feeds the power to the whole system. The baseband
digital parts are powered from the VBB regulator which provides 2.8V
baseband supply. The baseband regulator is active always when the
phone is powered on. The VBB baseband regulator feeds MAD and memories, COBBA digital parts and the LCD driver in the UI section. There is
a separate regulator for a SIM card. The regulator is selectable between
3V and 5V and controlled by the SIMPwr line from MAD to CCONT. The
COBBA analog parts are powered from a dedicated 2.8V supply VCOBBA. The CCONT supplies also 5V for RF and for flash VPP. The CCONT
contains a real time clock function, which is powered from a RTC backup
when the main battery is disconnected.
Original 11/97
Page 3 – 23
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System Module
Technical Documentation
The RTC backup is rechargable polyacene battery, which has a capacity
of 50uAh (@3V/2V) The battery is charged from the main battery voltage
by the CHAPS when the main battery voltage is over 3.2V. The charging
current is 200uA (nominal).
Operating mode
Vref
RF REG
Power off
Off
Off
VCOBBA
Off
VBB
VSIM
SIMIF
Power on
On
On/Off
On
On
On
On/Off
Reset
On
Off
VR1 On
On
On
Off
Pull
down
Sleep
On
Off
On
On
On
On/Off
Off
Off
Pull
down
NOTE:
CCONT includes also five additional 2.8V regulators providing power to
the RF section. These regulators can be controlled either by the direct
control signals from MAD or by the RF regulator control register in
CCONT which MAD can update. Below are the listed the MAD control
lines and the regulators they are controlling.
– TxPwr controls VTX regulator (VR5)
– RxPwr controls VRX regulator (VR2)
– SynthPwr controls VSYN_1 and VSYN_2 regulators (VR4 and VR3)
– VCXOPwr controls VXO regulator (VR1)
CCONT generates also a 1.5 V reference voltage VREF to COBBA,
PLUSSA and CRFU. The VREF voltage is also used as a reference to
some of the CCONT A/D converters.
In additon to the above mentioned signals MAD includes also TXP control
signal which goes to PLUSSA power control block and to the power amplifier. The transmitter power control TXC is led from COBBA to PLUSSA.
Page 3 – 24
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Technical Documentation
Switched Mode Supply VSIM
There is a switched mode supply for SIM–interface. SIM voltage is selected via serial IO. The 5V SMR can be switched on independently of the
SIM voltage selection, but can’t be switched off when VSIM voltage value
is set to 5V.
NOTE: VSIM and V5V can give together a total of 30mA.
In the next figure the principle of the SMR / VSIM–functions is shown.
CCONT
External
V5V_4
VBAT
V5V_3
V5V_2
VSIM
5V reg
V5V
5V
5/3V
Power Up
The baseband is powered up by:
6.
Pressing the power key, that generates a PWRONX interrupt
signal from the power key to the CCONT, which starts the power up procedure.
7.
Connecting a charger to the phone. The CCONT recognizes
the charger from the VCHAR voltage and starts the power up
procedure.
8.
A RTC interrupt. If the real time clock is set to alarm and the
phone is switched off, the RTC generates an interrupt signal,
when the alarm is gone off. The RTC interrupt signal is connected to the PWRONX line to give a power on signal to the
CCONT just like the power key.
9.
A battery interrupt. Intelligent battery packs have a possibility
to power up the phone. When the battery gives a short (10ms)
voltage pulse through the BTEMP pin, the CCONT wakes up
and starts the power on procedure.
Original 11/97
Page 3 – 25
NSE–3
PAMS
System Module
Technical Documentation
Power up with a charger
When the charger is connected CCONT will switch on the CCONT digital
voltage as soon as the battery voltage exeeds 3.0V. The reset for
CCONT’s digital parts is released when the operating voltage is stabilized
( 50 us from switching on the voltages). Operating voltage for VCXO is
also switched on. The counter in CCONT digital section will keep MAD in
reset for 62 ms (PURX) to make sure that the clock provided by VCXO is
stable. After this delay MAD reset is relased, and VCXO –control
(SLEEPX) is given to MAD. The diagram assumes empty battery, but the
situation would be the same with full battery:
When the phone is powered up with an empty battery pack using the
standard charger, the charger may not supply enough current for standard powerup procedure and the powerup must be delayed.
Power Up With The Power Switch (PWRONX)
When the power on switch is pressed the PWRONX signal will go low.
CCONT will switch on the CCONT digital section and VCXO as was the
case with the charger driven power up. If PWRONX is low when the 64
ms delay expires, PURX is released and SLEEPX control goes to MAD. If
PWRONX is not low when 64 ms expires, PURX will not be released, and
CCONT will go to power off ( digital section will send power off signal to
analog parts)
SLEEPX
PURX
CCPURX
PWRONX
VR1,VR6
VBB (2.8V)
Vchar
1 2
3
1:Power switch pressed == & gt; Digital voltages on in CCONT (VBB)
2: CCONT digital reset released. VCXO turned on
3: 62 ms delay to see if power switch is still pressed.
Page 3 – 26
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Technical Documentation
System Module
Power Up by RTC
RTC ( internal in CCONT) can power the phone up by changing RTCPwr to
logical ”1”. RTCPwr is an internal signal from the CCONT digital section.
Power Up by IBI
IBI can power CCONT up by sending a short pulse to logical ”1”. RTCPwr is
an internal signal from the CCONT digital section.
Acting Dead
If the phone is off when the charger is connected, the phone is powered
on but enters a state called ”acting dead”. To the user the phone acts as if
it was switched off. A battery charging alert is given and/or a battery
charging indication on the display is shown to acknowledge the user that
the battery is being charged.
Active Mode
In the active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information.
All the CCONT regulators are operating. There are several substates in
the active mode depending on if the phone is in burst reception, burst
transmission, if DSP is working etc..
Sleep Mode
In the sleep mode, all the regulators except the baseband VBB, VCOBBA,
and the SIM card VSIM regulators are off. Sleep mode is activated by the
MAD after MCU and DSP clocks have been switched off. The voltage regulators for the RF section are switched off and the VCXO power control,
VCXOPwr is set low. In this state only the 32 kHz sleep clock oscillator in
CCONT is running. The flash memory power down input is connected to
the ExtSysResetX signal, and the flash is deep powered down during the
sleep mode.
The sleep mode is exited either by the expiration of a sleep clock counter
in the MAD or by some external interrupt, generated by a charger connection, key press, headset connection etc. The MAD starts the wake up
sequence and sets the VCXOPwr and ExtSysResetX control high. After
VCXO settling time other regulators and clocks are enabled for active
mode.
If the battery pack is disconnect during the sleep mode, the CCONT pulls
the SIM interface lines low as there is no time to wake up the MCU.
Charging
Charging can be performed in any operating mode. The charging algorithm is dependent on the used battery technology. The battery type is in-
Original 11/97
Page 3 – 27
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System Module
Technical Documentation
dicated by a resistor inside the battery pack. The resistor value corresponds to a specific battery capacity. This capacity value is related to the
battery technology as different capacity values are achieved by using different battery technology.
The battery voltage, temperature, size and current are measured by the
CCONT controlled by the charging software running in the MAD.
The power management circuitry controls the charging current delivered
from the charger to the battery. Charging is controlled with a PWM input signal, generated by the CCONT. The PWM pulse width is controlled by the
MAD and sent to the CCONT through a serial data bus. The battery voltage
rise is limited by turning the CHAPS switch off when the battery voltage has
reached 4.2V (LiIon) or 5.2V (NiMH, 5V in call mode). Charging current is
monitored by measuring the voltage drop across a 220mohm resistor.
Power Off
The baseband is powered down by:
1.
Pressing the power key, that is monitored by the MAD, which
starts the power down procedure.
2.
If the battery voltage is dropped below the operation limit, either by not charging it or by removing the battery.
3.
Letting the CCONT watchdog expire, which switches off all
CCONT regulators and the phone is powered down.
4.
Setting the real time clock to power off the phone by a timer.
The RTC generates an interrupt signal, when the alarm is gone
off. The RTC interrupt signal is connected to the PWRONX line
to give a power off signal to the CCONT just like the power key.
The power down is controlled by the MAD. When the power key has been
pressed long enough or the battery voltage is dropped below the limit the
MCU initiates a power down procedure and disconnects the SIM power.
Then the MCU outputs a system reset signal and resets the DSP. If there is
no charger connected the MCU writes a short delay to CCONT watchdog
and resets itself. After the set delay the CCONT watchdog expires, which
activates the PURX and all regulators are switched off and the phone is
powered down by the CCONT.
If a charger is connected when the power key is pressed the phone enters into the acting dead mode.
Watchdog
The Watchdog block inside CCONT contains a watchdog counter and
some additional logic which are used for controlling the power on and
power off procedures of CCONT. Watchdog output is disabled when
WDDisX pin is tied low. The WD-counter runs during that time, though.
Watchdog counter is reset internally to 32s at power up. Normally it is reset by MAD writing a control word to the WDReg.
Page 3 – 28
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Technical Documentation
Audio control
The audio control and processing is taken care by the COBBA–GJ, which
contains the audio and RF codecs, and the MAD2, which contains the
MCU, ASIC and DSP blocks handling and processing the audio signals. A
detailed audio specification can be found from document
MAD
COBBA
Bias +
EMC
Preamp
Premult.
DSP
MIC2
MICP/N
Pre
& LP
System
Connector
MIC1
EMC + Acc.
Interf.
MCU
Multipl.
MIC3
A
D
XMIC
SGND
XEAR
Buzzer
Driver
Circuit
HFCM
Amp
Multipl.
AuxOut
EMC
HF
EAR
LP
A
D
Buzzer
The baseband supports three microphone inputs and two earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an external microphone signal source. The microphone
signals from different sources are connected to separate inputs at the
COBBA–GJ asic. Inputs for the microphone signals are differential type.
The MIC1 inputs are used for a headset microphone that can be connected directly to the system connector. The internal microphone is connected to MIC2 inputs and an external pre–amplified microphone (handset/handfree) signal is connected to the MIC3 inputs. In COBBA there are
also three audio signal outputs of which dual ended EAR lines are used
for internal earpiece and HF line for accessory audio output. The third audio output AUXOUT is used only for bias supply to the headset microphone. As a difference to DCT2 generation the SGND ( = HFCM at COBBA) does not supply audio signal (only common mode). Therefore there
are no electrical loopback echo from downlink to uplink.
The output for the internal earphone is a dual ended type output capable
of driving a dynamic type speaker. The output for the external accessory
and the headset is single ended with a dedicated signal ground SGND.
Input and output signal source selection and gain control is performed inside the COBBA–GJ asic according to control messages from the MAD2.
Keypad tones, DTMF, and other audio tones are generated and encoded
by the MAD2 and transmitted to the COBBA–GJ for decoding.
Original 11/97
Page 3 – 29
NSE–3
PAMS
System Module
Technical Documentation
External Audio Connections
The external audio connections are presented in figure 16. A headset can
be connected directly to the system connector. The headset microphone
bias is supplied from COBBA AUXOUT output and fed to microphone
through XMIC line. The 330ohm resistor from SGND line to AGND provides a return path for the bias current.
2.8 V
Baseband
47k
22k
HookDet
MAD
22k
HeadDet
1u
CCONT
EAD
1u
2.8 V
47k
2k2
47R
AUXOUT
1m
10m
47R
H
F
XEAR
10m
47R
SGN
D
HFC
M
330R
COBBA
33n
2k2
XMI
C
MIC1
N
MIC1
P
33n
33n
MIC3
N
MIC3
P
Page 3 – 30
2k2
33n
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Analog Audio Accessory Detection
In XEAR signal there is a 47 kW pullup in the transceiver and 6.8 kW
pull–down to SGND in accessory. The XEAR is pulled down when an
accessory is connected, and pulled up when disconnected. The XEAR is
connected to the HookDet line (in MAD), an interrupt is given due to both
connection and disconnection. There is filtering between XEAR and
HookDet to prevent audio signal giving unwanted interrupts.
External accessory notices powered–up phone by detecting voltage in
XMIC line. In Table 23 there is a truth table for detection signals.
Accessory connected
HookDet
HeadDet
Notes
No accessory connected
High
High
Pullups in the transceiver
Headset HDC–9 with a button switch
pressed
Low
Low
XEAR and XMIC loaded (dc)
Headset HDC–9 with a button switch released
High
Low *)
XEAR unloaded (dc)
Handsfree (HFU–1)
Low
High
XEAR loaded (dc)
Headset Detection
The external headset device is connected to the system connector, from
which the signals are routed to COBBA headset microphone inputs and
earphone outputs. In the XMIC line there is a (47 + 2.2) kW pullup in the
transceiver. The microphone is a low resistance pulldown compared to
the transceiver pullup.
When there is no call going, the AUXOUT is in high impedance state and
the XMIC is pulled up. When a headset is connected, the XMIC is pulled
down. The XMIC is connected to the HeadDet line (in MAD), an interrupt
is given due to both connection and disconnection. There is filtering between the XMIC and the HeadDet to prevent audio signal giving unwanted interrupts (when an accessory is connected).
In the XEAR line there is a 47 kW pullup in the transceiver. The earphone
is a low resistance pulldown compared to the transceiver pullup. When a
remote control switch is open, there is a capacitor in series with the earphone, so the XEAR (and HookDet) is pulled up by the phone. When the
switch is closed, the XEAR (and HookDet) is pulled down via the earphone. So both press and release of the button gives an interrupt.
During a call there is a bias voltage (1.5 V) in the AUXOUT, and the
HeadDet cannot be used. The headset interrupts should to be disabled
during a call and the EAD line (AD converter in CCONT) should be polled
to see if the headset is disconnected.
Original 11/97
Page 3 – 31
NSE–3
PAMS
System Module
Technical Documentation
Internal Audio Connections
The speech coding functions are performed by the DSP in the MAD2 and
the coded speech blocks are transferred to the COBBA–GJ for digital to
analog conversion, down link direction. In the up link direction the PCM
coded speech blocks are read from the COBBA–GJ by the DSP.
There are two separate interfaces between MAD2 and COBBA–GJ: a
parallel bus and a serial bus. The parallel bus has 12 data bits, 4 address
bits, read and write strobes and a data available strobe. The parallel interface is used to transfer all the COBBA–GJ control information (both the
RFI part and the audio part) and the transmit and receive samples. The
serial interface between MAD2 and COBBA–GJ includes transmit and receive data, clock and frame synchronisation signals. It is used to transfer
the PCM samples. The frame synchronisation frequency is 8 kHz which
indicates the rate of the PCM samples and the clock frequency is 1 MHz.
COBBA is generating both clocks.
4–wire PCM Serial Interface
The interface consists of following signals: a PCM codec master clock
(PCMDClk), a frame synchronization signal to DSP (PCMSClk), a codec
transmit data line (PCMTX) and a codec receive data line (PCMRX). The
COBBA–GJ generates the PCMDClk clock, which is supplied to DSP SIO.
The COBBA–GJ also generates the PCMSClk signal to DSP by dividing
the PCMDClk. The PCMDClk frequency is 1.000 MHz and is generated
by dividing the RFIClk 13 MHz by 13. The COBBA–GJ further divides the
PCMDClk by 125 to get a PCMSClk signal, 8.0 kHz.
PCMDClk
PCMSClk
PCMTxData
PCMRxData
Page 3 – 32
sign extended
15
14
13
sign extended
MSB
12
MSB
11
10
LSB
0
LSB
Original 11/97
PAMS
NSE–3
Technical Documentation
System Module
Alert Signal Generation
A buzzer is used for giving alerting tones and/or melodies as a signal of
an incoming call. Also keypress and user function response beeps are
generated with the buzzer. The buzzer is controlled with a BuzzerPWM
output signal from the MAD. A dynamic type of buzzer must be used
since the supply voltage available can not produce the required sound
pressure for a piezo type buzzer. The low impedance buzzer is connected
to an output transistor that gets drive current from the PWM output. The
alert volume can be adjusted either by changing the pulse width causing
the level to change or by changing the frequency to utilize the resonance
frequency range of the buzzer.
A vibra alerting device is used for giving silent signal to the user of an incoming call. The device is controlled with a VibraPWM output signal from
the MAD2. The vibra alert can be adjusted either by changing the pulse
width or by changing the pulse frequency. The vibra device is not inside
the phone, but in a special vibra battery.
Digital Control
The baseband functions are controlled by the MAD asic, which consists of
a MCU, a system ASIC and a DSP.
MAD2
MAD2 contains following building blocks:
– ARM RISC processor with both 16–bit instruction set (THUMB mode)
and 32–bit instruction set (ARM mode)
– TI Lead DSP core with peripherials:
– API (Arm Port Interface memory) for MCU–DSP communication, DSP code download, MCU interrupt handling vectors (in DSP RAM) and DSP booting
– Serial port (connection to PCM)
– Timer
– DSP memory
– BUSC (BusController for controlling accesses from ARM to API, System Logic and MCU external memories, both 8– and 16–bit memories)
– System Logic
– CTSI (Clock, Timing, Sleep and Interrupt control)
– MCUIF (Interface to ARM via BUSC). Contains MCU BootROM
– DSPIF (Interface to DSP)
– MFI (Interface to COBBA AD/DA Converters)
Original 11/97
Page 3 – 33
NSE–3
PAMS
System Module
Technical Documentation
– CODER (Block encoding/decoding and A51 & A52 ciphering)
– AccIF(Accessory Interface)
– SCU (Synthesizer Control Unit for controlling 2 separate
synthesizer)
– UIF (Keyboard interface, serial control interface for COBBA
PCM Codec, LCD Driver and CCONT)
– SIMI (SimCard interface with enhanched features)
– PUP (Parallel IO, USART and PWM control unit for vibra
and buzzer)
The MAD2 operates from a 13 MHz system clock, which is generated
from the 13Mhz VCXO frequency. The MAD2 supplies a 6,5MHz or a
13MHz internal clock for the MCU and system logic blocks and a 13MHz
clock for the DSP, where it is multiplied to 52 MHz DSP clock. The system
clock can be stopped for a system sleep mode by disabling the VCXO
supply power from the CCONT regulator output. The CCONT provides a
32kHz sleep clock for internal use and to the MAD2, which is used for the
sleep mode timing. The sleep clock is active when there is a battery voltage available i.e. always when the battery is connected.
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
1
MCUGenOut5
O
Audio
2
0
MCU General
purpose output
port
2
MCUGenOut4
O
N101
2
0
MCU General
purpose output
port
3
LEADGND
4
MCUGenOut3
5
VCC
6
MCUGenOut2
O
7
MCUGenOut1
O
8
MCUGenOut0
O
9
Col4
I/O
Page 3 – 34
Note
Explanation
Lead Ground
O
2
0
MCU General
purpose output
port
IO VCC in
3325c10
Power
2
UIF
MCU General
purpose output
port
2
0
MCU General
purpose output
port
2
MCU
memory
0
1
LoByteSelX
in 16–bit
mode
MCU General
purpose output
port
2
Input
programmable pullup
PR0201
I/O line for keyboard column 4
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
Note
Explanation
10
Col3
I/O
UIF
2
Input
programmable pullup
PR0201
I/O line for keyboard column 3
11
GND
12
Col2
I/O
UIF
2
Input
programmable pullup
PR0201
I/O line for keyboard column 2
13
Col1
I/O
UIF
2
Input
programmable pullup
PR0201
I/O line for keyboard column 1
14
Col0
I/O
UIF
2
Input
programmable pullup
PR0201
I/O line for keyboard column 0
15
LCDCSX
I/O
UIF
2
Input
external
pullup/down
serial LCD driver
chip select, parallel LCD driver
enable
16
LEADVCC
17
Row5LCDCD
18
VCC
19
Row4
I/O
UIF
2
20
Row3
I/O
UIF
21
Row2
I/O
22
Row1
23
Row0
Original 11/97
Ground
Lead Power
I/O
UIF
2
Input,
pullup
pullup
PR0201
Keyboard row5
data I/O , serial
LCD driver command/data indicator, parallel
LCD driver read/
write select
Core VCC in
3325c10
Power
Input,
pullup
pullup
PR0201
I/O line for keyboard row 4, parallel LCD driver
register selection
control
2
Input,
pullup
pullup
PR0201
I/O line for keyboard row 3, parallel LCD driver
data
UIF
2
Input,
pullup
pullup
PR0201
I/O line for keyboard row 2, parallel LCD driver
data
I/O
UIF
2
Input,
pullup
pullup
PR0201
I/O line for keyboard row 1, parallel LCD driver
data
I/O
UIF
2
Input,
pullup
pullup
PR0201
I/O line for keyboard row 0, parallel LCD driver
data
Page 3 – 35
NSE–3
PAMS
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
24
JTDO
O
25
GND
26
JTRst
I
Input,
pulldown
pulldown
PD0201
JTAG reset
27
JTClk
I
Input
pulldown
PD0201
JTAG Clock
28
JTDI
I
Input,
pullup
pullup
PR0201
JTAG data in
29
JTMS
I
Input,
pullup
pullup
PR0201
JTAG mode select
30
VCC
IO VCC in
3325c10
Power
31
CoEmu0
I/O
2
Input,
pullup
pullup
PR0201
DSP/MCU
emulation port 0
32
CoEmu1
I/O
2
Input,
pullup
pullup
PR0201
DSP/MCU
emulation port 1
33
MCUGenIO7
I/O
2
Input,
pulldown
pulldown
PD1001
General purpose
I/O port
34
MCUGenIO6
I/O
2
Input,
pulldown
pulldown
PD1001
Lights
35
LEADGND
36
MCUGenIO5
37
ARMGND
38
MCUAd0
39
ARMVCC
40
MCUAd1
O
MCU
MEMORY
2
0
MCU address
bus
41
MCUAd2
O
MCU
MEMORY
2
0
MCU address
bus
42
GND
43
MCUAd3
O
MCU
MEMORY
2
0
MCU address
bus
44
MCUAd4
O
MCU
MEMORY
2
0
MCU address
bus
45
MCUAd5
O
MCU
MEMORY
2
0
MCU address
bus
Page 3 – 36
Connected
to/from
Drive
req.
mA
Reset
State
2
Note
Tri–
state
Explanation
JTAG data out
Ground
UI
Lead Ground
I/O
UI
2
Input,
pulldown
pulldown
PD1001
LCD reset
ARM Ground
O
MCU
MEMORY
2
0
MCU address
bus
ARM Power
Ground
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
46
MCUAd6
O
MCU
MEMORY
2
0
47
VCC
48
MCUAd7
O
MCU
MEMORY
2
0
MCU address
bus
49
MCUAd8
O
MCU
MEMORY
2
0
MCU address
bus
50
MCUAd9
O
MCU
MEMORY
2
0
MCU address
bus
51
MCUAd10
O
MCU
MEMORY
2
0
MCU address
bus
52
GND
53
MCUAd11
O
MCU
MEMORY
2
0
MCU address
bus
54
MCUAd12
O
MCU
MEMORY
2
0
MCU address
bus
55
MCUAd13
O
MCU
MEMORY
2
0
MCU address
bus
56
MCUAd14
O
MCU
MEMORY
2
0
MCU address
bus
57
MCUAd15
O
MCU
MEMORY
2
0
MCU address
bus
58
MCUAd16
O
MCU
MEMORY
2
0
MCU address
bus
59
VCC
60
MCUAd17
O
MCU
MEMORY
2
0
MCU address
bus
61
MCUAd18
O
MCU
MEMORY
2
0
MCU address
bus
62
MCUAd19
O
MCU
MEMORY
2
0
MCU address
bus
63
MCUAd20
O
MCU
MEMORY
2
0
MCU address
bus
64
MCUAd21
O
MCU
MEMORY
2
0
MCU address
bus
65
ExtMCUDa0
I/O
MCU
MEMORY
2
Input
MCU data bus
66
GND
67
ExtMCUDa1
I/O
MCU
MEMORY
2
Output
MCU data bus
68
ExtMCUDa2
I/O
MCU
MEMORY
2
Output
MCU data bus
Original 11/97
Note
Explanation
MCU address
bus
IO VCC in
3325c10
Power
Ground
Core VCC in
3325c10
Power
Ground
Page 3 – 37
NSE–3
PAMS
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
Note
69
ExtMCUDa3
I/O
MCU
MEMORY
2
Output
MCU data bus
70
ExtMCUDa4
I/O
MCU
MEMORY
2
Output
MCU data bus
71
ExtMCUDa5
I/O
MCU
MEMORY
2
Output
MCU data bus
72
ExtMCUDa6
I/O
MCU
MEMORY
2
Output
MCU data bus
73
VCC
74
ExtMCUDa7
I/O
75
MCUGenIO8
76
IO VCC in
3325c10
Power
2
Output
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
MCUGenIO9
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
77
MCUGenIO10
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
78
MCUGenIO11
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
79
GND
80
MCUGenIO12
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
81
MCUGenIO13
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
82
MCUGenIO14
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
83
MCUGenIO15
I/O
2
Input
MCU Data in
16–bit mode
General purpose
I/O port
84
MCURdX
O
2
1
85
VCC
86
MCUWrX
O
MCU
MEMORY
2
1
MCU write
strobe
87
ROM1SelX
O
MCU ROM
2
1
ROM chip select
88
RAMSelX
O
MCU RAM
2
1
RAM chip select
89
ROM2SelX
O
MCU ROM2
2
1
Extra chip select,
can be used as
MCU general
output
90
MCUGenIO1
I/O
2
Input,
pullup
91
DSPXF
O
2
1
Page 3 – 38
MCU
MEMORY
Explanation
MCU data bus
Ground
MCU
MEMORY
MCU Read
strobe
Core VCC in
3325c10
pullup
PR0201
Power
General purpose
I/O port
External flag
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Pin
N:o
Pin Name
92
SCVCC
93
RFClk
94
RFClkGnd
95
SIMCardDetX
96
SCGND
97
BuzzPWM
98
LEADVCC
99
VibraPWM
100
GND
101
MCUGenIO3
I/O
EEPROM
2
Input,
pullup
pullup
PR1001
General purpose
I/O port
102
MCUGenIO2
I/O
EEPROM
2
Input,
pullup
pullup
PR1001
WP SCL
103
EEPROMSelX
O
MCU EEPROM
2
1
104
AccTxData
I/O
4
Tri–
State
105
VCC
106
GenDet
I
Input
General purpose
interrupt
107
HookDet
I
Input
Non–MBUS accessory connection detector
108
HeadDet
I
Input
Headset detection interrupt
109
AccRxData
I
Input
Accessory RX
data, Flash_RX
110
GND
111
MCUGenIO4
Original 11/97
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
Note
Explanation
Special cell Power
I
VCXO
Input
Input
System clock
reference ground
input
Input
I
System clock
from VCTCXO
SIM card detection
Special cell
Ground
O
BUZZER
2
0
Buzzer PWM
control
LEAD Power
O
VIBRA
2
0
Vibra PWM control
Ground
EEPROM chip
select, can be
used as MCU
general output
external
pullup
Accessory TX
data, Flash_TX
IO VCC in
3325c10
Power
Ground
I/O
2
Input,
pulldown
pulldown
PD1001
General purpose
I/O port
Page 3 – 39
NSE–3
PAMS
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
112
MBUS
I/O
113
VCXOPwr
O
114
SynthPwr
O
115
VCC
116
GenCCONTCSX
117
LEADGND
118
GenSDIO
I/O
CCONT, UIF
2
Input,
external
pullup/
down
119
GenSClk
O
CCONT, UIF
2
0
Serial clock
120
SIMCardData
I/O
CCONT
2
0
SIM data
121
GND
122
PURX
I
CCONT
Input
Power Up Reset
123
CCONTInt
I
CCONT
Input
CCONT interrupt
124
Clk32k
I
CCONT
Input
Sleep clock oscillator input
125
VCC
126
SIMCardClk
O
CCONT
2
0
SIM clock
127
SIMCardRstX
O
CCONT
2
0
SIM reset
128
SIMCardIOC
O
CCONT
2
0
SIM data in/out
control
129
SIMCardPwr
O
CCONT
2
0
SIM power control
130
LEADVCC
131
RxPwr
O
CCONT
2
0
RX regulator
control
132
TxPwr
O
CCONT
2
0
TX regulator
control
133
TestMode
I
134
ExtSysResetX
O
Page 3 – 40
Connected
to/from
Drive
req.
mA
Reset
State
Note
Explanation
2
Input,
external
pullup
external
pullup
MBUS, Flash
clock
CCONT
2
1
VCXO regulator
control
CCONT
2
0
Synthesizer regulator control
Core VCC in
3325c10
O
CCONT
2
1
Power
Chip select to
CCONT
LEAD Ground
external
pullup/down
depending
on how to
boot
Serial data in/out
Ground
IO VCC in
3325c10
Power
LEAD Power
Input,
pulldown
2
0
pulldown
PD0201
Test mode select
System Reset
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
135
PCMTxData
O
COBBA
2
0
136
VCC
137
PCMRxData
I
COBBA
Input
Receive data,
RX
138
PCMDClk
I
COBBA
Input
Transmit clock,
CLKX
139
PCMSClk
I
COBBA
Input
Transmitframe
sync, FSX
140
COBBADAX
I
COBBA
Input
Data available
acknowledge
141
GND
142
COBBAWrX
O
COBBA
2
1
COBBA write
strobe
143
COBBARdX
O
COBBA
2
1
COBBA read
strobe
144
COBBAClk
O
COBBA
4
1
COBBA clock,
13 MHz
145
COBBAAd3
O
COBBA
2
0
COBBA address
bit
146
COBBAAd2
O
COBBA
2
0
COBBA address
bit
147
COBBAAd1
O
COBBA
2
0
COBBA address
bit
148
COBBAAd0
O
COBBA
2
0
COBBA address
bit
149
COBBADa11
I/O
COBBA
2
0
COBBA data bit
150
VCC
151
COBBADa10
I/O
COBBA
2
0
COBBA data bit
152
COBBADa9
I/O
COBBA
2
0
COBBA data bit
153
COBBADa8
I/O
COBBA
2
0
COBBA data bit
154
COBBADa7
I/O
COBBA
2
0
COBBA data bit
155
COBBADa6
I/O
COBBA
2
0
COBBA data bit
156
GND
157
COBBADa5
I/O
COBBA
2
0
COBBA data bit
158
COBBADa4
I/O
COBBA
2
0
COBBA data bit
159
COBBADa3
I/O
COBBA
2
0
COBBA data bit
160
COBBADa2
I/O
COBBA
2
0
COBBA data bit
161
COBBADa1
I/O
COBBA
2
0
COBBA data bit
Original 11/97
Note
Explanation
Transmit data,
DX
IO VCC in
3325c10
Power
Ground
Core VCC in
3325c10
Power
Ground
Page 3 – 41
NSE–3
PAMS
System Module
Technical Documentation
Pin
N:o
Pin Name
Pin
Type
Connected
to/from
Drive
req.
mA
Reset
State
Note
162
COBBADa0
I/O
COBBA
2
0
COBBA data bit
163
DSPGenOut5
O
RF
2
0
DSP general
purpose output,
COBBA reset
164
VCC
165
DSPGenOut4
O
166
DSPGenOut3
O
167
DSPGenOut2
168
IO VCC in
3325c10
Explanation
Power
2
0
DSP general
purpose output
2
0
IR ON
O
2
0
DSP general
purpose output
DSPGenOut1
O
2
0
DSP general
purpose output
169
DSPGenOut0
O
2
0
DSP general
purpose output
170
MCUGenIO0
I/O
EEPROM
2
Input,
pullup
171
FrACtrl
O
RF
2
0
172
GND
173
SynthEna
O
PLUSSA
2
0
Synthesizer data
enable
174
SynthClk
O
PLUSSA
2
0
Synthesizer
clock
175
SynthData
O
PLUSSA
2
0
Synthesizer data
176
TxPA
O
PLUSSA,
power amplifier
2
0
Power amplifier
control
Page 3 – 42
IR
pullup
PR0201
SDA
SDATX0
Ground
Original 11/97
PAMS
NSE–3
Technical Documentation
System Module
Memories
The MCU program code resides in an external flash program memory,
which size is 8 Mbits (512kx16bit). The MCU work (data) memory size is
512kbits (64kx8bit). A serial EEPROM is used for storing the system and
tuning parameters, user settings and selections, a scratch pad and a
short code memory. The EEPROM size is 64kbits (8kx8bit).
The BusController (BUSC) section in the MAD decodes the chip select
signals for the external memory devices and the system logic. BUSC controls internal and external bus drivers and multiplexers connected to the
MCU data bus. The MCU address space is divided into access areas with
separate chip select signals. BUSC supports a programmable number of
wait states for each memory range.
Program Memory
The MCU program code resides in the program memory. The program
memory size is 8 Mbits (512kx16bit).
The flash memory has a power down pin that should be kept low, during
the power up phase of the flash to ensure that the device is powered up
in the correct state, read only. The power down pin is utilized in the system sleep mode by connecting the ExtSysResetX to the flash power down
pin to minimize the flash power consumption during the sleep.
SRAM Memory
The work memory is a static ram of size 512k (64kx8) in a shrink TSOP32
package. The work memory is supplied from the common baseband VBB
voltage and the memory contents are lost when the baseband voltage is
switched off. All retainable data should be stored into the EEPROM (or
flash) when the phone is powered down.
EEPROM Memory
An EEPROM is used for a nonvolatile data memory to store the tuning
parameters and phone setup information. The short code memory for
storing user defined information is also implemented in the EEPROM.
The EEPROM size is 8kbytes. The memory is accessed through a serial
bus and the default package is SO8.
Original 11/97
Page 3 – 43
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PAMS
System Module
Technical Documentation
MCU Memory Map
MAD2 supports maximum of 4GB internal and 4MB external address
space. External memories use address lines MCUAd0 to MCUAd21 and
16–bit databus. The BUSC bus controller supports 8– and 16–bit access
for byte, double byte, word and double word data. Access wait state 2
and used databus width can be selected separately for each memory
block.
Flash Programming
The phone have to be connected to the flash loading adapter FLA–5 so
that supply voltage for the phone and data transmission lines can be supplied from/to FLA–5. When FLA–5 switches supply voltage to the phone,
the program execution starts from the BOOT ROM and the MCU investigates in the early start–up sequence if the flash prommer is connected.
This is done by checking the status of the MBUS–line. Normally this line
is high but when the flash prommer is connected the line is forced low by
the prommer.
The flash prommer serial data receive line is in receive mode waiting for
an acknowledgement from the phone. The data transmit line from the
baseband to the prommer is initially high. When the baseband has recognized the flash prommer, the TX–line is pulled low. This acknowledgement is used to start to toggle MBUS (FCLK) line three times in order that
MAD2 gets initialized. This must be happened within 15 ms after TX line
is pulled low. After that the data transfer of the first two bytes from the
flash prommer to the baseband on the RX–line must be done within 1 ms.
When MAD2 has received the secondary boot byte count information, it
forces TX line high. Now, the secondary boot code must be sent to the
phone within 10 ms per 16 bit word. If these timeout values are exceeded,
the MCU (MAD2) starts normal code execution from flash. After this, the
timing between the phone and the flash prommer is handled with dummy
bites.
A 5V programming voltage is supplied inside the transceiver from the battery voltage with a switch mode regulator (5V/30mA) of the CCONT. The
5V is connected to VPP pin of the flash through the UI board.
COBBA–GJ
The COBBA–GJ provides an interface between the baseband and the
RF–circuitry. COBBA–GJ performs analogue to digital conversion of the
receive signal. For transmit path COBBA_GJ performs digital to analogue
conversion of the transmit amplifier power control ramp and the in–phase
and quadrature signals. A slow speed digital to analogue converter will
provide automatic frequency control (AFC).
The COBBA asic is at any time connected to MAD asic with two interfaces, one for transferring tx and rx data between MAD and COBBA and
one for transferring codec rx/tx samples.
Page 3 – 44
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Infrared Transceiver Module
The module is activated with an IRON signal by the MAD, which supplies
power to the module. The IR datalines are connected to the MAD accessory interface AccIf via FBUS. The RX and TX lines are separated from
FBUS by three–state buffers, when the IR–module is switched off. The
AccIf in MAD performs pulse encoding and shaping for transmitted data
and detection and decoding for received data pulses.
The data is transferred over the IR link using serial data at speeds 9.6,
19.2, 38.4, 57.6 or 115.2 kbits/s, which leads to maximum throughput of
92.160 kbits/s. The used IR module complies with the IrDA 1.0 specification (Infra Red Data Association), which is based on the HP SIR (Hewlett–
Packard‘s Serial Infra Red) consept.
Following figure gives an example of IR transmission pulses. In IR transmission
a light pulse correspondes to 0–bit and a ”dark pulse” correspondes to 1–bit.
constant pulse
IR TX
UART TX
startbit
1
0
1
0
0
1
1
0
stopbit
The FBUS cannot be used for external accessory communication when the infrared mode is selected, as IR communication reserves the FBUS completely.
Real Time Clock
Requirements for a real time clock implementation are a basic clock
(hours and minutes), a calender and a timer with alarm and power on/off
–function and miscellaneous calls. The RTC will contain only the time
base and the alarm timer but all other functions (e.g. calendar) will be implemented with the MCU software. The RTC needs a power backup to
keep the clock running when the phone battery is disconnected. The
backup power is supplied from a rechargable polyacene battery that can
keep the clock running some ten minutes. If the backup has expired, the
RTC clock restarts after the main battery is connected. The CCONT
keeps MCU in reset until the 32kHz source is settled (1s max).
The CCONT is an ideal place for an integrated real time clock as the asic
already contains the power up/down functions and a sleep control with
the 32kHz sleep clock, which is running always when the phone battery is
connected. This sleep clock is used for a time source to a RTC block.
Original 11/97
Page 3 – 45
NSE–3
PAMS
System Module
Technical Documentation
RTC backup battery charging
CHAPS has a current limited voltage regulator for charging a backup battery. The regulator derives its power from VOUT so that charging can take
place without the need to connect a charger. The backup battery is only
used to provide power to a real time clock when VOUT is not present so it
is important that power to the charging circuitry is derived from VOUT and
that the charging circuitry does not present a load to the backup battery
when VOUT is not present.
It should not be possible for charging current to flow from the backup battery into VOUT if VOUT happens to be lower than VBACK. Charging current will gradually diminish as the backup battery voltage reaches that of
the regulation voltage.
Vibra Alerting Device
A vibra alerting device is used for giving silent signal to the user of an incoming call. The device is not placed in the phone but it will be added to a
special battery pack. The vibra is controlled with a PWM signal by the
MAD via the BTEMP battery terminal.
A 15kohm BSI resistor is needed to detect the vibra battery. It is only used
to enable vibra selection in user menu. When alerting, VibraPWM signal
is delivered to battery.
VBAT
Vibra
TRANSCEIVER
VREF
BSI
100k
22k
10n
100n
10k
BTEMP
RT
47k
NTC
BTEMP
1k
GND
CCONT
R3
1k
C1
VIBRAPWM
MAD
10n
BATTERY
MCUGenIO4
Page 3 – 46
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
IBI Accessories
All accessories which can be connected between the transceiver and the
battery or which itself contain the battery, are called IBI accessories.
Either the phone or the IBI accessory can turn the other on, but both possibilities are not allowed in the same accessory.
Phone Power–on by IBI
IBI accessory can power the phone on by pulling the BTEMP line up to 3
V.
IBI power–on by phone
Phone can power the IBI accessory on by pulling the BTEMP line up by
MCUGenIO4 of MAD2. BTEMP measurement is not possible during this
time.
The accessory is commanded back to power–off by MBUS message.
VBAT
TRANSCEIVER
+1.5 V
–
Accessory
power on
VREF
BSI
+
100k
100ms
220k
33n
10n
10k
BTEMP
RT
NTC
BTEMP
1k
CCONT
1k
10n
GND
VIBRAPWM
MAD
BATTERY
D1
MCUGenIO4
Original 11/97
Page 3 – 47
NSE–3
PAMS
System Module
Technical Documentation
RF Module
Maximum Ratings
Parameter
Rating
Battery voltage, idle mode
6.0 V
Battery voltage during call, highest power level
5.0 V
Regulated supply voltage
2.8 +/– 3% V
Voltage reference
1.5 +/– 1.5% V
Operating temperature range
–10...+55 deg. C
RF Frequency Plan
CRFU_1
935–960
MHz
PLUSSA
1st IF 71 MHz
2nd IF 13 MHz
2nd LO
58 MHz
f
f
f/2
f/2
UHF
PLL
232
MHz
VHF
PLL
LO–
buffers
1006–
1031
MHz
890–915
MHz
Page 3 – 48
f
TX IF 116 MHz
f/2
13 MHz
VCTCXO
Original 11/97
1.35 A
PA
TXP
VXOENA
PAMS
VBATT
Technical Documentation
BATTERY
Power Distribution Diagram
Original 11/97
3.6 V
SYNPWR
RXPWR
TXPWR
VR
1
VR
2
VR
3
VR
4
VR
5
VR
6
VR
7
VREF
V5V
90 mA
2.3 mA
18 mA
VCTCXO
BUFFER
0.1 mA
VXO
VSYN_2
51 mA
VTX
VCOs
BUFFERS
VSYN_1
COBBA
ANAL.
1 mA
CHARGE
PUMPs
VCP
NSE–3
Page 3 – 49
CRFU,
PLUSSA
VRX
19.5 mA
PLUSSA
NOT USED CRFU
VREF_1
VREF_2
System Module
CRFU,
PLUSSA
PA, limiter
PLLs
NSE–3
PAMS
System Module
Technical Documentation
DC Characteristics
Regulators
Transceiver has got a multi function power management IC, which contains among other functions, also 7 pcs of 2.8 V regulators. All regulators
can be controlled individually with 2.8 V logic directly or through control
register. In GSM direct controls are used to get fast switching, because
regulators are used to enable RF–functions.
Use of the regulators can be seen in the power distribution diagram.
CCONT also provides 1.5 V reference voltage for PLUSSA and CRFU1a
( and for DACs and ADCs in COBBA too ).
Control Signals
All control signals are coming from MAD and they are 2.8 V logic signals.
Functional Description
RF block diagram has conventional dual conversion receiver and in transmitter there is a upconversion mixer for the final TX–frequency.
Architecture contains three ICs. Most of the functions are horizontally and
vertically integrated. UHF functions except power amplifier and VCO are
integrated into CRFU_1a, which is a BiCMOS–circuit suitable for LNA–
and mixer–function. Most of the functions are in PLUSSA, which also is a
BiCMOS–circuit. PLUSSA is a IF–circuit including IQ–modulator and PLLs
for VHF– and UHF–synthesizers.
Power amplifier is also an ASIC, it is a so called MMIC ( monolithic microwave integrated circuit ). It has three amplifier stages including input and
interstage matchings. Output matching network is external. Also TX gain
control is integrated into this chip.
Frequency synthesizers
Both VCOs are locked with PLLs into stable frequency source ( see figure
3 ), which is a VCTCXO–module ( voltage controlled temperature compensated crystal oscillator ). VCTCXO is running at 13 MHz. Temperature
effect is controlled with AFC ( automatic frequency control ) voltage,
VCTCXO is locked into frequency of the base station. AFC is generated
by baseband with a 11 bit conventional DAC in COBBA.
Page 3 – 50
Original 11/97
PAMS
NSE–3
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Technical Documentation
UHF PLL is located into PLUSSA. There is 64/65 (P/P+1) prescaler, N–
and A–divider, reference divider, phase detector and charge pump for the
external loop filter. UHF local signal is generated by a VCO–module (VCO
= voltage controlled oscillator ) and sample of frequency of VCO is fed to
prescaler. Prescaler is a dual modulus divider. Output of the prescaler is
fed to N– and A–divider, which produce the input to phase detector.
Phase detector compares this signal to reference signal, which is divided
with reference divider from VCTCXO output. Output of the phase detector
is connected into charge pump, which charges or discharges integrator
capacitor in the loop filter depending on the phase of the measured frequency compared to reference frequency. Loop filter filters out the pulses
and generates DC to control the frequency of UHF–VCO. Loop filter defines step response of the PLL ( settling time ) and effects to stability of
the loop, that’s why integrator capacitor has got a resistor for phase compensation. Other filter components are for sideband rejection. Dividers
are controlled via serial bus. SDATA is for data, SCLK is serial clock for
the bus and SENA1 is a latch enable, which stores new data into dividers.
HF–synthesizer is the channel synthesizer, so the channel spacing is 200
kHz. 200 kHz is reference frequency for the phase detector.
freq.
reference
AFC–controlled VCTCXO
R
LP
f ref
f_out / M
PHASE
DET.
f_out
CHARGE
PUMP
VCO
Kd
Kvco
M
M = A(P+1) + (N–A)P=
= NP+A
VHF PLL is also located into PLUSSA. There is 16/17 ( P/P+1 ) dual modulus prescaler, N– and A–dividers, reference divider, phase detector and
charge pump for the loop filter. VHF local signal is generated with a discrete VCO–circuit. VHF PLL works in the same way as UHF–PLL. VHF–
PLL is locked on fixed frequency, so higher reference frequency is used
to decrease phase noise.
Original 11/97
Page 3 – 51
NSE–3
PAMS
System Module
Technical Documentation
Receiver
Receiver is a dual conversion linear receiver.
Received RF–signal from the antenna is fed via the duplex filter to LNA
(low noise amplifier ) in CRFU_1a. Active parts ( RF–transistor and biasing and AGC–step circuitry ) are integrated into this chip. Input and output
matching networks are external. Gain selection is done with PDATA0 control. Gain step in LNA is activated when RF–level in antenna is about –45
dBm. After the LNA amplified signal ( with low noise level ) is fed to bandpass filter, which is a SAW–filter ( SAW, surface acoustic wave ). Duplex
filter and RX interstage bandpass filters together define, how good are the
blocking characteristics against spurious signals outside receive band
and the protection against spurious responses, mainly the image of the
first mixer.
This bandpass filtered signal is then mixed down to 71 MHz, which is first
intermediate frequency. 1st mixer is located into CRFU_1a ASIC. This integrated mixer is a double balanced Gilbert cell. All active parts and biasing are integrated and matching components are external. Because this is
an axtive mixer it also amplifies IF–frequency. Also local signal buffering
is integrated and upper side injection is used. First local signal is generated with UHF–synthesizer.
First IF–signal is then bandpass filtered with a selective SAW–filter. From
the mixer output to IF–circuit input signal path is balanced. IF–filter provides selectivity for channels greater than +/–200 kHz. Also it attenuates
image frequency of the second mixer and intermodulating signals. Selectivity is required in this place, because of needed linearity and adjacent
channel interferers will be on too high signal level for the stages following.
Next stage in the receiver chain is AGC–amplifier. It is integrated into
PLUSSA–ASIC. AGC has analog gain control. Control voltage for the
AGC is generated with DA–converter in COBBA in baseband. AGC–stage
provides accurate gain control range ( min. 60 dB ) for the receiver. After
the AGC there is second mixer, which generates second intermediate frequency, 13 MHz. Local signal is generated in PLUSSA by dividing VHF–
synthesizer output ( 232 MHz ) by four, so the 2nd LO–frequency is 58
MHz.
2nd IF–filter is a ceramic bandpass filter at 13 MHz. It attenuates adjacent
channels, except for +/– 200 kHz there is not much attenuation. Those
+/– 200 kHz interferers are filtered digitally by the baseband . So RX
DACs are so good, that there is enough dynamic range for the faded 200
kHz interferer. Also the whole RX has to be able to handle signal levels in
a linear way. After the 13 MHz filter there is a buffer for the IF–signal,
which also converts and amplifies single ended signal from filter to balanced signal for the buffer and AD–converters in COBBA. Buffer in PLUSSA has got voltage gain of 36 dB and buffer gain setting in COBBA is 0
dB. It is possible to set gainstep ( 9.5 dB ) into COBBA via control bus, if
needed.
Page 3 – 52
Original 11/97
PAMS
NSE–3
Technical Documentation
System Module
Transmitter
Transmitter chain consists of IQ–modulator, upconversion mixer, power
amplifier and there is a power control loop.
I– and Q–signals are generated by baseband also in COBBA–ASIC. After
post filtering ( RC–network ) they go into IQ–modulator in PLUSSA. It
generates modulated TX IF–frequency, which is VHF–synthesizer output
divided by two, meaning 116 MHz. There is also an AGC–amplifier in
PLUSSA, but it is not used in GSM. Output is set to maximum with a 5–bit
message in control register. AGC–amplifier is used in other digital systems, because PLUSSA is a core IC. After PLUSSA signal is attenuated
and filtered for upconversion into final TX–frequency in CRFU_1a. Upconversion mixer in CRFU_1a is a so called image reject mixer. It is able
to attenuate unwanted sideband in the upconverter output. Mixer itself is
a double balanced Gilbert cell. Phase shifters required for image rejection
are also integrated. Local signal needed in upconversion is generated by
the UHF–synthesizer, but buffers for the mixer are integrated into
CRFU_1a. Output of the upconverter is buffered and matching network
makes a single ended 50 ohm impedance.
Next stage is TX interstage filter, which attenuates unwanted signals from
the upconverter, mainly LO–leakage and image frequency from the upconverter. Also it attenuates wideband noise. This bandpass filter is a
SAW–filter.
After TX SAW–filter, there is a discrete transistor stage. Function of this
block is to reduce the AM–content. This feature is realized with saturated
operation of the V640 transistor. Typical input level into this amplifier is
higher than output level.
The final amplication is realized with third IC, power amplifier is a MMIC.
It has got a 50 ohm input, output requires an external matching network.
MMIC contains three amplifier stages and interstage matchings. Also
there is a gain control, which is controlled with a power control loop. PA
has got over 35 dB power gain and it is able to produce 2.5 W into output
with 0 dBm input level. Gain control range is over 35 dB to get desired
power levels and power ramping up and down.
Harmonics generated by the nonlinear PA ( class AB ) are filtered out with
the matching network and lowpass/bandstop filtering in the duplexer.
Bandstop is required because of wideband noise located on RX–band.
Power control circuitry consists of power detector in the PA output and error amplifier in PLUSSA. There is a directional coupler connected between PA output and duplex filter. It takes a sample from the forward going power with certain ratio. This signal is rectified in a schottky–diode
and it produces a DC–signal signal after filtering. This peak–detector is
linear on absolute scale, except it saturates on very low and high power
levels – it produces a S–shape curve.
Original 11/97
Page 3 – 53
NSE–3
PAMS
System Module
Technical Documentation
This detected voltage is compared in the error–amplifier in PLUSSA to
TXC–voltage, which is generated by DA–converter in COBBA. Because
also gain control characteristics in PA are linear in absolute scale, control
loop defines a voltage loop, when closed. Closed loop tracks the TXC–
voltage quite linearilly. TXC has got a raised cosine form ( cos4 – function
), which reduces switching transients, when pulsing power up and down.
Because dynamic range of the detector is not wide enough to control the
power ( actually RF output voltage ) over the whole range, there is a control named TXP to work under detected levels. Burst is enabled and set to
rise with TXP until the output level is high enough, that feedback loop
works. Loop controls the output via the control pin in PA MMIC to the desired output level and burst has got the waveform of TXC–ramps. Because feedback loops could be unstable, this loop is compensated with a
dominating pole. This pole decreases gain on higher frequencies to get
phase margins high enough.
DIR.COUPLER
PA
RF_OUT
RF_IN
K cp
K PA
R1
DETECTOR
K
K = –R1/R2
det
ERROR
AMPLIFIER
R2
R
C
DOMINATING
POLE
TXC
Page 3 – 54
Original 11/97
PAMS
NSE–3
Technical Documentation
System Module
AGC strategy
AGC–amplifier is used to maintain output level of the receiver almost
constant. AGC has to be set before each received burst, this is called
pre–monitoring. Receiver is switched on roughly 150 ms before the burst
begins, DSP measures received signal level and adjusts RXC, which controls RX AGC–amplifier or it switches off the LNA with PDATA0 control
line. This pre–monitoring is done in three phases and this sets the settling
times for RX AGC. Pre–monitoring is required because of linear receiver,
received signal must be in full swing, no clipping is allowed and because
DSP doesn’t know, what is the level going to be in next burst.
There is at least 60 dB accurate gain control ( continous, analog ) and
one digital step in LNA. It is typically about 30...35 dB.
RSSI must be measured on range –48...–110 dBm. After –48 dBm level
MS reports to base station the same reading.
Because of RSSI–requirements, gain step in LNA is used roughly on –45
dBm RF–level and up to –10 dBm input RF–level accurate AGC is used
to set RX output level. LNA is ON below –45 dBm. from –45 dBm down to
–95 dBm this accurate AGC in PLUSSA is used to adjust the gain to desired value. RSSI–function is in DSP, but it works out received signal level
by measuring RX IQ–level after all selectivity filtering ( meaning IF–filters,
Σ∆±converter and FIR–filter in DSP). So 50 dB accurate AGC dynamic
range is required. Remaining 10 dB is for gain variations in RX–chain ( for
calibration ). Below –95 dBm RF–levels, output level of the receiver drops
dB by dB. At –95 dBm level output of the receiver gives 50 mVpp
differentially. This is the target value for DSP. Below this it drops down to
ca. 9 mVpp differentially @ –110 dBm RF–level.
This strategy is chosen because we have to roll off the AGC in PLUSSA
early enough, that it won’t saturate in selectivity tests. Also we can’t start
too early, then we will sacrifice the signal to noise ratio and it would require more accurate AGC dynamic range. 50 mVpp target level is set,
because RX–DAC will saturate at 1.4 Vpp. This over 28 dB headroom is
required to have margin for +/– 200 kHz faded adjacent channel ( ca. 19
dB ) and extra 9 dB for pre–monitoring.
Production calibration is done with two RF–levels, LNA gain step is not
calibrated. Gain changes in the receiver are taken off from the dynamic
range of accurate AGC. Variable gain stage in PLUSSA is designed in a
way, that it is capable of compensating itself, there is good enough margin in AGC.
Original 11/97
Page 3 – 55
NSE–3
PAMS
System Module
Technical Documentation
AFC function
AFC is used to lock the transceivers clock to frequency of the base station. AFC–voltage is generated in COBBA with 11 bit AD–converter.
There is a RC–filter in AFC control line to reduce the noise from the converter. Settling time requirement for the RC–network comes from signalling, how often PSW ( pure sine wave ) slots occur. They are repeated after 10 frames , meaning that there is PSW in every 46 ms. AFC tracks
base station frequency continously, so transceiver has got a stable frequency, because changes in VCTCXO–output don’t occur so fast ( temperature ). Settling time requirement comes also from the start up–time
allowed. When transceiver is in sleep mode and ”wakes” up to receive
mode , there is only about 5 ms for the AFC–voltage to settle. When the
first burst comes in system clock has to be settled into +/– 0.1 ppm frequency accuracy. The VCTCXO–module requires also 5 ms to settle into
final frequency. Amplitude rises into full swing in 1 ... 2 ms, but frequency
settling time is higher so this oscillator must be powered up early enough.
Receiver blocks
RX interstage filter
Parameter
Min.
Typ.
Passband
Max.
Unit
935 – 960
MHz
Insertion loss
3.8
dB
Maximum drive level
+10
dBm
1st mixer in CRFU_1a
Parameter
Min.
Typ./
Nom.
Max.
Supply voltage
2.7
2.8
2.85
V
RX frequency range
935
960
MHz
LO frequency range
1006
1031
MHz
IF frequency
71
Output resistance (balanced)
Unit/Notes
MHz
10 k
ohm
1st IF–filter
Parameter
Operating temperature range
Center frequency , fo
Maximum ins. loss at 1dBBW
Page 3 – 56
min.
typ.
unit
+75
–20
max.
deg.C
71
MHz
11
dB
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Transmitter Blocks
TX interstage filter
Parameter
Min.
Typ.
Passband
Max.
Unit
890 – 915
Insertion loss
MHz
3.8
dB
Power amplifier MMIC
Parameter
Symbol
Test condition
Min
Operating freq. range
Supply voltage
Typ
880
Vcc
3.1
Gain control range
( overall dynamic
range)
Vpc= 0.5 ... 2.2 V
Max
Unit
915
3.5
MHz
5.0
V
45
dB
Synthesizer blocks
VHF VCO and low pass filter
Parameter
Supply voltage range
Min.
Typ.
Max.
2.7
2.8
2.58
V
4
7
mA
4.0
V
Current consumption
Control voltage
0.5
Operation frequency
Output level
Unit/Notes
232
MHz
–13
–10
dBm ( output after
the lowpass filter )
Min.
Typ.
UHF PLL
UHF PLL block in PLUSSA
Parameter
Input frequency range
650
Reference input level
Max.
1300
100
Original 11/97
MHz
mVpp
Reference input frequency
Reference input impedance
Unit/notes
30
MHz
tbd.
Page 3 – 57
NSE–3
PAMS
System Module
Technical Documentation
UHF VCO module
Parameter
Conditions
Rating
Supply voltage, Vcc
Unit/
Notes
2.8 +/– 0.1
V
Supply current, Icc
Vcc = 2.8 V,
Vc= 2.25 V
& lt; 10
mA
Control voltage, Vc
Vcc = 2.8 V
0.8... 3.7
V
Oscillation frequency
Vcc = 2.8 V
Vc = 0.8 V
Vc = 3.7 V
& lt; 1006
& gt; 1031
MHz
MHz
f = 1018.5 MHz
2.25 +/– 0.25
V
Tuning voltage in center frequency
Tuning voltage sensitivity in operating
frequency range on each spot freq.
Vcc = 2.8 V
f=1006...1031
MHz
14 +/– 2
MHz/V
Output power level
Vcc=2.7 V
f=1006...1031
MHz
–6.0 min.
dBm
UHF local signal input in CRFU_1a
Parameter
Min.
Typ.
Max.
Unit/Notes
Input frequency range
990
1040
MHz
Input level
200
700
mVpp
Connections
RF connector and antenna switch
Parameter
Min.
Operating frequency range
Typ.
890
Max.
Unit/Notes
960
MHz
Insertion loss, COM to INT
0.2
dB
Insertion loss, COM to EXT
0.4
dB
Nominal impedance
50
Return loss
15
Signal
name
From
VBATT
Battery
RF
Voltage
3.0
VXOENA
MAD
CCONT
Logic high ”1”
Logic low ”0”
Page 3 – 58
ohm
To
Parameter
Minimum
Typical
3.6
Maximum
Unit
Function
5.0/6.0 V
Supply voltage for
RF
2.0
2.85
V
VR1, VR6 in
CCONT ON
0
0.8
V
VR1, VR6 in
CCONT OFF
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Signal
name
From
To
Parameter
Minimum
Typical
Maximum
Unit
Function
MAD
CCONT
CCONT
2.85
V
VR3, VR4 in
CCONT ON
0
0.8
V
VR3,VR4 in
CCONT OFF
Logic high ”1”
2.0
2.85
V
VR2, VR5 in
CCONT ON
0
0.8
V
VR2, VR5 in
CCONT OFF
Logic high ”1”
2.0
2.85
V
VR7 in CCONT
ON
Logic low ”0”
TXPW
R
MAD
CCONT
2.0
Logic low ”0”
RXPW
R
MAD
Logic high ”1”
Logic low ”0”
SYNP
WR
0
0.8
V
VR7 in CCONT
OFF
VREF
CCON
T
PLUSSA Voltage
1.478 1.5
1.523
V
Reference voltage
for PLUSSA and
CRFU1a
PDATA0
MAD
CRFU_1 Logic high ”1”
a
2.0
2.85
V
Nominal gain in
LNA
0
0.8
V
Reduced gain in
LNA
2.0
2.85
V
PLL enable
0
0.8
V
2.0
2.85
V
0
0.8
V
2.0
2.85
V
Logic low ”0”
0
0.8
V
Voltage
0.046
2.254
V
Automatic frequency control
signal for
VC(TC)XO
MHz
High stability clock
signal for the logic
circuits
Logic low ”0”
SENA1 MAD
PLUSSA Logic high ”1”
Logic low ”0”
SDATA
MAD
PLUSSA Logic high ”1”
Logic low ”0”
SCLK
MAD
PLUSSA Logic high ”1”
AFC
COBBA
VCTCX
O
RFC
VCTCX MAD
O
Frequency
RXIP/
RXIN
PLUSSA
COBBA
Output level
TXIP/
TXIN
COBBA
PLUSSA Differential voltage 0.75 0.75 x
swing
x
1.1
1.022
Signal amplitude
DC level
TXQP/
TXQN
COBBA
0.5
Synthesizer clock
1.0
2.0
Vpp
50
1344
mVp
p
Differential RX 13
MHz signal to
baseband
0.75 x
1.18
Vpp
0.816
V
Differential in–
phase TX baseband signal for the
RF modulator
d l t
0.75 x
1.18
Vpp
0.816
V
0.784 0.8
PLUSSA Differential voltage 0.75 0.75 x
swing
x
1.1
1.022
DC level
Original 11/97
13
Synthesizer data
0.784 0.8
Differential quadrature phase TX
baseband signal
for the RF modu
modulator
Page 3 – 59
NSE–3
PAMS
System Module
Signal
name
TXP
From
MAD
Technical Documentation
To
Parameter
PLUSSA Logic high ”1”
Logic low ”0”
Minimum
Typical
Maximum
Unit
2.0
2.85
V
0
0.8
V
COBBA
Page 3 – 60
0.12
0.18
V
2.27
2.33
PLUSSA Voltage Min
0.12
0.18
V
2.27
2.33
Transmitter power
control enable
t l
bl
V
Voltage Max
RXC
COBBA
PLUSSA Voltage Min
Voltage Max
TXC
Function
V
Transmitter power
control
Receiver gain
control
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Timings
Synthesizer control timing
6.9 ms ( 1.5 x 4.6 ms ( frame )
100 us
min.
10 us
min.
10 us
min.
10 us
min.
10 us
min.
8 us
RXPWR
SYNTHPWR
2us min
SENA
SDATA/
SCLK
MODE
#bits
VHF R
VHF N/A
UHF R
UHF N/A
23
23
23
23
23
Synthesizer Start–up Timing / clocking
MON
20 ms
VXOENA
SYNTHPWR
RX
MON
RX
MON
4.6 ms
RX
MON
RX
0.5–2 sec.
6.9 ms
150 us
150 us
RXPWR
RXC
SENA
SDATA/
SCLK
Synthesizer Timing / IDLE,
one monitoring frame,
frame can start also from RX–burst
Original 11/97
Page 3 – 61
NSE–3
PAMS
System Module
Technical Documentation
In case of long list of adjacent channels, there might be two monitoring–
bursts/frame. Extra monitoring ”replaces” TX–burst.
MON
20 ms
VXOENA
SYNTHPWR
RX
MON MON
RX
MON MON
RX
MON MON
RX
0.5–2 sec.
4.6 ms
6.9 ms
150 us
150 us
RXPWR
RXC
SENA
SDATA/
SCLK
Synthesizer Timing / IDLE 2, frame can start from RX–burst
MON
SYNTHPWR
RX
TX
MON
RX
TX
MON
RX
TX
MON
RX
150 us
TXPWR
TXP
TXC
150 us
150 us
RXPWR
RXC
SENA
SDATA/
SCLK
Sunthesizer Timing / traffic channel
Page 3 – 62
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Transmitter power switching timing diagram
542.8 us
Pout
8.3..56.7 us
TXC
TXP
0...56.7 us
0...58 us
TXPWR
150 us
50 us
Synthesizer clocking
Synthesizers are controlled via serial control bus, which consists of SDATA, SCLK and SENA1 signals. These lines form a synchronous data
transfer line. SDATA is for the data bits, SCLK is 3.25 MHz clock and
SENA1 is latch enable, which stores the data into counters or registers.
Original 11/97
Page 3 – 63
NSE–3
PAMS
System Module
Technical Documentation
Block Diagram of Baseband Blocks
BB
RF
REGULATORS REGULATORS
CHARGER
CHAPS
N101
32 kHz
CRYSTAL
CCONT
N100
CHR_CONTR
SO16
VBATT
SIM
READER
X302
SIMCARD 3...0
A/D CONV.
BACK UP
BATTERY
UI BOARD
SQFP64
PwrOnX
SIMIF 4...0
CNTVR 4...0
G100
X300
DISPLAY
GenSIO,LCDEn,CCONTCSX
32 kHz
BUZZER
EEPROM
KBLIGHTS
2k*8 / 8k*8
SIO
D230/240
SO8
MAD2
KEYBOARD
D200
FLASH
RF
UNIT
ROW 5...0
MCUDa 15...0
512k*16
1024k*16
COL
4...0
MCU
D210
N500
PData0
MCUAd 19...1
TxP
N620
TSOP48
memory control
lines: CE,WE...
SRAM
N620
Synthe Control
ASIC
MCUAd 16..0
CobbaAd 3...0
64k*8
128k*8
TxIN,TxIP
N620
TxQN,TxQP
RFI
DSP
MCUDa 7...0
CobbaDa 11...0
RxInN,RxInP
N620
AFC
D221
N620
N620
N620
TSOP32
TxC
PCM 3...0
MBUS
COBBA
N250
SQFP176
RxC
X100
RFC
13 MHz / 1 Vpp
from VCXO (G600)
FBUS
XEAR
XMIC
SYSTEM
CONNECTOR
Page 3 – 64
N250
IR
N400
CODEC
UI BOARD
MICP
EARP
MICN
EARN
SQFP64
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
Parts list of UP8T (EDMS Issue 11.11)
Code: 0200951
ITEM
CODE
DESCRIPTION
VALUE
TYPE
R100
R102
R103
R104
R109
R113
R116
R118
R120
R122
R124
R127
R128
R131
R136
R140
R142
R152
R154
R201
R202
R203
R211
R213
R215
R252
R254
R256
R257
R259
R260
R261
R263
R265
R267
R268
R270
R271
R281
R282
R301
R303
R305
1430826
1430796
1430770
1430796
1620017
1430726
1430788
1430778
1620025
1620019
1620017
1620031
1430718
1422881
1430804
1430690
1430690
1430690
1430122
1430812
1430804
1620029
1430804
1430690
1620023
1430740
1620027
1430762
1430796
1430796
1430788
1430788
1430778
1430796
1430754
1430754
1430804
1430804
1430792
1430798
1620031
1620031
1620031
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Res network 0w06 2x100r j
Chip resistor
Chip resistor
Chip resistor
Res network 0w06 2x100k j
Res network 0w06 2x10k j
Res network 0w06 2x100r j
Res network 0w06 2x1k0 j
Chip resistor
Chip resistor
Chip resistor
Chip jumper
Chip jumper
Chip jumper
Chip resistor
Chip resistor
Chip resistor
Res network 0w06 2x4k7 j
Chip resistor
Chip jumper
Res network 0w06 2x47k j
Chip resistor
Res network 0w06 2x47r j
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Res network 0w06 2x1k0 j
Res network 0w06 2x1k0 j
Res network 0w06 2x1k0 j
680 k
47 k
4.7 k
47 k
0404
100
22 k
10 k
0404
0404
0404
0404
47
0.22
100 k
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
0404
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
0404
0404
0404
0404
5 % 0.063 W 0402
5 % 1 W 1218
5 % 0.063 W 0402
0402
0402
0402
5 % 0.063 W 0603
5 % 0.063 W 0402
5 % 0.063 W 0402
0404
5 % 0.063 W 0402
0402
0404
5 % 0.063 W 0402
0404
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
0404
0404
0404
Original 11/97
4.7 M
220 k
100 k
0404
100 k
0404
330
0404
2.2 k
47 k
47 k
22 k
22 k
10 k
47 k
1.0 k
1.0 k
100 k
100 k
33 k
56 k
0404
0404
0404
Page 3 – 65
NSE–3
PAMS
System Module
R307
R308
R309
R401
R402
R403
R404
R405
R406
R500
R501
R502
R504
R507
R530
R531
R533
R550
R551
R552
R553
R554
R555
R580
R581
R582
R584
R585
R586
R588
R589
R600
R620
R621
R622
R623
R624
R625
R626
R627
R628
R629
R630
R631
R632
R634
R635
1620031
1430754
1620031
1430778
1430754
1430693
1430693
1430693
1430693
1430700
1430700
1430764
1620019
1430740
1430700
1430762
1430796
1430752
1430740
1430740
1430774
1430770
1430726
1430706
1430832
1430762
1430780
1430774
1430738
1430744
1430710
1430788
1620029
1430744
1430758
1430714
1430714
1430714
1430740
1430776
1430744
1430730
1430762
1430700
1430848
1430848
1430851
Page 3 – 66
Technical Documentation
Res network 0w06 2x1k0 j
Chip resistor
Res network 0w06 2x1k0 j
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Res network 0w06 2x10k j
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Res network 0w06 2x4k7 j
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
0404
1.0 k
0404
10 k
1.0 k
5.6
5.6
5.6
5.6
10
10
3.3 k
0404
330
10
2.2 k
47 k
820
330
330
6.8 k
4.7 k
100
15
2.7 k
2.2 k
12 k
6.8 k
270
470
22
22 k
0404
470
1.5 k
33
33
33
330
8.2 k
470
150
2.2 k
10
12 k
12 k
15 k
0404
5 % 0.063 W 0402
0404
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
0404
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
0404
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
1 % 0.063 W 0402
1 % 0.063 W 0402
2 % 0.063 W 0402
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
R636
R638
R640
R641
R660
R662
R664
R666
R668
R670
R706
R708
R710
C100
C101
C102
C103
C104
C105
C106
C107
C108
C109
C110
C112
C113
C114
C115
C116
C117
C118
C119
C120
C121
C122
C127
C128
C129
C130
C131
C132
C133
C140
C141
C142
C143
C160
1430848
1430848
1430734
1820031
1430726
1430714
1430764
1430770
1430732
1430726
1430812
1430762
1430762
2610003
2320548
2320538
2604127
2320131
2610003
2312401
2312401
2312401
2320544
2320544
2320544
2320508
2320546
2320620
2312401
2320584
2320584
2320584
2320620
2320620
2320584
2310784
2312401
2312401
2320544
2610003
2312403
2312401
2312401
2320560
2610003
2610003
2320546
Original 11/97
Chip resistor
Chip resistor
Chip resistor
NTC resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Tantalum cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
12 k
12 k
220
330
100
33
3.3 k
4.7 k
180
100
220 k
2.2 k
2.2 k
10 u
33 p
12 p
1.0 u
33 n
10 u
1.0 u
1.0 u
1.0 u
22 p
22 p
22 p
1.0 p
27 p
10 n
1.0 u
1.0 n
1.0 n
1.0 n
10 n
10 n
1.0 n
100 n
1.0 u
1.0 u
22 p
10 u
2.2 u
1.0 u
1.0 u
100 p
10 u
10 u
27 p
1 % 0.063 W 0402
1 % 0.063 W 0402
5 % 0.063 W 0402
10 % 0.12 W 0805
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
5 % 0.063 W 0402
20 % 10 V 3.2x1.6x1.6
5 % 50 V 0402
5 % 50 V 0402
20 % 35 V 3.5x2.8x1.9
10 % 16 V 0603
20 % 10 V 3.2x1.6x1.6
10 % 10 V 0805
10 % 10 V 0805
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
0.25 % 50 V 0402
5 % 50 V 0402
5 % 16 V 0402
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 50 V 0402
10 % 25 V 0805
10 % 10 V 0805
10 % 10 V 0805
5 % 50 V 0402
20 % 10 V 3.2x1.6x1.6
10 % 10 V 1206
10 % 10 V 0805
10 % 10 V 0805
5 % 50 V 0402
20 % 10 V 3.2x1.6x1.6
20 % 10 V 3.2x1.6x1.6
5 % 50 V 0402
Page 3 – 67
NSE–3
PAMS
System Module
C161
C201
C202
C203
C204
C205
C206
C207
C208
C209
C211
C212
C213
C221
C231
C247
C248
C249
C251
C252
C253
C254
C255
C256
C257
C258
C260
C261
C262
C263
C266
C268
C269
C271
C272
C301
C302
C303
C304
C305
C306
C307
C308
C309
C310
C311
C312
2320546
2320620
2320620
2320620
2320620
2320620
2320620
2320620
2320620
2320620
2320620
2312401
2320584
2320620
2320620
2320620
2320620
2320620
2320620
2312296
2320131
2312401
2312401
2312296
2320131
2320131
2312401
2310784
2320131
2320131
2610003
2312401
2320546
2320560
2320131
2320560
2320560
2320560
2320560
2320560
2320560
2320560
2320560
2320560
2320560
2320560
2320546
Page 3 – 68
Technical Documentation
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
27 p
10 n
10 n
10 n
10 n
10 n
10 n
10 n
10 n
10 n
10 n
1.0 u
1.0 n
10 n
10 n
10 n
10 n
10 n
10 n
33 n
1.0 u
1.0 u
33 n
33 n
1.0 u
100 n
33 n
33 n
10 u
1.0 u
27 p
100 p
33 n
100 p
100 p
100 p
100 p
100 p
100 p
100 p
100 p
100 p
100 p
100 p
27 p
5 % 50 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
10 % 10 V 0805
5 % 50 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
5 % 16 V 0402
Y5 V 1210
10 % 16 V 0603
10 % 10 V 0805
10 % 10 V 0805
Y5 V 1210
10 % 16 V 0603
10 % 16 V 0603
10 % 10 V 0805
10 % 25 V 0805
10 % 16 V 0603
10 % 16 V 0603
20 % 10 V 3.2x1.6x1.6
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
10 % 16 V 0603
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
C313
C400
C401
C402
C403
C404
C405
C500
C501
C502
C504
C505
C506
C507
C511
C512
C513
C514
C515
C516
C518
C520
C530
C531
C532
C535
C540
C550
C553
C554
C555
C559
C562
C563
C564
C565
C566
C567
C568
C570
C571
C572
C574
C575
C576
C582
C583
2320546
2312401
2312401
2320544
2320544
2320544
2310784
2320530
2320546
2320620
2320534
2320550
2320544
2320550
2320546
2320560
2312401
2320540
2320560
2320530
2320532
2320602
2312401
2320546
2320554
2310181
2312401
2320546
2320546
2320546
2320618
2320584
2320546
2320546
2320530
2320532
2320538
2320584
2320620
2320584
2320620
2320532
2320546
2320560
2310784
2320584
2320544
Original 11/97
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
27 p
1.0 u
1.0 u
22 p
22 p
22 p
100 n
5.6 p
27 p
10 n
8.2 p
39 p
22 p
39 p
27 p
100 p
1.0 u
15 p
100 p
5.6 p
6.8 p
4.7 p
1.0 u
27 p
56 p
1.5 n
1.0 u
27 p
27 p
27 p
4.7 n
1.0 n
27 p
27 p
5.6 p
6.8 p
12 p
1.0 n
10 n
1.0 n
10 n
6.8 p
27 p
100 p
100 n
1.0 n
22 p
5 % 50 V 0402
10 % 10 V 0805
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
10 % 25 V 0805
0.25 % 50 V 0402
5 % 50 V 0402
5 % 16 V 0402
0.25 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 1206
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 25 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
5 % 16 V 0402
5 % 50 V 0402
5 % 16 V 0402
0.25 % 50 V 0402
5 % 50 V 0402
5 % 50 V 0402
10 % 25 V 0805
5 % 50 V 0402
5 % 50 V 0402
Page 3 – 69
NSE–3
PAMS
System Module
C585
C586
C587
C588
C590
C592
C600
C601
C602
C603
C604
C610
C611
C612
C613
C614
C621
C622
C623
C624
C627
C630
C632
C633
C635
C636
C638
C639
C640
C641
C642
C643
C644
C649
C652
C653
C655
C656
C660
C662
C695
C700
L103
L104
L105
L106
L107
2320560
2320540
2310248
2320546
2312401
2610003
2312401
2320584
2320620
2320584
2312401
2610013
2610013
2610013
2320538
2320526
2320534
2320514
2320534
2320546
2320738
2320546
2320530
2320532
2320560
2312401
2320552
2320592
2310784
2310784
2320552
2312401
2320540
2320131
2320536
2320536
2320530
2320620
2320546
2320546
2312401
2320524
3203701
3203701
3203701
3640035
3640035
Page 3 – 70
Technical Documentation
Ceramic cap.
100 p
Ceramic cap.
15 p
Ceramic cap.
4.7 n
Ceramic cap.
27 p
Ceramic cap.
1.0 u
Tantalum cap.
10 u
Ceramic cap.
1.0 u
Ceramic cap.
1.0 n
Ceramic cap.
10 n
Ceramic cap.
1.0 n
Ceramic cap.
1.0 u
Tantalum cap.
220 u
Tantalum cap.
220 u
Tantalum cap.
220 u
Ceramic cap.
12 p
Ceramic cap.
3.9 p
Ceramic cap.
8.2 p
Ceramic cap.
1.2 p
Ceramic cap.
8.2 p
Ceramic cap.
27 p
Ceramic cap.
470 p
Ceramic cap.
27 p
Ceramic cap.
5.6 p
Ceramic cap.
6.8 p
Ceramic cap.
100 p
Ceramic cap.
1.0 u
Ceramic cap.
47 p
Ceramic cap.
2.2 n
Ceramic cap.
100 n
Ceramic cap.
100 n
Ceramic cap.
47 p
Ceramic cap.
1.0 u
Ceramic cap.
15 p
Ceramic cap.
33 n
Ceramic cap.
10 p
Ceramic cap.
10 p
Ceramic cap.
5.6 p
Ceramic cap.
10 n
Ceramic cap.
27 p
Ceramic cap.
27 p
Ceramic cap.
1.0 u
Ceramic cap.
3.3 p
Ferrite bead 33r/100mhz
0805
Ferrite bead 33r/100mhz
0805
Ferrite bead 33r/100mhz
0805
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
5 % 50 V 0402
5 % 50 V 0402
5 % 50 V 1206
5 % 50 V 0402
10 % 10 V 0805
20 % 10 V 3.2x1.6x1.6
10 % 10 V 0805
5 % 50 V 0402
5 % 16 V 0402
5 % 50 V 0402
10 % 10 V 0805
10 % 10 V 7.3x4.3x4.1
10 % 10 V 7.3x4.3x4.1
10 % 10 V 7.3x4.3x4.1
5 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
5 % 50 V 0402
10 % 50 V 0402
5 % 50 V 0402
0.25 % 50 V 0402
0.25 % 50 V 0402
5 % 50 V 0402
10 % 10 V 0805
5 % 50 V 0402
5 % 50 V 0402
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0402
10 % 10 V 0805
5 % 50 V 0402
10 % 16 V 0603
5 % 50 V 0402
5 % 50 V 0402
0.25 % 50 V 0402
5 % 16 V 0402
5 % 50 V 0402
5 % 50 V 0402
10 % 10 V 0805
0.25 % 50 V 0402
0805
0805
0805
0603
0603
Original 11/97
PAMS
NSE–3
Technical Documentation
L108
L400
L500
L501
L550
L552
L554
L580
L581
L600
3640035
3640035
3643039
3643039
3640069
3645157
3645157
3645161
3643025
3641206
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Chip coil
220 n
Chip coil
220 n
Filt 47pf 25v 0r01 6a
1206
Chip coil
100 n
Chip coil
100 n
Chip coil
150 n
Chip coil
56 n
Chip coil
L621
L623
L624
B100
G530
G600
F101
Z500
Z505
Z550
Z620
Z621
V100
V101
V102
V103
V104
V116
V250
V550
V580
V581
V640
V705
D200
D211
D220
D230
D402
N100
N101
N201
N250
N400
N500
N550
3641300
3641626
3641626
4510003
4350099
4510153
5119019
4511017
4511015
4512005
4510009
4510137
1825005
4113651
4113651
4113601
4113651
4110067
4210100
4110014
4110062
4210066
4210066
4210100
4370279
4340261
4340273
4342264
4340369
4370047
4370165
4340423
4370317
4860031
4370253
4370319
Chip coil
330 n
Chip coil
220 n
Chip coil
220 n
Crystal
32.768 k
Vco 1006–1031mhz 2.8v 10ma gsm
VCTCXO
13.0 M
SM, fuse f 1.5a 32v
0603
Saw filter
947.5+–12.5 M
Saw filter
902.5+–12.5 M
Dupl 890–915/935–960mhz 20x14
Cer.filt 13+–0.09mhz
7.2x3.2
Saw filter
71+–0.09 M
Chip varistor vwm14v vc30v 0805
Trans. supr.
QUAD
Trans. supr.
QUAD
Emi filter emif01–5250sc5 sot23–5
Trans. supr.
QUAD
Schottky diode
MBR0520L
Transistor
BC848W
Sch. diode x 2
BAS70–07
Cap. diode
BB535
Transistor
BFR93AW
Transistor
BFR93AW
Transistor
BC848W
Mad2 rom3 f711604 c12 tqfp176
Te28f800 flashm 512kx16 120ns
IC, SRAM
IC, EEPROM
IC, dual bus buffer sso TC7W126FU
Ccont 2f dct3 bb asic
tqfp64
Uba2006t chaps charg.control so16
IC, regulator
TK11230M
Cobba_gj b07 bb asic dct3 tqfp64
Tfdu4100 irda tx/rx & gt; 2.7v 115kbits
Crfu1a rx+tx uhf gsm v5 sot401–1
Rf9106 pw amp 880–915mhz psop2–16
Original 11/97
System Module
0603
0603
5 % Q=35/100 MHz 0805
5 % Q=35/100 MHz 0805
10 % Q=12/100 MHz 0603
10 % Q=12/100 MHz 0603
5 % Q=14/100 MHz 0603
5 % Q=40/200 MHz 0805
10 % Q=25/7.96 MHz
1008
5 % Q=30/25 MHz 1008
2 % Q=30/100 MHz 0805
2 % Q=30/100 MHz 0805
+–20PPM 8x3.8
+–5PPM 2.8V
GSM
/3.8DB 4X4
/3.8DB 4X4
20x14
7.2x3.2
14.2x8.4
0805
6 V SOT23–5
6 V SOT23–5
SOT23–5
6 V SOT23–5
20 V 0.5 A SOD123
npn 30 V SOT323
70 V 15 mA SOT143
30 V 2.1/18.7PFSOD323
npn 12 V 35 mA SOT323
npn 12 V 35 mA SOT323
npn 30 V SOT323
TQFP176
STSOP32
SO8S
SSOP8
TQFP64
SO16
3.0 V SOT23L
TQFP64
115KBITS
SOT401–1
PSOP2–16
Page 3 – 71
NSE–3
PAMS
System Module
N620
S301
S302
X100
X101
X102
X300
X302
X540
A500
A510
4370273
5219005
5219005
5469061
5469069
5469069
5460021
5400085
5429007
9517012
9517013
9380753
9850051
9850051
Page 3 – 72
Technical Documentation
Plussa txmod+rxif+2pll tqfp64
TQFP64
IC, SWsp–no 30vdc 50ma smSW TACT
SMD
IC, SWsp–no 30vdc 50ma smSW TACT
SMD
SM, system conn 6af+3dc+mic+jack
SM, batt conn 2pol spr p3.5 100v
100V2A
SM, batt conn 2pol spr p3.5 100v
100V2A
SM, conn 2x14m spring p1.0 pcb/p
PCB/PCB
Sim card reader 2x3pol p2.54 sm
SM
SM, coax conn m sw 50r 0.4–2ghz
SM, d rf shield dmc00422 hd940 u
UP8
SM, d rf shield pa–can dmc00455
Bar code label dmd03311 27x6.5
27x6.5
PCB UP8 123.25X41.0X1.0 M6 4/PA
PC board
UP8
123.25x41.0x1.0 m6 4/pa
Original 11/97
PAMS
NSE–3
System Module
Technical Documentation
This page intentionally left blank.
Original 11/97
Page 3 – 73
Circuit Diagram of UIF Module (Version 8 Edit 44) for layout version 10
Original 11/97
UIF Module UE4
4/A3–1
UIF Module UE4
Circuit Diagram of Speaker and LCD Modules for layout version 10
Speaker
Original 11/97
(Versio 8 Edit 26)
LCD
(Versio 6 Edit 19)
4/A3–2
Circuit Diagram of Keyboard (Version 8 Edit 38) for layout version 10
Original 11/97
UIF Module UE4
4/A3–3
Layout Diagram of UE4 (Version 10)
Original 11/97
UIF Module UE4
4/A3–4
PAMS Technical Documentation
HFU–2
Original 11/97
PAMS
HFU–2
Technical Documentation
CONTENTS
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage and Power Consumption . . . . . . . . . . . . . . . .
Charging voltage limits within current specifications fulfilled
Audio Specifications, electrical . . . . . . . . . . . . . . . . . . . . . . . . .
HFS–12 Audio Specifications, acoustic . . . . . . . . . . . . . . . . . .
HFM–8 Audio Specifications, acoustic . . . . . . . . . . . . . . . . . . .
Audio signal levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signals and Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exploded View of HFU–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parts list of ED2 (EDMS Issue )
Code: 0200948 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page 2
3
3
4
4
4
5
5
6
6
6
6
7
8
9
Original 11/97
PAMS
Technical Documentation
HFU–2
Introduction
The HFU–2 is a handsfree unit for DCT3 compatible handportable
phones. It provides rapid charging for the phone, a possibility to use HF–
operation and connections to the data–card and handset unit. The HF
box can be connected directly to the Mobile holder MCC–1 via the external cable.
Technical Summary
The HFU–2 has connections to car battery, car ignition sense, car radio
muting, antenna motor control, data–card, handset HSU–1, external
speaker and microphone. The unit has a System–connector that provides an interface to the Mobile holder MCC–1 via the external cable.
The unit consists of a rapid charger, HF–microphone– and speaker amplifiers, interface to handset, – datacard and –phone, voltage regulators and
control circuit (microprocessor).
The HFU–2 is always connected to the car battery. To save the car battery, HFU–2 goes in to the sleep mode if the car is not running and/or the
phone is not connected.
Original 11/97
Page 3
PAMS
HFU–2
Technical Documentation
List of Modules
Name of module
Type code
Material
code
HFU–2
0694049
Advanced handsfree unit
ED2
0200948
ED2 Advanced hadsfree module
MHFU–2
0261602
Mechanical Parts
HF unit
HF module
Assembly parts
Notes
Operation
Phone not connected (sleep mode):
When the phone is not connected the current consumption of
the device has been minimized. The switching mode power
supply (SMPS) and audio circuits has been turned off. HFU–2
is only waiting a phone to be connected.
Phone connected (active mode):
When the phone is connected to the HFU–2 it goes into the active mode. In the active mode the device provides charging
current to the phone. It also can provide hands free call option
using the external speaker and the external microphone or
micspeaker unit. If more private call wants to be made, the
phone itself can be used as a handset without losing the external antenna connection or with handset (option).
The phone controls all functions of HFU–2. In the active mode
the HFU–2 sends all state transitions to phone via mbus.
HFU–2 also provides car radio mute function during call.
HFU–2 can control the mobile antenna motor if it is installed to
the car.
Supply Voltage and Power Consumption
Conn. / pin
Line Symbol
Minimum
X300 / 6
GND
X300 / 1
VB
8.0
X300 / 1
VB
10.8
X300 / 1
VB
X300 / 1
VB
Typical /
Nominal
Page 4
Maximum
0
Unit / Notes
VDC
16
VDC (working)
13.5
16
VDC (spec. fulfill)
0.05
1
2
IDC/A (operating)
0.2
0.8
1
IDC/mA (sleep
mode)
Original 11/97
PAMS
HFU–2
Technical Documentation
Charging voltage limits within current specifications fulfilled
Conn. / pin
Line Symbol
Minimum
Typical /
Nominal
Maximum
X200 / 7
GND
0
0
0.1
VDC
X200 / 2
+10VA
9.50
10.0
10.55
VDC
X200 / 2
+10VA
11
200
Conn. / pin
Unit / Notes
IDC / mA
Line Symbol
Minimum
Typical /
Nominal
Maximum
Unit / Notes
X100 /
5,6,11
GND
0
0
0.1
VDC
X100 / 8,9
V_IN
3
8.5
VDC
X100 / 12
VB
8
16
VDC / car battery
X100 / 12
VB
500
IDC / mA
Audio Specifications, electrical
Minimum
Typical /
Nominal
Max speaker output power at
distortion=1%, 1 kHz sine
3.0
3.1
HF–speaker amplifier gain
27
29
PSRR, XEAR line
–60
–68
dB
CMRR, XEAR–SGND to
speaker
–50
–55
dB
HF–mic amplifier gain
27
30
Mic level at XMIC–SGND,
(clipping level)
2000
Mic distortion at XMIC–
SGND, at Vo = 100 mVrms,
1 kHz
0.15
Crosstalk XEAR–SGND to
XMIC
Original 11/97
31
33
0.4
5
–60
–67
– 55
Unit / Notes
W / Rload = 8 ohm
2800
Noise voltage, HFMIC
PSRR, XMIC
Maximum
dB
dB
mVpp
%
uVrms psofometric
dB
– 45
dB / electrical, 1kHz
Page 5
PAMS
HFU–2
Technical Documentation
HFS–12 Audio Specifications, acoustic
Minimum
Typical /
Nominal
Maximum
Unit / Notes
11
15
19
dBPa / 1V at system
connector is theoretical level
Electroacoustic transfer function (RX) dBPa/1V/0.5m
Speaker distortion level at
XEAR–SGND, d=5%
354
HF–speaker: SPL, approximate over 500 ... 3000 Hz
87
–4
mVrms
89
–2
91
0
dB / 1W / 1m
dBPa / 0.5W at 0,5m
10
uVrms psofometric
400
uVrms psofometric
Equivalent input noise,
XEAR
Total noise, HF speaker
200
HFM–8 Audio Specifications, acoustic
Minimum
Typical /
Nominal
Maximum
–28
–24
–20
dBV/–5dBPa/0.5m
140
300
uVrms psofometric
Typical /
Nominal
Maximum
XEAR / X100 / 4
80
354
SGND / X100 / 3
0
XMIC / X100 / 2
60
HFMIC / X400 / 2
2.0
SPEAKER / X500 / 1 & 2
0.75
Electroacoustic transfer function (TX) dBV/dBPa/0.5m
Total noise, XMIC–SGND
Unit / Notes
Audio signal levels
Signal name / conn. / pin
Minimum
Unit / Notes
mVrms
mVrms
990
mVrms
mVrms
5
V rms
Signals and Connections
Connector Name
Code
Notes
Specifications / Ratings
System connector
X100
Charge, Mbus, Fbus, audio
lines, VB
Modular 15 pin.
Handset / Data connector
X200
Mbus, Fbus, Handset audio– lines, Hshook, 10V
Modular 10 pin.
Car connector
X300
+VB, –VB, ign. sense, car
radio mute, antenna motor
control
2 X 3 Power conn.
HFMIC connector
X400
External microphone
2.5 mm jack
EXT. SPEAKER connector
X500
External speaker
3.2 mm jack
Page 6
Original 11/97
PAMS
HFU–2
Technical Documentation
Block Diagram
VCC
CRM
EXTERNAL
I/O
AMC
IGNS
protec– DC connector
tion
X300
CHARGE
SMPS
VCC
CRM
IGNS
AMC
CHGON
V_IN
RESET
CHRG_CTRL
POWER
SUPPLY
CONTROL
CIRCUITS
MBUS
PWRON
MUTE
System connector X100
AUDIO
protec–
tion
FBUS
AUDIO
INTERFACE
MUTE
LOGIC
MUTE
AUDIO
EAR
HS / Data con– protec–
nector X200
tion
PASSIVE
MIC
POWER
AMPLIFIER
EAR
Original 11/97
MICROPHONE
AMPLIFIER
protec–
tion
External Microphone
Connector X200
protec–
tion
External Speaker
Connector X500
Page 7
PAMS
HFU–2
Technical Documentation
Exploded View of HFU–2
5
4
3
2
1
Page 8
Original 11/97
PAMS
HFU–2
Technical Documentation
Parts list of ED2 (EDMS Issue 5.1)
ITEM
CODE
DESCRIPTION
R200
R201
R202
R203
R204
R205
R206
R207
R209
R210
R211
R212
R213
R214
R215
R216
R218
R219
R222
R223
R224
R225
R226
R227
R228
R233
R240
R245
R246
R270
R300
R301
R302
R303
R304
R306
R307
R310
R311
R312
R313
R315
R316
1415960
1412409
1430051
1413829
1413829
1419007
1413635
1416393
1430001
1415791
1413716
1416273
1430065
1430089
1430105
1415664
1412328
1416798
1410003
1410001
1414283
1414283
1413716
1430051
1430087
1430015
1430001
1415960
1414406
1430087
1430071
1430087
1430087
1430071
1412409
1430071
1430087
1412261
1430073
1430073
1430065
1430065
1430051
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Original 11/97
Code: 0200948
VALUE
33.2 k
1.5 k
4.7 k
10
10
0.22
100 k
221 k
100
100
220 k
150 k
10 k
120 k
560 k
27.4 k
820
681
33 k
22 k
100 k
100 k
220 k
4.7 k
100 k
470
100
33.2 k
5.6 k
100 k
22 k
100 k
100 k
22 k
1.5 k
22 k
100 k
100
27 k
27 k
10 k
10 k
4.7 k
TYPE
1 % 0.2 W 0204
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.1 W 0805
2 % 1210
5 % 0.1 W 0805
1 % 0.2 W 0204
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
1 % 0.2 W 0204
1 % 0.1 W 0805
1 % 0.1 W 0805
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
Page 9
PAMS
HFU–2
R317
R319
R321
R323
R324
R325
R327
R328
R331
R332
R333
R334
R335
R336
R337
R350
R351
R352
R353
R380
R400
R402
R403
R404
R405
R406
R407
R408
R409
R410
R411
R412
R415
R416
R417
R421
R422
R423
R425
R426
R427
R429
R430
R431
R432
R433
R434
Page 10
Technical Documentation
1430087
1430079
1430071
1414536
1410003
1430035
1414536
1410003
1430065
1430055
1430055
1414536
1410003
1430095
1430095
1430035
1430065
1430047
1430065
1430095
1430043
1430073
1415939
1430095
1430167
1430047
1430035
1415939
1430043
1430043
1415939
1415939
1415939
1415939
1430087
1430035
1415939
1415939
1430087
1430142
1430142
1430167
1430167
1414533
1415230
1414276
1414276
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
100 k
47 k
22 k
200 k
33 k
1.0 k
200 k
33 k
10 k
6.8 k
6.8 k
200 k
33 k
220 k
220 k
1.0 k
10 k
3.3 k
10 k
220 k
2.2 k
27 k
22.1 k
220 k
47
3.3 k
1.0 k
22.1 k
2.2 k
2.2 k
22.1 k
22.1 k
22.1 k
22.1 k
100 k
1.0 k
22.1 k
22.1 k
100 k
4.7
4.7
47
47
56 k
11.0 k
47 k
47 k
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.2 W 0204
1 % 0.1 W 0805
1 % 0.1 W 0805
Original 11/97
PAMS
HFU–2
Technical Documentation
R435
R436
R437
R438
R439
R440
R441
R442
R443
R444
R446
R447
R449
R465
R466
R467
R468
R469
R471
R472
R473
C201
C202
C203
C205
C206
C207
C208
C209
C210
C211
C212
C213
C214
C218
C219
C220
C221
C301
C304
C306
C308
C309
C316
C318
C321
C322
1430095
1430159
1414276
1430043
1415230
1416266
1415939
1415939
1430071
1430167
1430039
1430071
1430043
1415939
1430055
1430001
1430001
1430001
1430053
1430053
1430053
2503072
2320091
2320063
2320083
2505261
2320083
2604209
2503072
2503072
2604093
2604209
2310784
2604209
2604209
2310784
2604209
2604209
2320091
2320091
2320091
2320091
2320063
2320043
2320091
2320059
2320059
Original 11/97
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Electrol. cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Electrol. cap.
Ceramic cap.
Tantalum cap.
Electrol. cap.
Electrol. cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
220 k
22
47 k
2.2 k
11.0 k
140 k
22.1 k
22.1 k
22 k
47
1.5 k
22 k
2.2 k
22.1 k
6.8 k
100
100
100
5.6 k
5.6 k
5.6 k
470 u
2.2 n
150 p
1.0 n
220 u
1.0 n
1.0 u
470 u
470 u
2.2 u
1.0 u
100 n
1.0 u
1.0 u
100 n
1.0 u
1.0 u
2.2 n
2.2 n
2.2 n
2.2 n
150 p
22 p
2.2 n
100 p
100 p
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
20 % 16 V 10x16
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 25 V 8.5x11.5
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
20 % 16 V 10x16
20 % 16 V 10x16
20 % 35 V 6.0x3.2x2.5
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
Page 11
PAMS
HFU–2
C323
C326
C329
C334
C335
C338
C339
C340
C400
C402
C403
C404
C405
C406
C407
C408
C409
C410
C412
C413
C414
C415
C416
C417
C418
C419
C420
C421
C422
C423
C425
C427
C428
C429
C430
C431
C432
C433
C434
C435
C436
C437
C438
C439
C440
C441
C442
Page 12
Technical Documentation
2320091
2320107
2320091
2320091
2505261
2320063
2320043
2320107
2320069
2320079
2320063
2320043
2320091
2320091
2320083
2320063
2320063
2320043
2604209
2320091
2320107
2604209
2320063
2320107
2310784
2310784
2320083
2604209
2320083
2320107
2320083
2320043
2604209
2310784
2320063
2320063
2310784
2320063
2320063
2310791
2320043
2320091
2320091
2320091
2320043
2320091
2320091
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Electrol. cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
2.2 n
10 n
2.2 n
2.2 n
220 u
150 p
22 p
10 n
270 p
680 p
150 p
22 p
2.2 n
2.2 n
1.0 n
150 p
150 p
22 p
1.0 u
2.2 n
10 n
1.0 u
150 p
10 n
100 n
100 n
1.0 n
1.0 u
1.0 n
10 n
1.0 n
22 p
1.0 u
100 n
150 p
150 p
100 n
150 p
150 p
33 n
22 p
2.2 n
2.2 n
2.2 n
22 p
2.2 n
2.2 n
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 25 V 8.5x11.5
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
5 % 50 V 0603
5 % 50 V 0603
20 % 50 V 0805
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
Original 11/97
PAMS
HFU–2
Technical Documentation
C443
C444
C445
C446
C447
C449
C450
C453
C454
C455
C456
C457
C458
C460
C465
C466
C467
C470
C490
L200
2320091
2320043
2320063
2320083
2320091
2320063
2320091
2320063
2320091
2320043
2604431
2604209
2310784
2310784
2320083
2604209
2604209
2310784
2320043
3609001
L201
3609001 Coil
L301
L302
L303
L304
L400
L401
Z300
Z400
Z401
Z402
V200
V201
V202
V203
V204
V205
V207
V208
V300
V301
V302
V304
V306
V307
3641262
3641262
3641262
3641262
3641262
3641262
4507733
3640035
3640035
3640035
4110195
4200917
4211423
4108639
4200909
4110074
4200917
4200917
4200917
4200917
4100285
4200917
4100285
4200917
Original 11/97
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Coil
2.2 n
22 p
150 p
1.0 n
2.2 n
150 p
2.2 n
150 p
2.2 n
22 p
10 u
1.0 u
100 n
100 n
1.0 n
1.0 u
1.0 u
100 n
22 p
100 u
100 u
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Cer.reson 1.0mhz+–0.5% 8.0x5.0smd
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Zener diode
BZX84
Transistor
BC848B/BCW32
MosFet
MTB30
Diode x 2
BAS28
Transistor
BC858B/BCW30
Schottky diode
STPS340U
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Diode x 2
BAV99
Transistor
BC848B/BCW32
Diode x 2
BAV99
Transistor
BC848B/BCW32
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 6.0x3.2x2.5
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
5 % 50 V 0603
10 % Q=20/796 kHz
Q20/796 kHz 8X11
10 % Q=20/796 kHz
Q20/796 kHz 8X11
1206
1206
1206
1206
1206
1206
8.0x5.0smd
0603
0603
0603
5 % 18 V 0.3 W SOT23
npn 30 V 100 mA SOT23
D2PAK
75 V 250 mA SOT143
pnp 30 V 100 mA SOT23
40 V 3 A SOD6
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
70 V 200 mA SER.SOT23
npn 30 V 100 mA SOT23
70 V 200 mA SER.SOT23
npn 30 V 100 mA SOT23
Page 13
PAMS
HFU–2
V309
V310
V311
V312
V313
V314
V315
V318
D300
D400
N200
N201
N202
N204
N400
N401
N402
S001
X100
X200
X300
X400
X500
Page 14
Technical Documentation
4100285
4100285
4210096
4100285
4210020
4200917
4100218
4108639
4370315
4309431
4340127
4305733
4340067
4340067
4301182
4340125
4301199
9510365
5400087
540Y031
540Y021
5409057
5409059
9854195
9854195
Diode x 2
BAV99
Diode x 2
BAV99
Transistor
BCP54
Diode x 2
BAV99
Transistor
BCP69–25
Transistor
BC848B/BCW32
Trans. supr.
LDP24A
Diode x 2
BAS28
IC, MCU
IC, 4 x bi.switch
4066
Mic29152 reg ld adj 1.5a to263–5
IC, 4 x comp
LM2901
IC, regulator
LP2951
IC, regulator
LP2951
IC, 2 x op.amp.
LM2902
L2726 2xop.amp pw5w1a 4–28v so20w
IC, 2 x op.amp.
LM2904
RF shield dmd02481 hfu–1
Modular jack 15pol f p2.04 90deg
Use code 5400103
Use code 5400093
Jack 2.5mm+sw+lock f 4pol str. s
Jack 3.5mm+sw+lock f 3pol str. s
PCB ED2 110.0X75.01.6 D 4/PA
PC board
ED2
70 V 200 mA SER.SOT23
70 V 200 mA SER.SOT23
npn 45 V 1.5 A SOT223
70 V 200 mA SER.SOT23
pnp 20 V 1 A SOT223
npn 30 V 100 mA SOT23
100 V 30A/40 ms AG
75 V 250 mA SOT143
QFP44
SO14S
TO263–5
SO14S
3.3 V 100 mA
3.3 V 100 mA
SO14S
SO20W
SO8S
90DEG
SM
SM
110.0x75.01.6 d 4/pa
Original 11/97
PAMS
HFU–2
Technical Documentation
[This page intentionally left blank]
Original 11/97
Page 15
PAMS Technical Documentation
HFU–2
Original 11/97
PAMS
HFU–2
Technical Documentation
CONTENTS
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage and Power Consumption . . . . . . . . . . . . . . . .
Charging voltage limits within current specifications fulfilled
Audio Specifications, electrical . . . . . . . . . . . . . . . . . . . . . . . . .
HFS–12 Audio Specifications, acoustic . . . . . . . . . . . . . . . . . .
HFM–8 Audio Specifications, acoustic . . . . . . . . . . . . . . . . . . .
Audio signal levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signals and Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exploded View of HFU–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parts list of ED2 (EDMS Issue )
Code: 0200948 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page 2
3
3
4
4
4
5
5
6
6
6
6
7
8
9
Original 11/97
PAMS
Technical Documentation
HFU–2
Introduction
The HFU–2 is a handsfree unit for DCT3 compatible handportable
phones. It provides rapid charging for the phone, a possibility to use HF–
operation and connections to the data–card and handset unit. The HF
box can be connected directly to the Mobile holder MCC–1 via the external cable.
Technical Summary
The HFU–2 has connections to car battery, car ignition sense, car radio
muting, antenna motor control, data–card, handset HSU–1, external
speaker and microphone. The unit has a System–connector that provides an interface to the Mobile holder MCC–1 via the external cable.
The unit consists of a rapid charger, HF–microphone– and speaker amplifiers, interface to handset, – datacard and –phone, voltage regulators and
control circuit (microprocessor).
The HFU–2 is always connected to the car battery. To save the car battery, HFU–2 goes in to the sleep mode if the car is not running and/or the
phone is not connected.
Original 11/97
Page 3
PAMS
HFU–2
Technical Documentation
List of Modules
Name of module
Type code
Material
code
HFU–2
0694049
Advanced handsfree unit
ED2
0200948
ED2 Advanced hadsfree module
MHFU–2
0261602
Mechanical Parts
HF unit
HF module
Assembly parts
Notes
Operation
Phone not connected (sleep mode):
When the phone is not connected the current consumption of
the device has been minimized. The switching mode power
supply (SMPS) and audio circuits has been turned off. HFU–2
is only waiting a phone to be connected.
Phone connected (active mode):
When the phone is connected to the HFU–2 it goes into the active mode. In the active mode the device provides charging
current to the phone. It also can provide hands free call option
using the external speaker and the external microphone or
micspeaker unit. If more private call wants to be made, the
phone itself can be used as a handset without losing the external antenna connection or with handset (option).
The phone controls all functions of HFU–2. In the active mode
the HFU–2 sends all state transitions to phone via mbus.
HFU–2 also provides car radio mute function during call.
HFU–2 can control the mobile antenna motor if it is installed to
the car.
Supply Voltage and Power Consumption
Conn. / pin
Line Symbol
Minimum
X300 / 6
GND
X300 / 1
VB
8.0
X300 / 1
VB
10.8
X300 / 1
VB
X300 / 1
VB
Typical /
Nominal
Page 4
Maximum
0
Unit / Notes
VDC
16
VDC (working)
13.5
16
VDC (spec. fulfill)
0.05
1
2
IDC/A (operating)
0.2
0.8
1
IDC/mA (sleep
mode)
Original 11/97
PAMS
HFU–2
Technical Documentation
Charging voltage limits within current specifications fulfilled
Conn. / pin
Line Symbol
Minimum
Typical /
Nominal
Maximum
X200 / 7
GND
0
0
0.1
VDC
X200 / 2
+10VA
9.50
10.0
10.55
VDC
X200 / 2
+10VA
11
200
Conn. / pin
Unit / Notes
IDC / mA
Line Symbol
Minimum
Typical /
Nominal
Maximum
Unit / Notes
X100 /
5,6,11
GND
0
0
0.1
VDC
X100 / 8,9
V_IN
3
8.5
VDC
X100 / 12
VB
8
16
VDC / car battery
X100 / 12
VB
500
IDC / mA
Audio Specifications, electrical
Minimum
Typical /
Nominal
Max speaker output power at
distortion=1%, 1 kHz sine
3.0
3.1
HF–speaker amplifier gain
27
29
PSRR, XEAR line
–60
–68
dB
CMRR, XEAR–SGND to
speaker
–50
–55
dB
HF–mic amplifier gain
27
30
Mic level at XMIC–SGND,
(clipping level)
2000
Mic distortion at XMIC–
SGND, at Vo = 100 mVrms,
1 kHz
0.15
Crosstalk XEAR–SGND to
XMIC
Original 11/97
31
33
0.4
5
–60
–67
– 55
Unit / Notes
W / Rload = 8 ohm
2800
Noise voltage, HFMIC
PSRR, XMIC
Maximum
dB
dB
mVpp
%
uVrms psofometric
dB
– 45
dB / electrical, 1kHz
Page 5
PAMS
HFU–2
Technical Documentation
HFS–12 Audio Specifications, acoustic
Minimum
Typical /
Nominal
Maximum
Unit / Notes
11
15
19
dBPa / 1V at system
connector is theoretical level
Electroacoustic transfer function (RX) dBPa/1V/0.5m
Speaker distortion level at
XEAR–SGND, d=5%
354
HF–speaker: SPL, approximate over 500 ... 3000 Hz
87
–4
mVrms
89
–2
91
0
dB / 1W / 1m
dBPa / 0.5W at 0,5m
10
uVrms psofometric
400
uVrms psofometric
Equivalent input noise,
XEAR
Total noise, HF speaker
200
HFM–8 Audio Specifications, acoustic
Minimum
Typical /
Nominal
Maximum
–28
–24
–20
dBV/–5dBPa/0.5m
140
300
uVrms psofometric
Typical /
Nominal
Maximum
XEAR / X100 / 4
80
354
SGND / X100 / 3
0
XMIC / X100 / 2
60
HFMIC / X400 / 2
2.0
SPEAKER / X500 / 1 & 2
0.75
Electroacoustic transfer function (TX) dBV/dBPa/0.5m
Total noise, XMIC–SGND
Unit / Notes
Audio signal levels
Signal name / conn. / pin
Minimum
Unit / Notes
mVrms
mVrms
990
mVrms
mVrms
5
V rms
Signals and Connections
Connector Name
Code
Notes
Specifications / Ratings
System connector
X100
Charge, Mbus, Fbus, audio
lines, VB
Modular 15 pin.
Handset / Data connector
X200
Mbus, Fbus, Handset audio– lines, Hshook, 10V
Modular 10 pin.
Car connector
X300
+VB, –VB, ign. sense, car
radio mute, antenna motor
control
2 X 3 Power conn.
HFMIC connector
X400
External microphone
2.5 mm jack
EXT. SPEAKER connector
X500
External speaker
3.2 mm jack
Page 6
Original 11/97
PAMS
HFU–2
Technical Documentation
Block Diagram
VCC
CRM
EXTERNAL
I/O
AMC
IGNS
protec– DC connector
tion
X300
CHARGE
SMPS
VCC
CRM
IGNS
AMC
CHGON
V_IN
RESET
CHRG_CTRL
POWER
SUPPLY
CONTROL
CIRCUITS
MBUS
PWRON
MUTE
System connector X100
AUDIO
protec–
tion
FBUS
AUDIO
INTERFACE
MUTE
LOGIC
MUTE
AUDIO
EAR
HS / Data con– protec–
nector X200
tion
PASSIVE
MIC
POWER
AMPLIFIER
EAR
Original 11/97
MICROPHONE
AMPLIFIER
protec–
tion
External Microphone
Connector X200
protec–
tion
External Speaker
Connector X500
Page 7
PAMS
HFU–2
Technical Documentation
Exploded View of HFU–2
5
4
3
2
1
Page 8
Original 11/97
PAMS
HFU–2
Technical Documentation
Parts list of ED2 (EDMS Issue 5.1)
ITEM
CODE
DESCRIPTION
R200
R201
R202
R203
R204
R205
R206
R207
R209
R210
R211
R212
R213
R214
R215
R216
R218
R219
R222
R223
R224
R225
R226
R227
R228
R233
R240
R245
R246
R270
R300
R301
R302
R303
R304
R306
R307
R310
R311
R312
R313
R315
R316
1415960
1412409
1430051
1413829
1413829
1419007
1413635
1416393
1430001
1415791
1413716
1416273
1430065
1430089
1430105
1415664
1412328
1416798
1410003
1410001
1414283
1414283
1413716
1430051
1430087
1430015
1430001
1415960
1414406
1430087
1430071
1430087
1430087
1430071
1412409
1430071
1430087
1412261
1430073
1430073
1430065
1430065
1430051
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Original 11/97
Code: 0200948
VALUE
33.2 k
1.5 k
4.7 k
10
10
0.22
100 k
221 k
100
100
220 k
150 k
10 k
120 k
560 k
27.4 k
820
681
33 k
22 k
100 k
100 k
220 k
4.7 k
100 k
470
100
33.2 k
5.6 k
100 k
22 k
100 k
100 k
22 k
1.5 k
22 k
100 k
100
27 k
27 k
10 k
10 k
4.7 k
TYPE
1 % 0.2 W 0204
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.1 W 0805
2 % 1210
5 % 0.1 W 0805
1 % 0.2 W 0204
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
1 % 0.2 W 0204
1 % 0.1 W 0805
1 % 0.1 W 0805
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
Page 9
PAMS
HFU–2
R317
R319
R321
R323
R324
R325
R327
R328
R331
R332
R333
R334
R335
R336
R337
R350
R351
R352
R353
R380
R400
R402
R403
R404
R405
R406
R407
R408
R409
R410
R411
R412
R415
R416
R417
R421
R422
R423
R425
R426
R427
R429
R430
R431
R432
R433
R434
Page 10
Technical Documentation
1430087
1430079
1430071
1414536
1410003
1430035
1414536
1410003
1430065
1430055
1430055
1414536
1410003
1430095
1430095
1430035
1430065
1430047
1430065
1430095
1430043
1430073
1415939
1430095
1430167
1430047
1430035
1415939
1430043
1430043
1415939
1415939
1415939
1415939
1430087
1430035
1415939
1415939
1430087
1430142
1430142
1430167
1430167
1414533
1415230
1414276
1414276
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
100 k
47 k
22 k
200 k
33 k
1.0 k
200 k
33 k
10 k
6.8 k
6.8 k
200 k
33 k
220 k
220 k
1.0 k
10 k
3.3 k
10 k
220 k
2.2 k
27 k
22.1 k
220 k
47
3.3 k
1.0 k
22.1 k
2.2 k
2.2 k
22.1 k
22.1 k
22.1 k
22.1 k
100 k
1.0 k
22.1 k
22.1 k
100 k
4.7
4.7
47
47
56 k
11.0 k
47 k
47 k
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.2 W 0204
1 % 0.1 W 0805
1 % 0.1 W 0805
Original 11/97
PAMS
HFU–2
Technical Documentation
R435
R436
R437
R438
R439
R440
R441
R442
R443
R444
R446
R447
R449
R465
R466
R467
R468
R469
R471
R472
R473
C201
C202
C203
C205
C206
C207
C208
C209
C210
C211
C212
C213
C214
C218
C219
C220
C221
C301
C304
C306
C308
C309
C316
C318
C321
C322
1430095
1430159
1414276
1430043
1415230
1416266
1415939
1415939
1430071
1430167
1430039
1430071
1430043
1415939
1430055
1430001
1430001
1430001
1430053
1430053
1430053
2503072
2320091
2320063
2320083
2505261
2320083
2604209
2503072
2503072
2604093
2604209
2310784
2604209
2604209
2310784
2604209
2604209
2320091
2320091
2320091
2320091
2320063
2320043
2320091
2320059
2320059
Original 11/97
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Electrol. cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Electrol. cap.
Ceramic cap.
Tantalum cap.
Electrol. cap.
Electrol. cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
220 k
22
47 k
2.2 k
11.0 k
140 k
22.1 k
22.1 k
22 k
47
1.5 k
22 k
2.2 k
22.1 k
6.8 k
100
100
100
5.6 k
5.6 k
5.6 k
470 u
2.2 n
150 p
1.0 n
220 u
1.0 n
1.0 u
470 u
470 u
2.2 u
1.0 u
100 n
1.0 u
1.0 u
100 n
1.0 u
1.0 u
2.2 n
2.2 n
2.2 n
2.2 n
150 p
22 p
2.2 n
100 p
100 p
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
20 % 16 V 10x16
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 25 V 8.5x11.5
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
20 % 16 V 10x16
20 % 16 V 10x16
20 % 35 V 6.0x3.2x2.5
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
Page 11
PAMS
HFU–2
C323
C326
C329
C334
C335
C338
C339
C340
C400
C402
C403
C404
C405
C406
C407
C408
C409
C410
C412
C413
C414
C415
C416
C417
C418
C419
C420
C421
C422
C423
C425
C427
C428
C429
C430
C431
C432
C433
C434
C435
C436
C437
C438
C439
C440
C441
C442
Page 12
Technical Documentation
2320091
2320107
2320091
2320091
2505261
2320063
2320043
2320107
2320069
2320079
2320063
2320043
2320091
2320091
2320083
2320063
2320063
2320043
2604209
2320091
2320107
2604209
2320063
2320107
2310784
2310784
2320083
2604209
2320083
2320107
2320083
2320043
2604209
2310784
2320063
2320063
2310784
2320063
2320063
2310791
2320043
2320091
2320091
2320091
2320043
2320091
2320091
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Electrol. cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
2.2 n
10 n
2.2 n
2.2 n
220 u
150 p
22 p
10 n
270 p
680 p
150 p
22 p
2.2 n
2.2 n
1.0 n
150 p
150 p
22 p
1.0 u
2.2 n
10 n
1.0 u
150 p
10 n
100 n
100 n
1.0 n
1.0 u
1.0 n
10 n
1.0 n
22 p
1.0 u
100 n
150 p
150 p
100 n
150 p
150 p
33 n
22 p
2.2 n
2.2 n
2.2 n
22 p
2.2 n
2.2 n
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 25 V 8.5x11.5
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
5 % 50 V 0603
5 % 50 V 0603
20 % 50 V 0805
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
Original 11/97
PAMS
HFU–2
Technical Documentation
C443
C444
C445
C446
C447
C449
C450
C453
C454
C455
C456
C457
C458
C460
C465
C466
C467
C470
C490
L200
2320091
2320043
2320063
2320083
2320091
2320063
2320091
2320063
2320091
2320043
2604431
2604209
2310784
2310784
2320083
2604209
2604209
2310784
2320043
3609001
L201
3609001 Coil
L301
L302
L303
L304
L400
L401
Z300
Z400
Z401
Z402
V200
V201
V202
V203
V204
V205
V207
V208
V300
V301
V302
V304
V306
V307
3641262
3641262
3641262
3641262
3641262
3641262
4507733
3640035
3640035
3640035
4110195
4200917
4211423
4108639
4200909
4110074
4200917
4200917
4200917
4200917
4100285
4200917
4100285
4200917
Original 11/97
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Coil
2.2 n
22 p
150 p
1.0 n
2.2 n
150 p
2.2 n
150 p
2.2 n
22 p
10 u
1.0 u
100 n
100 n
1.0 n
1.0 u
1.0 u
100 n
22 p
100 u
100 u
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Cer.reson 1.0mhz+–0.5% 8.0x5.0smd
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Zener diode
BZX84
Transistor
BC848B/BCW32
MosFet
MTB30
Diode x 2
BAS28
Transistor
BC858B/BCW30
Schottky diode
STPS340U
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Diode x 2
BAV99
Transistor
BC848B/BCW32
Diode x 2
BAV99
Transistor
BC848B/BCW32
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 6.0x3.2x2.5
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
5 % 50 V 0603
10 % Q=20/796 kHz
Q20/796 kHz 8X11
10 % Q=20/796 kHz
Q20/796 kHz 8X11
1206
1206
1206
1206
1206
1206
8.0x5.0smd
0603
0603
0603
5 % 18 V 0.3 W SOT23
npn 30 V 100 mA SOT23
D2PAK
75 V 250 mA SOT143
pnp 30 V 100 mA SOT23
40 V 3 A SOD6
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
70 V 200 mA SER.SOT23
npn 30 V 100 mA SOT23
70 V 200 mA SER.SOT23
npn 30 V 100 mA SOT23
Page 13
PAMS
HFU–2
V309
V310
V311
V312
V313
V314
V315
V318
D300
D400
N200
N201
N202
N204
N400
N401
N402
S001
X100
X200
X300
X400
X500
Page 14
Technical Documentation
4100285
4100285
4210096
4100285
4210020
4200917
4100218
4108639
4370315
4309431
4340127
4305733
4340067
4340067
4301182
4340125
4301199
9510365
5400087
540Y031
540Y021
5409057
5409059
9854195
9854195
Diode x 2
BAV99
Diode x 2
BAV99
Transistor
BCP54
Diode x 2
BAV99
Transistor
BCP69–25
Transistor
BC848B/BCW32
Trans. supr.
LDP24A
Diode x 2
BAS28
IC, MCU
IC, 4 x bi.switch
4066
Mic29152 reg ld adj 1.5a to263–5
IC, 4 x comp
LM2901
IC, regulator
LP2951
IC, regulator
LP2951
IC, 2 x op.amp.
LM2902
L2726 2xop.amp pw5w1a 4–28v so20w
IC, 2 x op.amp.
LM2904
RF shield dmd02481 hfu–1
Modular jack 15pol f p2.04 90deg
Use code 5400103
Use code 5400093
Jack 2.5mm+sw+lock f 4pol str. s
Jack 3.5mm+sw+lock f 3pol str. s
PCB ED2 110.0X75.01.6 D 4/PA
PC board
ED2
70 V 200 mA SER.SOT23
70 V 200 mA SER.SOT23
npn 45 V 1.5 A SOT223
70 V 200 mA SER.SOT23
pnp 20 V 1 A SOT223
npn 30 V 100 mA SOT23
100 V 30A/40 ms AG
75 V 250 mA SOT143
QFP44
SO14S
TO263–5
SO14S
3.3 V 100 mA
3.3 V 100 mA
SO14S
SO20W
SO8S
90DEG
SM
SM
110.0x75.01.6 d 4/pa
Original 11/97
PAMS
HFU–2
Technical Documentation
[This page intentionally left blank]
Original 11/97
Page 15
PAMS Technical Documentation
HFU–2
Original 11/97
PAMS
HFU–2
Technical Documentation
CONTENTS
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage and Power Consumption . . . . . . . . . . . . . . . .
Charging voltage limits within current specifications fulfilled
Audio Specifications, electrical . . . . . . . . . . . . . . . . . . . . . . . . .
HFS–12 Audio Specifications, acoustic . . . . . . . . . . . . . . . . . .
HFM–8 Audio Specifications, acoustic . . . . . . . . . . . . . . . . . . .
Audio signal levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signals and Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exploded View of HFU–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parts list of ED2 (EDMS Issue )
Code: 0200948 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page 2
3
3
4
4
4
5
5
6
6
6
6
7
8
9
Original 11/97
PAMS
Technical Documentation
HFU–2
Introduction
The HFU–2 is a handsfree unit for DCT3 compatible handportable
phones. It provides rapid charging for the phone, a possibility to use HF–
operation and connections to the data–card and handset unit. The HF
box can be connected directly to the Mobile holder MCC–1 via the external cable.
Technical Summary
The HFU–2 has connections to car battery, car ignition sense, car radio
muting, antenna motor control, data–card, handset HSU–1, external
speaker and microphone. The unit has a System–connector that provides an interface to the Mobile holder MCC–1 via the external cable.
The unit consists of a rapid charger, HF–microphone– and speaker amplifiers, interface to handset, – datacard and –phone, voltage regulators and
control circuit (microprocessor).
The HFU–2 is always connected to the car battery. To save the car battery, HFU–2 goes in to the sleep mode if the car is not running and/or the
phone is not connected.
Original 11/97
Page 3
PAMS
HFU–2
Technical Documentation
List of Modules
Name of module
Type code
Material
code
HFU–2
0694049
Advanced handsfree unit
ED2
0200948
ED2 Advanced hadsfree module
MHFU–2
0261602
Mechanical Parts
HF unit
HF module
Assembly parts
Notes
Operation
Phone not connected (sleep mode):
When the phone is not connected the current consumption of
the device has been minimized. The switching mode power
supply (SMPS) and audio circuits has been turned off. HFU–2
is only waiting a phone to be connected.
Phone connected (active mode):
When the phone is connected to the HFU–2 it goes into the active mode. In the active mode the device provides charging
current to the phone. It also can provide hands free call option
using the external speaker and the external microphone or
micspeaker unit. If more private call wants to be made, the
phone itself can be used as a handset without losing the external antenna connection or with handset (option).
The phone controls all functions of HFU–2. In the active mode
the HFU–2 sends all state transitions to phone via mbus.
HFU–2 also provides car radio mute function during call.
HFU–2 can control the mobile antenna motor if it is installed to
the car.
Supply Voltage and Power Consumption
Conn. / pin
Line Symbol
Minimum
X300 / 6
GND
X300 / 1
VB
8.0
X300 / 1
VB
10.8
X300 / 1
VB
X300 / 1
VB
Typical /
Nominal
Page 4
Maximum
0
Unit / Notes
VDC
16
VDC (working)
13.5
16
VDC (spec. fulfill)
0.05
1
2
IDC/A (operating)
0.2
0.8
1
IDC/mA (sleep
mode)
Original 11/97
PAMS
HFU–2
Technical Documentation
Charging voltage limits within current specifications fulfilled
Conn. / pin
Line Symbol
Minimum
Typical /
Nominal
Maximum
X200 / 7
GND
0
0
0.1
VDC
X200 / 2
+10VA
9.50
10.0
10.55
VDC
X200 / 2
+10VA
11
200
Conn. / pin
Unit / Notes
IDC / mA
Line Symbol
Minimum
Typical /
Nominal
Maximum
Unit / Notes
X100 /
5,6,11
GND
0
0
0.1
VDC
X100 / 8,9
V_IN
3
8.5
VDC
X100 / 12
VB
8
16
VDC / car battery
X100 / 12
VB
500
IDC / mA
Audio Specifications, electrical
Minimum
Typical /
Nominal
Max speaker output power at
distortion=1%, 1 kHz sine
3.0
3.1
HF–speaker amplifier gain
27
29
PSRR, XEAR line
–60
–68
dB
CMRR, XEAR–SGND to
speaker
–50
–55
dB
HF–mic amplifier gain
27
30
Mic level at XMIC–SGND,
(clipping level)
2000
Mic distortion at XMIC–
SGND, at Vo = 100 mVrms,
1 kHz
0.15
Crosstalk XEAR–SGND to
XMIC
Original 11/97
31
33
0.4
5
–60
–67
– 55
Unit / Notes
W / Rload = 8 ohm
2800
Noise voltage, HFMIC
PSRR, XMIC
Maximum
dB
dB
mVpp
%
uVrms psofometric
dB
– 45
dB / electrical, 1kHz
Page 5
PAMS
HFU–2
Technical Documentation
HFS–12 Audio Specifications, acoustic
Minimum
Typical /
Nominal
Maximum
Unit / Notes
11
15
19
dBPa / 1V at system
connector is theoretical level
Electroacoustic transfer function (RX) dBPa/1V/0.5m
Speaker distortion level at
XEAR–SGND, d=5%
354
HF–speaker: SPL, approximate over 500 ... 3000 Hz
87
–4
mVrms
89
–2
91
0
dB / 1W / 1m
dBPa / 0.5W at 0,5m
10
uVrms psofometric
400
uVrms psofometric
Equivalent input noise,
XEAR
Total noise, HF speaker
200
HFM–8 Audio Specifications, acoustic
Minimum
Typical /
Nominal
Maximum
–28
–24
–20
dBV/–5dBPa/0.5m
140
300
uVrms psofometric
Typical /
Nominal
Maximum
XEAR / X100 / 4
80
354
SGND / X100 / 3
0
XMIC / X100 / 2
60
HFMIC / X400 / 2
2.0
SPEAKER / X500 / 1 & 2
0.75
Electroacoustic transfer function (TX) dBV/dBPa/0.5m
Total noise, XMIC–SGND
Unit / Notes
Audio signal levels
Signal name / conn. / pin
Minimum
Unit / Notes
mVrms
mVrms
990
mVrms
mVrms
5
V rms
Signals and Connections
Connector Name
Code
Notes
Specifications / Ratings
System connector
X100
Charge, Mbus, Fbus, audio
lines, VB
Modular 15 pin.
Handset / Data connector
X200
Mbus, Fbus, Handset audio– lines, Hshook, 10V
Modular 10 pin.
Car connector
X300
+VB, –VB, ign. sense, car
radio mute, antenna motor
control
2 X 3 Power conn.
HFMIC connector
X400
External microphone
2.5 mm jack
EXT. SPEAKER connector
X500
External speaker
3.2 mm jack
Page 6
Original 11/97
PAMS
HFU–2
Technical Documentation
Block Diagram
VCC
CRM
EXTERNAL
I/O
AMC
IGNS
protec– DC connector
tion
X300
CHARGE
SMPS
VCC
CRM
IGNS
AMC
CHGON
V_IN
RESET
CHRG_CTRL
POWER
SUPPLY
CONTROL
CIRCUITS
MBUS
PWRON
MUTE
System connector X100
AUDIO
protec–
tion
FBUS
AUDIO
INTERFACE
MUTE
LOGIC
MUTE
AUDIO
EAR
HS / Data con– protec–
nector X200
tion
PASSIVE
MIC
POWER
AMPLIFIER
EAR
Original 11/97
MICROPHONE
AMPLIFIER
protec–
tion
External Microphone
Connector X200
protec–
tion
External Speaker
Connector X500
Page 7
PAMS
HFU–2
Technical Documentation
Exploded View of HFU–2
5
4
3
2
1
Page 8
Original 11/97
PAMS
HFU–2
Technical Documentation
Parts list of ED2 (EDMS Issue 5.1)
ITEM
CODE
DESCRIPTION
R200
R201
R202
R203
R204
R205
R206
R207
R209
R210
R211
R212
R213
R214
R215
R216
R218
R219
R222
R223
R224
R225
R226
R227
R228
R233
R240
R245
R246
R270
R300
R301
R302
R303
R304
R306
R307
R310
R311
R312
R313
R315
R316
1415960
1412409
1430051
1413829
1413829
1419007
1413635
1416393
1430001
1415791
1413716
1416273
1430065
1430089
1430105
1415664
1412328
1416798
1410003
1410001
1414283
1414283
1413716
1430051
1430087
1430015
1430001
1415960
1414406
1430087
1430071
1430087
1430087
1430071
1412409
1430071
1430087
1412261
1430073
1430073
1430065
1430065
1430051
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Original 11/97
Code: 0200948
VALUE
33.2 k
1.5 k
4.7 k
10
10
0.22
100 k
221 k
100
100
220 k
150 k
10 k
120 k
560 k
27.4 k
820
681
33 k
22 k
100 k
100 k
220 k
4.7 k
100 k
470
100
33.2 k
5.6 k
100 k
22 k
100 k
100 k
22 k
1.5 k
22 k
100 k
100
27 k
27 k
10 k
10 k
4.7 k
TYPE
1 % 0.2 W 0204
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.1 W 0805
2 % 1210
5 % 0.1 W 0805
1 % 0.2 W 0204
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
1 % 0.2 W 0204
1 % 0.1 W 0805
1 % 0.1 W 0805
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
Page 9
PAMS
HFU–2
R317
R319
R321
R323
R324
R325
R327
R328
R331
R332
R333
R334
R335
R336
R337
R350
R351
R352
R353
R380
R400
R402
R403
R404
R405
R406
R407
R408
R409
R410
R411
R412
R415
R416
R417
R421
R422
R423
R425
R426
R427
R429
R430
R431
R432
R433
R434
Page 10
Technical Documentation
1430087
1430079
1430071
1414536
1410003
1430035
1414536
1410003
1430065
1430055
1430055
1414536
1410003
1430095
1430095
1430035
1430065
1430047
1430065
1430095
1430043
1430073
1415939
1430095
1430167
1430047
1430035
1415939
1430043
1430043
1415939
1415939
1415939
1415939
1430087
1430035
1415939
1415939
1430087
1430142
1430142
1430167
1430167
1414533
1415230
1414276
1414276
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
100 k
47 k
22 k
200 k
33 k
1.0 k
200 k
33 k
10 k
6.8 k
6.8 k
200 k
33 k
220 k
220 k
1.0 k
10 k
3.3 k
10 k
220 k
2.2 k
27 k
22.1 k
220 k
47
3.3 k
1.0 k
22.1 k
2.2 k
2.2 k
22.1 k
22.1 k
22.1 k
22.1 k
100 k
1.0 k
22.1 k
22.1 k
100 k
4.7
4.7
47
47
56 k
11.0 k
47 k
47 k
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.1 W 0805
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
1 % 0.2 W 0204
1 % 0.1 W 0805
1 % 0.1 W 0805
Original 11/97
PAMS
HFU–2
Technical Documentation
R435
R436
R437
R438
R439
R440
R441
R442
R443
R444
R446
R447
R449
R465
R466
R467
R468
R469
R471
R472
R473
C201
C202
C203
C205
C206
C207
C208
C209
C210
C211
C212
C213
C214
C218
C219
C220
C221
C301
C304
C306
C308
C309
C316
C318
C321
C322
1430095
1430159
1414276
1430043
1415230
1416266
1415939
1415939
1430071
1430167
1430039
1430071
1430043
1415939
1430055
1430001
1430001
1430001
1430053
1430053
1430053
2503072
2320091
2320063
2320083
2505261
2320083
2604209
2503072
2503072
2604093
2604209
2310784
2604209
2604209
2310784
2604209
2604209
2320091
2320091
2320091
2320091
2320063
2320043
2320091
2320059
2320059
Original 11/97
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Melf resistor
Melf resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Melf resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Chip resistor
Electrol. cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Electrol. cap.
Ceramic cap.
Tantalum cap.
Electrol. cap.
Electrol. cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
220 k
22
47 k
2.2 k
11.0 k
140 k
22.1 k
22.1 k
22 k
47
1.5 k
22 k
2.2 k
22.1 k
6.8 k
100
100
100
5.6 k
5.6 k
5.6 k
470 u
2.2 n
150 p
1.0 n
220 u
1.0 n
1.0 u
470 u
470 u
2.2 u
1.0 u
100 n
1.0 u
1.0 u
100 n
1.0 u
1.0 u
2.2 n
2.2 n
2.2 n
2.2 n
150 p
22 p
2.2 n
100 p
100 p
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.1 W 0805
5 % 0.063 W 0603
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
1 % 0.2 W 0204
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
5 % 0.063 W 0603
20 % 16 V 10x16
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 25 V 8.5x11.5
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
20 % 16 V 10x16
20 % 16 V 10x16
20 % 35 V 6.0x3.2x2.5
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
Page 11
PAMS
HFU–2
C323
C326
C329
C334
C335
C338
C339
C340
C400
C402
C403
C404
C405
C406
C407
C408
C409
C410
C412
C413
C414
C415
C416
C417
C418
C419
C420
C421
C422
C423
C425
C427
C428
C429
C430
C431
C432
C433
C434
C435
C436
C437
C438
C439
C440
C441
C442
Page 12
Technical Documentation
2320091
2320107
2320091
2320091
2505261
2320063
2320043
2320107
2320069
2320079
2320063
2320043
2320091
2320091
2320083
2320063
2320063
2320043
2604209
2320091
2320107
2604209
2320063
2320107
2310784
2310784
2320083
2604209
2320083
2320107
2320083
2320043
2604209
2310784
2320063
2320063
2310784
2320063
2320063
2310791
2320043
2320091
2320091
2320091
2320043
2320091
2320091
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Electrol. cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
2.2 n
10 n
2.2 n
2.2 n
220 u
150 p
22 p
10 n
270 p
680 p
150 p
22 p
2.2 n
2.2 n
1.0 n
150 p
150 p
22 p
1.0 u
2.2 n
10 n
1.0 u
150 p
10 n
100 n
100 n
1.0 n
1.0 u
1.0 n
10 n
1.0 n
22 p
1.0 u
100 n
150 p
150 p
100 n
150 p
150 p
33 n
22 p
2.2 n
2.2 n
2.2 n
22 p
2.2 n
2.2 n
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 25 V 8.5x11.5
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
5 % 50 V 0603
5 % 50 V 0603
10 % 25 V 0805
5 % 50 V 0603
5 % 50 V 0603
20 % 50 V 0805
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
Original 11/97
PAMS
HFU–2
Technical Documentation
C443
C444
C445
C446
C447
C449
C450
C453
C454
C455
C456
C457
C458
C460
C465
C466
C467
C470
C490
L200
2320091
2320043
2320063
2320083
2320091
2320063
2320091
2320063
2320091
2320043
2604431
2604209
2310784
2310784
2320083
2604209
2604209
2310784
2320043
3609001
L201
3609001 Coil
L301
L302
L303
L304
L400
L401
Z300
Z400
Z401
Z402
V200
V201
V202
V203
V204
V205
V207
V208
V300
V301
V302
V304
V306
V307
3641262
3641262
3641262
3641262
3641262
3641262
4507733
3640035
3640035
3640035
4110195
4200917
4211423
4108639
4200909
4110074
4200917
4200917
4200917
4200917
4100285
4200917
4100285
4200917
Original 11/97
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Ceramic cap.
Tantalum cap.
Tantalum cap.
Ceramic cap.
Ceramic cap.
Coil
2.2 n
22 p
150 p
1.0 n
2.2 n
150 p
2.2 n
150 p
2.2 n
22 p
10 u
1.0 u
100 n
100 n
1.0 n
1.0 u
1.0 u
100 n
22 p
100 u
100 u
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Ferrite bead 30r/100mhz 2a 1206
Cer.reson 1.0mhz+–0.5% 8.0x5.0smd
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Filt z & gt; 450r/100m 0r7max 0.2a 0603
Zener diode
BZX84
Transistor
BC848B/BCW32
MosFet
MTB30
Diode x 2
BAS28
Transistor
BC858B/BCW30
Schottky diode
STPS340U
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Transistor
BC848B/BCW32
Diode x 2
BAV99
Transistor
BC848B/BCW32
Diode x 2
BAV99
Transistor
BC848B/BCW32
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
5 % 50 V 0603
20 % 16 V 6.0x3.2x2.5
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
10 % 25 V 0805
5 % 50 V 0603
20 % 16 V 3.2x1.6x1.6
20 % 16 V 3.2x1.6x1.6
10 % 25 V 0805
5 % 50 V 0603
10 % Q=20/796 kHz
Q20/796 kHz 8X11
10 % Q=20/796 kHz
Q20/796 kHz 8X11
1206
1206
1206
1206
1206
1206
8.0x5.0smd
0603
0603
0603
5 % 18 V 0.3 W SOT23
npn 30 V 100 mA SOT23
D2PAK
75 V 250 mA SOT143
pnp 30 V 100 mA SOT23
40 V 3 A SOD6
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
npn 30 V 100 mA SOT23
70 V 200 mA SER.SOT23
npn 30 V 100 mA SOT23
70 V 200 mA SER.SOT23
npn 30 V 100 mA SOT23
Page 13
PAMS
HFU–2
V309
V310
V311
V312
V313
V314
V315
V318
D300
D400
N200
N201
N202
N204
N400
N401
N402
S001
X100
X200
X300
X400
X500
Page 14
Technical Documentation
4100285
4100285
4210096
4100285
4210020
4200917
4100218
4108639
4370315
4309431
4340127
4305733
4340067
4340067
4301182
4340125
4301199
9510365
5400087
540Y031
540Y021
5409057
5409059
9854195
9854195
Diode x 2
BAV99
Diode x 2
BAV99
Transistor
BCP54
Diode x 2
BAV99
Transistor
BCP69–25
Transistor
BC848B/BCW32
Trans. supr.
LDP24A
Diode x 2
BAS28
IC, MCU
IC, 4 x bi.switch
4066
Mic29152 reg ld adj 1.5a to263–5
IC, 4 x comp
LM2901
IC, regulator
LP2951
IC, regulator
LP2951
IC, 2 x op.amp.
LM2902
L2726 2xop.amp pw5w1a 4–28v so20w
IC, 2 x op.amp.
LM2904
RF shield dmd02481 hfu–1
Modular jack 15pol f p2.04 90deg
Use code 5400103
Use code 5400093
Jack 2.5mm+sw+lock f 4pol str. s
Jack 3.5mm+sw+lock f 3pol str. s
PCB ED2 110.0X75.01.6 D 4/PA
PC board
ED2
70 V 200 mA SER.SOT23
70 V 200 mA SER.SOT23
npn 45 V 1.5 A SOT223
70 V 200 mA SER.SOT23
pnp 20 V 1 A SOT223
npn 30 V 100 mA SOT23
100 V 30A/40 ms AG
75 V 250 mA SOT143
QFP44
SO14S
TO263–5
SO14S
3.3 V 100 mA
3.3 V 100 mA
SO14S
SO20W
SO8S
90DEG
SM
SM
110.0x75.01.6 d 4/pa
Original 11/97
PAMS
HFU–2
Technical Documentation
[This page intentionally left blank]
Original 11/97
Page 15